JP2005514814A5 - - Google Patents

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Publication number
JP2005514814A5
JP2005514814A5 JP2003555795A JP2003555795A JP2005514814A5 JP 2005514814 A5 JP2005514814 A5 JP 2005514814A5 JP 2003555795 A JP2003555795 A JP 2003555795A JP 2003555795 A JP2003555795 A JP 2003555795A JP 2005514814 A5 JP2005514814 A5 JP 2005514814A5
Authority
JP
Japan
Prior art keywords
circuit
control
control line
signal
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003555795A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005514814A (ja
JP4260632B2 (ja
Filing date
Publication date
Priority claimed from US10/024,981 external-priority patent/US6870578B2/en
Application filed filed Critical
Publication of JP2005514814A publication Critical patent/JP2005514814A/ja
Publication of JP2005514814A5 publication Critical patent/JP2005514814A5/ja
Application granted granted Critical
Publication of JP4260632B2 publication Critical patent/JP4260632B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2003555795A 2001-12-19 2002-12-11 信号制御ラインを共有する装置および方法 Expired - Fee Related JP4260632B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/024,981 US6870578B2 (en) 2001-12-19 2001-12-19 Apparatus and method for sharing signal control lines
PCT/US2002/039503 WO2003055203A1 (en) 2001-12-19 2002-12-11 Apparatus and method for sharing signal control lines

Publications (3)

Publication Number Publication Date
JP2005514814A JP2005514814A (ja) 2005-05-19
JP2005514814A5 true JP2005514814A5 (enExample) 2006-02-02
JP4260632B2 JP4260632B2 (ja) 2009-04-30

Family

ID=21823380

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003555795A Expired - Fee Related JP4260632B2 (ja) 2001-12-19 2002-12-11 信号制御ラインを共有する装置および方法

Country Status (10)

Country Link
US (1) US6870578B2 (enExample)
EP (1) EP1457043B1 (enExample)
JP (1) JP4260632B2 (enExample)
KR (1) KR100922019B1 (enExample)
CN (1) CN1276650C (enExample)
AU (1) AU2002351345A1 (enExample)
DE (1) DE60229069D1 (enExample)
MX (1) MXPA04006064A (enExample)
MY (1) MY136143A (enExample)
WO (1) WO2003055203A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6563953B2 (en) 1998-11-30 2003-05-13 Microsoft Corporation Predictive image compression using a single variable length code for both the luminance and chrominance blocks for each macroblock
KR100925968B1 (ko) 2001-12-17 2009-11-09 마이크로소프트 코포레이션 컴퓨터 시스템에서 비디오 시퀀스의 복수의 비디오 화상을 처리하는 방법, 시스템 및 컴퓨터 판독가능 매체
US8525931B2 (en) * 2002-01-11 2013-09-03 Thomson Licensing Method and apparatus for isolating IIC bus noise from a tuner in a television receiver
KR100692529B1 (ko) * 2005-07-01 2007-03-09 삼성전자주식회사 최적화된 딜레이 타임 결정 방법, 장치 및 최적화된 딜레이타임 결정 프로그램이 기록된 컴퓨터로 판독 가능한기록매체
US9077960B2 (en) 2005-08-12 2015-07-07 Microsoft Corporation Non-zero coefficient block pattern coding
JP4897073B2 (ja) * 2010-06-30 2012-03-14 株式会社東芝 電源供給回路

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472970A (ja) * 1990-07-13 1992-03-06 Matsushita Electric Ind Co Ltd シャーシ構造
US5563655A (en) * 1994-02-28 1996-10-08 Eastman Kodak Company Intelligent digital image storage for an electronic camera
US6151077A (en) * 1994-12-22 2000-11-21 U.S. Philips Corporation Interface system for a television receiver
US5748255A (en) * 1994-12-22 1998-05-05 Philips Electronics North America Corporation Interface system for a television receiver
US6437829B1 (en) * 1997-01-16 2002-08-20 Display Laboratories, Inc. Alignment of cathode ray tube displays using a video graphics controller
US6693678B1 (en) * 1997-12-18 2004-02-17 Thomson Licensing S.A. Data bus driver having first and second operating modes for coupling data to the bus at first and second rates

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