JP2005512383A - 単純な復号化方法及び装置 - Google Patents
単純な復号化方法及び装置 Download PDFInfo
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- JP2005512383A JP2005512383A JP2003550370A JP2003550370A JP2005512383A JP 2005512383 A JP2005512383 A JP 2005512383A JP 2003550370 A JP2003550370 A JP 2003550370A JP 2003550370 A JP2003550370 A JP 2003550370A JP 2005512383 A JP2005512383 A JP 2005512383A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2927—Decoding strategies
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
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- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Description
前記ことによると損傷した符号ワードrを符号ワードr’に復号化するステップと、
前記符号ワードr’から情報記号を復元するステップと、
前記復元された情報記号を、復号化の前に既知である情報記号と比較するステップと、
前記比較の結果に基づいて復号化誤りを検証するステップと、
を有する方法によって達成される。
Wesley、1984年5月、3.2節)より広く利用され知られている。かような生成行列はとりわけ、CDオーディオ規格のような規格において利用され記載されている。
Claims (9)
- 符号のことによると損傷した符号ワードrを情報記号を有する情報ワードm’に復号化する方法であって、情報ワードmが前記符号の符号ワードcに符号化される方法において、
前記ことによると損傷した符号ワードrを符号ワードr’に復号化するステップと、
前記符号ワードr’から情報記号を復元するステップと、
前記復元された情報記号を、復号化の前に既知である情報記号と比較するステップと、
前記比較の結果に基づいて復号化誤りを検証するステップと、
を有する方法。 - 前記情報記号はシンドローム形成によって復元される、請求項1に記載の方法。
- 前記情報ワードmは生成行列を利用して前記符号ワードcに符号化され、少なくとも1つの情報記号が復号化の前に既知である場合に向上された誤り訂正能力を提供する、請求項1に記載の方法。
- 前記符号の少なくとも1つのサブ符号の最小ハミング距離が、前記符号の最小ハミング距離よりも大きくなるように、及び前記少なくとも1つの既知の情報記号に対応する少なくとも1つの行を前記生成行列から省略することにより前記符号の前記生成行列から前記サブ符号のサブ符号生成行列が得られるように、前記生成行列が選択される、請求項3に記載の方法。
- 前記ことによると損傷した符号ワードrに含まれる前記少なくとも1つの既知の情報記号の寄与は、向上された誤り訂正能力を用いて前記ことによると損傷した符号ワードrを復号化するために考慮に入れられる、請求項3に記載の方法。
- アドレスワードは、互いに近接したアドレスを有するアドレスワードが複数の情報記号を共有するように前記情報記号に符号化される、請求項1に記載の方法。
- 前記方法は、デジタル・ビデオ・レコーディングにおいて利用されるアドレスワードを符号化するために、とりわけウォブルアドレスのアドレスワードを符号化するために利用される、請求項6に記載の方法。
- 符号のことによると損傷した符号ワードrを情報記号を有する情報ワードm’に復号化する装置であって、情報ワードmが前記符号の符号ワードcに符号化される装置において、
前記ことによると損傷した符号ワードrを符号ワードr’に復号化する手段と、
前記符号ワードr’から情報記号を復元する手段と、
前記復元された情報記号を、復号化の前に既知である情報記号と比較する手段と、
前記比較の結果に基づいて復号化誤りを検証する手段と、
を有する装置。 - コンピュータ上で実行されるときに、請求項1に記載の方法のステップをコンピュータに実行させるプログラムコード手段を有するコンピュータプログラム。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01204722 | 2001-12-06 | ||
PCT/IB2002/005016 WO2003049297A2 (en) | 2001-12-06 | 2002-11-26 | Simple decoding method and apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005512383A true JP2005512383A (ja) | 2005-04-28 |
JP4191043B2 JP4191043B2 (ja) | 2008-12-03 |
Family
ID=8181370
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003550370A Expired - Fee Related JP4191043B2 (ja) | 2001-12-06 | 2002-11-26 | 単純な復号化方法及び装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7487429B2 (ja) |
EP (1) | EP1459451A2 (ja) |
JP (1) | JP4191043B2 (ja) |
KR (1) | KR20040073451A (ja) |
CN (1) | CN1599981A (ja) |
AU (1) | AU2002351050A1 (ja) |
WO (1) | WO2003049297A2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008226300A (ja) * | 2007-03-09 | 2008-09-25 | Nec Electronics Corp | 復号方法及び復号回路 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7487429B2 (en) | 2001-12-06 | 2009-02-03 | Koninklijke Philips Electronics N.V. | Simple decoding method and apparatus |
EP2248010A4 (en) * | 2008-02-14 | 2012-02-29 | Hewlett Packard Development Co | METHOD AND SYSTEM FOR DETECTING AND CORRECTING PHASE GUSTING ERRORS, ERASURES, SYMBOL ERRORS AND BINARY ERRORS IN A RECEIVED SYMBOL CHAIN |
CN101872412B (zh) * | 2010-06-01 | 2015-10-07 | 福建新大陆电脑股份有限公司 | 一种条码解码过程使用的码表的生成方法 |
KR102296738B1 (ko) * | 2015-06-01 | 2021-09-01 | 삼성전자 주식회사 | 반도체 메모리 장치, 이를 포함하는 메모리 시스템 및 반도체 메모리 장치의 에러 정정 방법 |
KR200488737Y1 (ko) | 2017-02-27 | 2019-03-12 | 이우창 | 휴대폰 케이스 |
US10686471B2 (en) | 2017-11-22 | 2020-06-16 | Samsung Electronics Co., Ltd. | One-sub-symbol linear repair schemes |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6986094B2 (en) * | 2001-03-29 | 2006-01-10 | Intel Corporation | Device and method for selecting opcode values with maximum hamming distance to minimize latency and buffering requirements |
CN1572059A (zh) | 2001-08-20 | 2005-01-26 | 皇家飞利浦电子股份有限公司 | 用于有信息的解码器的增强编码 |
US7487429B2 (en) | 2001-12-06 | 2009-02-03 | Koninklijke Philips Electronics N.V. | Simple decoding method and apparatus |
US20040003694A1 (en) | 2002-04-30 | 2004-01-08 | Cesaroni Anthony Joseph | Device and method for trimming and securing flexible tubes within a structure and articles made therefrom |
-
2002
- 2002-11-26 US US10/497,337 patent/US7487429B2/en not_active Expired - Fee Related
- 2002-11-26 WO PCT/IB2002/005016 patent/WO2003049297A2/en active Application Filing
- 2002-11-26 AU AU2002351050A patent/AU2002351050A1/en not_active Abandoned
- 2002-11-26 EP EP02785762A patent/EP1459451A2/en not_active Withdrawn
- 2002-11-26 KR KR10-2004-7008495A patent/KR20040073451A/ko not_active Application Discontinuation
- 2002-11-26 JP JP2003550370A patent/JP4191043B2/ja not_active Expired - Fee Related
- 2002-11-26 CN CNA028244435A patent/CN1599981A/zh active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008226300A (ja) * | 2007-03-09 | 2008-09-25 | Nec Electronics Corp | 復号方法及び復号回路 |
Also Published As
Publication number | Publication date |
---|---|
US7487429B2 (en) | 2009-02-03 |
CN1599981A (zh) | 2005-03-23 |
EP1459451A2 (en) | 2004-09-22 |
WO2003049297A2 (en) | 2003-06-12 |
US20050015701A1 (en) | 2005-01-20 |
WO2003049297A3 (en) | 2004-06-10 |
AU2002351050A1 (en) | 2003-06-17 |
JP4191043B2 (ja) | 2008-12-03 |
KR20040073451A (ko) | 2004-08-19 |
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