JP2005347735A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2005347735A5 JP2005347735A5 JP2005027131A JP2005027131A JP2005347735A5 JP 2005347735 A5 JP2005347735 A5 JP 2005347735A5 JP 2005027131 A JP2005027131 A JP 2005027131A JP 2005027131 A JP2005027131 A JP 2005027131A JP 2005347735 A5 JP2005347735 A5 JP 2005347735A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- base electrode
- compound semiconductor
- charge carrier
- spacer ring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/859,894 US7190047B2 (en) | 2004-06-03 | 2004-06-03 | Transistors and methods for making the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005347735A JP2005347735A (ja) | 2005-12-15 |
| JP2005347735A5 true JP2005347735A5 (https=) | 2008-03-21 |
Family
ID=35446722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005027131A Pending JP2005347735A (ja) | 2004-06-03 | 2005-02-03 | トランジスタおよび同製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7190047B2 (https=) |
| JP (1) | JP2005347735A (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070013012A1 (en) * | 2005-07-13 | 2007-01-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etch-stop layer structure |
| US7579252B2 (en) * | 2005-09-30 | 2009-08-25 | Microsemi Corporation | Self aligned process for BJT fabrication |
| US7892910B2 (en) * | 2007-02-28 | 2011-02-22 | International Business Machines Corporation | Bipolar transistor with raised extrinsic self-aligned base using selective epitaxial growth for BiCMOS integration |
| CN102478384A (zh) * | 2010-11-29 | 2012-05-30 | 长春理工大学 | 基准转换式汽车制动主缸补偿孔测量仪 |
| US9847407B2 (en) | 2011-11-16 | 2017-12-19 | Skyworks Solutions, Inc. | Devices and methods related to a gallium arsenide Schottky diode having low turn-on voltage |
| US9461153B2 (en) * | 2011-11-16 | 2016-10-04 | Skyworks Solutions, Inc. | Devices and methods related to a barrier for metallization of a gallium based semiconductor |
| JP2018101652A (ja) | 2016-12-19 | 2018-06-28 | 株式会社村田製作所 | バイポーラトランジスタ及びその製造方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0240307B1 (en) * | 1986-04-01 | 1993-12-22 | Matsushita Electric Industrial Co., Ltd. | Bipolar transistor and method of producing the same |
| JPH05175225A (ja) * | 1991-12-20 | 1993-07-13 | Nippon Telegr & Teleph Corp <Ntt> | ヘテロ接合バイポーラトランジスタの製造方法 |
| JPH0964054A (ja) * | 1995-08-21 | 1997-03-07 | Nippon Telegr & Teleph Corp <Ntt> | バイポーラトランジスタの作製方法 |
| JP3141805B2 (ja) * | 1997-01-20 | 2001-03-07 | 日本電気株式会社 | 半導体装置の製造方法 |
| JP3345293B2 (ja) * | 1997-02-27 | 2002-11-18 | 日本電信電話株式会社 | ヘテロ接合型バイポーラトランジスタ |
| JPH10261648A (ja) * | 1997-03-19 | 1998-09-29 | Hitachi Ltd | 半導体装置及びその製造方法並びに半導体装置を用いた通信機器 |
| JPH10284505A (ja) * | 1997-04-10 | 1998-10-23 | Furukawa Electric Co Ltd:The | ヘテロ接合バイポーラトランジスタの製造方法 |
| JP4092597B2 (ja) * | 1997-10-08 | 2008-05-28 | 富士通株式会社 | 半導体装置及びその製造方法 |
| JP2000021895A (ja) * | 1998-07-02 | 2000-01-21 | Sharp Corp | 半導体装置及びその製造方法 |
| JP2000114270A (ja) * | 1998-10-02 | 2000-04-21 | Furukawa Electric Co Ltd:The | 化合物半導体ヘテロ接合バイポーラトランジスタ |
| JP2000311902A (ja) * | 1999-04-27 | 2000-11-07 | Sharp Corp | 化合物半導体装置及びその製造方法 |
| US6486532B1 (en) * | 2000-09-30 | 2002-11-26 | Newport Fab, Llc | Structure for reduction of base and emitter resistance and related method |
| JP2004071701A (ja) * | 2002-08-02 | 2004-03-04 | Nec Corp | 半導体素子およびその製造方法 |
| US6911716B2 (en) * | 2002-09-09 | 2005-06-28 | Lucent Technologies, Inc. | Bipolar transistors with vertical structures |
| US7541624B2 (en) | 2003-07-21 | 2009-06-02 | Alcatel-Lucent Usa Inc. | Flat profile structures for bipolar transistors |
-
2004
- 2004-06-03 US US10/859,894 patent/US7190047B2/en not_active Expired - Lifetime
-
2005
- 2005-02-03 JP JP2005027131A patent/JP2005347735A/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2008504679A5 (https=) | ||
| JP2005235858A5 (https=) | ||
| JP2010056579A5 (https=) | ||
| JP2002305304A5 (https=) | ||
| JP2011040445A5 (https=) | ||
| JP2007523481A5 (https=) | ||
| JP2007531281A5 (https=) | ||
| JP2010521061A5 (https=) | ||
| JP2007515775A5 (https=) | ||
| JP2011086941A5 (https=) | ||
| JP2008511172A5 (https=) | ||
| JP2007500952A5 (https=) | ||
| JP2008270758A5 (https=) | ||
| JP2009520367A5 (https=) | ||
| JP2009224386A5 (https=) | ||
| JP2006173432A5 (https=) | ||
| JP2010219515A5 (https=) | ||
| TW200639919A (en) | Method of fabricating a transistor having a triple channel in a memory device | |
| JP2008508718A5 (https=) | ||
| EP1632954A3 (en) | Semiconductor probe with resistive tip and method of fabricating the same | |
| JP2005347735A5 (https=) | ||
| JP2005109389A5 (https=) | ||
| JP2010040711A5 (https=) | ||
| JP2010239128A5 (ja) | 半導体装置及びその作製方法 | |
| JP2009224509A5 (https=) |