JP2005318136A - Variable type random noise generating device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable type random noise generating device capable of realizing a noise environment close to an actual field. <P>SOLUTION: A noise data control part 11 outputs a plurality of noise control signals to individually control values of cycles and amplitudes of noise components in a noise setting part 12. The noise setting part 12 outputs values of cycles and amplitudes of a plurality of noise components to a clock variation calculation part 13. The clock variation calculation part 13 calculates clock width variations of the plurality of noise components as to the values of the cycles and amplitudes of the noise components and outputs clock width variation data of the plurality of noises. A composition part 14 puts together the plurality of input clock width variation data of the plurality of noises and outputs the composite clock width variation data. A control voltage setting part 16 controls a digital control voltage according to characteristic data of a transmitter from a transmitter characteristic data storage part 15 and the composite clock width variation data. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a variable random noise generator, and more particularly to a random noise generator that generates random noise.

  This type of random noise is used for specific applications, such as voice or image encoding processing or encryption processing, and various methods such as analog and digital methods have been proposed for its generation. Yes.

  As the above random noise generation method, a fixed data is input to an addressable waveform memory, and a random noise is output according to the data (for example, see Patent Document 1) or a ring oscillator structure. A method using a plurality of low current differential amplifiers (see, for example, Patent Document 2) has been proposed.

JP 2002-314383 A Japanese Patent Laid-Open No. 10-209821

  In the conventional random noise generation method described above, for example, in the case of the method described in Patent Document 1, it is difficult to determine how the period and amplitude of the noise component are set for the set waveform data. It is difficult to change the period and amplitude of only the component.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a variable random noise generator capable of solving the above problems and realizing a noise environment close to a real field.

A variable random noise generator according to the present invention is a variable random noise generator that generates random noise,
An output means for outputting a clock signal including a plurality of noise components with a preset amplitude and period is provided.

Another variable random noise generator according to the present invention is a variable random noise generator that generates random noise based on a clock signal output from a voltage controlled oscillator,
Holding means for holding periods and amplitudes of a plurality of preset noise components; combining means for combining a plurality of noise components set in the holding means; and combining the noise components combined by the combining means with the clock And a random noise generating circuit including control means for controlling to add to the signal.

  That is, the variable random noise generator of the present invention is characterized in that it can generate a noise signal that includes a plurality of frequency components and amplitude components, and in which the frequency components and amplitude components change.

  In the variable random noise generating device of the present invention, the clock signal output from the voltage control oscillator is controlled by the random noise generating circuit, and the random noise generating circuit can set a plurality of periods and amplitudes of the noise component. Control is performed such that a noise component obtained by synthesizing the plurality of noise components is added to the clock signal.

  In the variable random noise generation device of the present invention, as described above, the random noise generation circuit changes the period and amplitude values of a plurality of set noise components to thereby change the plurality of noise components added to the clock signal. The frequency component and amplitude component of the noise component are changed.

  In the actual field, there are noise components including a plurality of frequency components, and the noise components change due to factors such as temperature, usage environment, and load. In the variable random noise generator of the present invention, a plurality of amplitudes and periods set by a user can be changed, and a clock signal obtained by synthesizing each noise component can be output. A clock signal whose period and amplitude change can be output, and a noise environment close to a real field can be realized.

  In the conventional noise generator, it is necessary to manually set in order to change the amplitude and period. However, in the variable random noise generator of the present invention, as described above, a plurality of values set by the user are required. It is possible to vary the amplitude and period, and it is possible to output a clock signal that combines the respective noise components. It is not necessary to manually change the amplitude and period, and the time for manually setting the noise addition test can be shortened.

  The present invention has an effect that a noise environment close to a real field can be realized by adopting the configuration and operation described below.

  Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a variable random noise generator according to an embodiment of the present invention. In FIG. 1, a variable random noise generator according to an embodiment of the present invention includes a random noise generating circuit 1 that outputs a digital control voltage, and a D / A (digital / analog) converter that converts the digital control voltage into an analog control voltage. 2 and a voltage-controlled oscillator 3 that outputs a clock signal having a frequency corresponding to the input analog voltage.

  The random noise generation circuit 1 outputs a plurality of noise control signals, and a noise data control unit 11 that individually controls the period and amplitude value of the noise component that is plurally included in the noise setting unit 12, and a plurality of noises A noise setting unit 12 that has component period and amplitude values and outputs these values to the clock fluctuation calculation unit 13, and changes the clock width fluctuations of the noise component for the input period and amplitude values of the plurality of noise components. A clock fluctuation calculation unit 13 that calculates and outputs clock width fluctuation data of a plurality of noises, and a synthesis part (noise) that synthesizes the input clock width fluctuation data of a plurality of noises and outputs the synthesized clock width fluctuation data # 1 to noise #n) 14, transmitter characteristic data storage unit 15 for outputting the characteristic data of the transmitter, and the synthesized characteristic data of the input transmitter And a control voltage setting unit 16 for controlling the digital control voltage from the clock width variation data.

  The noise setting unit 12 includes a noise # 1 setting unit 121, a noise # 2 setting unit 122,..., A noise #n setting unit 12n in order to set the periods and amplitudes of a plurality of noise components. . Similarly, the clock fluctuation calculation unit 13 includes a noise # 1 clock width fluctuation calculation part 131, a noise # 2 clock width fluctuation calculation part 132,..., A noise #n clock width fluctuation calculation part 13n.

  FIG. 2 is a diagram showing an example of calculating the variation of the clock width from the period and amplitude of the noise component according to one embodiment of the present invention, and FIG. FIG. 4 is a diagram showing a variation example of fluctuation, and FIG. 4 is a diagram showing a time change of a digital control voltage value according to an embodiment of the present invention. The operation of the variable random noise generator according to one embodiment of the present invention will be described with reference to FIGS.

  The random noise generating circuit 1 outputs a digital control voltage, and the digital control voltage is converted into an analog control voltage by the D / A converter 2. The voltage control oscillator 3 converts the digital control voltage into an analog control voltage input from the D / A converter 2. A clock signal with a corresponding frequency is output. As a result, the random noise generating circuit 1 can control the clock signal output from the voltage control oscillator 3.

  Next, by controlling the digital voltage with the random noise generation circuit 1, the clock signal output from the voltage control oscillator 3 includes a plurality of frequency components and amplitude components, and the frequency components and amplitude components change. A method for adding a noise signal to be performed will be described. In FIG. 1, noise # 1, noise # 2,..., Noise #n are described in the noise setting unit 12 and the clock fluctuation calculation unit 13, but the operation for each noise is the same. Only noise #n will be described. Note that noise # 1, noise # 2,..., Noise #n have different periods and amplitude values.

  The period #n and the amplitude #n of the noise #n setting unit 12n are determined by the noise #n control signal output from the noise data control unit 11. The noise #n setting unit 12n outputs the cycle #n and the amplitude #n to the noise #n clock width calculation unit 13n. The noise #n clock width calculator 13n calculates the clock width variation of the noise #n from the input cycle #n and amplitude #n.

Next, a method for calculating the clock width will be described. The clock width uses the period and amplitude of the noise component and the control time.
Clock width = (amplitude) × sin (2π × (control time) / (noise period))
... (1)
It can be calculated by the following formula.

  FIG. 2 shows an example in which clock width variation data is calculated from the period and amplitude of the noise component using the above equation (1). In the example shown in FIG. 2, the control time interval is set to “1 second”, the noise period is set to “10 seconds”, and the noise amplitude is set to “10”. As shown in FIG. 2, when the equation (1) is used, the clock width corresponding to the control time can be calculated, so that the clock width variation data can be obtained.

  The fluctuation data of the clock width is output from the noise #n clock width calculation unit 13n. Therefore, the clock fluctuation calculation unit 13 calculates clock width fluctuation data for each of the noises # 1 to #n and outputs the data to the synthesis unit 14.

  The synthesizing unit 14 adds the clock width variation data of the input noise # 1 to noise #n for each control time to calculate the synthesized clock width variation data. FIG. 3 shows a synthesis example of clock widths of noises # 1 to #n. In the example shown in FIG. 3, the time between noise # 1 (amplitude: 10, period: 40 s), noise # 2 (amplitude: 10, period: 20 s), and noise # 3 (amplitude: 5, period: 10 s). The graph of the fluctuation | variation of the clock width with respect to this and the fluctuation | variation of the clock width which synthesize | combined noise # 1- # 3 is shown. Therefore, the control voltage setting unit 16 receives the clock width variation data obtained by synthesizing the noises # 1 to # 3 by the synthesis unit 14.

  On the other hand, the oscillator characteristic data storage unit 15 stores characteristic data of the clock width output from the transmitter corresponding to the digital control voltage, and the data is output to the control voltage setting unit 16.

  Since the control voltage setting unit 16 can determine the clock width output from the transmitter corresponding to the digital control voltage from the characteristic data of the transmitter, “the fluctuation data of the clock width synthesized from the noises # 1 to #n”. As a result, a voltage control oscillator 3 can output a clock signal including a plurality of frequency components and amplitude components.

  FIG. 4 shows an example of the time change of the digital control voltage value. In the example shown in FIG. 4, the digital control voltage is set to “100” in a system designed so that the clock width of the clock signal changes by “1” when the digital voltage value is changed by “1”. The clock width variation example calculated in FIG. 3 is applied as the reference frequency.

  In this embodiment, as shown in FIG. 4, the clock width of the clock signal varies by controlling the digital control voltage, and as a result, the clock signal including noise # 1 to noise # 3 as shown in FIG. Is output.

  In the example described above, the period and amplitude of each noise component are fixed for convenience of explanation, but the noise data control unit 11 is programmed to vary the period and amplitude of each noise component of the noise setting unit. Then, it is possible to output a clock signal including a noise component whose frequency component and amplitude component change.

  In the actual field, there are noise components including a plurality of frequency components, and the noise components change due to factors such as temperature, usage environment, and load. In this embodiment, a plurality of amplitude and period values set by the user can be varied, and a clock signal in which the respective noise components are synthesized can be output. Can be output, and a noise environment close to a real field can be realized.

  In conventional noise generators, in order to change the amplitude and period, they need to be set manually. However, in this embodiment, a plurality of amplitudes and periods can be set by the user, the values can be varied, and a clock signal in which the respective noise components are synthesized can be output. A changing clock signal can be output, and it is not necessary to manually change the amplitude and period of the output noise, and the time required for manually setting the noise addition test can be shortened.

It is a block diagram which shows the structure of the variable random noise generator by one Example of this invention. It is a figure which shows the example which calculates the fluctuation | variation of a clock width from the period and amplitude of a noise component by one Example of this invention. It is a figure which shows the synthesis example of the clock width fluctuation | variation of noise # 1- # 3 by one Example of this invention. It is a figure which shows the time change of the digital control voltage value by one Example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Random noise generation circuit 2 D / A converter 3 Voltage control transmitter 11 Noise data control part 12 Noise setting part 13 Clock fluctuation calculation part 14 Synthesis | combination part 15 Transmitter characteristic data storage part 16 Control voltage setting part 121 Noise # 1 setting part 122 noise # 2 setting unit 12n noise #n setting unit 131 noise # 1 clock width variation calculating unit 132 noise # 2 clock width variation calculating unit 13n noise #n clock width variation calculating unit

Claims (6)

A variable random noise generator that generates random noise,
A variable random noise generator comprising output means for outputting a clock signal including a plurality of noise components with a preset amplitude and period.   2. The variable random noise generator according to claim 1, wherein the output means changes the amplitude and period of the noise component to preset values. A variable random noise generator that generates random noise based on a clock signal output from a voltage controlled oscillator,
Holding means for holding periods and amplitudes of a plurality of preset noise components; combining means for combining a plurality of noise components set in the holding means; and combining the noise components combined by the combining means with the clock A variable random noise generating apparatus comprising a random noise generating circuit including control means for controlling to add to a signal.   The random noise generation circuit changes the frequency component and amplitude component of the plurality of noise components added to the clock signal by changing the period and amplitude values of the plurality of noise components set in the holding unit. The variable random noise generator according to claim 3, wherein: A clock width calculating unit that calculates a clock width variation of the noise from a period and an amplitude value of a plurality of noise components set in the holding unit;
5. The variable random noise generation according to claim 3, wherein the synthesizing unit calculates a clock width variation obtained by adding the clock variation ranges from the clock width calculating unit for each control time and synthesizing. apparatus. Storage means for storing characteristic data of the clock width output from the voltage controlled oscillator;
6. The control means determines a clock width output from the voltage control oscillator from the characteristic data, and outputs a digital control voltage for realizing the synthesized clock width fluctuation. The variable random noise generator described.

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