JP2005305591A - Method of manufacturing silicon wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a silicon wafer manufacturing method capable of easily and inexpensively manufacturing a high-quality silicon wafer for restraining the occurrence of a particle and a slip. <P>SOLUTION: This method manufactures the silicon wafer by performing at least slicing, chamfering, flattening and surface polishing. The silicon wafer manufacturing method removes processing strain caused by mechanical grinding by applying buff polishing without performing the etching of an edge part after grinding, by shaving off the corner of the edge part of the silicon wafer after slicing by the mechanical grinding using a resin bonded grinding wheel of grain sizes 1,500 to 6,000 as a chamfering process. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a silicon wafer, and more particularly to a method for manufacturing a silicon wafer that can effectively prevent occurrence of slip.

When manufacturing a silicon wafer, as shown in FIG. 7, generally, a silicon wafer having a mirror surface is manufactured through a slicing process, a rough chamfering process, a lapping process, an etching process, a mirror chamfering process, a mirror polishing process, and the like.
Specifically, first, as a slicing step, a silicon single crystal rod (ingot) is sliced to obtain a thin disk-shaped wafer.
In the rough chamfering process, chamfering is performed by scraping off the corners of the edge (outer peripheral part) of the wafer using a grindstone in order to prevent cracking and chipping of the wafer obtained in the slicing process.

In the lapping process, the main surface of the wafer is lapped and flattened. Note that planarization may be performed by surface grinding instead of lapping.
In the etching process, in order to prevent the occurrence of slip in heat treatment or the like during device fabrication, the processing distortion and dirt remaining on the rough chamfered edge (chamfered portion) and the lapped main surface are removed by alkali etching or the like. .

In the mirror chamfering step, for example, a foamed polyurethane buff having grooves is used, and the chamfered portion of the wafer is polished into a mirror surface while supplying an abrasive containing colloidal silica.
In the mirror polishing step, the main surface of the etched wafer is polished and mirror-finished while supplying an abrasive to the polishing cloth affixed to the surface plate.
In the mirror chamfering process and the mirror polishing process, there are cases where the surface is mirror-finished in stages, such as finishing polishing after the primary polishing.
Further, in the cleaning process, the polished mirror-polished wafer is cleaned with an acid or the like to remove abrasives and foreign matters adhering to the surface.

The processes as described above are general, and various methods have been proposed in each process in order to finish a higher quality silicon wafer.
For example, if alkali etching is performed after rough chamfering, the surface roughness increases depending on the position of the chamfered portion of the wafer due to the etching anisotropy depending on the crystal orientation, and deep pits are formed. There has been proposed a method of performing polishing by changing the mirror polishing condition of the chamfered portion according to the crystal orientation (see Patent Document 1).

In this method, it is necessary to change the conditions according to the crystal orientation or the surface roughness of the chamfered portion in the mirror chamfering step. For this reason, a high level of technology is required, and a dedicated device equipped with a crystal orientation detection means or the like is required, resulting in a problem that the manufacturing cost increases.
Also, in recent years, automation using a transfer robot or the like has been promoted in the wafer manufacturing process, but there is a problem that automation is difficult when performing an etching process after a rough chamfering process or the like, and further etching is large. Waste liquid is generated, which is also an environmental problem.

  On the other hand, a method has been proposed in which each groove is formed so that the groove shape of the grindstone used in rough chamfering matches the groove shape of the buff used in mirror chamfering, and then mirror chamfering is performed after rough chamfering. (See Patent Document 2). The chamfering shape may deteriorate due to lapping or etching after rough chamfering, and a part of the chamfered part may not be mirror-finished. However, according to the above method, the occurrence of such a problem is prevented. It is supposed to be removed.

  However, when a wafer is manufactured by this method, it is necessary to take a large machining allowance by mirror chamfering, and particles are easily generated in a subsequent heat treatment process or the like, and so-called slip is likely to occur due to thermal stress. There is a problem. If a step occurs on the surface of the wafer due to the occurrence of slip, the yield in the device process is greatly reduced.

Japanese Patent Laid-Open No. 2001-87996 JP 2000-5991 A

  The present invention has been made in view of the problems as described above, and provides a method for producing a silicon wafer capable of easily and inexpensively producing a high-quality silicon wafer in which the generation of particles and slips is suppressed. The purpose is to provide.

  In order to achieve the above object, according to the present invention, in the method of manufacturing a silicon wafer by performing at least slicing, chamfering, planarization, and surface polishing, as the chamfering step, an edge of the silicon wafer after slicing is performed. The part was cut off by mechanical grinding using a 1500 to 6000 count resin bond grindstone, and the processed distortion caused by the mechanical grinding was performed by buffing the edge after grinding without etching. A method for producing a silicon wafer, characterized in that it is removed, is provided (claim 1).

In this way, if mechanical grinding using a 1500 to 6000th resin bond grindstone is performed on the edge of the silicon wafer, the processing distortion generated at the wafer edge is shallow and pits are not generated. The processing distortion can be removed with a small machining allowance by buffing. Therefore, it is possible to easily manufacture a high quality silicon wafer in which generation of particles and slips is suppressed.
In addition, it is not necessary to use a special processing apparatus, and the waste liquid treatment of the etching solution is not necessary in the chamfering process, so that the manufacturing cost can be significantly reduced.
Furthermore, since the buffing is performed without etching after mechanical grinding of the edge of the wafer, the chamfering process can be automated, which greatly contributes to the automation of the entire wafer production.

In this case, it is preferable that after the edge of the silicon wafer is mechanically ground and before the buffing, the edge after the grinding is washed with water.
After mechanically grinding the edge of the wafer in this way, washing with water can easily remove the grinding residue adhering to the wafer. Such waste liquid treatment is unnecessary and there is no problem in the environment.

Further, it is preferable that the buffing is performed with a machining allowance of 2 μm or less.
By performing buffing with a machining allowance of 2 μm or less as described above, processing distortion can be reliably removed in a short polishing time, so that productivity is improved and manufacturing cost can be further reduced.

According to the present invention, the processing strain generated by mechanical grinding on the edge of the wafer is shallow, and the processing strain can be removed with a small machining allowance by performing buffing without performing etching thereafter. Therefore, it is possible to easily manufacture a high quality silicon wafer in which the occurrence of slip is suppressed.
In addition, a special processing apparatus and a waste liquid treatment of an etching solution are not necessary, and the manufacturing cost can be remarkably reduced, and it is also preferable for the global environment.
Furthermore, since the buffing is performed without etching after mechanical grinding of the edge of the wafer, the chamfering process can be automated, greatly contributing to the full automation of the wafer manufacturing process.

Prior to the completion of the present invention, the present inventors investigated and studied the cause of occurrence of slip in heat treatment, and found the cause of occurrence of slip in rough chamfering and subsequent etching.
FIG. 5 shows the surface of a chamfered portion of a silicon wafer obtained by slicing a silicon single crystal ingot after mechanical grinding or the like at the edge thereof is observed with an electron microscope. Here, after mechanical grinding (rough chamfering) of the edge of the wafer using a 1500th resin bond grindstone, sample A is not etched, and samples B and C are alkali etched with a machining allowance of 2 μm and 4 μm, respectively. It is what went.
As can be seen in FIG. 5, pits having a width of about 1.5 μm were formed in the sample B, and pits having a width of about 3 μm were formed in the sample C. On the other hand, white streaks that seemed to be a streak of a grindstone were found on the surface of the sample A that was not etched, but no pits were formed.

Conventionally, when rough chamfering is performed with a grindstone, it is common knowledge to perform etching to remove processing distortion before performing mirror chamfering. However, from the above results, it is considered that damage nuclei are generated at the edge of the wafer by grinding, the front of the damage nuclei is expanded by subsequent etching, and if heat treatment is performed thereafter, slip is likely to enter from the expanded front. That is, it has been found that the etching that has been performed to prevent the occurrence of slip causes the occurrence of slip.
On the other hand, stress is generated by grinding the edge of the wafer, but when the stress is large, slipping is likely to occur if heat treatment is performed without etching thereafter.

  Based on these findings, the present inventors, when performing chamfering, keep the stress due to grinding to an appropriate level by grinding using a grindstone with an appropriate count, and then perform processing without performing etching. We thought that if the distortion was removed, it was possible to produce a wafer in which slip would not easily occur, and as a result of extensive studies and research, the present invention was completed.

Hereinafter, a method for manufacturing a silicon wafer according to the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 shows an example of a manufacturing process of a silicon wafer according to the present invention.
First, a silicon single crystal ingot is sliced into a wafer shape (FIG. 1A). The silicon single crystal ingot used may be one produced by a general Czochralski method (CZ method) or one produced by a floating zone melting method (FZ method).

Next, planarization is performed on the main surface of the silicon wafer obtained in the slicing process (FIG. 1B).
Here, lapping which is generally performed conventionally can be performed, but surface grinding may be performed. For example, if an in-feed type surface grinder is used, a wafer having a large diameter of 300 mm can be highly planarized with a relatively small apparatus.

  A chamfering step is performed after the slicing step and the flattening step. In the conventional chamfering process, for example, a rough chamfering process is performed using a rough grindstone of about 800 counts (the smaller the count, the coarser the eyes are). In the present invention, as the rough chamfering process, first, the edge of the silicon wafer is processed. The corners are cut off by mechanical grinding using a fine resin bond grindstone with 1500 to 6000 counts (FIG. 1C).

The apparatus for performing the mechanical grinding of the wafer edge portion is not particularly limited as long as it has a 1500 to 6000th resin bond grindstone, so that the conventional apparatus is preferably used without drastically changing. Can do.
For example, as shown in FIG. 2A, the wafer 2 is held by the holding disc 4, and the edge of the wafer 2 is pressed against the groove 1a of the grindstone 20a having the same shape as the desired wafer chamfering shape. Thereby, the corners on the upper surface side and the lower surface side of the wafer 2 can be scraped off at a time.

  On the other hand, a precision NC (numerical control) processing machine that has been widely used in recent years can also be used. For example, as shown in FIG. 2B, a relative position between the wafer 2 and the grindstone 20b is numerically controlled using a grindstone 20b having an inverted trapezoidal groove 1b. Then, the outermost peripheral portion of the wafer 2 is ground at the bottom surface of the groove 1b of the grindstone 20b, and the corner on the upper surface side of the wafer 2 on the upper surface side of the groove 1b and the corner on the lower surface side of the wafer 2 on the lower surface side of the groove 1b, respectively. Scrape off.

Regardless of which device is used, in the present invention, a rough chamfering process may be performed using a 1500-6000 count resin bond grindstone as a grindstone. Here, when the grinding of the wafer edge is performed using a 1500-6000 count resin bond grindstone, the time required to form a predetermined chamfered shape is usually slightly longer than when a conventional 800 count grindstone is used. . However, the processing distortion at the edge of the wafer caused by grinding is extremely shallow and there is little contamination, so it is not necessary to perform etching to remove the processing distortion and the like. The processing time in can be greatly shortened.
In particular, it is preferable to use a 2000-4000 count resin bond grindstone in order to reduce the depth of processing strain more reliably and to shorten the processing time more reliably.

In addition, if a material having a count greater than 6000 is used, the eyes are too fine and the corners of the edge cannot be scraped off by mechanical grinding, or the processing takes a very long time. .
Moreover, if the one having a count smaller than 1500 is used, the eyes are too rough, the processing distortion enters deeply, causing slip. Therefore, if etching is performed, processing distortion can be removed, but an enlarged etching pit is generated, and in order to remove the pit, it is necessary to make the machining allowance 10 μm or more, further 15 μm or more in the subsequent mirror chamfering. .

  On the other hand, in the present invention, after rough chamfering is performed with a 1500 to 6000 count resin bond grindstone, it is preferably washed with water without etching (FIG. 1D). In the present invention, since the processing distortion caused by the mechanical grinding is shallow as described above, it is preferably washed with water without etching thereafter. As a result, the grinding residue can be removed, and the waste liquid treatment necessary for etching is not required.

Next, the wafer edge after mechanical grinding is subjected to buffing to remove processing distortion caused by mechanical grinding (FIG. 1E).
In the present invention, since the wafer edge is mechanically ground using a 1500-6000 count resin bond grindstone, the processing distortion caused by mechanical grinding is shallow, usually 1 μm or less, and at most 2 μm or less. In addition, since etching is not performed after the rough chamfering process, pits are not enlarged at the edge of the wafer after grinding. Therefore, it is possible to easily remove the processing distortion of the edge portion by buffing alone and to make it mirror-finished.

  For the buff polishing, for example, a polishing apparatus including a wafer holding disk 4 and a polyurethane polyurethane buff 21 as shown in FIG. 3 can be suitably used. A groove 3 having a predetermined shape is formed in the buff 21, and the wafer 2 is held in the groove 3 formed in the buff 21 while holding the wafer 2 with the holding disk 4 and supplying an abrasive containing colloidal silica. Press the edge. Thereby, the edge part (chamfering part) of the wafer 2 rough chamfered by grinding can be polished at a time.

As described above, the processing distortion of the wafer edge caused by the previous mechanical grinding is usually 1 μm or less, and even if deep, it is less than 2 μm, so the allowance for buffing can be 2 μm or less. However, if the machining allowance in buffing is too small, machining distortion may remain in the chamfered portion, which may later become a source of particles and slips. Therefore, the machining allowance in buffing is preferably 0.5 μm or more. Is 1 μm or more.
If buffing is performed with such a machining allowance, the processing distortion and dirt caused by the previous mechanical grinding can be surely removed, and can be performed in a short time. Therefore, the polishing time is greatly shortened, and even in the rough chamfering process, even if the machining time is somewhat longer, the machining time can be significantly shortened for the entire chamfering process.

After the mirror chamfering, the main surface of the wafer is mirror polished (FIG. 1 (F)).
Here, in addition to a normal single-side polishing apparatus, both main surfaces may be simultaneously polished by a double-side polishing apparatus.
After the wafer main surface is polished, the wafer is further cleaned (FIG. 1G) to remove the polishing agent and polishing residue adhering to the wafer. Thereby, a clean mirror surface silicon wafer can be obtained.

  The silicon wafer manufactured through the manufacturing process according to the present invention as described above is free from slipping and particles even if it is subjected to heat treatment in the device process or the like after processing distortion or metal impurities are not left in the chamfered portion. It becomes a high-quality silicon wafer that is less likely to generate.

  Examples of the present invention and comparative examples will be described below.

<Evaluation of slip occurrence>
A silicon wafer (diameter 200 mm) was cut out from the CZ silicon single crystal ingot, and the following sample 1-6 was prepared.
Sample 1-3 was subjected to mechanical grinding of the wafer edge using an 800-number metal bond grindstone, and then Sample 1 was heat-treated at 1150 ° C. without etching. Samples 2 and 3 were subjected to alkali etching (etching solution: 48% sodium hydroxide solution) with a machining allowance of 2 μm and 4 μm, respectively, after the mechanical grinding, and then subjected to the heat treatment.
For Sample 4-6, the wafer edge was mechanically ground using a 3000th resin bond grindstone, and then Sample 4 was subjected to the heat treatment without etching. Samples 5 and 6 were subjected to alkali etching with a machining allowance of 2 μm and 4 μm, respectively, after the mechanical grinding, and then subjected to the heat treatment.

FIG. 4 is an X-ray topograph showing the occurrence of slip after heat treatment in Sample 1-6. Since slip occurs when the wafer becomes unable to withstand thermal stress due to heat treatment, it can be observed with an X-ray topograph.
As is apparent from FIG. 4, when grinding is performed with the same grindstone, the wafers (sample 1 and sample 4) that have not been subjected to the alkali etching have less slip. From this, it can be seen that the occurrence of slip is suppressed by not performing etching.

  Furthermore, when sample 1 and sample 4 are compared, the occurrence of slip is clearly suppressed in sample 4 according to the present invention. That is, it can be seen that the occurrence of slip is remarkably suppressed by using a 3000th resin-bonded grindstone and not performing alkali etching.

<Measurement of particles>
Using the 800th, 1500th, and 3000th resin bond grindstones, rough chamfering of the silicon wafer cut out from the ingot was performed. Thereafter, each wafer was subjected to acid cleaning under the same conditions (cleaning solution: HCl + H ₂ O ₂ ), and the number of particles on the wafer surface (0.16 μm <, 0.2 μm <) was measured by a particle counter.
FIG. 6 shows the result. As shown in FIG. 6, compared to the case of using the 800th resin bond grindstone, when each of the 1500th and 3000th resin bond grindstones is used, particles having a particle size of more than 0.2 μm, which adversely affects device fabrication, are particularly observed. It turns out that generation | occurrence | production is suppressed notably.

<Measurement of metal impurities>
Rough chamfering as described above was performed using the resin bond grindstones of each count, and after acid cleaning, heavy metal impurities (Fe, Cr, Cu, Ni) in the chamfered portion were analyzed by ICP-MS.
The results are shown in Table 1.

  It can be seen from Table 1 that metal contaminants are greatly reduced when each of the 1500th and 3000th resin bond grindstones is used, compared to when the 800th resin bond grindstone is used.

<Example 1, Comparative Examples 1 and 2>
The edge of the silicon wafer was mechanically ground using a 3000th resin bond grindstone, and then buffed with 2 mm removal allowance without etching (Example 1).
On the other hand, the edge of the silicon wafer was mechanically ground using an 800th metal bond grindstone, and then buffed with a 2 μm allowance without etching (Comparative Example 1).
Further, after mechanically grinding the edge of the silicon wafer using an 800th metal bond grindstone, alkali etching is performed with an allowance of 10 μm (etching solution: 48% sodium hydroxide solution), and then an allowance of 10 μm is obtained. Then, buffing was performed (Comparative Example 2).

Each silicon wafer subjected to chamfering as described above was subjected to heat treatment at 1000 ° C. for 30 minutes, and then the occurrence of slip was evaluated.
As a result, no slip was found on the wafer of Example 1.
On the other hand, in Comparative Example 1, many slips were observed. Further, although the occurrence of slip in Comparative Example 2 was less than that in Comparative Example 1, the machining time for the entire chamfering process required about twice as long as that in Example 1.

  The present invention is not limited to the above embodiment. The above embodiment is merely an example, and the present invention has the same configuration as that of the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

  For example, the manufacturing process of the silicon wafer according to the present invention is not limited to that shown in FIG. 1, and after the chamfering process, planarization may be performed, or other processes such as heat treatment may be performed depending on the purpose. good.

It is a flowchart which shows an example of the manufacturing process of the silicon wafer by this invention. It is the schematic which shows an example of a rough chamfering processing apparatus. (A) Total type, (B) NC type. It is the schematic which shows an example of a buffing apparatus. It is a X-ray topograph which shows the slip generation situation in an example and a comparative example. It is a figure which shows the surface state of a chamfering part after a rough chamfering process. It is a graph which shows the relationship between the count of a grindstone, and the number of particles of a wafer surface. It is a flowchart which shows an example of the manufacturing process of the conventional silicon wafer.

Explanation of symbols

1a, 1b ... groove, 2 ... silicon wafer, 3 ... groove, 4 ... holding plate,
20a, 20b ... whetstone, 21 ... buff.

Claims (3)

  In a method of manufacturing a silicon wafer by performing at least slicing, chamfering, planarization, and surface polishing, the edge of the silicon wafer after slicing is used as a 1500-6000 count resin bond grindstone as the chamfering step. A method for producing a silicon wafer, wherein corners are removed by mechanical grinding and buffing is performed without etching the edge after grinding to remove the processing distortion caused by the mechanical grinding.   2. The method for producing a silicon wafer according to claim 1, wherein the edge of the silicon wafer is mechanically ground and then washed with water before the buffing.   3. The method of manufacturing a silicon wafer according to claim 1, wherein the buffing is performed with a machining allowance of 2 [mu] m or less.

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