JP2005303031A - Electronic circuit module, multilayer electronic circuit module and their manufacturing methods - Google Patents

Electronic circuit module, multilayer electronic circuit module and their manufacturing methods Download PDF

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JP2005303031A
JP2005303031A JP2004117618A JP2004117618A JP2005303031A JP 2005303031 A JP2005303031 A JP 2005303031A JP 2004117618 A JP2004117618 A JP 2004117618A JP 2004117618 A JP2004117618 A JP 2004117618A JP 2005303031 A JP2005303031 A JP 2005303031A
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electronic component
resin sheet
bonded
circuit module
electronic circuit
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JP4285309B2 (en
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Ikuhisa Goto
郁久 後藤
Norito Tsukahara
法人 塚原
Daisuke Sakurai
大輔 櫻井
Masahiro Ono
正浩 小野
Kazuhiro Nishikawa
和宏 西川
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • H01L2224/251Disposition
    • H01L2224/2518Disposition being disposed on at least two different sides of the body, e.g. dual array
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To reduce damages received by an electronic component by a pressing force to be applied, when pressing and embedding the electronic component into a resin sheet, even if the electronic component mounted in the resin sheet is thinned. <P>SOLUTION: A bonding electronic part 23, in which the other surfaces of electronic parts 26, 27 having electrode terminals 24, 25 on at least one surfaces are stuck and aligned, is embedded in the resin sheet 22, to expose the electrode terminals 24, 25. In this way, the electronic components 26, 27 are stuck to improve a packaging density, and rigidity is improved. Accordingly, damages to the bonding electronic part 23 can be reduced by the pressing force to be applied, when the bonding electronic component 23 is embedded. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電子回路モジュールと多層電子回路モジュールおよびそれらの製造方法に関し、特に複数個のメモリーチップを多段に重ねるスタックICモジュール、メモリーカードや、複数の半導体素子、コンデンサ、抵抗等を1つの基板に実装したマルチチップモジュールに関する。   The present invention relates to an electronic circuit module, a multilayer electronic circuit module, and a manufacturing method thereof, and in particular, a stack IC module, a memory card, a plurality of semiconductor elements, a capacitor, a resistor, and the like on which a plurality of memory chips are stacked in one stage. It relates to the multi-chip module mounted on.

従来、チップ部品等の小型の電子部品を樹脂基板上に搭載して形成される部品搭載基板は、各種の電子機器において広く使用されている。また、近年の各種電子機器に対する小型軽量化の要請によって、これらの部品搭載基板はより小型で、かつより多くの電子部品や素子を高密度に搭載することが強く望まれている。   2. Description of the Related Art Conventionally, a component mounting board formed by mounting a small electronic component such as a chip component on a resin substrate has been widely used in various electronic devices. Further, due to recent demands for reducing the size and weight of various electronic devices, it is strongly desired that these component mounting substrates are smaller and more electronic components and elements are mounted at a high density.

そこで電子部品の実装密度を向上させる方法として、特許文献1には電子部品を内蔵した樹脂基板を積層する方法が示されている。図23は、その積層樹脂基板の断面図である。この積層樹脂基板1は、3つの部品内蔵基板1A、1B、1Cを厚み方向に重ね合わせた三層構造となっている。   Therefore, as a method for improving the mounting density of electronic components, Patent Document 1 discloses a method of laminating a resin substrate with built-in electronic components. FIG. 23 is a cross-sectional view of the laminated resin substrate. The laminated resin substrate 1 has a three-layer structure in which three component-embedded substrates 1A, 1B, and 1C are overlapped in the thickness direction.

この各部品内蔵基板1A、1B、1Cは、導通性貫通孔であるスルーホール2Aを有するシート状の樹脂基板2に、半導体素子等の平板状電子部品3およびコンデンサ等の小型電子部品4を、加熱加圧して埋め込み形成される。また配線層5が、樹脂基板2の表面に露出した平板状電子部品3の片面の電極端子3A、および小型電子部品4の電極端子4Aと接続するように形成されている。そして、このような構成の部品内蔵基板1A、1B、1Cを重ね合わせて結合させ、スルーホール2Aにより互いに電気的に導通させることにより、積層樹脂基板1は形成されている。
特開2002−280744号公報
Each of the component-embedded substrates 1A, 1B, and 1C has a sheet-like resin substrate 2 having a through hole 2A that is a conductive through hole, a flat electronic component 3 such as a semiconductor element, and a small electronic component 4 such as a capacitor. It is embedded by heating and pressing. The wiring layer 5 is formed so as to be connected to the electrode terminal 3A on one side of the flat electronic component 3 exposed on the surface of the resin substrate 2 and the electrode terminal 4A of the small electronic component 4. Then, the component-embedded substrates 1A, 1B, and 1C having such a configuration are overlapped and joined, and are electrically connected to each other through the through holes 2A, thereby forming the laminated resin substrate 1.
JP 2002-280744 A

上述したように、樹脂基板内に電子部品を内蔵するには、シート状の樹脂基板に電子部品を加熱加圧して埋め込んでいる。このとき、電子部品には大きな押圧力が加わるが、電子部品はこの押圧時の押圧力に耐えるだけの強度が必要である。   As described above, in order to incorporate the electronic component in the resin substrate, the electronic component is embedded in the sheet-shaped resin substrate by heating and pressing. At this time, a large pressing force is applied to the electronic component, but the electronic component needs to be strong enough to withstand the pressing force at the time of pressing.

一方、積層樹脂基板を更に薄型化するためには、樹脂基板内に実装する電子部品をより薄いものにする必要がある。しかし、電子部品を更に薄くすれば、上述のように樹脂基板内に電子部品を押圧し、埋設する際に加わる大きな押圧力によって、電子部品にひび割れや破損、または特性変動等の損傷を受ける可能性が高くなるという課題があった。   On the other hand, in order to further reduce the thickness of the laminated resin substrate, it is necessary to make the electronic component mounted in the resin substrate thinner. However, if the electronic components are made thinner, the electronic components can be damaged, such as cracks, breakage, or characteristic fluctuations, due to the large pressing force applied when the electronic components are pressed and embedded in the resin substrate as described above. There was a problem that the property became high.

本発明は上記課題を解決するためになされたもので、樹脂基板内に実装される電子部品を薄くしても、樹脂基板内に押圧し、埋設される際に加わる押圧力によって電子部品が損傷を受けることを少なくした電子回路モジュールと多層電子回路モジュールおよびそれらの製造方法を提供することを目的とする。   The present invention has been made to solve the above-described problems. Even if the electronic component mounted in the resin substrate is thinned, the electronic component is damaged by the pressing force applied when the electronic component is pressed and embedded in the resin substrate. An object of the present invention is to provide an electronic circuit module, a multilayer electronic circuit module, and a method of manufacturing the same, which are less subject to reception.

本発明の電子回路モジュールは、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品と、電極端子の表面を露出させる形状に接合電子部品を埋設した樹脂シートと、樹脂シートの両表面に露出した電極端子にそれぞれ接続される配線層とを備えた構成からなる。   The electronic circuit module according to the present invention includes a pair of two electronic components each having an electrode terminal formed on at least one surface, a bonded electronic component integrated by bonding the other surfaces of the electronic component, and an electrode terminal The structure includes a resin sheet in which a bonded electronic component is embedded in a shape that exposes the surface, and wiring layers that are respectively connected to electrode terminals exposed on both surfaces of the resin sheet.

このような構成により、薄型の電子部品であっても貼り合わせて接合電子部品とすることで剛性が得られるため、接合電子部品を樹脂シート内に圧入し、埋設する際に加わる押圧力によって、接合電子部品が損傷を受けることが少なくなる。また、個々に電子部品を埋めて積層するよりも、薄型化が可能となり、工程数も減少する。   With such a configuration, even if it is a thin electronic component, it is possible to obtain rigidity by sticking together to make a bonded electronic component, so that the bonded electronic component is press-fitted into the resin sheet, and by the pressing force applied when embedment, Bonded electronic components are less likely to be damaged. In addition, the thickness can be reduced and the number of processes can be reduced as compared with individually embedding and stacking electronic components.

また本発明の電子回路モジュールは、樹脂シートの厚み方向に形成された配線層間を接続する貫通導体部を備えた構成としてもよい。このような構成により、貫通導体部を介して樹脂シートの一方の表面のみで、他の機器への接続が可能となるため、接続構成が簡単となる。   Moreover, the electronic circuit module of this invention is good also as a structure provided with the penetration conductor part which connects the wiring layer formed in the thickness direction of the resin sheet. With such a configuration, connection to another device is possible only on one surface of the resin sheet via the through conductor portion, and the connection configuration is simplified.

また本発明の電子回路モジュールの貫通導体部は、接合電子部品よりも軟質の導電体材料からなる構成としてもよい。このような構成により、貫通導体部は容易に押し延ばされ、導通が確保されるので、その長さの自由度が大きくなる。   The through conductor portion of the electronic circuit module of the present invention may be made of a conductive material that is softer than the bonded electronic component. With such a configuration, the through conductor portion is easily extended and conduction is ensured, so that the degree of freedom of the length is increased.

更に本発明の多層電子回路モジュールは、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品と、電極端子の表面を露出させる形状に接合電子部品を埋設した第1の樹脂シートと、第1の樹脂シートの両表面に露出させた電極端子にそれぞれ接続する配線層と、第1の樹脂シートの両表面に形成された配線層間を接続する貫通導体部とを有する第1のモジュールユニットを複数積層し、積層する第1のモジュールユニット同士はそれぞれの貫通導体部を介して配線層間が接続されている構成である。   Furthermore, the multilayer electronic circuit module of the present invention includes a bonded electronic component in which two electronic components having electrode terminals formed on at least one surface are paired, and the other surfaces of the electronic components are bonded together, and an electrode Both a first resin sheet in which bonded electronic components are embedded in a shape that exposes the surface of the terminal, a wiring layer that is connected to the electrode terminals exposed on both surfaces of the first resin sheet, and both of the first resin sheet A plurality of first module units each having a through conductor portion connecting the wiring layers formed on the surface are stacked, and the first module units to be stacked are connected to each other through the through conductor portions. It is a configuration.

このような構成により、薄型の電子部品を立体的に積層することができるため、より高密度な実装が可能となる。   With such a configuration, thin electronic components can be three-dimensionally stacked, so that higher-density mounting is possible.

また本発明の多層電子回路モジュールは、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品、電極端子の表面を露出させる形状に接合電子部品を埋設した第1の樹脂シート、第1の樹脂シートの両表面に露出させた電極端子にそれぞれ接続する配線層および第1の樹脂シートの両表面に形成された配線層間を接続する貫通導体部を有する第1のモジュールユニットと、少なくとも一方の面に電極端子が形成された平板状電子部品および電極端子の表面を露出させる形状に平板状電子部品を埋設した第2の樹脂シートを有する第2のモジュールユニットとをそれぞれ少なくとも一層積層し、積層する第1のモジュールユニットと第2のモジュールユニットとは貫通導体部を介して接続されている構成である。   Also, the multilayer electronic circuit module of the present invention is a bonded electronic component, electrode terminal in which two electronic components having electrode terminals formed on at least one surface are paired and the other surfaces of the electronic components are bonded and integrated. Formed on both surfaces of the first resin sheet, the first resin sheet in which the bonded electronic components are embedded in a shape that exposes the surface, the wiring layer connected to the electrode terminals exposed on both surfaces of the first resin sheet A first module unit having a through conductor portion connecting between the wiring layers formed, a flat electronic component having an electrode terminal formed on at least one surface, and a flat electronic component embedded in a shape exposing the surface of the electrode terminal Each of the second module units having the second resin sheet is laminated at least one layer, and the first module unit and the second module unit are laminated. It is a configuration that is connected via a through conductor portion.

このような構成により、接合電子部品を備えた第1のモジュールユニットと、平板状電子部品を備えた第2のモジュールユニット、すなわち厚みの異なるモジュールユニット間の接続もでき、接続するモジュールユニットの選択範囲が広がる。   With such a configuration, it is possible to connect the first module unit including the junction electronic component and the second module unit including the flat plate electronic component, that is, the module units having different thicknesses, and selecting the module unit to be connected. The range expands.

また本発明の多層電子回路モジュールは、折り曲げ部を有し、折り曲げ部の厚みは折り曲げ部以外の厚みより薄い構成としてもよい。このような構成により、厚みの薄い部分は折り曲げやすいため、その部分を中心に簡単に折り曲げることができる。   Moreover, the multilayer electronic circuit module of this invention is good also as a structure which has a bending part and the thickness of a bending part is thinner than thickness other than a bending part. With such a configuration, the thin portion can be easily bent, and can be easily bent around the portion.

また本発明の多層電子回路モジュールの折り曲げ部は、多層電子回路モジュールの端部に位置し、折り曲げ部に外部機器と接続するための端子部を備えた構成としてもよい。このような構成により、端子部で外部機器と接続する構成とできるので、多層電子回路モジュールはその端部を折り曲げて容易に実装できる。   Further, the bent portion of the multilayer electronic circuit module of the present invention may be located at the end of the multilayer electronic circuit module, and the bent portion may be provided with a terminal portion for connecting to an external device. With such a configuration, the terminal portion can be connected to an external device, so that the multilayer electronic circuit module can be easily mounted by bending its end portion.

また本発明の多層電子回路モジュールの貫通導体部は、接合電子部品よりも軟質の導電体材料からなる構成としてもよい。このような構成により、貫通導体部は容易に押し延ばされ、導通が確保されるので、その長さの自由度が大きくなる。   The through conductor portion of the multilayer electronic circuit module of the present invention may be made of a conductive material that is softer than the bonded electronic component. With such a configuration, the through conductor portion is easily extended and conduction is ensured, so that the degree of freedom of the length is increased.

更に本発明の電子回路モジュールの製造方法は、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品を形成する接合電子部品形成工程と、樹脂シートを予め設定した温度に加熱して予め設定した位置に配置した接合電子部品を加圧して、電極端子の表面を露出させる形状に接合電子部品を樹脂シート中に埋設する埋設工程と、樹脂シートの両表面に露出させた電極端子にそれぞれ接続される配線層を形成する配線層形成工程とを備えた方法である。   Furthermore, the electronic circuit module manufacturing method of the present invention is a bonded electronic component in which two electronic components having electrode terminals formed on at least one surface are paired, and the other surfaces of the electronic components are bonded and integrated. The bonded electronic component forming step to be formed, and the resin sheet is heated to a preset temperature and pressurized to the bonded electronic component placed at a preset position to expose the surface of the electrode terminal. And a wiring layer forming step of forming wiring layers connected to the electrode terminals exposed on both surfaces of the resin sheet.

この方法により、電子部品を貼り合わせて接合電子部品とし、その後で樹脂シートに圧入するため、個々の電子部品が薄くても剛性が確保され、圧入時に接合電子部品が破損することが少ない。また、個々の電子部品を薄くできるので、全体寸法の薄い電子回路モジュールの作製が容易になる。   By this method, the electronic components are bonded together to form a bonded electronic component, and then press-fitted into the resin sheet. Therefore, even if each electronic component is thin, rigidity is ensured, and the bonded electronic component is less likely to be damaged during press-fitting. In addition, since individual electronic components can be made thin, it is easy to produce an electronic circuit module having a thin overall dimension.

また本発明の電子回路モジュールの製造方法は、埋設工程において、接合電子部品の厚みでかつ接合電子部品より軟質な導電体材料を同時に埋め込み、その両端部を樹脂シートの表面に露出させて貫通導体部を形成する方法としてもよい。   In the method of manufacturing an electronic circuit module according to the present invention, in the embedding process, a conductive material that is thicker than the bonded electronic component and softer than the bonded electronic component is embedded at the same time, and both ends thereof are exposed on the surface of the resin sheet. It is good also as a method of forming a part.

この方法により、接合電子部品の樹脂シートへの埋設時に貫通導体部も同時に形成され、製造工程の簡略化を図れる。   By this method, the through conductor portion is also formed at the same time when the bonded electronic component is embedded in the resin sheet, and the manufacturing process can be simplified.

更に本発明の多層電子回路モジュールの製造方法は、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品、電極端子の表面を露出させる形状に接合電子部品を埋設した第1の樹脂シート、第1の樹脂シートの両表面に露出させた電極端子にそれぞれ接続する配線層および第1の樹脂シートの両表面に形成された配線層間を接続する貫通導体部を有する第1のモジュールユニットを形成する工程と、第1のモジュールユニットを複数用意し、第1のモジュールユニット同士は予め設定した位置に配線層および貫通導体部を位置合わせして積層した後、第1の樹脂シート同士を軟化させるまで加熱し、加圧して接着一体化するとともに、貫通導体部を介して配線層間を接続する工程とを備えた方法である。   Furthermore, in the method for manufacturing a multilayer electronic circuit module according to the present invention, a pair of two electronic components each having an electrode terminal formed on at least one surface, and the other surfaces of the electronic components are bonded together to be integrated. The first resin sheet in which the junction electronic component is embedded in a shape that exposes the surface of the electrode terminal, both the wiring layer connected to the electrode terminal exposed on both surfaces of the first resin sheet, and the first resin sheet A step of forming a first module unit having a through conductor portion connecting between wiring layers formed on the surface, and a plurality of first module units are prepared, and the first module units are arranged in a predetermined position at the wiring layer. After positioning and laminating the through conductor portions and heating, the first resin sheets are heated until they are softened, pressed and integrated by bonding, and the wiring is passed through the through conductor portions. It is a method that includes a step of connecting between.

この方法により、接合電子部品を備えたモジュールユニットを積層するため、厚みが薄く高密度な多層電子回路モジュールを製造することができる。   By this method, the module units including the bonded electronic components are stacked, so that a multilayer electronic circuit module having a small thickness and a high density can be manufactured.

更に本発明の多層電子回路モジュールの製造方法は、少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、電子部品の他方の面同士を接着して一体化した接合電子部品、電極端子の表面を露出させる形状に接合電子部品を埋設した第1の樹脂シート、第1の樹脂シートの両表面に露出させた電極端子にそれぞれ接続する配線層および第1の樹脂シートの両表面に形成された配線層間を接続する貫通導体部を有する第1のモジュールユニットを形成する工程と、少なくとも一方の面に電極端子が形成された平板状電子部品および電極端子の表面を露出させる形状に平板状電子部品を埋設した第2の樹脂シートを有する第2のモジュールユニットを形成する工程と、第1のモジュールユニットおよび第2のモジュールユニットをそれぞれ少なくとも一層用意し、第1のモジュールユニットと第2のモジュールユニットとは予め設定した位置に配線層を位置合わせして積層した後、第1の樹脂シートと第2の樹脂シートとを軟化させるまで加熱し、加圧して接着一体化するとともに、貫通導体部を介して接続する工程とを備えた方法である。   Furthermore, in the method for manufacturing a multilayer electronic circuit module according to the present invention, a pair of two electronic components each having an electrode terminal formed on at least one surface, and the other surfaces of the electronic components are bonded together to be integrated. The first resin sheet in which the junction electronic component is embedded in a shape that exposes the surface of the electrode terminal, both the wiring layer connected to the electrode terminal exposed on both surfaces of the first resin sheet, and the first resin sheet A step of forming a first module unit having a through conductor portion connecting between wiring layers formed on the surface, a flat electronic component having an electrode terminal formed on at least one surface, and a shape exposing the surface of the electrode terminal Forming a second module unit having a second resin sheet in which a flat electronic component is embedded, a first module unit, and a second module unit. At least one layer is prepared, and the first module unit and the second module unit are laminated by aligning the wiring layers at preset positions, and then the first resin sheet and the second resin sheet are softened. Heating and pressurizing until they are adhered and bonding and integrating, and connecting via the through conductor portion.

この方法により、接合電子部品を備えた第1のモジュールユニットと、平板状電子部品を備えた第2のモジュールユニット、すなわち厚みの異なるモジュールユニット間の接続も容易に行える。   By this method, it is possible to easily connect the first module unit including the bonded electronic component and the second module unit including the flat plate electronic component, that is, the module units having different thicknesses.

また、本発明の多層電子回路モジュールの製造方法は、接合電子部品を第1の樹脂シートに埋設する際に、接合電子部品より軟質な導電体材料を同時に埋め込み、その両端部を第1の樹脂シートの表面に露出させて貫通導体部を形成する方法としてもよい。この方法により、接合電子部品の第1の樹脂シートへの埋設時に貫通導体部も同時に形成され、製造工程の簡略化を図れる。   In the method of manufacturing a multilayer electronic circuit module according to the present invention, when the bonded electronic component is embedded in the first resin sheet, a conductive material softer than the bonded electronic component is embedded at the same time, and both end portions thereof are filled with the first resin. It is good also as a method of exposing on the surface of a sheet and forming a penetration conductor part. By this method, the through conductor portion is also formed at the same time when the bonded electronic component is embedded in the first resin sheet, and the manufacturing process can be simplified.

また、本発明の多層電子回路モジュールの製造方法は、接合電子部品は半導体メモリからなり、2枚のウエハのそれぞれのメモリ素子同士を位置合わせし、電極端子形成面とは反対面同士を接着した後、一括して切断して形成する方法としてもよい。この方法により、一旦精度よく半導体メモリの他方の面同士を貼り合わせると、位置ずれのない接合電子部品を効率的に作製することができる。   In the method of manufacturing a multilayer electronic circuit module according to the present invention, the bonded electronic component is composed of a semiconductor memory, the memory elements of the two wafers are aligned with each other, and the surfaces opposite to the electrode terminal forming surface are bonded together. After that, it may be formed by cutting all at once. With this method, once the other surfaces of the semiconductor memory are pasted together with high accuracy, a bonded electronic component free from misalignment can be efficiently produced.

本発明の電子回路モジュールと多層電子回路モジュールおよびそれらの製造方法は、個々の電子部品を予め重ねて接着して接合電子部品とするため、この接合電子部品は剛性が得られ、樹脂シート内に実装するときも損傷を受けにくく、また薄型で高密度の電子回路モジュールを実現できるという大きな効果を有する。   In the electronic circuit module, the multilayer electronic circuit module, and the manufacturing method thereof according to the present invention, individual electronic components are stacked in advance and bonded to form a bonded electronic component. When mounted, it is not easily damaged, and has a great effect that a thin and high-density electronic circuit module can be realized.

以下、本発明の実施の形態について、図面を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(第1の実施の形態)
本発明の第1の実施の形態では、接合電子部品を半導体メモリとし、電子回路モジュールをメモリモジュールとした場合を例に説明する。
(First embodiment)
In the first embodiment of the present invention, a case where a bonded electronic component is a semiconductor memory and an electronic circuit module is a memory module will be described as an example.

図1は本発明の第1の実施の形態による電子回路モジュールの断面図である。電子回路モジュール21は、以下の構成である。少なくとも一方の面に電極端子24、25が形成された2個の電子部品26、27を一対として、電子部品26、27の他方の面同士を接着して一体化した接合電子部品23としている。そして、その接合電子部品23を、ポリエチレンテレフタレート等の絶縁性を有する樹脂シート22内に複数埋め込んでいる。ここで、樹脂シート22の両表面である上表面22A、下表面22Bには、それぞれ電極端子24、25が露出している。   FIG. 1 is a cross-sectional view of an electronic circuit module according to a first embodiment of the present invention. The electronic circuit module 21 has the following configuration. A pair of two electronic components 26 and 27 having electrode terminals 24 and 25 formed on at least one surface is paired, and the other surfaces of the electronic components 26 and 27 are bonded and integrated to form a bonded electronic component 23. A plurality of the bonded electronic components 23 are embedded in an insulating resin sheet 22 such as polyethylene terephthalate. Here, electrode terminals 24 and 25 are exposed on the upper surface 22A and the lower surface 22B, which are both surfaces of the resin sheet 22, respectively.

そして図1に示すように、上表面22Aおよび下表面22Bに露出した電極端子24、25にそれぞれ配線層28A、28Bが接続されている。また、下表面22Bの配線層28Bは、導電体材料よりなる貫通導体部29により上表面22Aに導出されている。   As shown in FIG. 1, wiring layers 28A and 28B are connected to the electrode terminals 24 and 25 exposed on the upper surface 22A and the lower surface 22B, respectively. The wiring layer 28B on the lower surface 22B is led out to the upper surface 22A by a through conductor portion 29 made of a conductive material.

接合電子部品23は、少なくとも一方の面に電極端子24を有する電子部品26と、少なくとも一方の面に電極端子25を有する電子部品27との他方の面同士が貼り合わされたものである。従って、これらの電子部品26、27は、従来の電子部品に比較して半分の厚みにしても、接合電子部品23は従来の電子部品とほぼ同じ厚みであるため、押圧力に対する強度は、従来とほぼ同じである。換言すれば、メモリモジュールの場合その厚みは、従来の同等の記憶容量を有するメモリモジュールに比べて半分にすることができ、押圧力に対する強度は従来とほぼ同じにすることができる。   The bonded electronic component 23 is formed by bonding the other surfaces of an electronic component 26 having an electrode terminal 24 on at least one surface and an electronic component 27 having an electrode terminal 25 on at least one surface. Therefore, even if these electronic components 26 and 27 are half as thick as the conventional electronic components, the bonded electronic component 23 has almost the same thickness as the conventional electronic components, so the strength against the pressing force is Is almost the same. In other words, in the case of a memory module, the thickness can be halved compared to a conventional memory module having an equivalent storage capacity, and the strength against the pressing force can be made substantially the same as in the past.

次に、このような構成の電子回路モジュール21の製造方法について、製造工程の断面を示す図2、および図4〜図12を用いて説明する。図2は、接合電子部品の製造工程を説明する断面図である。図2(a)に示すように、少なくとも一方の面に電極端子24、25をそれぞれ有する、個別の電子部品26、27の他方の面同士を、エポキシ樹脂等の熱硬化性樹脂と硬化剤からなる接着剤で貼り合わせる。そして、図2(b)に示すように、電極端子24、25を有する接合電子部品23を形成する。   Next, a method for manufacturing the electronic circuit module 21 having such a configuration will be described with reference to FIGS. 2 and 4 to 12 showing a cross section of the manufacturing process. FIG. 2 is a cross-sectional view for explaining a manufacturing process of the bonded electronic component. As shown in FIG. 2 (a), the other surfaces of the individual electronic components 26 and 27 each having the electrode terminals 24 and 25 on at least one surface are separated from a thermosetting resin such as an epoxy resin and a curing agent. Bond together with an adhesive. Then, as shown in FIG. 2B, a bonded electronic component 23 having electrode terminals 24 and 25 is formed.

なお、ここで使用する個別の電子部品26、27は、従来の電子部品の電極端子がない他方の面を予め研削加工をして、厚みを薄くすることができる。   Note that the individual electronic components 26 and 27 used here can be thinned in advance by grinding the other surface of the conventional electronic component without electrode terminals.

図3は、接合電子部品の他の製造方法を説明する外観斜視図である。接合電子部品を形成する電子部品が、シリコンウエハ等を基材として形成された半導体メモリである場合には、以下のようにする。一方の表面に複数個の電極端子33Aを形成した、2つのシリコンウエハ30A、30Bの他方の面同士を位置合わせし、貼り合わせる。その後、所定の切断位置31A、31Bで一括して切断するダイシング加工をすれば、個別の接合電子部品32を多量に得ることができる。このようにすることによって、接合電子部品は、貼り合わされる半導体メモリ同士の位置ずれが少なく、効率よく形成される。   FIG. 3 is an external perspective view for explaining another manufacturing method of the bonded electronic component. When the electronic component forming the bonded electronic component is a semiconductor memory formed using a silicon wafer or the like as a base material, the following is performed. The other surfaces of the two silicon wafers 30A and 30B having a plurality of electrode terminals 33A formed on one surface are aligned and bonded together. After that, if dicing is performed to cut at a predetermined cutting position 31A, 31B at a time, a large number of individual bonded electronic components 32 can be obtained. By doing so, the bonded electronic component is efficiently formed with little positional deviation between the semiconductor memories to be bonded.

次の工程として図4に示すように、接合電子部品23と、貫通導体部29とを、ポリエチレンテレフタレート等の電気絶縁性を有する樹脂シート34上に載置する。ここで接合電子部品23の電極端子24を上方に、電極端子25を下方にしている。   As a next step, as shown in FIG. 4, the bonded electronic component 23 and the through conductor portion 29 are placed on a resin sheet 34 having electrical insulating properties such as polyethylene terephthalate. Here, the electrode terminal 24 of the bonded electronic component 23 is directed upward, and the electrode terminal 25 is directed downward.

貫通導体部29は接合電子部品23よりも軟質の導電体材料からなり、例えば、半田、金(Au)または表面に金属膜が形成された樹脂で、球状、柱状、多面体形状等がよい。これは、後の工程で加圧されたときに、貫通導体部29が接合電子部品23より厚みが厚くなっていても、容易に押し延ばすことができ、導通がとれるからである。   The through conductor portion 29 is made of a conductive material that is softer than the bonded electronic component 23. For example, the through conductor portion 29 is made of solder, gold (Au), or a resin having a metal film formed on its surface, and may have a spherical shape, a columnar shape, a polyhedral shape, or the like. This is because even when the through conductor portion 29 is thicker than the bonded electronic component 23 when pressed in a subsequent process, it can be easily extended and conduction can be obtained.

そして、図5に示すように、接合電子部品23と貫通導体部29とを予め設定した位置に配置し、加熱装置36により樹脂シート34を予め設定した温度である軟化させる温度に加熱した熱プレス板35A、35Bの間に挟む。その後、接合電子部品23の上方の電極端子24および貫通導体部29と樹脂シート34の下面とを、押圧装置37により所定の圧力で押す。   Then, as shown in FIG. 5, the bonded electronic component 23 and the through conductor portion 29 are arranged at a preset position, and the heat press heated to a temperature at which the resin sheet 34 is softened, which is a preset temperature, by the heating device 36. It is sandwiched between the plates 35A and 35B. Thereafter, the electrode terminal 24 and the through conductor portion 29 above the bonded electronic component 23 and the lower surface of the resin sheet 34 are pressed by the pressing device 37 with a predetermined pressure.

図6に示すように、接合電子部品23の下方の電極端子25と貫通導体部29の下端とを、樹脂シート34の下面に露出させるまで押し込み、接合電子部品23および貫通導体部29の上側約半分と上方の電極端子24とが、樹脂シート34から上方に突出した状態となる。このときの熱プレス板35A、35Bの加熱加圧条件は、例えば1分で30×105Paに昇圧され、その圧力で140℃に1分間保持する条件である。 As shown in FIG. 6, the electrode terminal 25 below the bonded electronic component 23 and the lower end of the through conductor portion 29 are pushed in until they are exposed on the lower surface of the resin sheet 34, and the upper side of the bonded electronic component 23 and the through conductor portion 29 The half and the upper electrode terminal 24 protrude upward from the resin sheet 34. The heating and pressing conditions of the hot press plates 35A and 35B at this time are, for example, conditions in which the pressure is increased to 30 × 10 5 Pa in 1 minute and held at 140 ° C. for 1 minute.

次に図7に示すように、樹脂シート34に下側約半分が埋め込まれた貫通導体部29および接合電子部品23の上方の電極端子24上に、樹脂シート38を載せる。そして、樹脂シート34と樹脂シート38とを、熱プレス板35A、35Bの間に挟む。その後、樹脂シート34および樹脂シート38を加熱装置36で加熱しながら押圧装置37により所定の圧力で押し、樹脂シート34と樹脂シート38とを加熱結合させて、一体の樹脂シートにする。   Next, as shown in FIG. 7, the resin sheet 38 is placed on the through conductor portion 29 in which the lower half is embedded in the resin sheet 34 and the electrode terminal 24 above the bonded electronic component 23. Then, the resin sheet 34 and the resin sheet 38 are sandwiched between the hot press plates 35A and 35B. Thereafter, the resin sheet 34 and the resin sheet 38 are pressed with a predetermined pressure by the pressing device 37 while being heated by the heating device 36, and the resin sheet 34 and the resin sheet 38 are heat-bonded to form an integral resin sheet.

このとき、図8に示すように、接合電子部品23を上方の電極端子24および貫通導体部29の上端を、結合した樹脂シート22の上面に露出させる位置まで押し込み、接合電子部品内蔵基板43とする。また、熱プレス板35A、35Bの加熱加圧条件は上述の条件と同様である。   At this time, as shown in FIG. 8, the bonded electronic component 23 is pushed to the position where the upper ends of the upper electrode terminal 24 and the through conductor portion 29 are exposed on the upper surface of the combined resin sheet 22, and the bonded electronic component built-in substrate 43 and To do. The heating and pressing conditions for the hot press plates 35A and 35B are the same as those described above.

そして図1に示すように、樹脂シート22の両側表面上に、接合電子部品23の露出した上方の電極端子24、および下方の電極端子25に接続する配線層28A、28Bを銀ペースト等の導電性ペーストを用いて印刷形成する。その結果、本発明の第1の実施の形態による電子回路モジュール21となる。   As shown in FIG. 1, the wiring layers 28A and 28B connected to the upper electrode terminal 24 and the lower electrode terminal 25 exposed on the bonding electronic component 23 are formed on both side surfaces of the resin sheet 22 with a conductive material such as silver paste. Printing is performed using a functional paste. As a result, the electronic circuit module 21 according to the first embodiment of the present invention is obtained.

このように本発明の第1の実施の形態によれば、少なくとも一方の面に電極端子24を有する電子部品26と、少なくとも一方の面に電極端子25を有する電子部品27を一対として、他方の面同士を接着し、押圧力に対する強度を増した接合電子部品23としている。従って、接着する前の個々の電子部品26、27が薄い寸法であっても、加熱加圧して樹脂シート34、38内に埋め込む際に接合電子部品23、すなわち電子部品26、27が損傷を受けにくい。   Thus, according to the first embodiment of the present invention, the electronic component 26 having the electrode terminal 24 on at least one surface and the electronic component 27 having the electrode terminal 25 on at least one surface are paired, and the other The bonded electronic components 23 are bonded to each other and have increased strength against pressing force. Therefore, even if the individual electronic parts 26 and 27 before bonding are thin, the bonded electronic parts 23, that is, the electronic parts 26 and 27 are damaged when embedded in the resin sheets 34 and 38 by heating and pressing. Hateful.

なお、接合電子部品内蔵基板43の形成方法としては、接合電子部品23の下側約半分を樹脂シート34内に埋め込み、上側半分を樹脂シート38内に埋め込む方法に代えて、図9に示す方法としてもよい。なお図9は、貫通導体部を接合電子部品23と同時に形成しない場合である。   As a method of forming the bonded electronic component built-in substrate 43, a method shown in FIG. 9 is used instead of the method of embedding the lower half of the bonded electronic component 23 in the resin sheet 34 and the upper half in the resin sheet 38. It is good. FIG. 9 shows a case where the through conductor portion is not formed simultaneously with the bonded electronic component 23.

図9では、接合電子部品23を下方の電極端子25を下にして、樹脂シート34の上に載せ、その上方の電極端子24の上に樹脂シート38を載せる。そして、樹脂シート34、38を、加熱装置40により樹脂シート34、38が軟化する温度に加熱した熱プレス板39A、39Bの間に挟む。その後、樹脂シート34、38を加熱しながら押圧装置41により所定の圧力で押し、樹脂シート34、38を加熱結合させて一体の樹脂シートとする。そのとき、接合電子部品23を上方の電極端子24と下方の電極端子25とを、一体となる樹脂シートの両表面に露出する位置まで押し込む。   In FIG. 9, the bonded electronic component 23 is placed on the resin sheet 34 with the lower electrode terminal 25 facing down, and the resin sheet 38 is placed on the upper electrode terminal 24. Then, the resin sheets 34 and 38 are sandwiched between hot press plates 39A and 39B heated to a temperature at which the resin sheets 34 and 38 are softened by the heating device 40. Thereafter, the resin sheets 34 and 38 are pressed with a predetermined pressure by the pressing device 41 while being heated, and the resin sheets 34 and 38 are heat-bonded to form an integral resin sheet. At that time, the bonded electronic component 23 is pushed into the position where the upper electrode terminal 24 and the lower electrode terminal 25 are exposed on both surfaces of the integrated resin sheet.

このようにすれば、樹脂シート34、38の間に挟まれた接合電子部品23が上下方向から同時に加熱加圧されて樹脂シート34、38が結合した樹脂シートの中に押し込み埋設される。その結果、接合電子部品内蔵基板の製造工程が簡単になるとともに、製造時に接合電子部品23が押圧を受ける回数は1回になる。すなわち、平板状の電子部品26、27は損傷を受けることがより少なくなり、電子回路モジュールを安定して製造することができる。   If it does in this way, the joining electronic component 23 pinched | interposed between the resin sheets 34 and 38 will be simultaneously heat-pressed from an up-down direction, and it will be pushed and embedded in the resin sheet which the resin sheets 34 and 38 couple | bonded. As a result, the manufacturing process of the bonded electronic component built-in substrate is simplified, and the number of times the bonded electronic component 23 is pressed during manufacturing is one. That is, the flat electronic components 26 and 27 are less damaged, and the electronic circuit module can be stably manufactured.

また、図5で樹脂シート34の厚みを、接合電子部品23の厚みと同程度にして、1回の加圧、加熱により接合電子部品23を樹脂シートに埋設するようにしてもよい。この場合も、接合電子部品23の押圧を受ける回数が1回で済むため、同様に平板状の電子部品はより損傷を受けにくくなる。   Further, in FIG. 5, the thickness of the resin sheet 34 may be approximately the same as the thickness of the bonded electronic component 23, and the bonded electronic component 23 may be embedded in the resin sheet by one pressurization and heating. Also in this case, since the number of times of receiving the pressing of the bonded electronic component 23 is only one, the flat electronic component is similarly less likely to be damaged.

また、図10は接合電子部品23を樹脂シート22に圧入する際の上方の電極端子部付近を拡大した断面図である。電極端子を含めた接合電子部品23の厚みにばらつきがあり、電極端子24Aの部分が最も厚い場合、電極端子24Aが樹脂シート22から最初に露出するが、電極端子24B、24C、24Dは露出していない。このとき、最も厚みの薄い部分の電極端子24B、24Cが樹脂シート22の表面に露出するまで、更に圧入する。   FIG. 10 is an enlarged cross-sectional view of the vicinity of the upper electrode terminal portion when the bonded electronic component 23 is press-fitted into the resin sheet 22. When the thickness of the bonded electronic component 23 including the electrode terminal varies and the electrode terminal 24A is thickest, the electrode terminal 24A is first exposed from the resin sheet 22, but the electrode terminals 24B, 24C, and 24D are exposed. Not. At this time, further press-fitting is performed until the electrode terminals 24B and 24C of the thinnest part are exposed on the surface of the resin sheet 22.

その結果、図11に示すように電極端子24A、24Dの上端は押し延ばされ、全ての電極端子を樹脂シート22から露出させることができる。ここで電極端子としては、硬度が小さく延性のある銅(Cu)、金(Au)、アルミニウム(Al)等が適している。また、電極端子は圧入する際に加圧装置と接合電子部品23に挟まれて、押し延ばされるので少なくとも、接合電子部品23よりも硬度が小さい方がよい。   As a result, as shown in FIG. 11, the upper ends of the electrode terminals 24 </ b> A and 24 </ b> D are extended, and all the electrode terminals can be exposed from the resin sheet 22. Here, as the electrode terminal, copper (Cu), gold (Au), aluminum (Al) or the like having a small hardness and ductility is suitable. Further, when the electrode terminal is press-fitted, the electrode terminal is sandwiched between the pressurizing device and the bonded electronic component 23 and is stretched, so at least the hardness is preferably smaller than that of the bonded electronic component 23.

また、図12に示すように樹脂シート22の上部を、例えばドライエッチングにより除去し、全ての電極端子24A、24B、24C、24Dを露出させるようにしてもよい。   Moreover, as shown in FIG. 12, the upper part of the resin sheet 22 may be removed by dry etching, for example, and all the electrode terminals 24A, 24B, 24C, and 24D may be exposed.

また、本発明の第1の実施の形態の電子回路モジュール21は、貫通導体部のない構成も可能である。図13に示すように、樹脂シート22の両表面に露出した電極端子24、25にそれぞれ配線層28A、28Bを銀ペースト等の導電性ペーストを用いて印刷形成する。この場合は、外部機器との接続は、配線層28A、28Bを介して行う。   Further, the electronic circuit module 21 according to the first embodiment of the present invention may be configured without a through conductor portion. As shown in FIG. 13, wiring layers 28 </ b> A and 28 </ b> B are printed and formed on electrode terminals 24 and 25 exposed on both surfaces of the resin sheet 22 using a conductive paste such as a silver paste, respectively. In this case, connection with an external device is performed via the wiring layers 28A and 28B.

(第2の実施の形態)
本発明の第2の実施の形態では、接合電子部品を半導体メモリとしたメモリモジュールを多層に積み重ねるスタックICモジュールを、多層電子回路モジュールとした場合を例に説明する。
(Second Embodiment)
In the second embodiment of the present invention, a case where a stack IC module in which memory modules each having a bonded electronic component as a semiconductor memory are stacked in multiple layers will be described as an example of a multilayer electronic circuit module.

図14は本発明の第2の実施の形態による多層電子回路モジュールの断面図である。図14に示すように、多層電子回路モジュール44は、2つの接合電子部品45、46が、ポリエチレンテレフタレート等の絶縁性を有する樹脂シート47内に埋め込まれている。そして、電極端子48B、49Aは配線層50、貫通導体部51Aを介して樹脂シート47の上表面47Aに導出されている。また、電極端子49Bは配線層52B、貫通導体部51B、51Aを介して樹脂シート47の上表面47Aに導出されている。なお、電極端子48Aは樹脂シート47の上表面47A上の配線層52Aに直接接続されている。   FIG. 14 is a sectional view of a multilayer electronic circuit module according to the second embodiment of the present invention. As shown in FIG. 14, in the multilayer electronic circuit module 44, two bonded electronic components 45 and 46 are embedded in an insulating resin sheet 47 such as polyethylene terephthalate. The electrode terminals 48B and 49A are led to the upper surface 47A of the resin sheet 47 through the wiring layer 50 and the through conductor portion 51A. The electrode terminal 49B is led to the upper surface 47A of the resin sheet 47 through the wiring layer 52B and the through conductor portions 51B and 51A. The electrode terminal 48A is directly connected to the wiring layer 52A on the upper surface 47A of the resin sheet 47.

この多層電子回路モジュール44は、第1のモジュールユニットを2つ積層し、第1のモジュールユニット同士はそれぞれの貫通導体部を介して配線層間が接続されている。ここで第1のモジュールユニットは、図1の電子回路モジュール21と同じく第1の樹脂シートの表面に接合電子部品の電極端子を露出させ、その電極端子に接続する配線層と、配線層間を接続する貫通導体部を有する構成である。   In this multilayer electronic circuit module 44, two first module units are stacked, and the first module units are connected to each other between the wiring layers via respective through conductor portions. Here, the first module unit is similar to the electronic circuit module 21 shown in FIG. 1, and the electrode terminals of the bonded electronic components are exposed on the surface of the first resin sheet, and the wiring layer connected to the electrode terminals is connected to the wiring layer. It is the structure which has a through-conductor part to do.

次に、このような構成の多層電子回路モジュール44の製造方法について、製造工程の断面図である図15、図16を用いて説明する。   Next, a method for manufacturing the multilayer electronic circuit module 44 having such a configuration will be described with reference to FIGS.

最初の工程として、本発明の第1の実施の形態と同様の方法で接合電子部品45、46を形成し、図15(a)(b)に示すような、ポリエチレンテレフタレート等の樹脂シート内に接合電子部品45、46を埋設した第1のモジュールユニット53、54とする。   As the first step, the bonded electronic components 45 and 46 are formed by the same method as in the first embodiment of the present invention, and the resin sheet such as polyethylene terephthalate as shown in FIGS. 15 (a) and 15 (b) is formed. The first module units 53 and 54 in which the bonded electronic components 45 and 46 are embedded are used.

ここで、第1のモジュールユニット53には、接合電子部品45の電極端子48A、48Bおよび貫通導体部51Aと接続した配線層52A、50が上下表面に形成されている。第1のモジュールユニット54には、下表面のみに接合電子部品46の電極端子49Bと接続した配線層52Bが形成され、上表面には接合電子部品46の電極端子49Aおよび貫通導体部51Bの端部を露出させている。このとき、貫通導体部51A、51Bはそれぞれ、接合電子部品45、46より軟質の導電体材料からなり、接合電子部品45、46を埋め込む際に同時に、その両端部が樹脂シートの表面に露出するまで埋め込まれる。   Here, in the first module unit 53, wiring layers 52A and 50 connected to the electrode terminals 48A and 48B of the bonded electronic component 45 and the through conductor portion 51A are formed on the upper and lower surfaces. In the first module unit 54, the wiring layer 52B connected to the electrode terminal 49B of the bonded electronic component 46 is formed only on the lower surface, and the electrode terminal 49A of the bonded electronic component 46 and the end of the through conductor portion 51B are formed on the upper surface. The part is exposed. At this time, the through conductor portions 51A and 51B are each made of a conductive material softer than the bonded electronic components 45 and 46, and at the same time when the bonded electronic components 45 and 46 are embedded, both ends thereof are exposed on the surface of the resin sheet. Until embedded.

次の工程として、図16に示すように、第1のモジュールユニット54の上に第1のモジュールユニット53を予め設定した位置に重ねて載せる。その際、それぞれの第1のモジュールユニット53、54の配線層および貫通導体部を位置合わせする。そして、第1のモジュールユニット53、54を加熱装置55により樹脂シートを軟化させる温度に加熱した熱プレス板56A、56Bの間に挟む。その後、第1のモジュールユニット53、54を押圧装置57により所定の圧力で押し、第1のモジュールユニット53、54の樹脂シートを加圧し、接着させて一体の樹脂シートとする。第1のモジュールユニット54内に埋設されている接合電子部品46の電極端子49A、および貫通導体部51Bの端部を、第1のモジュールユニット53下面の配線層50に接続させて、図14に示した多層電子回路モジュール44とする。なお、熱プレス板56A、56Bは、本発明の第1の実施の形態と同様に、1分で30×105Paに昇圧され、その圧力で140℃に1分間保持した。 As the next step, as shown in FIG. 16, the first module unit 53 is placed on the first module unit 54 at a preset position. At that time, the wiring layers and the through conductor portions of the first module units 53 and 54 are aligned. And the 1st module units 53 and 54 are pinched | interposed between the hot press boards 56A and 56B heated to the temperature which softens a resin sheet with the heating apparatus 55. FIG. Thereafter, the first module units 53 and 54 are pressed with a predetermined pressure by the pressing device 57, and the resin sheets of the first module units 53 and 54 are pressed and bonded to form an integrated resin sheet. The electrode terminal 49A of the junction electronic component 46 embedded in the first module unit 54 and the end of the through conductor portion 51B are connected to the wiring layer 50 on the lower surface of the first module unit 53, as shown in FIG. The multilayer electronic circuit module 44 shown is assumed. The hot press plates 56A and 56B were boosted to 30 × 10 5 Pa in 1 minute and held at 140 ° C. for 1 minute in the same manner as in the first embodiment of the present invention.

このように、接合電子部品を用いたメモリモジュールは、従来と同じ記憶容量を有するメモリモジュールに比べ、薄型化できる。従って、それらを積層した多層電子回路モジュールは、記憶容量のより高密度化が図られる。   Thus, a memory module using bonded electronic components can be made thinner than a memory module having the same storage capacity as the conventional one. Therefore, the multilayer electronic circuit module in which they are stacked can achieve a higher storage capacity.

なお、ここで説明した多層電子回路モジュール44は、重ねて結合させる第1のモジュールユニット53、54内にそれぞれ1つずつの接合電子部品45、46が埋設されている場合について述べたが、第1のモジュールユニット53、54内にそれぞれ複数個の接合電子部品が埋設されていてもよい。   In the multilayer electronic circuit module 44 described here, the case where one bonded electronic component 45 and 46 is embedded in each of the first module units 53 and 54 to be joined together is described. A plurality of bonded electronic components may be embedded in each of the module units 53 and 54.

また、本発明の第2の実施の形態では2つのモジュールユニットを積層した場合を示したが、更にモジュールユニットを積層した多層電子回路モジュールとしてもよい。   Further, in the second embodiment of the present invention, the case where two module units are stacked is shown, but a multilayer electronic circuit module in which module units are further stacked may be used.

(第3の実施の形態)
本発明の第3の実施の形態では、接合電子部品を半導体メモリとしたメモリモジュールと、平板状電子部品として抵抗等のチップ電子部品を埋設したモジュールユニットとを積層するマルチチップモジュールを多層電子回路モジュールとした場合を例に説明する。
(Third embodiment)
In the third embodiment of the present invention, a multi-chip module in which a memory module having a bonded electronic component as a semiconductor memory and a module unit in which a chip electronic component such as a resistor is embedded as a flat plate electronic component is stacked is a multilayer electronic circuit. A case where a module is used will be described as an example.

図17は、本発明の第3の実施の形態による多層電子回路モジュールの断面図である。図17に示すように、多層電子回路モジュール58は、接合電子部品59と平板状電子部品60とが、ポリエチレンテレフタレート等の絶縁性を有する樹脂シート61内に埋め込まれている。そして、電極端子62B、63は配線層64、貫通導体部65を介して樹脂シート61の上表面に導出されている。   FIG. 17 is a cross-sectional view of a multilayer electronic circuit module according to the third embodiment of the present invention. As shown in FIG. 17, in the multilayer electronic circuit module 58, a bonded electronic component 59 and a flat plate electronic component 60 are embedded in a resin sheet 61 having insulation properties such as polyethylene terephthalate. The electrode terminals 62 </ b> B and 63 are led to the upper surface of the resin sheet 61 through the wiring layer 64 and the through conductor portion 65.

この多層電子回路モジュール58は、第1と第2の2つのモジュールユニットを積層し、第1と第2のモジュールユニットは、貫通導体部を介して配線層間が接続されている。ここで第1のモジュールユニットは、図1の電子回路モジュール21と同じく樹脂シートの表面に接合電子部品の電極端子を露出させ、その電極端子に接続する配線層と、配線層間を接続する貫通導体部を有する構成である。また、第2のモジュールユニットは、平板状電子部品の電極端子を樹脂シートの表面に露出させる構成である。   The multilayer electronic circuit module 58 is formed by laminating two first and second module units, and the first and second module units are connected between wiring layers via through conductor portions. Here, as in the electronic circuit module 21 of FIG. 1, the first module unit exposes the electrode terminal of the bonded electronic component on the surface of the resin sheet, and the wiring layer connected to the electrode terminal and the through conductor connecting the wiring layers It is the structure which has a part. Further, the second module unit is configured to expose the electrode terminals of the flat plate-like electronic component on the surface of the resin sheet.

次に、このような構成の多層電子回路モジュール58の製造方法について、製造工程の断面図である図18〜図20を用いて説明する。   Next, a method for manufacturing the multilayer electronic circuit module 58 having such a configuration will be described with reference to FIGS.

最初の工程として、図18に示すように、電極端子63を下にして平板状電子部品60を載置したポリエチレンテレフタレート等の電気絶縁性を有する第2の樹脂シート67を熱プレス板68A、68Bの間に挟む。そして、平板状電子部品60と第2の樹脂シート67とを、加熱装置69で第2の樹脂シート67が軟化する温度に加熱しながら押圧装置70で押して、平板状電子部品60を第2の樹脂シート67内に埋設し、図19に示す第2のモジュールユニット71とする。この第2のモジュールユニット71は、平板状電子部品60の電極端子63が第2の樹脂シート67の表面に露出しており、配線層は設けられていない。   As a first step, as shown in FIG. 18, a second resin sheet 67 having electrical insulation properties, such as polyethylene terephthalate, on which a flat electronic component 60 is placed with the electrode terminal 63 down, is heated by pressing plates 68A and 68B. Between them. Then, the flat electronic component 60 and the second resin sheet 67 are pressed by the pressing device 70 while being heated to a temperature at which the second resin sheet 67 is softened by the heating device 69, so that the flat electronic component 60 is The second module unit 71 shown in FIG. 19 is embedded in the resin sheet 67. In the second module unit 71, the electrode terminals 63 of the flat electronic component 60 are exposed on the surface of the second resin sheet 67, and no wiring layer is provided.

一方、図20に示すように第1のモジュールユニット73は、第1の樹脂シート72内に接合電子部品59を埋設し、その電極端子62A、62Bおよび貫通導体部65と接続した配線層66、64が上下面に形成されている。なお、貫通導体部65は接合電子部品59より軟質な導電体材料よりなり、接合電子部品59を埋設する際に、同時に埋め込む。そして、貫通導体部65の両端は第1の樹脂シート72の両表面に露出させる。   On the other hand, as shown in FIG. 20, the first module unit 73 includes a wiring layer 66 in which a bonded electronic component 59 is embedded in the first resin sheet 72 and connected to the electrode terminals 62 </ b> A and 62 </ b> B and the through conductor portion 65. 64 is formed on the upper and lower surfaces. The through conductor portion 65 is made of a conductive material softer than the bonded electronic component 59, and is embedded at the same time when the bonded electronic component 59 is embedded. Then, both ends of the through conductor portion 65 are exposed on both surfaces of the first resin sheet 72.

そして、電極端子63側を上面に向けた第2のモジュールユニット71の電極端子63と、第1のモジュールユニット73の配線層64とを位置合わせし、積層する。次に、第1のモジュールユニット73と第2のモジュールユニット71とを、加熱装置69により第1の樹脂シート72と第2の樹脂シート67とを軟化させる温度に加熱した熱プレス板68A、68Bの間に挟む。その後、第1のモジュールユニット73と第2のモジュールユニット71とを押圧装置70により所定の圧力で押し、第1の樹脂シート72と第2の樹脂シート67とを接着させて一体の樹脂シートとする。なお、熱プレス板68A、68Bは、本発明の第1の実施の形態と同様に、1分で30×105Paに昇圧され、その圧力で140℃に1分間保持した。 Then, the electrode terminal 63 of the second module unit 71 and the wiring layer 64 of the first module unit 73 are aligned and laminated with the electrode terminal 63 side facing upward. Next, the hot press plates 68A and 68B in which the first module unit 73 and the second module unit 71 are heated to a temperature at which the first resin sheet 72 and the second resin sheet 67 are softened by the heating device 69. Between them. Thereafter, the first module unit 73 and the second module unit 71 are pressed by the pressing device 70 with a predetermined pressure, and the first resin sheet 72 and the second resin sheet 67 are bonded together to form an integral resin sheet. To do. The hot press plates 68A and 68B were boosted to 30 × 10 5 Pa in 1 minute and held at 140 ° C. for 1 minute in the same manner as in the first embodiment of the present invention.

このような製造方法によれば、接合電子部品59が埋設された第1のモジュールユニット73と、平板状電子部品60が埋設された第2のモジュールユニット71とは、貫通導体部65を介して接続された多層電子回路モジュール58となる。   According to such a manufacturing method, the first module unit 73 in which the junction electronic component 59 is embedded and the second module unit 71 in which the flat plate electronic component 60 is embedded are interposed via the through conductor portion 65. The connected multilayer electronic circuit module 58 is obtained.

なお、本発明の第2の実施の形態と同様に多層電子回路モジュール58も、第1のモジュールユニット73および第2のモジュールユニット71内にそれぞれ複数個の接合電子部品および平板状電子部品が埋設されていてもよい。   As in the second embodiment of the present invention, the multilayer electronic circuit module 58 also includes a plurality of junction electronic components and flat plate electronic components embedded in the first module unit 73 and the second module unit 71, respectively. May be.

また、本発明の第3の実施の形態の構成に、更に第1のモジュールユニットおよび第2のモジュールユニットを積層した構成としてもよい。   Moreover, it is good also as a structure which laminated | stacked the 1st module unit and the 2nd module unit further to the structure of the 3rd Embodiment of this invention.

(第4の実施の形態)
本発明の第4の実施の形態は、折り曲げ部を有する多層電子回路モジュールの構成である。
(Fourth embodiment)
The fourth embodiment of the present invention is a configuration of a multilayer electronic circuit module having a bent portion.

図21は、本発明の第4の実施の形態の多層電子回路モジュール80で、その端部82は一層で、端部82以外は二層のモジュールユニットが積層された構成である。従って、端部82は端部82以外よりも薄く、その端部82には外部機器と接続するための端子部84を備えている。また、多層電子回路モジュール80は、少なくともどちらかのモジュールユニットには、接合電子部品23が内蔵されている。このように端部82に端子部84のみを備えた多層電子回路モジュール80とすることで、この端部82を中心として折り曲げ方向86に折り曲げての実装が容易となる。   FIG. 21 shows a multilayer electronic circuit module 80 according to the fourth embodiment of the present invention, which has a structure in which one end portion 82 is formed and two layers of module units other than the end portion 82 are stacked. Therefore, the end portion 82 is thinner than the end portion 82, and the end portion 82 includes a terminal portion 84 for connecting to an external device. In the multilayer electronic circuit module 80, at least one of the module units incorporates the junction electronic component 23. Thus, by using the multi-layered electronic circuit module 80 having only the terminal portion 84 at the end portion 82, the mounting by bending the end portion 82 in the bending direction 86 becomes easy.

また、図22のように多層電子回路モジュール88の一部を薄くし、そこに端子部84を備える構成としてもよい。このような構成であれば、多層電子回路モジュール88の任意の位置で、折り曲げ方向86に折り曲げての実装が可能となる。   Further, as shown in FIG. 22, a part of the multilayer electronic circuit module 88 may be made thin and the terminal portion 84 may be provided there. With such a configuration, the multilayer electronic circuit module 88 can be mounted by being folded in the folding direction 86 at an arbitrary position.

なお、本発明の実施の形態では、電子部品を半導体メモリとして説明したが、少なくとも一方の面、すなわち側面に電極端子を有する抵抗器、チップコンデンサ、コイル等の電子部品であってもよい。   In the embodiment of the present invention, the electronic component is described as a semiconductor memory. However, an electronic component such as a resistor, a chip capacitor, or a coil having an electrode terminal on at least one surface, that is, a side surface may be used.

また、樹脂シート材料としてはポリエチレンテレフタレート、塩化ビニル、ポリカーボネート、アクリロニトリルブタンジエンスチレンのような熱可塑性樹脂に限らず、エポキシ樹脂のように加熱すると一時的に軟化する熱硬化性樹脂でもよい。   The resin sheet material is not limited to a thermoplastic resin such as polyethylene terephthalate, vinyl chloride, polycarbonate, and acrylonitrile butanediene styrene, and may be a thermosetting resin that temporarily softens when heated, such as an epoxy resin.

また、貫通導体部は接合電子部品と同時に形成する方法だけでなく、スルーホールを形成し導電性材料を充填して作製してもよい。   Further, the through conductor portion may be formed not only by the method of forming the joint electronic component at the same time but also by forming a through hole and filling with a conductive material.

また、本発明の実施の形態では配線層を印刷法で形成する例を示したが、これに限定されず、例えばフォトリソグラフィ法による形成でもよい。   In the embodiment of the present invention, an example in which the wiring layer is formed by a printing method has been described. However, the present invention is not limited to this, and may be formed by, for example, a photolithography method.

本発明の電子回路モジュールと多層電子回路モジュールおよびそれらの製造方法は、個々の電子部品を予め重ねて接着した接合電子部品とするため、この接合電子部品により剛性が得られ、樹脂シート内に実装するときも損傷を受けにくく、薄型で高密度な実装を必要とするスタックICモジュール、メモリーカードや、マルチチップモジュール等に有用である。   The electronic circuit module, the multilayer electronic circuit module and the manufacturing method thereof according to the present invention provide a bonded electronic component in which individual electronic components are preliminarily stacked and bonded, so that rigidity is obtained by the bonded electronic component and mounted in a resin sheet. This is useful for stack IC modules, memory cards, multi-chip modules, etc. that are less susceptible to damage and require thin and high-density mounting.

本発明の第1の実施の形態による電子回路モジュールの断面図Sectional drawing of the electronic circuit module by the 1st Embodiment of this invention 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の他の製造方法を説明する外観斜視図External perspective view explaining another manufacturing method of the same embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の他の製造工程を示す断面図Sectional drawing which shows the other manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の他の構成を示す断面図Sectional drawing which shows the other structure of the embodiment 本発明の第2の実施の形態による多層電子回路モジュールの断面図Sectional drawing of the multilayer electronic circuit module by the 2nd Embodiment of this invention 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 本発明の第3の実施の形態による多層電子回路モジュールの断面図Sectional drawing of the multilayer electronic circuit module by the 3rd Embodiment of this invention 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 同実施の形態の製造工程を示す断面図Sectional drawing which shows the manufacturing process of the embodiment 本発明の第4の実施の形態による多層電子回路モジュールの断面図Sectional drawing of the multilayer electronic circuit module by the 4th Embodiment of this invention 同実施の形態の他の構成を示す断面図Sectional drawing which shows the other structure of the embodiment 従来の積層樹脂基板の断面図Sectional view of a conventional laminated resin substrate

符号の説明Explanation of symbols

1 積層樹脂基板
1A,1B,1C 部品内蔵基板
2 樹脂基板
2A スルーホール
3,60 平板状電子部品
3A,4A,24,24A,24B,24C,24D,25,33A,48A,48B,49A,49B,62A,62B,63 電極端子
4 小型電子部品
5,28A,28B,50,52A,52B,64,66 配線層
21 電子回路モジュール
22,34,38,47,61 樹脂シート
22A,47A 上表面
22B 下表面
23,32,45,46,59 接合電子部品
26,27 電子部品
29,51A,51B,65 貫通導体部
30A,30B シリコンウエハ
31A,31B 切断位置
35A,35B,39A,39B,56A,56B,68A,68B 熱プレス板
36,40,55,69 加熱装置
37,41,57,70 押圧装置
43 接合電子部品内蔵基板
44,58,80,88 多層電子回路モジュール
53,54,73 第1のモジュールユニット
67 第2の樹脂シート
71 第2のモジュールユニット
72 第1の樹脂シート
82 端部
84 端子部
86 折り曲げ方向
DESCRIPTION OF SYMBOLS 1 Laminated resin substrate 1A, 1B, 1C Component built-in substrate 2 Resin substrate 2A Through hole 3,60 Flat plate electronic component 3A, 4A, 24, 24A, 24B, 24C, 24D, 25, 33A, 48A, 48B, 49A, 49B , 62A, 62B, 63 Electrode terminal 4 Small electronic component 5, 28A, 28B, 50, 52A, 52B, 64, 66 Wiring layer 21 Electronic circuit module 22, 34, 38, 47, 61 Resin sheet 22A, 47A Upper surface 22B Lower surface 23, 32, 45, 46, 59 Bonded electronic component 26, 27 Electronic component 29, 51A, 51B, 65 Through conductor portion 30A, 30B Silicon wafer 31A, 31B Cutting position 35A, 35B, 39A, 39B, 56A, 56B , 68A, 68B Heat press plate 36, 40, 55, 69 Heating device 37, 41, 57 DESCRIPTION OF SYMBOLS 70 Pressing device 43 Junction electronic component built-in board | substrate 44,58,80,88 Multilayer electronic circuit module 53,54,73 1st module unit 67 2nd resin sheet 71 2nd module unit 72 1st resin sheet 82 End Part 84 Terminal part 86 Bending direction

Claims (14)

少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品と、
前記電極端子の表面を露出させる形状に前記接合電子部品を埋設した樹脂シートと、
前記樹脂シートの両表面に露出した前記電極端子にそれぞれ接続される配線層と
を備えたことを特徴とする電子回路モジュール。
A pair of two electronic components having electrode terminals formed on at least one surface, and a bonded electronic component integrated by bonding the other surfaces of the electronic component;
A resin sheet in which the bonded electronic component is embedded in a shape that exposes the surface of the electrode terminal;
An electronic circuit module comprising: a wiring layer connected to each of the electrode terminals exposed on both surfaces of the resin sheet.
前記樹脂シートの厚み方向に形成された前記配線層間を接続する貫通導体部を備えたことを特徴とする請求項1に記載の電子回路モジュール。 The electronic circuit module according to claim 1, further comprising a through conductor portion that connects the wiring layers formed in the thickness direction of the resin sheet. 前記貫通導体部は前記接合電子部品よりも軟質の導電体材料からなることを特徴とする請求項2に記載の電子回路モジュール。 The electronic circuit module according to claim 2, wherein the through conductor portion is made of a conductive material that is softer than the bonded electronic component. 少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品と、前記電極端子の表面を露出させる形状に前記接合電子部品を埋設した第1の樹脂シートと、前記第1の樹脂シートの両表面に露出させた前記電極端子にそれぞれ接続する配線層と、前記第1の樹脂シートの両表面に形成された前記配線層間を接続する貫通導体部とを有する第1のモジュールユニットを複数積層し、積層する前記第1のモジュールユニット同士はそれぞれの前記貫通導体部を介して前記配線層間が接続されていることを特徴とする多層電子回路モジュール。 A pair of two electronic components having electrode terminals formed on at least one surface, a bonded electronic component in which the other surfaces of the electronic component are bonded together, and a shape that exposes the surface of the electrode terminal Formed on both surfaces of the first resin sheet embedded in the first resin sheet, the wiring layer connected to the electrode terminals exposed on both surfaces of the first resin sheet, and the first resin sheet; A plurality of first module units having through conductor portions connecting the wiring layers are stacked, and the first module units to be stacked are connected to each other through the through conductor portions. A multilayer electronic circuit module. 少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品、前記電極端子の表面を露出させる形状に前記接合電子部品を埋設した第1の樹脂シート、前記第1の樹脂シートの両表面に露出させた前記電極端子にそれぞれ接続する配線層および前記第1の樹脂シートの両表面に形成された前記配線層間を接続する貫通導体部を有する第1のモジュールユニットと、
少なくとも一方の面に電極端子が形成された平板状電子部品および前記電極端子の表面を露出させる形状に前記平板状電子部品を埋設した第2の樹脂シートを有する第2のモジュールユニットとをそれぞれ少なくとも一層積層し、
積層する前記第1のモジュールユニットと前記第2のモジュールユニットとは前記貫通導体部を介して接続されていることを特徴とする多層電子回路モジュール。
A pair of two electronic components having electrode terminals formed on at least one surface, a bonded electronic component integrated by bonding the other surfaces of the electronic components, and a shape that exposes the surface of the electrode terminals A first resin sheet in which a bonded electronic component is embedded, a wiring layer connected to each of the electrode terminals exposed on both surfaces of the first resin sheet, and the wiring formed on both surfaces of the first resin sheet A first module unit having a through conductor portion connecting the layers;
At least a flat electronic component having electrode terminals formed on at least one surface and a second module unit having a second resin sheet in which the flat electronic components are embedded so as to expose the surface of the electrode terminals. One layer,
The multilayer electronic circuit module, wherein the first module unit and the second module unit to be stacked are connected via the through conductor portion.
前記多層電子回路モジュールは折り曲げ部を有し、前記折り曲げ部の厚みは前記折り曲げ部以外の厚みより薄いことを特徴とする請求項4または請求項5に記載の多層電子回路モジュール。 6. The multilayer electronic circuit module according to claim 4, wherein the multilayer electronic circuit module has a bent portion, and the thickness of the bent portion is thinner than the thickness other than the bent portion. 前記折り曲げ部は前記多層電子回路モジュールの端部に位置し、前記折り曲げ部に外部機器と接続するための端子部を備えたことを特徴とする請求項6に記載の多層電子回路モジュール。 The multilayer electronic circuit module according to claim 6, wherein the bent portion is positioned at an end of the multilayer electronic circuit module, and the bent portion includes a terminal portion for connecting to an external device. 前記貫通導体部は前記接合電子部品よりも軟質の導電体材料からなることを特徴とする請求項4〜請求項7のいずれかに記載の多層電子回路モジュール。 The multilayer electronic circuit module according to claim 4, wherein the through conductor portion is made of a conductive material that is softer than the bonded electronic component. 少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品を形成する接合電子部品形成工程と、
樹脂シートを予め設定した温度に加熱して予め設定した位置に配置した前記接合電子部品を加圧して、前記電極端子の表面を露出させる形状に前記接合電子部品を前記樹脂シート中に埋設する埋設工程と、
前記樹脂シートの両表面に露出させた前記電極端子にそれぞれ接続される配線層を形成する配線層形成工程と
を備えたことを特徴とする電子回路モジュールの製造方法。
A bonded electronic component forming step of forming a bonded electronic component in which two electronic components having electrode terminals formed on at least one surface are paired and the other surfaces of the electronic component are bonded and integrated;
The resin sheet is heated to a preset temperature and the junction electronic component placed at a preset position is pressurized to embed the junction electronic component in the resin sheet in a shape that exposes the surface of the electrode terminal Process,
A method of manufacturing an electronic circuit module, comprising: a wiring layer forming step of forming wiring layers connected to the electrode terminals exposed on both surfaces of the resin sheet.
前記埋設工程において、前記接合電子部品の厚みでかつ前記接合電子部品より軟質な導電体材料を同時に埋め込み、その両端部を前記樹脂シートの表面に露出させて貫通導体部を形成することを特徴とする請求項9に記載の電子回路モジュールの製造方法。 In the embedding step, a conductive material that is thicker than the bonded electronic component and softer than the bonded electronic component is embedded at the same time, and both end portions thereof are exposed on the surface of the resin sheet to form a through conductor portion. A method for manufacturing an electronic circuit module according to claim 9. 少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品、前記電極端子の表面を露出させる形状に前記接合電子部品を埋設した第1の樹脂シート、前記第1の樹脂シートの両表面に露出させた前記電極端子にそれぞれ接続する配線層および前記第1の樹脂シートの両表面に形成された前記配線層間を接続する貫通導体部を有する第1のモジュールユニットを形成する工程と、
前記第1のモジュールユニットを複数用意し、前記第1のモジュールユニット同士は予め設定した位置に前記配線層および前記貫通導体部を位置合わせして積層した後、前記第1の樹脂シート同士を軟化させるまで加熱し、加圧して接着一体化するとともに、前記貫通導体部を介して前記配線層間を接続する工程と
を備えたことを特徴とする多層電子回路モジュールの製造方法。
A pair of two electronic components having electrode terminals formed on at least one surface, a bonded electronic component integrated by bonding the other surfaces of the electronic components, and a shape that exposes the surface of the electrode terminals A first resin sheet in which a bonded electronic component is embedded, a wiring layer connected to each of the electrode terminals exposed on both surfaces of the first resin sheet, and the wiring formed on both surfaces of the first resin sheet Forming a first module unit having a through conductor portion connecting the layers;
A plurality of the first module units are prepared, and the first module units are laminated by aligning and laminating the wiring layer and the through conductor portion at a preset position, and then softening the first resin sheets. A method of manufacturing a multilayer electronic circuit module, comprising the steps of: heating and pressurizing until they are bonded, and bonding and integrating together, and connecting the wiring layers through the through conductor portions.
少なくとも一方の面に電極端子が形成された2個の電子部品を一対として、前記電子部品の他方の面同士を接着して一体化した接合電子部品、前記電極端子の表面を露出させる形状に前記接合電子部品を埋設した第1の樹脂シート、前記第1の樹脂シートの両表面に露出させた前記電極端子にそれぞれ接続する配線層および前記第1の樹脂シートの両表面に形成された前記配線層間を接続する貫通導体部を有する第1のモジュールユニットを形成する工程と、
少なくとも一方の面に電極端子が形成された平板状電子部品および前記電極端子の表面を露出させる形状に前記平板状電子部品を埋設した第2の樹脂シートを有する第2のモジュールユニットを形成する工程と、
前記第1のモジュールユニットおよび前記第2のモジュールユニットをそれぞれ少なくとも一層用意し、前記第1のモジュールユニットと前記第2のモジュールユニットとは予め設定した位置に前記配線層を位置合わせして積層した後、前記第1の樹脂シートと前記第2の樹脂シートとを軟化させるまで加熱し、加圧して接着一体化するとともに、前記貫通導体部を介して接続する工程と
を備えたことを特徴とする多層電子回路モジュールの製造方法。
A pair of two electronic components having electrode terminals formed on at least one surface, a bonded electronic component integrated by bonding the other surfaces of the electronic components, and a shape that exposes the surface of the electrode terminals A first resin sheet in which a bonded electronic component is embedded, a wiring layer connected to each of the electrode terminals exposed on both surfaces of the first resin sheet, and the wiring formed on both surfaces of the first resin sheet Forming a first module unit having a through conductor portion connecting the layers;
Forming a second module unit having a flat plate-shaped electronic component having an electrode terminal formed on at least one surface and a second resin sheet having the flat plate-shaped electronic component embedded in a shape exposing the surface of the electrode terminal; When,
At least one each of the first module unit and the second module unit is prepared, and the first module unit and the second module unit are laminated by aligning the wiring layer at a preset position. And heating and pressurizing until the first resin sheet and the second resin sheet are softened, bonding and integrating, and connecting via the through conductor portion. A method for manufacturing a multilayer electronic circuit module.
前記接合電子部品を前記第1の樹脂シートに埋設する際に、前記接合電子部品より軟質な導電体材料を同時に埋め込み、その両端部を前記第1の樹脂シートの表面に露出させて前記貫通導体部を形成することを特徴とする請求項11または請求項12に記載の多層電子回路モジュールの製造方法。 When the bonding electronic component is embedded in the first resin sheet, a conductive material softer than the bonding electronic component is simultaneously embedded and both end portions thereof are exposed on the surface of the first resin sheet so that the through conductors are embedded. The method for manufacturing a multilayer electronic circuit module according to claim 11, wherein a part is formed. 前記接合電子部品は半導体メモリからなり、2枚のウエハのそれぞれのメモリ素子同士を位置合わせし、前記電極端子形成面とは反対面同士を接着した後、一括して切断して形成することを特徴とする請求項11〜請求項13のいずれかに記載の多層電子回路モジュールの製造方法。 The bonded electronic component is formed of a semiconductor memory, and is formed by aligning the memory elements of two wafers, bonding the surfaces opposite to the electrode terminal forming surfaces, and then cutting them together. 14. The method of manufacturing a multilayer electronic circuit module according to claim 11, wherein the method is a multi-layer electronic circuit module.
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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214274A (en) * 2006-02-08 2007-08-23 Sony Corp Semiconductor device
JP2010515259A (en) * 2006-12-28 2010-05-06 テッセラ,インコーポレイテッド Stacked package
US8426957B2 (en) 2006-10-10 2013-04-23 Tessera, Inc. Edge connect wafer level stacking
US8431435B2 (en) 2006-10-10 2013-04-30 Tessera, Inc. Edge connect wafer level stacking
US8461672B2 (en) 2007-07-27 2013-06-11 Tessera, Inc. Reconstituted wafer stack packaging with after-applied pad extensions
JP2013118298A (en) * 2011-12-05 2013-06-13 Dainippon Printing Co Ltd Component built-in wiring board and method of manufacturing the same
US8466542B2 (en) 2009-03-13 2013-06-18 Tessera, Inc. Stacked microelectronic assemblies having vias extending through bond pads
US8476774B2 (en) 2006-10-10 2013-07-02 Tessera, Inc. Off-chip VIAS in stacked chips
US8513794B2 (en) 2007-08-09 2013-08-20 Tessera, Inc. Stacked assembly including plurality of stacked microelectronic elements
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US8680662B2 (en) 2008-06-16 2014-03-25 Tessera, Inc. Wafer level edge stacking

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Publication number Priority date Publication date Assignee Title
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US8476774B2 (en) 2006-10-10 2013-07-02 Tessera, Inc. Off-chip VIAS in stacked chips
US8426957B2 (en) 2006-10-10 2013-04-23 Tessera, Inc. Edge connect wafer level stacking
US8431435B2 (en) 2006-10-10 2013-04-30 Tessera, Inc. Edge connect wafer level stacking
US9899353B2 (en) 2006-10-10 2018-02-20 Tessera, Inc. Off-chip vias in stacked chips
US8461673B2 (en) 2006-10-10 2013-06-11 Tessera, Inc. Edge connect wafer level stacking
US9378967B2 (en) 2006-10-10 2016-06-28 Tessera, Inc. Method of making a stacked microelectronic package
US9048234B2 (en) 2006-10-10 2015-06-02 Tessera, Inc. Off-chip vias in stacked chips
US8999810B2 (en) 2006-10-10 2015-04-07 Tessera, Inc. Method of making a stacked microelectronic package
US8513789B2 (en) 2006-10-10 2013-08-20 Tessera, Inc. Edge connect wafer level stacking with leads extending along edges
US8349654B2 (en) 2006-12-28 2013-01-08 Tessera, Inc. Method of fabricating stacked packages with bridging traces
JP2010515259A (en) * 2006-12-28 2010-05-06 テッセラ,インコーポレイテッド Stacked package
US8883562B2 (en) 2007-07-27 2014-11-11 Tessera, Inc. Reconstituted wafer stack packaging with after-applied pad extensions
US8461672B2 (en) 2007-07-27 2013-06-11 Tessera, Inc. Reconstituted wafer stack packaging with after-applied pad extensions
US8551815B2 (en) 2007-08-03 2013-10-08 Tessera, Inc. Stack packages using reconstituted wafers
US8513794B2 (en) 2007-08-09 2013-08-20 Tessera, Inc. Stacked assembly including plurality of stacked microelectronic elements
US8680662B2 (en) 2008-06-16 2014-03-25 Tessera, Inc. Wafer level edge stacking
US8466542B2 (en) 2009-03-13 2013-06-18 Tessera, Inc. Stacked microelectronic assemblies having vias extending through bond pads
JP2013118298A (en) * 2011-12-05 2013-06-13 Dainippon Printing Co Ltd Component built-in wiring board and method of manufacturing the same

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