JP2005287268A - Power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a power supply circuit that can reduce with a small and simple circuit the loss of a MOS-FET of an inrush current suppressing circuit that suppresses an inrush current at the time when powered on. <P>SOLUTION: This power supply circuit is provided with an input filter circuit 2 that smoothes a high frequency current flowing in a commercial power 1; a rectifier circuit 3 that converts the commercial power supply voltage outputted from this input filter circuit 2 into a DC voltage; an active filter circuit 5 that boosts the DC voltage rectified by the rectifier circuit 3 and improves the power factor of an input current; an inrush current control circuit 4 that has a MOS-FET that connects the rectifier circuit 3 and the active filter circuit 5 to control an inrush current, by making the MOS-FET operate during an active period when the commercial power 1 is supplied; and an active filter circuit interrupting means 11 that interrupts the operation of the active filter circuit 5 within the active period of the MOS-FET when the commercial power 1 is supplied. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power supply apparatus that can reduce the loss of an inrush current suppression circuit that suppresses an inrush current that flows when a commercial power supply is turned on.

  The conventional power supply circuit has a power switch for turning on / off the commercial power supply, a rectifier circuit for rectifying the AC voltage of the commercial power supply, and a large-capacity smoothing capacitor, and the voltage rectified by the rectifier circuit is converted to a DC voltage. For several cycles of commercial frequency when an AC voltage is applied to the rectifier circuit by turning on the power switch, a smoothing circuit for converting to a MOS-FET inserted on a line connecting the rectifier circuit and the smoothing circuit, An element drive circuit that operates the MOS-FET in the active region and then operates the MOS-FET in the saturation region is provided (for example, see Patent Document 1).

Japanese Unexamined Patent Publication No. 2000-14152 (paragraphs 0009 to 0013, FIGS. 1 and 2)

The conventional MOS-FET of the power supply circuit and the element drive circuit are inrush current suppression circuits. When an active filter is added to the inrush current suppression circuit, the power supply instantaneously exceeds the time when the MOS-FET is turned off. If the control power Vcc of the control IC for the active filter is held or supplied when the power is turned off or turned off / on, the active filter circuit is activated at the same time as the MOS-FET becomes the active region again. Since the operation starts, a large current flows through the MOS-FET in the active region, and the impedance between the drain and source of the MOS-FET in the active region has a value of several tens to several hundreds Ω. When it flows, there is a problem that loss occurs in the MOS-FET.
In addition, when the power is turned OFF / ON repeatedly, the heat generated by the above-mentioned loss is generated and accumulated while repeating heat dissipation, eventually exceeding the junction temperature rating of the MOS-FET and causing a malfunction due to heat. There was a problem.

  An object of the present invention is to obtain a power supply circuit that can reduce the loss of the MOS-FET of the inrush current suppression circuit when the power is turned on with a small and simple circuit.

  A power supply circuit according to the present invention includes an input filter circuit that smoothes a high-frequency current flowing in a commercial power supply, a rectifier circuit that converts a commercial power supply voltage output from the input filter circuit into a DC voltage, and rectified by the rectifier circuit. An active filter for boosting the DC voltage and improving the power factor of the input current, and a MOS-FET for connecting the rectifier circuit and the active filter, and when the commercial power supply is turned on, the MOS-FET An inrush current control circuit that operates in an active period and suppresses an inrush current, and an active filter circuit stop unit that stops the operation of the active filter during the active region period of the MOS-FET when the commercial power is turned on And.

  The present invention includes an inrush current control circuit that suppresses an inrush current by operating a MOS-FET in an active period when a commercial power source is turned on and has a MOS-FET that connects a rectifier circuit and an active filter. And an active filter circuit stopping means for stopping the operation of the active filter during the active region period of the MOS-FET when the power is turned on. Loss of the MOS-FET can be reduced.

Embodiment 1 FIG.
1 is a block diagram of a power supply circuit showing a first embodiment of the present invention, FIG. 2 is a circuit diagram of an inrush current suppression circuit of the power supply circuit, and FIG. 3 is a circuit diagram of an active filter and active filter circuit stopping means of the power supply circuit. FIG. 4 is an operation waveform diagram of the power supply circuit.

  In FIG. 1, the power supply circuit includes an input filter circuit 2 that smoothes the high-frequency current flowing through the commercial power supply 1, a rectifier circuit 3 that converts the commercial power supply voltage output from the filter circuit into a DC voltage, and the rectifier circuit 3. 200 for boosting the rectified DC voltage and improving the power factor of the input current, smoothing capacitor 6 for smoothing the output of active filter circuit 5 and outputting it to load circuit 7, rectifier circuit 3 and active filter circuit 5 When the commercial power source 1 is turned on when the commercial power source 1 is turned on, the inrush current control circuit 4 that operates the MOS-FET Q1 in the active period to suppress the inrush current and the commercial power source is turned on. An active filter circuit stop for stopping the operation of the active filter circuit 5 during the active region period of the MOS-FET Q1. A voltage detecting circuit 8 is a means 11, and an oscillation stopping circuit 9.

  In FIG. 2, the inrush current control circuit 4 includes a MOS-FET Q1 inserted in the negative electrode line between the rectifier circuit 3 and the active filter circuit 5 and a series-connected resistor R41 provided between both electrodes of the rectifier circuit 3. , R42 and a capacitor C41 connected in parallel to the resistor R42, and a resistor R43 inserted between the output terminal of the integrator circuit and the gate of the MOS-FET Q1. This integrating circuit and resistor R43 constitute an element driving circuit.

  In FIG. 3, an active filter circuit 5 includes a capacitor C6 connected between both electrodes of the rectifier circuit 3, a series circuit of voltage dividing resistors R11, R12, R13, and R14 connected in parallel to the capacitor C5, and a positive electrode of the rectifier circuit 3. A transformer L1, a transformer L1 and a MOS-FET Q2 connected between the negative electrode of the rectifier circuit 3 via a resistor R2, and a resistor R21 connected via a diode D1 to the drain of the MOS-FET Q2. A series circuit of R22, R23, R24, R25, a capacitor C6 connected in parallel to a series circuit of resistors R21, R22, R23, R24, R25, terminal 1 is a connection point of resistors R24, R25, and terminal 3 is a resistor The terminal 4 is connected to the connection point between the MOS-FET Q2 and the resistor R2 via the resistor R16, and the terminal 5 is connected to the resistor R5 via the resistor R16. The control IC connected to the secondary winding of the transformer L1, the terminal 6 to the negative electrode of the rectifier circuit 3, the terminal 7 to the gate of the MOS-FET Q2, the terminal 8 to the control power source Vcc, and the terminal 6 And a capacitor C23 connected to the.

  The active filter circuit stopping means 11 detects that the power supply has been turned off, such as a power switch OFF / ON operation or a momentary power interruption / sag, and stops the active filter circuit. The voltage detection circuit 8 includes a stop circuit 9 and is connected in series between both poles of the rectification circuit 3 and includes a resistor R100 that detects a voltage and a capacitor C100 that creates a time delay. The oscillation stop circuit 9 includes a transistor Q100 connected between the connection point of the resistors R24 and R25 and the ground via the resistor R103, a resistor R102 connected between the base and the emitter of the transistor, and a Zener diode connected in parallel to the resistor R25. And Dz100. The Zener diode Dz100 limits the voltage generated at both ends of the resistor R25 to be equal to or lower than the rated voltage of the terminal 1 of the active filter control IC IC1.

Next, the operation of the power supply circuit according to the present invention will be described with reference to FIGS.
When the power supply 1 is turned on by a power switch (not shown), the commercial power supply voltage is smoothed by a high frequency current in the input filter circuit 2 and converted into a DC voltage by the rectifier circuit 3. In the inrush current suppression circuit 4, when the power switch is turned on, the output voltage of the rectifier circuit 3 is gradually increased by the integrating circuit composed of the resistors R41 and R42 and the capacitor C41, and the resistor R43 on the output side of the integrating circuit is MOS− When the current flowing between the gate and source of the FET Q1 gradually increases and reaches the ON voltage, the MOS-FET Q1 starts to turn on gradually (active region). When the capacitor C41 is fully charged and a sufficient gate current flows to the MOS-FET Q1 via the resistor R43 (saturation region), the current flowing through the power switch has a normal current waveform.
In this way, by providing a time constant to the gate of the MOS-FET Q1 when the power is turned on, the drain-source region becomes an active region at the timing when the inrush current flows, and the ON resistance has a certain value. Therefore, the inrush current is suppressed by the resistance value.

  The active filter circuit 5 improves the power factor and power harmonic current by controlling the power source current flowing from the commercial power source 1 so as to be similar to this voltage waveform. The transformer L1, the MOS-FET Q2 The control of the step-up converter composed of the diode D1 is modulated with the rectified waveform to continuously change the ON time and OFF time of the MOS-FET Q2, and the current waveform input from the power supply is similar to the voltage waveform. To control.

The active filter control IC IC1 detects the boosted voltage generated at both ends of the capacitor C6 from the voltage at the connection point between the resistor R24 and the resistor R25 by the input from the terminal 1 of the voltage feedback input. Is controlled to be always 2.5V. When the voltage is higher than 2.5V, the oscillation of the MOS-FET Q2 is stopped. When the voltage is lower than 2.5V, the MOS-FET Q2 is oscillated to Increase the voltage.
On the other hand, in the voltage detection circuit 8, the voltage across the capacitor C100 rises with a time constant after the power is turned on by the resistor R100 and the capacitor C100.
Here, the time until the active filter is stopped after the power is turned on is set to be equal to or longer than the time during which the MOS-FET Q1 of the inrush current suppression circuit 4 is reliably turned on by the values of the resistor R100 and the capacitor C100. Since the capacitor C100 is discharged by the series resistors R101 and R102, it can be set in a considerably short time depending on the value setting.

  If the value of the resistor R25 is very large when the transistor Q100 is OFF, that is, the resistor R103 is not connected, a value of 2.5 V or more is generated at both ends of the resistor R25 even at the peak value of the power supply voltage. Therefore, since no voltage is applied to the MOS-FET Q2 from the drive output terminal 7 of the active filter control IC IC1, the MOS-FET Q2 does not oscillate.

The voltage across the capacitor C100 is divided by the resistors R101 and R102 of the oscillation stop circuit 9, and when a sufficient base current flows to turn on the transistor Q100, the transistor Q100 is turned on and the collector-emitter of the transistor Q100 is connected between the collector and emitter. The resistor R103 is connected in parallel with the resistor R25.
In addition, when the transistor Q100 is ON, that is, when the resistor R103 is connected, the value of the resistor R103 is set such that a specified boosted voltage is generated in the capacitor C6. A voltage is generated.
Further, the voltage generated at both ends of the resistor R25 by the Zener diode Dz100 is limited to be equal to or less than the rated voltage of the terminal 1 of the active filter control IC IC1.

  Next, the result of comparing the operation waveforms when the power supply circuit of Embodiment 1 of the present invention and the conventional power supply circuit are turned on again will be described with reference to FIG. FIG. 4 (a) shows an operation waveform when the power supply is turned on again in the conventional power supply circuit, and FIG. 4 (b) shows an operation waveform when the power supply circuit of the present invention is turned on again. In the figure, (1) is the drain-source voltage waveform of the MOS-FET Q2 which is the switching element of the active filter circuit 5, (3) is the drain current waveform of the MOS-FET Q1 of the inrush current suppression circuit 4, and (4) is the inrush. The drain-source voltage waveform of the MOS-FET Q1 of the current suppression circuit 4, (2) is a loss waveform calculated by integrating the current of the MOS-FET Q1 shown in (3) and the voltage shown in (4). Show. The period between t1 and t3 is the active region period of the MOS-FET Q1.

As shown in FIG. 4A, in the conventional power supply circuit, when the power is turned on again, the active filter MOS-FET Q2 switches to the active region (t1 to t3) of the MOS-FET Q1 of the inrush current suppression circuit. In order to start (t2), the current flowing into the MOS-FET Q1 increases, and the peak value of the loss at that time reaches about 700W.
On the other hand, in the power supply circuit according to the first embodiment of the present invention, when the power is turned on again, the MOS-FET Q2 of the active filter starts switching in the active region (t1 to t3) of the MOS-FET Q1 of the inrush current suppression circuit. Since switching starts when the active region is exceeded (t4), the current flowing into the MOS-FET Q1 does not increase, and the peak value of the loss at that time is about 300 W, which is less than half of the loss of the conventional circuit. It is a value.

  As described above, the voltage detection circuit 8 includes the resistor R100 and the capacitor C100, and the oscillation stop circuit 9 includes the small signal transistor Q100, the resistors R101 to R103, and the Zener diode Dz100 as a switch for stopping the oscillation of the active filter circuit 5. Since the active filter circuit 5 starts operating after the MOS-FET Q1 is reliably turned on with a small and simple circuit, an excessive current flows in the active region of the MOS-FET Q1. Therefore, the loss of the MOS-FET Q1 of the inrush current suppression circuit 4 can be reduced when the power is turned on.

Embodiment 2. FIG.
FIG. 5 is a circuit diagram of an active filter and active filter circuit stopping means of a power supply circuit according to Embodiment 2 of the present invention.
This embodiment has the same configuration as that of FIG. 1 of the first embodiment, and the connection of the voltage detection circuit 8, the oscillation stop circuit 9 and the active filter circuit 5 of the active filter circuit stop means 11 is different.

In FIG. 5, a voltage detection circuit 8 is connected in series between both electrodes of the rectifier circuit 3, and is connected in parallel to a series circuit of resistors R200, 201, 202 for detecting voltage and the resistor R202, and a capacitor C200 and a resistor R201. And a Zener diode Dz200 connected to the connection point of the resistor R202.
The oscillation stop circuit 9 is a series circuit of resistors R203 and 204 having one end connected to the anode of the Zener diode Dz200 and the other end connected to the ground, the base at the connection point of the resistors R203 and R204, the emitter to the ground, A first transistor Q200 having a collector connected to the control power supply Vcc via a resistor R205, a series circuit of resistors R206 and R207 having one end connected to the collector of the first transistor Q200 and the other end connected to the ground, and a base A connection point between the resistor R206 and the resistor R207 includes a second transistor Q201 having an emitter connected to the ground and a collector connected to the terminal 5 of the active filter control IC IC1.

Next, the operation of the second embodiment of the present invention will be described with reference to FIG.
Since the operations of the input filter circuit 2, the rectifier circuit 3, and the inrush current control circuit 4 are the same as those in the first embodiment, the active filter circuit 5, the voltage detection circuit 8 of the active filter circuit stop means 11, and the oscillation stop circuit 9 will be described.

  First, in the active filter control IC IC1, the input terminal 5 is a terminal for detecting that the primary current of the transformer L1 becomes 0 and turning on the MOS FET Q2. When this terminal is short-circuited to the ground, it cannot be detected that the current on the primary side of the transformer L1 has become 0, so the MOS FET Q2 continues to be in the OFF state. That is, the operation of the active filter is stopped.

  On the other hand, in the voltage detection circuit 8, the series resistors R200, R201, R202 and the capacitor C200 increase the voltage across the capacitor C200 with a time constant after the power is turned on. When the voltage across the capacitor C200 exceeds the voltage of the Zener diode Dz200 and a sufficient current flows through the base of the transistor Q200 of the oscillation stop circuit 9, the collector-emitter of the transistor Q200 conducts and the resistors R206 and R208 are connected. Is connected to the ground, the transistor Q201 whose base is connected to the resistor R208 is turned OFF.

  That is, before the voltage across the capacitor C200 reaches the zener diode Dz200, the transistor Q201 is turned on to connect the terminal 5 of the active filter control IC IC1 to the ground to stop the oscillation of the MOS-FET Q2, and the capacitor C200. When the voltage at both ends exceeds the voltage of the Zener diode Dz200, the transistor Q201 is turned off and the MOS-FET Q2 starts to oscillate.

Here, the time until the active filter is stopped after the power is turned on is set so that the MOS-FET Q1 of the inrush current suppression circuit 4 is reliably turned on by the values of the series resistors R200, R201, R202, the capacitor C200, and the Zener diode Dz200. Over time.
The capacitor C200 is discharged by the series resistors R203 and R204. Therefore, depending on the value setting, the capacitor C200 can be set in a considerably short time.

  As described above, since the active filter circuit 5 starts operating after the MOS-FET Q1 is reliably turned on with a simple circuit, an excessive current flows in the active region of the MOS-FET Q1. Therefore, the loss of the MOS-FET Q1 of the inrush current suppression circuit 4 can be reduced when the power is turned on.

Embodiment 3 FIG.
6 is a circuit diagram of an active filter and active filter circuit stopping means of a power supply circuit according to Embodiment 3 of the present invention.
This embodiment has the same configuration as that of FIG. 1 of the first embodiment, and the configurations of the voltage detection circuit 8 and the oscillation stop circuit 9 of the active filter circuit stopping means 11 are the same as those of FIG. 5 of the second embodiment. The connection with the active filter circuit 5 is different. In FIG. 6, the collector of the transistor Q201 is connected to the terminal 8 of the active filter control IC IC1.

Next, the operation of the second embodiment of the present invention will be described with reference to FIG.
Since the operations of the input filter circuit 2, the rectifier circuit 3, and the inrush current control circuit 4 are the same as those in the first and second embodiments, the voltage detection circuit 8 and the oscillation stop circuit 9 of the active filter circuit 5, the active filter circuit stop means 11 will be described. .

  First, in the active filter control IC IC1, the input terminal 8 is a control power supply terminal of the active filter control IC IC1. When this terminal is short-circuited to the ground, the power supply of the active filter control IC IC1 is lost and the oscillation of the MOS-FET Q2 is stopped. That is, the operation of the active filter is stopped.

  On the other hand, in the voltage detection circuit 8, the series resistors R200, R201, R202 and the capacitor C200 increase the voltage across the capacitor C200 with a time constant after the power is turned on. When the voltage across the capacitor C200 exceeds the voltage of the Zener diode Dz200 and a sufficient current flows through the base of the transistor Q200 of the oscillation stop circuit 9, the collector-emitter of the transistor Q200 conducts and the resistors R206 and R208 are connected. Is connected to the ground, the transistor Q201 whose base is connected to the resistor R208 is turned OFF.

That is, before the voltage across the capacitor C200 reaches the zener diode Dz200, the transistor Q201 is turned on to connect the terminal 8 of the active filter control IC IC1 to the ground to stop the oscillation of the MOS-FET Q2, and the capacitor C200. When the voltage at both ends exceeds the voltage of the Zener diode Dz200, the transistor Q201 is turned off and the MOS-FET Q2 starts to oscillate.
The time until the active filter is stopped after the power is turned on is set in the same manner as in the second embodiment.

  As described above, since the active filter circuit 5 starts operating after the MOS-FET Q1 is reliably turned on with a simple circuit, an excessive current flows in the active region of the MOS-FET Q1. Therefore, the loss of the MOS-FET Q1 of the inrush current suppression circuit 4 can be reduced when the power is turned on.

1 is a block diagram of a power supply circuit according to Embodiment 1 of the present invention. It is a circuit diagram of the inrush current suppression circuit of the power supply circuit which concerns on Embodiment 1 of this invention. The circuit diagram of the active filter of the power supply circuit which concerns on Embodiment 1 of this invention, and an active filter circuit stop means, It is an operation | movement waveform diagram of the power supply circuit which concerns on Embodiment 1 of this invention. It is a circuit diagram of the power supply circuit which concerns on Embodiment 2 of this invention. It is a circuit diagram of the power supply circuit which concerns on Embodiment 3 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Commercial power supply, 2 input filter circuit, 3 rectifier circuit, 4 inrush current control circuit, 5 active filter circuit, 8 voltage detection circuit, 9 oscillation stop circuit, 11 active filter circuit stop means, IC1 active filter control IC, Q1 MOS -FET, Q100 transistor, Q200 first transistor, Q201 second transistor is OFF, R25 voltage dividing resistor, R103 resistor.

Claims (5)

An input filter circuit that smoothes the high-frequency current flowing through the commercial power supply;
A rectifier circuit that converts the commercial power supply voltage output from the input filter circuit into a DC voltage;
An active filter circuit for boosting the DC voltage rectified by the rectifier circuit and improving the power factor of the input current;
An inrush current control circuit that has a MOS-FET that connects the rectifier circuit and the active filter circuit and suppresses an inrush current by operating the MOS-FET in an active period when the commercial power supply is turned on;
Active filter circuit stopping means for stopping the operation of the active filter circuit during the active region period of the MOS-FET when the commercial power is turned on;
A power supply circuit comprising: The active filter circuit stop means detects the power-on, and when the time from this time exceeds the active region period of the MOS-FET, a voltage detection circuit that outputs a voltage of a predetermined value or more,
An oscillation stop circuit for stopping the oscillation of the active filter circuit when the output voltage of the voltage detection circuit is less than the predetermined value;
The power supply circuit according to claim 1, further comprising: The oscillation stop circuit includes a series circuit of a resistor and a transistor connected in parallel to a voltage dividing resistor that divides the output voltage of the active filter circuit and inputs a feedback voltage to the active filter circuit control IC,
When the output voltage of the voltage detection circuit is less than a predetermined value, the transistor is turned off, and the feedback input voltage becomes equal to or higher than a predetermined value by removing the resistance. The power supply circuit according to claim 2, wherein the oscillation is stopped. A first transistor in which a collector and an emitter are connected between the zero current detection terminal of the active filter circuit control IC and the ground, respectively, and a power source is connected to the base;
A second transistor having a collector connected to the base of the first transistor, an emitter connected to the ground, and an output terminal of a voltage detection circuit connected to the base;
With
When the output voltage of the voltage detection circuit is less than a predetermined value, the second transistor is turned off, the first transistor is turned on, and the zero current detection terminal of the active filter circuit control IC and the ground The power supply circuit according to claim 2, wherein the power supply circuit is short-circuited. A first transistor having a collector and an emitter connected between a power supply terminal and ground of the active filter circuit control IC, and a power supply connected to the base;
A second transistor having a collector connected to the base of the first transistor, an emitter connected to the ground, and an output terminal of a voltage detection circuit connected to the base;
With
When the output voltage of the voltage detection circuit is less than a predetermined value, the second transistor is turned off, the first transistor is turned on and the active filter circuit control IC is connected between the power supply terminal and the ground. 3. The power supply circuit according to claim 2, wherein the power supply circuit is short-circuited.

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