JP2008022658A - Switching power circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily expand a controllable frequency range in a frequency control system which is advantageous in switching noise. <P>SOLUTION: A switching power circuit is constituted by including a converter transformer TR1, rectifier smoothing circuits (Do, Co) at a secondary side which generates a secondary DC output voltage to supply to a load, a switching element Q1 connected to a primary winding N1 of the converter transformer, a control circuit 10, and limiting circuits (Q2, R30, R31, C30, D30) of a lower limit frequency. The control circuit performs switching drive of the switching element, and variably controls a switching frequency according to the secondary DC output voltage, while the limiting circuits prevent the switching frequency which varied by the control circuit 10 from becoming lower than the set lower limit frequency. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a switching power supply circuit that can be employed as a power supply circuit for a television receiver or an audio device, for example.

JP 2003-33026 A JP 2001-298949 A

  In a switching power supply circuit, for example, in a flyback circuit method, as a stabilization method, a frequency control method (PFM control method) that varies a switching frequency and a frequency fixed pulse width control method (PWM control) that varies a pulse width while fixing the switching frequency. Method) is known.

FIG. 6 shows a configuration of a switching power supply circuit adopting a fixed frequency pulse width control method, FIG. 7 shows an operation waveform of each part, and FIG. 8 shows a relationship between load power and switching frequency.
In the switching power supply circuit shown in FIG. 6, a DC input voltage Vin is obtained from the input connector CN1, and this DC input voltage Vin is obtained as a voltage across the smoothing capacitor Ci.
This switching power supply circuit is provided with a converter transformer TR1 having a primary winding N1, a secondary winding N2, and a drive winding (VCC winding) N3, and a DC input voltage Vin is applied to the primary winding N1. At the same time, a MOS-FET switching element Q1 is connected in series to the primary winding N1. Further, a snubber circuit including a resistor R11, a capacitor C11, and a diode D11 is provided at both ends of the primary winding N1.
On the secondary side of the converter transformer TR1, a rectifier diode Do and a smoothing capacitor Co are connected to the secondary winding N2 as shown in the figure, and a DC output voltage is generated for a load connected to the output connector CN2.
Further, as a circuit for detecting the output voltage on the secondary side and feeding it back to the primary side, it has a shunt regulator Q50, voltage dividing resistors R53 and R54, a gain adjusting resistor R51 and a capacitor C50, a resistor R52, and a photocoupler PC. A secondary output voltage detection circuit is formed.

A control IC 30 is provided for switching the switching element Q1. The switching element Q1 is turned on / off according to the gate voltage applied from the gate-out terminal of the control IC 30 via the resistor R30.
The control IC obtains the operating voltage by taking in the DC input voltage Vin from the Stup terminal at the time of startup, and at the time of the subsequent switching driving, the control IC converts the alternating voltage of the driving winding (VCC winding) N3 of the converter transformer TR1 to the rectifier diode D20, The voltage VCC obtained by rectifying and smoothing with the smoothing capacitor C20 is obtained from the VCC terminal, and this is used as the operating voltage.
The photocoupler PC in the secondary output voltage detection circuit is connected to the FB (feedback) terminal of the control IC 30 via the resistor R22.
In addition, a current detection resistor RD is connected between the switching element Q1 and the primary side ground, and for current limitation, the drain current is passed through a filter by the resistor R40 and the capacitor C40 to the OCP (overcurrent protection) of the control IC 30. ) Terminal.

FIG. 7 shows the drain-source voltage Vds and drain current Id of the switching element Q1, the cathode current Ik of the rectifier diode Do on the secondary side, and the anode-cathode voltage Vak. Note that these operation waveforms are shown for each of the maximum load, steady load, and light load.
The switching power supply circuit of FIG. 6 is a flyback power supply circuit, and the primary winding N1 and the secondary winding N2 of the converter transformer TR1 are wound in opposite polarities. For this reason, during the ON period Tb in which the switching element Q1 is turned on, the secondary winding N2 side is biased by the rectifier diode Do, so that an excitation current flows through the primary winding N1, but energy is accumulated as a magnetic flux in the core. . Next, in the off period Ta in which the switching element Q1 is turned off, the rectifier diode Do of the secondary winding N2 is forward-biased, and energy is transmitted to the secondary side with a voltage according to the turn ratio.

In order to stabilize the switching power supply circuit of FIG. 6, the switching frequency (oscillation frequency) of the switching element Q1 is fixed, and the on-time of the switching element Q1 is varied (PWM control) to control the primary side current. I do. That is, the control IC 30 adjusts the gate voltage pulse applied from the gate-out terminal according to the FB terminal voltage. As a result, as shown in FIG. 7, the time of the ON period Tb of the switching element Q1 is variably controlled.
Depending on input / output conditions, the switching element Q1 (MOS-FET) has an off period in which a ringing voltage is generated as the drain-source voltage Vds. That is, when the cathode current Ik (output current) becomes zero, the primary energy accumulated in the leakage inductance of the converter transformer TR1 is the energy accumulation between the leakage inductance forming the resonance circuit and the stray capacitance on the primary side. Since the discharge is performed, a ringing voltage is generated. Although the ringing voltage is indicated by a broken line and a solid line in the drain-source voltage Vds of FIG. 7, when the load becomes light and the on period of the switching element Q1 becomes short (when the off period becomes long), this ringing occurs in the off period Ta. A ringing voltage may appear in the drain-source voltage Vds (in the current discontinuous mode).

FIG. 8 shows the oscillation frequency in such a frequency fixed pulse width control (PWM control) type switching power supply circuit. That is, the oscillation frequency is constant even with load fluctuations.
In general, in order to avoid switching loss if the transformer core shape is the same, the oscillation frequency is set to a low frequency in a range corresponding to the maximum output power, for example, in the region above the audible frequency band as shown in FIG. There are many cases. In addition, the oscillation frequency is slightly adjusted due to factors such as switching noise and capacitor impedance.

In such a frequency fixed pulse width control type switching power supply circuit, within the practical range in which switching loss (heat generation) is considered, if the transformer core size is the same, high power conversion can be achieved by increasing the frequency. Is possible. For this reason, it can be said that it is advantageous for miniaturization of a transformer. In addition, since the circuit is generally widely used, there is a cost merit.
However, since hard switching is performed, switching noise is relatively large, and a ringing voltage is generated in the off period Ta of the switching element Q1, so that there is an increase in high-frequency noise components.

Next, FIG. 9 shows a switching power supply circuit of a frequency control (PFM control) system that variably controls the frequency. The circuit example of FIG. 9 has a flyback type configuration as described above, and has a control circuit 10 that performs so-called “Bottom ON control” and “frequency variable control” using a voltage partial resonance circuit. is there.
The circuit portions and elements common to those in FIG. 6 are denoted by the same reference numerals and description thereof is omitted.

In this case, an example in which a MOS-FET as the switching element Q1 is incorporated in the IC as the control circuit 10 is shown. That is, as the control circuit 10, the D terminal and S terminal of the IC are the drain terminal and the source terminal of the switching element Q1. A capacitor C10 is connected in parallel between the D terminal and the S terminal, that is, to the drain-source of the switching element Q1. A current detection resistor RD is connected between the S terminal (source of the switching element Q1) and the primary side ground.
The IC of the control circuit 10 includes a drive circuit 11 that applies a gate voltage pulse to the switching element Q1. In the drive circuit 11, a limit is set to the maximum on-time time as a gate pulse to be given to the switching element Q1. For example, it is limited to about 50% at maximum.
The drive circuit 11 turns off the switching element Q <b> 1 in response to a timing signal from the off control circuit 18. Further, the drive circuit 11 performs control to forcibly turn on the switching element Q <b> 1 in response to a timing signal from the on trigger circuit 21.
A circuit system including a comparator 17 and a current source 19 is formed between the OFF control circuit 18 and the FB terminal. A photocoupler PC is connected to the FB terminal via a resistor R22. Therefore, the amount of current flowing from the current source 19 to the primary side ground via the photocoupler PC changes according to the secondary side output voltage, and the FB terminal voltage changes. The comparator 17 compares the FB terminal voltage with a predetermined reference voltage Vref2, and provides the comparison result to the off control circuit 18. The off control circuit 18 gives an off timing signal to the drive circuit 11 according to the comparison result. Thereby, the switching frequency is controlled according to the secondary side output voltage, and the output voltage is stabilized.
Further, the S terminal voltage is compared with a predetermined reference voltage Vref 1 by the comparator 16, and the comparison result is given to the off control circuit 18. That is, the off control circuit 18 is turned off to the drive circuit 11 based on the comparison result of the comparator 16 when the drain current becomes excessive due to the current detection resistor RD connected to the S terminal. A timing signal is given, and the drive circuit 11 limits the ON period of the switching element Q1 to be small. This limits the overcurrent.

The Stup terminal of the IC of the control circuit 10 is a terminal connected to the current source 13 and the switch 14, and this circuit unit functions only when the switching element Q1 starts oscillation. That is, at startup, the switch 14 is turned on, and the operation power supply voltage in the control circuit 10 is generated by the regulator 20 based on the DC input voltage Vin applied to the Stup terminal.
A voltage VCC obtained by rectifying and smoothing the pulse voltage of the drive winding (VCC winding) N3 of the converter transformer TR1 with the rectifier diode D20 and the smoothing capacitor C20 is applied to the VCC terminal. The voltage detection circuit 12 detects the VCC terminal voltage, and when the VCC terminal voltage sufficiently rises to a predetermined voltage, the switch 14 is turned off to reduce internal loss. In this case, the operation power supply voltage in the control circuit 10 is generated by the regulator 20 based on the voltage VCC from the VCC terminal.

  A voltage obtained by integrating a pulse voltage generated in the VCC winding N3 by a time constant circuit including a resistor R30 and a capacitor C21 is applied to the Bottom ON Detect terminal BD. The terminal voltage of the bottom-on detect terminal BD, that is, the charging voltage of the capacitor C21 is compared with a predetermined reference voltage Vref3 by the comparator 20. When the terminal voltage at the bottom on detect terminal BD drops below the reference voltage Vref3, an on timing signal for forcibly turning on the switching element Q1 is supplied from the on trigger circuit 21 to the drive circuit 11. The drive circuit 11 raises the gate voltage pulse by this on timing signal, and turns on the switching element Q1. For example, when the on-trigger is applied when the terminal voltage of the bottom-on detect terminal BD is 0.3 V or less, the pulse voltage generated in the VCC winding N3 is caused by the time constant of the resistor R30 and the capacitor C21, for example. The switching element Q1 is turned on after a predetermined delay time from the falling timing. The fact that the switching element Q1 is turned on after the predetermined delay time means that the switching element Q1 can be turned on at the bottom timing of the waveform in the drain-source voltage Vds of the switching element Q1, and the resistance R30, This means that the bottom-on timing can be set by the time constant of the capacitor C21.

FIG. 10 shows the drain-source voltage Vds and drain current Id of the switching element Q1, the cathode current Ik of the rectifier diode Do on the secondary side, and the anode-cathode voltage Vak. Note that these operation waveforms are shown for each of the maximum load, steady load, and light load.
FIG. 9 is also a flyback switching power supply circuit. Basically, during the ON period Tb of the switching element Q1, current flows in the primary winding N1, and the magnetic flux density increases, so that excitation energy is stored in the converter transformer TR1. It is done. Next, during the off period Ta of the switching element Q1, the excitation energy of the converter transformer TR1 passes through the rectifier diode Do on the secondary side and is released.

In this case, the switching frequency of the switching element Q1 is variably controlled for stabilization.
Although the oscillation frequency is shown in FIG. 11, as the input voltage decreases or the output load increases, the switching frequency decreases. Since the ON / OFF ratio of the gate voltage pulse remains substantially constant, the direction in which the switching frequency decreases is the direction in which the ON period Tb increases and the drain current Id increases.

Originally, during the off period of the switching element Q1, a ringing voltage is generated as a drain-source voltage Vds at a constant period as shown by a broken line in FIG. There is almost no ringing occurrence period.
Realization of soft switching by bottom-on control is performed as follows. The polarity of the VCC winding N3 is set opposite to that of the primary winding N1 for excitation. Therefore, when the switching element Q1 is turned off, a positive polarity pulse voltage is generated in the VCC winding N3. On the other hand, the delay timing of bottom-on control is set by the time constant circuit of the resistor R21 and the capacitor C21. In this circuit example, the switching element Q1 is forcibly turned on when the terminal voltage of the bottom-on detect terminal BD becomes 0.3 V or less after a predetermined delay, so the pulse voltage of the VCC winding N3 is negative. The bottom-on can be realized by forcibly turning on the switching element Q1 with a certain delay timing from the time when it falls.
In this way, surge noise of the drain current Id when the switching element Q1 is turned on and switching loss when the switching element Q1 is turned on are reduced, and at the same time, the operation is effective in reducing switching noise.
The surge noise of the drain current Id includes the stray capacitance of the converter transformer TR1, the residual energy remaining in the leakage inductance, the recovery current due to the junction capacitance such as the secondary side rectifier diode Do, the recovery current from the snubber circuit (in addition, A bypass capacitor) is formed as a current loop, and generates a beard-like current.

In the frequency control type switching power supply circuit as shown in FIG. 9, soft switching is relatively easy and the bottom-on control switching operation almost eliminates the ringing voltage during the off period of the original switching element Q1 (MOS-FET). Therefore, there is an advantage that switching noise of high frequency components is relatively small.
On the other hand, the practical range of the switching frequency is limited due to factors such as the ability of the components, and as a result, the frequency range in which output stabilization control can be performed with respect to input / output conditions is relatively narrow. In general, since it is necessary to set the oscillation frequency to be higher than the audible frequency band, as shown in FIG. For this reason, it is difficult to expand the control range.
Also, as the load becomes lighter, the oscillation frequency increases, so that the switching loss due to the oscillation frequency increases, and the component specifications become limited due to heat generation.

  As described above, switching power supply circuits of fixed frequency pulse width control method and frequency control method are known, but in particular, in the case of flyback circuits using voltage partial resonance which is considered to have low switching noise and is widely used In view of its operating principle, it is preferable to stabilize the output by a frequency control method. In this case, the waveform in the switching operation of the primary winding has a merit that the switching noise component is small as compared with the frequency fixed pulse width control method because the soft switching operation is possible. However, since the frequency fluctuates greatly due to changes in the input / output conditions of the power supply circuit, the controllable frequency range is about 20 KHz to several hundred KHz, and there is a certain restriction on the range. When increasing the maximum output, for example, an increase in the size and cost of the converter transformer becomes a problem.

  On the other hand, in the case of the frequency fixed pulse width control method, since the oscillation frequency is a fixed operation, if the core size (shape) of the converter transformer and other conditions are the same, by setting the oscillation frequency relatively high, The range of maximum power can be expanded more easily than the frequency control method. However, in the case of the fixed frequency pulse width control method, if the frequency is set high, the switching loss is relatively large, and since it is a hard switching operation, countermeasures are required up to a relatively high frequency band for switching noise. Noise countermeasures cause cost increases.

  In view of the above, an object of the present invention is to make it possible to easily expand the controllable frequency range based on a frequency control method that is advantageous in terms of switching noise.

A switching power supply circuit according to the present invention includes a converter transformer having a primary winding to which a DC input voltage is applied, and a secondary winding, and a secondary side DC provided on the secondary winding side and supplied to a load. Secondary side rectifying / smoothing circuit that generates output voltage, switching element connected to the primary winding, and switching driving of the switching element, and control for variably controlling the switching frequency according to the secondary side DC output voltage A circuit, and a lower limit frequency limiting circuit that prevents the switching frequency that is varied by the control circuit from becoming lower than a set lower limit frequency.
The lower limit frequency limiting circuit is configured to maintain the switching frequency at the lower limit frequency when the switching frequency reaches the lower limit frequency as load power increases.
The lower limit frequency is set to a frequency higher than the audible frequency band.

  In the present invention as described above, the lower limit frequency is limited while the frequency control method for stabilizing the switching frequency is variably controlled. In the case of the frequency control method, the switching frequency decreases as the load power increases, but the switching frequency does not reach the audible band when the switching frequency reaches the audible band due to, for example, an instantaneous peak output. Thus, the frequency is limited to the lower limit frequency. This is an operation for temporarily switching to the fixed frequency pulse width control method according to the change in the input / output conditions.

According to the present invention, taking advantage of the frequency control method that soft switching is easy and switching noise is small, the switching frequency is not lowered below the lower limit frequency even in accordance with input / output conditions. As a result, there is an effect that the control range can be expanded, which is an advantage of the fixed frequency pulse width control method.
In particular, in the past, in order to expand the control range, it was necessary to drastically change the main components of the switching power supply circuit such as a transformer. According to the present invention, the components of the lower limit frequency limiting circuit remain substantially the same component specifications. The power range can be easily expanded simply by adding.

The switching power supply circuit according to the embodiment of the present invention will be described below with reference to FIGS.
As described above, the stabilization methods that are commonly used in switching power supply circuits include fixed frequency pulse width control and frequency control. However, the switching power supply circuit according to the embodiment is used to stabilize the output voltage of the flyback method. As a control method for this, frequency control is performed during normal operation. The switching frequency is temporarily fixed in response to changes in input / output conditions such as instantaneous peak output, and the advantage of extending the control range can be obtained as in frequency-fixed pulse width control. It can also be said that this switches between the frequency control method and the fixed pulse width control method according to the input / output conditions.

FIG. 1 shows an example of the configuration of a switching power supply circuit according to this embodiment mounted on a device such as an audio amplifier.
In this switching power supply circuit, first, a DC input voltage Vin is input from the input connector CN1, and this DC input voltage Vin is obtained as a voltage across the smoothing capacitor Ci.
To the smoothing capacitor Ci, a series connection circuit of a primary winding N1 of the converter transformer TR1, a switching element Q1, and a current detection resistor RD is connected in parallel. In this case, the switching element Q1 is a MOS-FET.
In this case, the switching element Q1 is incorporated in an integrated circuit (IC) as the control circuit 10. That is, as the control circuit 10, the D terminal and S terminal of the IC are the drain terminal and the source terminal of the switching element Q1. A capacitor C10 is connected in parallel between the D terminal and the S terminal, that is, to the drain-source of the switching element Q1. The current detection resistor RD is connected between the S terminal (the source of the switching element Q1) and the primary side ground.
Further, a snubber circuit including a resistor R11, a capacitor C11, and a diode D11 is provided at both ends of the primary winding N1.

The control circuit 10 is formed by an IC for switching driving.
The control circuit 10 receives the primary side DC power supply voltage VCC as an operation power supply, and operates to apply an alternating waveform drive signal (gate voltage) having a required frequency to the gate of the built-in switching element Q1. .
Thereby, the switching element Q1 inputs the voltage across the smoothing capacitor Ci (DC input voltage Vin) via the primary winding N1 of the converter transformer TR1 and performs an on / off operation. That is, a switching operation is performed to perform power conversion from direct current to alternating current.
In this case, primary side DC power supply voltage VCC is generated using a pulse voltage obtained at drive winding (VCC winding) N3 wound around the primary side of converter transformer TR1. That is, the primary side DC power supply voltage VCC is obtained by a half-wave rectifier circuit including a rectifier diode D20 and a smoothing capacitor C20 that perform rectification by inputting an alternating voltage excited in the VCC winding N3.

When switching element Q1 performs a switching operation, an alternating voltage is obtained in primary winding N1 of converter transformer TR1, and this alternating voltage is excited in secondary winding N2.
The switching power supply circuit of this example is a flyback switching power supply circuit, and the primary winding N1 and the secondary winding N2 are wound in opposite polarities. For this reason, during the ON period in which the switching element Q1 is turned on, the secondary winding N2 side is biased by the rectifier diode Do, so that an exciting current flows through the primary winding N1, but energy is accumulated as a magnetic flux in the core. Next, during a period in which the switching element Q1 is turned off, the rectifier diode Do of the secondary winding N2 is forward-biased, and energy is transmitted to the secondary side with a voltage according to the turn ratio.
In this case, the alternating voltage excited in the secondary winding N2 is rectified and smoothed by a half-wave rectifier circuit including a secondary side rectifier diode Do and a secondary side smoothing capacitor Co. A secondary side DC output voltage is generated as a voltage across both ends. This secondary side DC output voltage is supplied to the load via the output connector CN2.
The load of the secondary side DC output voltage is, for example, a power amplifier in an audio amplifier. The power amplifier amplifies the input audio signal and drives the speaker. The secondary side DC output voltage supplied as described above becomes power for this amplification operation.

The secondary side DC output voltage is also branched and input to the voltage detection circuit unit for stabilization.
The voltage detection circuit unit is formed by connecting resistors R51, R52, R53, R54, a capacitor C50, and a shunt regulator Q50 as shown in the figure.
When the secondary side DC output voltage reaches a certain level or more, the voltage detection circuit unit causes a current of a level corresponding to the level increase to flow through the photodiode of the photocoupler PC.
In the phototransistor of the photocoupler PC, a collector current corresponding to the current level (light emission amount) flowing through the photodiode flows. The collector of the phototransistor is connected to the FB (feedback) terminal of the control circuit 10 via the resistor R22. Therefore, a voltage having a level corresponding to the collector current level of the phototransistor is input to the FB terminal of the control circuit 10 as a feedback signal.

The control circuit 10 variably controls the frequency of the drive signal (gate voltage pulse) of the switching element Q1 according to the voltage level of the FB terminal. That is, the switching frequency of the switching element Q1 is variably controlled. If the switching frequency changes, as is well known, the amount of power transmitted from the primary side to the secondary side changes, and the level of the secondary side DC output voltage is also varied. Since the voltage detection circuit unit includes the shunt regulator Q50, the secondary side DC output voltage does not operate within a certain level, and when the voltage exceeds a certain level, the level feedback corresponding to the level increase is provided. Operates to obtain a signal. Therefore, depending on the component of the feedback signal according to the output from the voltage detection circuit unit, when the level of the secondary side DC output voltage reaches a predetermined level, an operation to suppress further increase is obtained. It becomes.
The photocoupler PC is capable of signal input / output in a state in which the primary side and the secondary side are galvanically insulated when it is necessary to transmit a signal between the primary side and the secondary side of the power supply circuit. Inserted for the purpose of making it happen.

The IC of the control circuit 10 includes a drive circuit 11 that applies a gate voltage pulse to the switching element Q1. In the drive circuit 11, a limit is set to the maximum on-time time as a gate pulse to be given to the switching element Q1. For example, it is limited to about 50% at maximum.
The drive circuit 11 turns off the switching element Q <b> 1 in response to a timing signal from the off control circuit 18. Further, the drive circuit 11 performs control to forcibly turn on the switching element Q <b> 1 in response to a timing signal from the on trigger circuit 21.
A circuit system including a comparator 17 and a current source 19 is formed between the OFF control circuit 18 and the FB terminal. As described above, the phototransistor of the photocoupler PC is connected to the FB terminal via the resistor R22. Therefore, the amount of current flowing from the current source 19 to the primary side ground via the photocoupler PC changes according to the secondary side output voltage, and the FB terminal voltage changes. The comparator 17 compares the FB terminal voltage with a predetermined reference voltage Vref2, and provides the comparison result to the off control circuit 18. The off control circuit 18 gives an off timing signal to the drive circuit 11 according to the comparison result. Thereby, the switching frequency is controlled according to the secondary side output voltage, and the output voltage is stabilized.
Further, the S terminal voltage is compared with a predetermined reference voltage Vref 1 by the comparator 16, and the comparison result is given to the off control circuit 18. That is, when the drain current becomes excessive due to the current detection resistor RD connected to the S terminal, for example, at the time of switching activation, the off control circuit 18 is turned on by the drive circuit 11 based on the comparison result of the comparator 16. A signal for limiting the time is given, and the drive circuit 11 lengthens the OFF period of the switching element Q1. This limits the overcurrent. Note that there is a region where the lower limit frequency limiting circuit does not operate during this operation period because the output voltage decreases, that is, the winding voltage decreases.

The Stup terminal of the IC of the control circuit 10 is a terminal connected to the current source 13 and the switch 14, and this circuit unit functions only when the switching element Q1 starts oscillation. That is, at startup, the switch 14 is turned on, and the operation power supply voltage in the control circuit 10 is generated by the regulator 20 based on the DC input voltage Vin applied to the Stup terminal.
As described above, the primary DC power supply voltage VCC in which the pulse voltage of the VCC winding N3 of the converter transformer TR1 is rectified and smoothed by the rectifier diode D20 and the smoothing capacitor C20 is applied to the VCC terminal. The VCC terminal voltage is detected, and when the VCC terminal voltage sufficiently rises to a predetermined voltage, the switch 14 is turned off to reduce the internal loss. In this case, the operation power supply voltage in the control circuit 10 is generated by the regulator 20 based on the primary side DC power supply voltage VCC from the VCC terminal.

A voltage obtained by integrating a pulse voltage generated in the VCC winding N3 by a time constant circuit including a resistor R30 and a capacitor C21 is applied to the Bottom ON Detect terminal BD.
Since the polarity of the VCC winding N3 is opposite to that of the primary winding N1 for excitation, a positive polarity pulse is generated in the VCC winding N3 when the switching element Q1 is turned off.
Then, this pulse voltage is applied to the bottom-on detect terminal BD with a predetermined delay time by a time constant circuit composed of a resistor R21 and a capacitor C21.

The terminal voltage of the bottom-on detect terminal BD, that is, the charging voltage of the capacitor C21 is compared with a predetermined reference voltage Vref3 by the comparator 20. When the terminal voltage at the bottom on detect terminal BD drops below the reference voltage Vref3, an on timing signal for forcibly turning on the switching element Q1 is supplied from the on trigger circuit 21 to the drive circuit 11. The drive circuit 11 raises the gate voltage pulse by this on timing signal, and turns on the switching element Q1.
For example, when the on-trigger is applied when the terminal voltage of the bottom-on detect terminal BD is 0.3 V or less, the pulse voltage generated in the VCC winding N3 is caused by the time constant of the resistor R30 and the capacitor C21, for example. The switching element Q1 is turned on after a predetermined delay time from the falling timing. When the switching element Q1 is turned on after the predetermined delay time, it means that the switching element Q1 is turned on at the bottom timing of the waveform in the drain-source voltage Vds of the switching element Q1. That is, the bottom on timing is set by the time constant of the resistor R30 and the capacitor C21.
When turned on at this timing, surge noise of the drain current Id when the switching element Q1 is turned on is reduced, which is effective in reducing switching loss and switching noise when turned on.

In this switching power supply circuit, a lower limit frequency limiting circuit including a transistor Q2, resistors R30 and R31, a capacitor C30, and a Zener diode D30 is provided.
The collector of the transistor Q2 is connected to the bottom-on detect terminal BD, and the emitter is connected to the primary side ground.
The resistor R30 is connected between the base of the transistor Q2 and the primary side ground.
The capacitor C30 is connected between the base of the transistor Q2 and the primary side ground.
A current based on the pulse voltage obtained by the VCC winding N3 is applied to the base of the transistor Q2 via the Zener diode D30 and the resistor R31. In this lower limit frequency limiting circuit, the capacitor C30 is charged by the Zener diode D30 when the pulse voltage obtained at the VCC winding N3 is equal to or higher than a certain level. When the charging voltage of the capacitor C30 becomes equal to or higher than the base-emitter voltage Vbe of the transistor Q2, the transistor Q2 is turned on.

FIG. 2 shows the drain-source voltage Vds and drain current Id of the switching element Q1, the cathode current Ik of the secondary side rectifier diode Do, and the anode-cathode voltage Vak. Furthermore, the pulse voltage obtained by the VCC winding N3, the terminal voltage of the bottom-on detect terminal BD, and the charging voltage of the capacitor C30 are shown.
These operation waveforms are shown for each of the maximum load, steady load, and light load.

As shown in FIG. 2, the waveform of the drain-source voltage Vds of the switching element Q1 is that the period Ta in one cycle is the off period, the period Tb is the on period, and the drain current Id flows in the on period Tb.
The slope of the drain current Id is determined by L / Vin, where L is the primary inductance of the converter transformer TR1 and Vin is the charging voltage of the smoothing capacitor Ci.
Since the circuit is a flyback system, basically, during the ON period Tb of the switching element Q1, a current flows through the primary winding N1, and the magnetic flux density increases, so that excitation energy is stored in the converter transformer TR1. Next, during the off period Ta of the switching element Q1, the excitation energy of the converter transformer TR1 passes through the secondary rectifier diode Do and is released as the cathode current Ik.

As shown in FIG. 2, in this example, when the load is from a light load to a steady load, the frequency control is performed in the bottom-on mode. On the other hand, when the load becomes heavy, the lower limit frequency fixed control mode is set.
In the operation region of the lower limit frequency fixed control mode, when the load current increases, the switching element Q1 may be turned on again at a timing when 0 A is not released within the on period Tb. In such a case, the cathode current Ik of the secondary side rectifier diode Do may have a trapezoidal current waveform on which direct current is superimposed. Such an operation is generally referred to as a continuous mode.

In a steady load or light load state, bottom-on switching is performed as follows.
As described above, the control circuit 10 forcibly turns on the switching element Q1 when the terminal voltage of the bottom-on detect terminal BD becomes equal to or lower than a threshold voltage (for example, about 0.3 V).
On the other hand, when the switching element Q1 is turned on as shown in FIG. 2, the winding voltage waveform of the VCC winding N3 simultaneously becomes 0 V or less according to the turns ratio of the transformer winding. This is set so that the terminal voltage of the bottom-on detect terminal BD becomes equal to or lower than a threshold voltage (for example, 0.3 V) after a certain delay time using a time delay by a time constant circuit including a resistor R21 and a capacitor C21. As a result, if the switching element Q1 is forcibly turned on, the switching element Q1 can be turned on at the valley of the ringing voltage during the off period Ta. In this way, bottom-on control is realized.

In this example, as described above, a lower limit frequency limiting circuit including a transistor Q2, resistors R30 and R31, a capacitor C30, and a Zener diode D30 is further provided.
In this lower limit frequency limiting circuit, when the base-emitter voltage Vbe of the transistor Q2 becomes a threshold value and the charging voltage of the capacitor C30 becomes equal to or higher than the base-emitter voltage Vbe, the transistor Q2 is turned on. When the transistor Q2 is turned on, the terminal voltage of the bottom-on detect terminal BD becomes equal to or lower than the threshold voltage. As a result, the switching element Q1 is forcibly turned on.
At the same time as the switching element Q1 is forcibly turned on, the VCC winding N3 is inverted to the negative voltage side, so that the capacitor C30 is rapidly discharged through the resistor R31. The capacitor C30 has a constant charging / discharging cycle, and is further set to charge the capacitor C30 earlier than the normal bottom-on control timing. That is, the lower limit frequency limiting circuit operates predominantly with respect to the normal bottom-on control delay operation.
Thus, the off period Ta of the switching element Q1 is limited to a certain period by the lower limit frequency limiting circuit, and the on period Tb is limited to the maximum on time in the drive circuit 11 of the control circuit 10. As a result, the lower limit frequency as the switching frequency is limited.

Note that the drain current (primary winding current) of the switching element Q1 can increase up to the drain current limit value by the current detection resistor Rd set at the S terminal.
For example, when the load current increases, the triangular wave drain current Id increases. However, when the L value of the primary winding N1 is large, the slope of the current value V / L is small, so the on period Tb is limited before the current limit. It may take such a case. The drain current value increases while becoming trapezoidal (continuous mode) while the on-time limiter operates, but eventually the current limit is imposed by the current detection resistor Rd, and the output power is limited to a certain limit.

3A and 3B show actual operation waveforms in the bottom-on mode and the lower limit frequency fixed control mode for reference. Here, the drain-source voltage Vds of the switching element Q1, the pulse voltage of the VCC winding N3, the terminal voltage of the bottom-on detect terminal BD, and the drain current Id of the switching element Q1 are shown.
In FIG. 3B, as can be seen from comparison with FIG. 3A, the terminal voltage of the bottom-on detect terminal BD is normally based on the pulse voltage of the VCC winding N3 by the function of the lower limit frequency limiting circuit. As a result, the switching element Q1 is forcibly turned on when it becomes 0.3 V or less earlier than the bottom-on control timing.

FIG. 4 shows a transition image of the oscillation frequency. As shown in this figure, in this example, when the load power is large power greater than a predetermined value, the frequency is fixed and the pulse width control is performed.
For example, it is fixed at the lower limit frequency as shown in the figure. This lower limit frequency is higher than the audible band.
In the case of the above-described conventional frequency control type switching power supply circuit, the switching frequency reaches the audible band as the load power increases as shown in FIG. Although difficult, in this example, the frequency fixed control is performed according to the increase of the load power as shown in FIG. That is, the control range can be expanded.

As described above, according to the present embodiment, in the frequency control method in which soft switching is easy and the switching noise is small, the switching frequency can be set to the lower limit frequency even according to the input / output conditions by the function of the lower limit frequency limiting circuit. For example, by performing frequency fixed control on the instantaneous peak power so as not to decrease further, the control range can be expanded. Therefore, it is possible to further optimize the power supply of the equipment.
This can be realized by adding a simple circuit unit as a lower limit frequency limiting circuit to the conventional switching power supply circuit as shown in FIG.
Further, even with the same core size of the converter transformer TR1 as in the prior art, the range can be expanded for an instantaneous maximum load.
It can also be said that the design for a transient overload becomes easy.
Furthermore, the core size can be rationally selected with respect to the limit of the maximum magnetic flux density of the converter transformer TR1.
That is, in the past, in order to expand the control range, it was necessary to significantly change the main components of the switching power supply circuit such as a transformer. The power range can be easily expanded simply by adding the above components.

  In the normal operation region where the bottom-on mode is set, noise countermeasures can be maintained as before. Noise increases during the period in which control is performed using the fixed frequency method, but if the mode is switched to the fixed frequency method instantaneously at the maximum load, it can be said that there is no influence of noise deterioration.

Incidentally, the oscillation frequency may be controlled as shown in FIG. That is, in this example, fixed frequency pulse width control is performed in a predetermined light load and large load region.
When the load is light, it shifts to a lower frequency and reduces the switching loss per unit time. In the normal load region, frequency control is performed. Further, in the low-frequency peak load region, the lower limit frequency limit operates to expand the load range.
When frequency control is normally performed, the oscillation frequency increases as the load becomes lighter. Therefore, the switching loss due to the oscillation frequency increases, and heat generation limits the component specifications. Therefore, as shown in FIG. 5, by switching the frequency at a certain lower limit frequency in a predetermined light load region such as when the device is performing a standby operation, switching loss per unit time is achieved. Can be reduced and heat generation can be suppressed.

1 is a circuit diagram of a switching power supply circuit according to an embodiment of the present invention. It is an operation | movement waveform diagram of the switching power supply circuit of embodiment. It is an actual operation | movement waveform diagram of the switching power supply circuit of embodiment. It is explanatory drawing of the oscillation frequency transition of the switching power supply circuit of embodiment. It is explanatory drawing of the oscillation frequency transition of the switching power supply circuit of other embodiment. It is a circuit diagram of the conventional switching power supply circuit of a frequency fixed pulse width control system. It is an operation | movement waveform diagram of the switching power supply circuit of a frequency fixed pulse width control system. It is explanatory drawing of the oscillation frequency transition of the switching power supply circuit of a frequency fixed pulse width control system. It is a circuit diagram of the conventional switching power supply circuit of a frequency control system. It is an operation | movement waveform diagram of the switching power supply circuit of a frequency control system. It is explanatory drawing of the oscillation frequency transition of the switching power supply circuit of a frequency control system.

Explanation of symbols

  10 control circuit, 11 drive circuit, Q1 switching element, Q2 transistor, TR1 converter transformer, N1 primary winding, N2 secondary winding, N3 VCC winding, RD current detection resistor,

Claims (3)

A converter transformer having a primary winding to which a DC input voltage is applied, and a secondary winding;
A secondary side rectifying and smoothing circuit that is provided on the secondary winding side and generates a secondary side DC output voltage supplied to a load;
A switching element connected to the primary winding;
A control circuit for switching the switching element and variably controlling the switching frequency according to the secondary side DC output voltage;
A lower limit frequency limiting circuit for preventing the switching frequency variably controlled by the control circuit from becoming lower than a set lower limit frequency;
A switching power supply circuit comprising:   2. The lower limit frequency limiting circuit is configured to maintain the switching frequency at the lower limit frequency when the switching frequency reaches the lower limit frequency as load power increases. The switching power supply circuit described.   The switching power supply circuit according to claim 1, wherein the lower limit frequency is set to a frequency higher than an audible frequency band.

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