JP2000060127A - Rush current suppression circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress rush current without prolonging the rise time, for a rush current suppression circuit which improves the power factor and also suppresses the rush current. SOLUTION: This rush current repression circuit includes a rush current preventing part 1, which controls the switch element for short-circuiting a resistor 5 for current suppression by means of a switch controller 7, a rectifying circuit 2, a power factor improvement part 3 which constitutes a step-up type DC-DC converter, and a sequence controller 4, and the sequence controller 4 turns off the switch element 6 of the rush current preventive part 1 when an AC power switch is turned on. Next it inputs a start signal into the switching controller 13 of the power factor improvement part 3 so as to start the action of the power factor improvement part 3, and then turns on the switch element 6 of the rush current preventing part 1 to short-circuit a resistor 5 for current suppression. Moreover, the switching controller 13 of the power factor improvement part 3 has such a constitution as to turn on or turn off the switching transistor 11 to reduce the load current for a delay time by a time constant circuit, after the start signal is inputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rush current suppressing circuit in a power supply device for suppressing a rush current from an AC power supply and improving a power factor by suppressing a harmonic current component.
In a configuration in which a rectifier circuit and a switching power supply are connected to an AC power supply, a peak-shaped current flows from the AC power supply to the switching power supply via the rectifier circuit, and the harmonic current component is high. Therefore, the power factor on the AC power supply side is reduced. For the purpose of improving the power factor, there is known a configuration in which a boosting power factor improving section is provided at a stage preceding the switching power supply device. Even in such a configuration, since the rush current when the power is turned on is large, there is a demand for suppressing the rush current and shortening the startup time of the power factor improving unit.

[0002]

2. Description of the Related Art FIG. 5 is an explanatory view of a switching power supply device, in which 51 is an AC power supply, 52 is a current suppressing resistor, 53 is a switch element (SW), 54 is a switch (SW) control unit, and 55 is a full wave. A rectifier circuit such as a rectifier circuit, 56 is a reactor, 57 is a diode, 58 is a capacitor, 59 is a switching transistor, 60 is a current detecting resistor, 61
Is a switching controller, 62 is a sequence controller, 63
Denotes a DC-DC converter, and 64 denotes a load of various electronic circuits and the like.

A rush current prevention unit is constituted by a resistor 52, a switch element 53, and a switch control unit 54. The switch element 53 can be constituted by a relay contact, a field effect transistor (FET), or the like. The reactor 56, the diode 57, the capacitor 58, the switching transistor 59, the resistor 60, and the switching control unit 61 constitute a power factor improving unit. The sequence control unit 62 includes a switch control unit 54 at the start of the operation.
And a switching control unit 61 for applying a control signal in accordance with a preset timing.

[0004] The DC-DC converter 63 is provided with a load 64.
In accordance with the configuration described above, one or more types of stabilized DC voltages are supplied. This DC-DC converter 6
3 is usually a capacitor input type, so that the flowing current waveform has a pulse shape. As a result, the harmonic current component increases, the power factor of the AC power supply 51 decreases, and the problem of an increase in reactive power occurs.

[0005] Therefore, the power factor improving section includes a rectifier circuit 55 and a DC
-DC converter 63. This power factor improving section controls the switching transistor 59 to be turned on and off by a switching control section 61, and charges the capacitor 58 via the diode 57 when turned off by using the energy stored in the reactor 56 when turned on.
The charging voltage of the capacitor 58 is supplied to the DC-DC converter 63. Thereby, the current waveform flowing from the AC power supply 51 is made closer to a sine waveform to improve the power factor. Also, since the capacitor 59 is charged with the energy stored in the reactor 56, the configuration corresponding to a boost converter is provided. Further, the ON period of the switching transistor 59 is controlled so that the current is detected by the resistor 60 and an overcurrent state is not caused.

When a power switch (not shown) is turned on and the power supply switch is connected to the AC power supply 51, the switch control unit 54 turns off the switch element 53 so that the resistor 52 is connected in series in the initial stage. Therefore, the inrush current is limited by the resistor 52. After a predetermined time, a control signal is applied from the sequence control unit 62 to the switch control unit 54, and the switch control unit 54
3 is turned on by controlling, and the resistor 52 is short-circuited. As a result, electric power is supplied from the AC power supply 51 as usual.

FIG. 6 is an explanatory view of a main part of a conventional switching control unit. The same reference numerals as in FIG.
Indicates a control processing unit, 66 and 67 indicate resistors, and 68 indicates a reference voltage source. The sequence control section 62 turns on an AC power switch (not shown) (switch element 53 off) → switch element 53 on b → starts operation of the switching control section 62 → completion of start of the power factor improvement section = Vdc (output voltage ), The sequence control of the start-up completion (normal operation start) d is performed.

Accordingly, as described above, a switch (not shown) between the power supply and the AC power supply 51 is turned on, and the switch element 53 is turned off by the switch control unit 54, and the switch element 53 is turned on after a predetermined time has elapsed. Resistance 52
Is short-circuited, and then a start signal is applied to the switching control section 61 to start the on / off operation of the switching transistor 59. After a predetermined time, if no abnormality occurs, the state shifts to a normal operation state.

The switching control unit 61 divides the sum of the voltage across the resistor 60 for detecting the current Ir and the voltage of the reference voltage source 68 by the resistors 66 and 67, and supplies the divided voltage to the control processing unit 65. input. The control processing unit 65 starts operation in response to an activation signal from the sequence control unit 62,
Turning on the switching transistor 59 (see FIG. 5);
Start off operation. At this time, when the current Ir increases, the divided voltage by the resistors 66 and 67 increases. When the voltage exceeds the set current, the ON period of the switching transistor 59 is shortened so as to suppress the current Ir.

[0010]

The inrush current flowing from the AC power supply 51 can be suppressed by connecting the resistor 52 in series as described above, and the output capacity of the AC power supply 51 can be reduced. In that case, the effect of suppressing the rush current increases by increasing the resistance 52. However, the time required for the charging voltage of the capacitor 58 of the power factor improving unit to reach a predetermined value becomes longer, whereby the DC-DC converter 63 operates normally and supplies a stabilized DC voltage to the load 64. A problem arises that the time until the formation is longer. In order to solve this problem, if the resistance 52 is reduced, the rush current increases, so it is necessary to prepare an AC power supply 51 having an output capacity that can tolerate the rush current. Also, when the switch 52 is turned on and the resistor 52 is short-circuited, a larger inrush current flows again for a shorter time than the initial inrush current. Further, an inrush current also flows when the power factor correction unit is started (suppressed to some extent by soft start or the like). SUMMARY OF THE INVENTION It is an object of the present invention to suppress an inrush current and to shorten a rise time of a power factor improving unit.

[0011]

The inrush current suppressing circuit according to the present invention comprises (1) a current suppressing resistor 5 for suppressing an AC current from an AC power supply, and a switch element 6 for short-circuiting the resistor 5.
And a rush current prevention unit including a switch control unit 7 for controlling ON and OFF of the switch element 6; a rectifier circuit 2 for rectifying an AC voltage input via the rush current prevention unit 1; A capacitor 10 for applying a rectified output voltage of the circuit 2 via a reactor 8 and a diode 9
And a switching transistor 11 for storing energy in the reactor 8 and switching the stored energy to be input to the capacitor 10 via the diode 9.
And a switching control section 13 for controlling the ON / OFF ratio of the switching transistor so as not to exceed the set current by detecting the current.
The switching element 6 of the inrush current prevention unit 1 is turned off at the start of operation, and the on / off operation of the switching transistor 11 of the power factor improvement unit 3 is started after a predetermined time, and then the inrush current prevention is performed after a predetermined time. A sequence control unit 4 is provided which controls the timing so that the switch element 6 of the unit 1 is turned on and the current suppressing resistor 5 is short-circuited.

(2) The switching control unit 13 of the power factor improvement unit 3 includes a time constant circuit for starting charging of the capacitor 10 in response to a start signal from the sequence control unit 4, and a sum of a detected current voltage and a reference voltage. And a voltage divider circuit that starts operation by a start signal and inputs the divided voltage of the voltage divider circuit so that the current does not exceed the set current.
A control processing unit for controlling on / off of the transistor 11 and a start signal delayed according to the time constant of the time constant circuit from the state where the voltage dividing ratio is reduced so as to reduce the set current. A switch element that switches so as to increase the pressure ratio and increase the set current can be provided.

(3) The switching control section 13 of the power factor correction section 3 starts operation in response to a voltage dividing circuit for dividing the sum of the detected current voltage and the reference voltage, and a start signal from the sequence control section 4. And a control processing unit for inputting a divided voltage of the voltage dividing circuit and controlling on / off of the switching transistor 11 so that the current does not exceed the set current, and a voltage dividing circuit for reducing the set current. A field effect transistor that switches from a state in which the voltage dividing ratio is reduced to a state in which the starting signal is input to the gate and after a delay time based on the parasitic capacitance, the voltage dividing ratio is increased and the set current is increased. Can be.

[0014]

FIG. 1 is an explanatory view of a first embodiment of the present invention, wherein 1 is an inrush current prevention unit, 2 is a rectifier circuit,
3 is a power factor improving unit, 4 is a sequence control unit, 5 is a resistor for suppressing current, 6 is a switch element such as a relay or a transistor, 7 is a switch control unit, 8 is a reactor, 9 is a diode, 10 is a capacitor, 11 Is a switching transistor such as a field effect transistor, 12 is a resistor for current detection, and 13 is a switching control unit. The load is not shown.

The sequence control section 4 is constituted by a time constant circuit, a timer, and the like, and turns on an a.c. power switch (not shown) (switch element 6 off) → starts operation of the switching control section 13 c → switch element 6 on b → The sequence control of the completion of startup of the power factor improving unit = completion of the rising of Vdc (output voltage) (start of normal operation) d is performed. It should be noted that the sequence control unit 62 of the conventional example has a → b → c → d
Is performed in accordance with the above sequence. The switching control unit 13 controls the switching transistor 11 so that the current detected by the resistor 12 does not exceed the set current, and automatically switches the set current to a small value at the initial stage of startup. Have.

FIGS. 2A and 2B are explanatory diagrams of the operation of the conventional example and the embodiment of the present invention. FIG. 2A shows the operation of the conventional example, FIG. The switch is turned on, b is a switch element for short-circuiting the current suppressing resistor, c is the operation start of the power factor improvement unit, and d is the start completion of the power factor improvement unit = the completion of the rise of Vdc (output voltage) (normal). Start of operation). Iin indicates the current from the AC power supply, and Vdc indicates the terminal voltage of the capacitor of the power factor improving unit, that is, the output voltage.

That is, in the conventional example of (A), the switch element for short-circuiting the current suppressing resistor 52 after the time T1 from the ON of the AC power switch by the sequence control unit 54 (see FIG. 5). 53 is turned on b, and after time T3, the operation start c of the power factor improvement unit is started, that is, the on / off operation of the switching transistor 59 is started. After time T2, the start of the power factor improvement unit is completed = Vdc (output voltage).
(Normal operation start) d.

Accordingly, the inrush current of the current Iin from the AC power supply is suppressed by the current suppressing resistor 52 when the AC power supply switch is turned on a, but the inrush current is reduced again when the switch element 53 is turned on b. Flows. Inrush current also flows at the start of operation c of the power factor improving section. Further, the output voltage Vdc approaches a normal value when the operation of the power factor improving unit is started. In this case, if the resistance 52 is increased in order to sufficiently suppress the inrush current at the timing a, the time T1 needs to be increased, and the inrush current at the timing b also increases.

As shown in FIG. 2B, in the embodiment of the present invention, after the AC power switch is turned on by the sequence control section 4, the power factor correction section 3 is turned on after a time t1.
Is started, and then the switch element 6 is turned on b. That is, timing control is performed according to the sequence of a → c → b → d.

In this case, the rush current when the AC power supply switch is turned on is sufficiently suppressed by increasing the current suppressing resistor 5 and the switching transistor 11 of the power factor improving unit 3 is increased.
At the start of the on / off operation of the switch, the current is detected by the resistor 12 and the switching control unit 1 is controlled so as to limit the current.
3 operates to suppress the inrush current at the timing of c. When the switch element 6 is turned on b, the output voltage Vdc also starts to rise because the power factor improving unit 3 has started operation, and therefore, the rush current when the current suppressing resistor 5 is short-circuited. Can also be suppressed. Then, the period from ON of the AC power switch to completion of the start of the power factor improving unit = completion of the rising of Vdc (output voltage) (start of normal operation) d can be shortened.

FIG. 3 is an explanatory view of a main part of a second embodiment of the present invention, and shows a configuration of a main part of a switching control unit. In the figure, RI is a current detecting resistor (corresponding to the resistor 12 in FIG. 1), Ir is a current, 13 is a switching control unit, 21 is a control processing unit, R1 to R8 are resistors, C1 is a capacitor, and Q1 is a capacitor. Transistors, D1 and D2 are diodes, CMP is a comparison circuit, Vr is a reference voltage, and VD is a divided voltage.

The control processing section 21 starts operation in response to a start signal ("0") from the sequence control section, and controls on / off operation of the switching transistor 11 (see FIG. 1). The current Ir flows in the direction of the arrow, so that the voltage at both ends of the resistor RI is added to the reference voltage Vr. When the transistor Q1 is off, the divided voltage VD divided by the resistors R1 and R2 is applied. It is input to the control processing unit 21. Therefore, the control processor 21 compares and determines the divided voltage VD when the current Ir is in the overcurrent state, and limits the current Ir by shortening the ON period of the switching transistor 11 or the like.

The resistors R5 to R8, the capacitor C1, the diodes D1 and D2, and the comparison circuit CMP constitute a time constant circuit for delaying a start signal from the sequence control unit. That is, since the diode D1 is in a reverse bias state before the start signal (“0”) is input from the sequence control unit, the capacitor C1 is charged by the reference voltage Vr via the resistor R7 and the diode D2. And the terminal voltage of the capacitor C1 and the resistances R5 and R
6 is compared with the divided voltage of the reference voltage Vr in the comparison circuit CMP. At this time, the output signal of the comparison circuit CMP is configured to be at a high level (“1”). Therefore, the base current flows through the resistor R4, and the transistor Q1 is turned on. As a result, the resistor R3 is connected in parallel with the resistor R2, and the voltage division ratio decreases.

As described above, when the transistor Q1 is on,
From the voltage division ratio of the resistors R1 and R2, the resistor R3
Are connected in parallel to each other, the voltage division ratio decreases as described above, and the divided voltage VD increases even with the same current Ir, and in the control processing unit 21, the current Ir flowing through the resistor RI becomes overcurrent. When the current is smaller than the set current of the state, the ON period of the switching transistor 11 is controlled as an overcurrent state to suppress the current Ir.

That is, as shown in FIG. 2 (B), a start signal (“0”) from the sequence control unit 4 is applied to the switching control unit 13 after a lapse of time t1 from the ON of the AC power switch. In the initial state, the transistor Q1 is on, so that when the control processing unit 21 starts the on / off operation of the switching transistor 11, it operates to suppress the current Ir, thereby suppressing the rush current. can do.

Then, in response to a start signal ("0") from the sequence control section 4, a forward voltage is applied to the diode D1, and the capacitor C1 is discharged via the resistor R8 and the diode D1. This capacitor C
When the terminal voltage of the capacitor C1 drops according to the time constant of the resistor 1 and the resistor R8 and drops below the divided voltage of the resistors R5 and R6, the output signal of the comparison circuit CMP becomes "0" and the base current of the transistor Q1 stops flowing. .

As a result, the transistor Q1 is turned off, the divided voltage VD by the resistors R1 and R2 is applied to the control processing unit 21, and the current Ir is suppressed when the current Ir exceeds a normal set current. Thus, the ON period of the switching transistor 11 is controlled. In this case, the time constant needs to correspond to a time that is equal to or less than the time T2 and is equal to or later than the timing b.

While the switch element 6 of the inrush current prevention unit 1 is off, the output voltage Vdc does not rise to a predetermined value due to the voltage drop by the resistor 5.
Is turned on at the timing of b in FIG. 2B, the output voltage Vdc rises to a predetermined value. In this case, since the terminal voltage of the capacitor 10 of the power factor improving section has already risen to some extent, the inrush current does not occur as in the conventional example. And in the conventional example, T1 + T3
Although the time of + T2 is taken as the rise time, according to the present invention, the rise time is t1 (<T1) + T2, and the rise time can be reduced while suppressing the rush current.

Although the case where the start signal from the sequence control unit 4 is "0" is shown, it is also possible to apply the opposite logic of "1". In that case, for example, the polarity of the diodes D1 and D2 is reversed, and the comparison circuit CMP
When the start signal is not input, the capacitor C1 is not charged by the reference voltage Vr.
Is in a reverse bias state, and therefore, the capacitor C1 is charged via the resistors R7 and R8, and the output signal of the comparison circuit CMP is changed from "1" to "0" using the time constant at that time.
Can be adopted.

FIG. 4 is an explanatory view of a main part of a third embodiment of the present invention. The same reference numerals as in FIG.
R15 is a resistor, Q2 is a field effect transistor, C2 is a capacitor, and D3 is a diode. This embodiment utilizes the parasitic capacitance of the field effect transistor Q2 to
A case where the start signal from the sequence control unit is delayed to turn off the field effect transistor Q2 will be described. If the parasitic capacitance is not a sufficient value, a capacitor C2 can be connected as shown by a dotted line.

When the start signal ("0") from the sequence control unit is not applied, the field effect transistor Q2 divides the reference voltage Vr via the resistor R14 and the diode D3 by the resistor (R15 + RI). The applied voltage is applied to the gate to turn on, and the parasitic capacitance is charged. This parasitic capacitance is generally about several thousand pF. Alternatively, when the capacitor C2 indicated by the dotted line is connected, the capacitor C2 is also charged. The resistor R13 is connected in parallel to the resistor R12 by the on-state field effect transistor Q2, and the voltage division ratio is reduced.

In this state, when a start signal ("0") is applied from the sequence control unit, the control processing unit 21 starts operating, and suppresses the current Ir to a small value as in the case shown in FIG. As described above, the switching transistor 11
(See FIG. 1). Then, since the diode D3 is in the reverse bias state, when the charge of the parasitic capacitance of the field effect transistor Q2 (or the charge of the capacitor C2) is discharged through the resistor R15 and falls below the threshold value of the field effect transistor Q2, The field effect transistor Q2 is turned off. Thereby, the resistance R
The divided voltage by R11 and R12 is input to the control processing unit 21, and ON / OFF control of the switching transistor 11 is performed so as not to exceed the set current.

Switching by the sequence control unit
The start of the operation of the power factor improving unit by the start of the on / off operation of the transistor 11 and the operation of short-circuiting the current suppressing resistor 5 by the switch element 6 are the same as those in the above-described embodiment. Therefore, duplicate description will be omitted.

The present invention is not limited to the above-described embodiments, but can be variously added and changed. For example, in order to delay the start signal from the sequence control unit, various configurations are used. Can be applied, and a function called a timer can be used. It is also possible to adopt a configuration in which a timing signal is output from the sequence control section so that the transistor Q1 in FIG. 3 and the field-effect transistor Q2 in FIG. 4 are turned off after a time determined by the time constant circuit. . The timing signal in this case is a timing b (see FIG. 2).
By setting a time constant, a timer, and the like of the sequence control unit so as to output the signal between the timing and the timing d, the circuit configuration can be simplified. Also, the reference voltage Vr
Is indicated by a battery, but it is also possible to apply a constant voltage using a Zener diode or the like. Further, although the switching transistor 11 of the power factor improving section 3 is shown as a field effect transistor, it is of course possible to use a bipolar transistor.

[0035]

As described above, the present invention provides an inrush current prevention unit 1 including a switch control unit 7 for controlling a switch element 6 for short-circuiting a current suppressing resistor 5, a rectifier circuit 2,
A power factor improving section 3 and a sequence control section 4 are included. The switching element 6 is turned off at the start of the operation, and after a predetermined time, the switching transistor 11 of the power factor improving section 3 is started to turn on and off, and thereafter, a rush is performed. The sequence control section 4 controls the switch element 6 of the current prevention section 1 to be turned on. Even when the inrush current is reduced by increasing the current suppressing resistor 5, the rise time can be reduced. There are advantages.

A switching control unit 13 which receives a start signal from the sequence control unit 4 and controls the switching transistor 11 of the power factor correction unit 3 which starts operation by the start signal to turn on and off the switching transistor 11 comprises a time constant circuit. By performing on / off control to suppress the current to a small value during the delay time, there is an advantage that the rush current at the time of starting the power factor improving unit 3 can be suppressed.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a first embodiment of the present invention.

FIG. 2 is an operation explanatory view of a conventional example of an embodiment of the present invention.

FIG. 3 is an explanatory view of a main part of a second embodiment of the present invention.

FIG. 4 is an explanatory view of a main part of a third embodiment of the present invention.

FIG. 5 is an explanatory diagram of a switching power supply device.

FIG. 6 is an explanatory view of a main part of a conventional switching control unit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Inrush current prevention part 2 Rectifier circuit 3 Power factor improvement part 4 Sequence control part 5 Current suppression resistance 6 Switch element 7 Switch control part 8 Reactor 9 Diode 10 Capacitor 11 Switching transistor 12 Current detection resistance 13 Switching control part

Claims (3)

[Claims] An inrush current prevention unit including a current suppressing resistor for suppressing an AC current from an AC power supply, a switch element for short-circuiting the resistor, and a switch control unit for controlling on / off of the switch element; A rectifier circuit for rectifying an AC voltage input through the inrush current prevention unit; a capacitor for applying a rectified output voltage of the rectifier circuit via a reactor and a diode; and accumulating energy in the reactor. And a switching control for detecting the current and controlling the ON / OFF ratio of the switching transistor so that the current does not exceed a set current. And a power factor improving unit including: After starting the on / off operation of the switching transistor of the power factor improving section after a predetermined time, the switching element of the inrush current preventing section is turned on to short-circuit the current suppressing resistor after a predetermined time. A rush current suppressing circuit provided with a sequence control unit for controlling timing as described above. 2. The switching control section of the power factor correction section divides a time constant circuit for starting charging of a capacitor in response to a start signal from the sequence control section, and a sum of a current detection voltage and a reference voltage. A voltage dividing circuit for controlling the ON / OFF ratio of the switching transistor so as to start operation by the start signal and to input a divided voltage of the voltage dividing circuit so that the current does not exceed a set current; A control processing unit that performs the control so as to increase the voltage division ratio by the start signal delayed according to the time constant of the time constant circuit from a state in which the voltage division ratio of the voltage division circuit is reduced so as to reduce the set current. 2. The rush current suppressing circuit according to claim 1, further comprising: a switching element for switching the set current so as to increase the set current. 3. The switching control section of the power factor improving section starts operation by a voltage dividing circuit for dividing a sum of a detected voltage of a current and a reference voltage, and the start signal from the sequence control section, and A control processing unit for inputting a divided voltage of the voltage dividing circuit and controlling an ON / OFF ratio of the switching transistor so that the current does not exceed a set current; and reducing the set current. After a delay time based on the parasitic capacitance when the start signal is input to the gate from a state where the voltage dividing ratio of the voltage dividing circuit is reduced,
2. The rush current suppressing circuit according to claim 1, further comprising: a field effect transistor that switches the voltage division ratio so as to increase the set current.