JP2005286187A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2005286187A JP2005286187A JP2004099801A JP2004099801A JP2005286187A JP 2005286187 A JP2005286187 A JP 2005286187A JP 2004099801 A JP2004099801 A JP 2004099801A JP 2004099801 A JP2004099801 A JP 2004099801A JP 2005286187 A JP2005286187 A JP 2005286187A
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/732—Location after the connecting process
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- H01L2924/11—Device type
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- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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Abstract
【解決手段】 IGBT素子10と、IGBT素子10の一面側に設けられ電極と放熱体とを兼ねる下側ヒートシンク20と、IGBT素子10の他面側に設けられ電極と放熱体とを兼ねる上側ヒートシンク30と、IGBT素子10および両ヒートシンク20、30を包み込むように封止するモールド樹脂80とを備える半導体装置S1において、IGBT素子10は2個隣り合うように設けられている。
【選択図】 図1
Description
図1は本発明の第1実施形態に係る半導体装置S1の概略構成を示す図であって、モールド樹脂80内の各部の平面的な配置を示す図、図2は図1の概略断面構成を示す図である。また、図3は、図1中の半導体素子としてのゲート酸化膜デバイス10をその主表面側から見たときの構成を模式的に示す平面図である。
図4は本発明の第2実施形態に係る半導体装置S2の概略構成を示す図であって、モールド樹脂80内の各部の平面的な配置を示す図である。上記実施形態との相違点を中心に述べる。
図5は本発明の第3実施形態に係る半導体装置S3の概略構成を示す図であって、モールド樹脂80内の各部の平面的な配置を示す図である。上記実施形態との相違点を中心に述べる。
なお、本実施形態の図5に示される半導体装置S3において、さらに、2個のIGBT素子10のうちの一方のケルビンセンス用パッド10aのみ信号端子60(ケルビンセンス用端子KE)に電気的に接続し、他方のケルビンセンス用パッド10aは信号端子60に接続しないようにしてもよい。
10a…ケルビンセンス用パッド、10b…電流センス用パッド、
10c…ゲートセンス用パッド、10d、10e…温度センス用パッド、
20…第1の金属体としての下側ヒートシンク、
30…第2の金属体としての上側ヒートシンク、60…信号端子、
80…モールド樹脂。
Claims (7)
- 半導体素子(10)と、
前記半導体素子(10)の一面側に設けられ、電極と放熱体とを兼ねる第1の金属体(20)と、
前記半導体素子(10)の他面側に設けられ、電極と放熱体とを兼ねる第2の金属体(30)と、
前記半導体素子(10)、前記第1の金属体(20)および前記第2の金属体(30)を包み込むように封止するモールド樹脂(80)とを備える半導体装置において、
前記半導体素子としてゲート酸化膜デバイス(10)が用いられており、
前記ゲート酸化膜デバイス(10)は、2個以上設けられていることを特徴とする半導体装置。 - 前記ゲート酸化膜デバイスは、IGBT素子(10)であることを特徴とする請求項1に記載の半導体装置。
- 前記IGBT素子(10)は2個であり、これら2個のIGBT素子(10)は隣り合って配置されていることを特徴とする請求項2に記載の半導体装置。
- 前記2個のIGBT素子(10)は、それぞれ素子の温度検出を行うための温度センス用パッド(10d、10e)を有しており、
前記2個のIGBT素子(10)のうちのどちらか一方のみの前記温度センス用パッド(10d、10e)が、外部と電気的に接続される端子(60)に電気的に接続されていることを特徴とする請求項3に記載の半導体装置。 - 前記2個のIGBT素子(10)は、それぞれ素子の温度検出を行うための温度センス用パッド(10d、10e)および素子の電流検出を行うための電流センス用パッド(10b)を有しており、
前記2個のIGBT素子(10)のうちのどちらか一方のみの前記温度センス用パッド(10d、10e)、および前記2個のIGBT素子(10)のうちのどちらか一方のみの前記電流センス用パッド(10b)が、それぞれ、外部と電気的に接続される端子(60)に電気的に接続されていることを特徴とする請求項3に記載の半導体装置。 - 前記端子(60)に電気的に接続される前記温度センス用パッド(10d、10e)は、前記2個のIGBT素子(10)の一方のものであり、前記端子(60)に電気的に接続される前記電流センス用パッド(10b)は、前記2個のIGBT素子(10)の他方のものであることを特徴とする請求項5に記載の半導体装置。
- 前記2個のIGBT素子(10)のそれぞれに備えられているゲートセンス用パッド(10c)およびケルビンセンス用パッド(10a)は、それぞれ外部と電気的に接続するための端子(60)に、独立に電気的に接続されていることを特徴とする請求項1ないし6のいずれか1つに記載の半導体装置。
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JP2004099801A JP4356494B2 (ja) | 2004-03-30 | 2004-03-30 | 半導体装置 |
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JP2004099801A JP4356494B2 (ja) | 2004-03-30 | 2004-03-30 | 半導体装置 |
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JP2005286187A true JP2005286187A (ja) | 2005-10-13 |
JP4356494B2 JP4356494B2 (ja) | 2009-11-04 |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1949442A1 (en) * | 2005-10-19 | 2008-07-30 | Tinggi Technologies Private Limited | Fabrication of transistors |
JP2009170774A (ja) * | 2008-01-18 | 2009-07-30 | Denso Corp | 半導体モジュール |
JP2011243909A (ja) * | 2010-05-21 | 2011-12-01 | Mitsubishi Electric Corp | 半導体モジュール及び半導体モジュールを搭載した回転電機 |
US8124994B2 (en) | 2006-09-04 | 2012-02-28 | Tinggi Technologies Private Limited | Electrical current distribution in light emitting devices |
US8138600B2 (en) | 2006-07-12 | 2012-03-20 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
US8309377B2 (en) | 2004-04-07 | 2012-11-13 | Tinggi Technologies Private Limited | Fabrication of reflective layer on semiconductor light emitting devices |
US8329556B2 (en) | 2005-12-20 | 2012-12-11 | Tinggi Technologies Private Limited | Localized annealing during semiconductor device fabrication |
US8395167B2 (en) | 2006-08-16 | 2013-03-12 | Tinggi Technologies Private Limited | External light efficiency of light emitting diodes |
EP4293714A3 (en) * | 2012-09-20 | 2024-02-28 | Rohm Co., Ltd. | Power semiconductor device module |
US11967543B2 (en) | 2012-09-20 | 2024-04-23 | Rohm Co., Ltd. | Power module semiconductor device and inverter equipment, and fabrication method of the power module semiconductor device, and metallic mold |
-
2004
- 2004-03-30 JP JP2004099801A patent/JP4356494B2/ja not_active Expired - Fee Related
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8309377B2 (en) | 2004-04-07 | 2012-11-13 | Tinggi Technologies Private Limited | Fabrication of reflective layer on semiconductor light emitting devices |
EP1949442A1 (en) * | 2005-10-19 | 2008-07-30 | Tinggi Technologies Private Limited | Fabrication of transistors |
EP1949442A4 (en) * | 2005-10-19 | 2011-03-09 | Tinggi Technologies Private Ltd | MANUFACTURE OF TRANSISTORS |
US8067269B2 (en) | 2005-10-19 | 2011-11-29 | Tinggi Technologies Private Limted | Method for fabricating at least one transistor |
US8329556B2 (en) | 2005-12-20 | 2012-12-11 | Tinggi Technologies Private Limited | Localized annealing during semiconductor device fabrication |
US8138600B2 (en) | 2006-07-12 | 2012-03-20 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
US8395167B2 (en) | 2006-08-16 | 2013-03-12 | Tinggi Technologies Private Limited | External light efficiency of light emitting diodes |
US8124994B2 (en) | 2006-09-04 | 2012-02-28 | Tinggi Technologies Private Limited | Electrical current distribution in light emitting devices |
JP2009170774A (ja) * | 2008-01-18 | 2009-07-30 | Denso Corp | 半導体モジュール |
JP2011243909A (ja) * | 2010-05-21 | 2011-12-01 | Mitsubishi Electric Corp | 半導体モジュール及び半導体モジュールを搭載した回転電機 |
EP4293714A3 (en) * | 2012-09-20 | 2024-02-28 | Rohm Co., Ltd. | Power semiconductor device module |
US11967543B2 (en) | 2012-09-20 | 2024-04-23 | Rohm Co., Ltd. | Power module semiconductor device and inverter equipment, and fabrication method of the power module semiconductor device, and metallic mold |
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