JP2005284271A5 - - Google Patents
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- JP2005284271A5 JP2005284271A5 JP2005057204A JP2005057204A JP2005284271A5 JP 2005284271 A5 JP2005284271 A5 JP 2005284271A5 JP 2005057204 A JP2005057204 A JP 2005057204A JP 2005057204 A JP2005057204 A JP 2005057204A JP 2005284271 A5 JP2005284271 A5 JP 2005284271A5
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Claims (19)
第１の電源電圧を基準に前記コモン電圧の振幅電圧を出力する第１の演算増幅器と、
前記第１の電源電圧を基準に前記コモン電圧の高電位側電圧を出力する第２の演算増幅器と、
一端に第１の電圧が供給されるバックアップコンデンサの他端に、前記高電位側電圧を基準に前記振幅電圧だけ低電位の前記コモン電圧の低電位側電圧をチャージポンプ動作により生成して供給する低電位側電圧生成回路とを含み、
前記高電位側電圧又は前記低電位側電圧を、前記コモン電極に供給することを特徴とするコモン電圧生成回路。 A common voltage generation circuit for generating a common voltage applied to a common electrode opposed to a pixel electrode specified by a scanning line and a data line of an electro-optical device across an electro-optical material,
A first operational amplifier that outputs an amplitude voltage of the common voltage with reference to a first power supply voltage;
A second operational amplifier that outputs a high-potential-side voltage of the common voltage with reference to the first power supply voltage;
A low-potential-side voltage of the common voltage that is lower by the amplitude voltage than the high-potential-side voltage is generated and supplied to the other end of the backup capacitor to which the first voltage is supplied at one end by a charge pump operation. Including a low potential side voltage generation circuit,
A common voltage generation circuit, wherein the high potential side voltage or the low potential side voltage is supplied to the common electrode.
前記低電位側電圧生成回路が、
直列に接続された第１及び第２のスイッチ素子と、
直列に接続された第３及び第４のスイッチ素子とを含み、
前記第１のスイッチ素子の一端に、前記振幅電圧が供給され、
前記第２のスイッチ素子の一端に、前記高電位側電圧が供給され、
前記第３のスイッチ素子の一端に、前記第１の電源電圧が供給され、
バックアップコンデンサの一端に、前記第１の電源電圧が供給され、
第１の期間では、前記第１のスイッチ素子がオン、前記第２のスイッチ素子がオフとなってフライングコンデンサの一端に前記振幅電圧を供給すると共に、前記第３のスイッチ素子がオン、前記第４のスイッチ素子がオフし、
前記第１の期間に続く第２の期間では、前記第１のスイッチ素子がオフ、前記第２のスイッチ素子がオンとなって前記フライングコンデンサの一端に前記高電位側電圧を供給すると共に、前記第３のスイッチ素子がオフ、前記第４のスイッチ素子がオンとなって前記バックアップコンデンサの他端に、前記フライングコンデンサの他端の電圧を供給することを特徴とするコモン電圧生成回路。 In claim 1,
The low potential side voltage generating circuit is
First and second switch elements connected in series;
And third and fourth switch elements connected in series,
The amplitude voltage is supplied to one end of the first switch element,
The high potential side voltage is supplied to one end of the second switch element,
The first power supply voltage is supplied to one end of the third switch element,
The first power supply voltage is supplied to one end of the backup capacitor,
In the first period, the first switch element is turned on, the second switch element is turned off, and the amplitude voltage is supplied to one end of the flying capacitor, and the third switch element is turned on. 4 switch element is turned off,
In a second period following the first period, the first switch element is turned off and the second switch element is turned on to supply the high potential side voltage to one end of the flying capacitor, and 3. A common voltage generating circuit, wherein the third switch element is turned off and the fourth switch element is turned on to supply the voltage of the other end of the flying capacitor to the other end of the backup capacitor.
前記第１及び第２のスイッチ素子はＭＯＳトランジスタであり、前記第１及び第２のスイッチ素子を構成するＭＯＳトランジスタのゲート電圧の振幅が、前記振幅電圧と前記高電位側電圧との間の電圧差より大きく、
前記第３及び第４のスイッチ素子はＭＯＳトランジスタであり、前記第３及び第４のスイッチ素子を構成するＭＯＳトランジスタのゲート電圧の振幅が、前記第１の電源電圧と前記低電位側電圧との間の電圧差より大きいことを特徴とするコモン電圧生成回路。 In claim 2,
The first and second switch elements are MOS transistors, and the amplitude of the gate voltage of the MOS transistors constituting the first and second switch elements is a voltage between the amplitude voltage and the high potential side voltage. Greater than the difference,
The third and fourth switch elements are MOS transistors, and the amplitude of the gate voltage of the MOS transistors constituting the third and fourth switch elements is the difference between the first power supply voltage and the low potential side voltage. A common voltage generation circuit characterized by being larger than the voltage difference between them.
前記第１〜第４のスイッチ素子を構成するＭＯＳトランジスタのゲート電圧の振幅が、
前記走査線に印加される走査電圧の振幅と同じであることを特徴とするコモン電圧生成回路。 In claim 3,
The amplitude of the gate voltage of the MOS transistors constituting the first to fourth switch elements is
A common voltage generating circuit having the same amplitude as that of a scanning voltage applied to the scanning line.
前記第２の演算増幅器が、
ボルテージフォロワ接続された演算増幅器であり、ｎチャネル型駆動トランジスタによりその出力が駆動され、
前記振幅電圧が、前記高電位側電圧より高い電位であることを特徴とするコモン電圧生成回路。 In any one of Claims 1 thru | or 4,
The second operational amplifier comprises:
An operational amplifier connected to a voltage follower, the output of which is driven by an n-channel type drive transistor,
The common voltage generation circuit, wherein the amplitude voltage is higher than the high potential side voltage.
前記第２の演算増幅器が、
第２の差動部と第２の駆動部とを含み、ボルテージフォロワ接続することにより形成され、
前記第２の駆動部が、
一端が第２の電源電圧側に接続され他端が前記第２の演算増幅器の出力側に接続された電流源と、
一端が前記第１の電源電圧側に接続され他端が前記第２の演算増幅器の出力側に接続されたｎチャネル型駆動トランジスタとを含むことを特徴とするコモン電圧生成回路。 In claim 5,
The second operational amplifier comprises:
A second differential unit and a second drive unit, and formed by voltage follower connection;
The second driving unit is
A current source having one end connected to the second power supply voltage side and the other end connected to the output side of the second operational amplifier;
A common voltage generating circuit comprising: an n-channel driving transistor having one end connected to the first power supply voltage side and the other end connected to the output side of the second operational amplifier.
前記第１の演算増幅器が、
ボルテージフォロワ接続された演算増幅器であり、ｐチャネル型駆動トランジスタによりその出力が駆動されることを特徴とするコモン電圧生成回路。 In any one of Claims 1 thru | or 5,
The first operational amplifier comprises:
A common voltage generating circuit, which is an operational amplifier connected in a voltage follower, the output of which is driven by a p-channel driving transistor.
前記第１の演算増幅器が、
第１の差動部と第１の駆動部とを含み、ボルテージフォロワ接続することにより形成され、
前記第１の駆動部が、
一端が第２の電源電圧側に接続され他端が前記第１の演算増幅器の出力側に接続されたｐチャネル型駆動トランジスタと、
一端が前記第１の電源電圧側に接続され他端が前記第１の演算増幅器の出力側に接続された電流源とを含むことを特徴とするコモン電圧生成回路。 In claim 7,
The first operational amplifier comprises:
Including a first differential section and a first drive section, and formed by voltage follower connection;
The first drive unit is
A p-channel type drive transistor having one end connected to the second power supply voltage side and the other end connected to the output side of the first operational amplifier;
And a current source having one end connected to the first power supply voltage side and the other end connected to the output side of the first operational amplifier.
前記第１の演算増幅器が、
ボルテージフォロワ接続された演算増幅器であり、ｐチャネル型駆動トランジスタによりその出力が駆動されることを特徴とするコモン電圧生成回路。 In claim 6,
The first operational amplifier comprises:
A common voltage generating circuit, which is an operational amplifier connected in a voltage follower, the output of which is driven by a p-channel driving transistor.
前記第１の演算増幅器が、
第１の差動部と第１の駆動部とを含み、ボルテージフォロワ接続することにより形成され、
前記第１の駆動部が、
一端が前記第２の電源電圧側に接続され他端が前記第１の演算増幅器の出力側に接続されたｐチャネル型駆動トランジスタと、
一端が前記第１の電源電圧側に接続され他端が前記第１の演算増幅器の出力側に接続された電流源とを含むことを特徴とするコモン電圧生成回路。 In claim 9,
The first operational amplifier comprises:
Including a first differential section and a first drive section, and formed by voltage follower connection;
The first drive unit is
A p-channel driving transistor having one end connected to the second power supply voltage side and the other end connected to the output side of the first operational amplifier;
And a current source having one end connected to the first power supply voltage side and the other end connected to the output side of the first operational amplifier.
一端に前記高電位側電圧が供給される第１の出力トランジスタと、
一端に前記低電位側電圧が供給される第２の出力トランジスタとを含み、
前記第１の出力トランジスタの他端と前記第２の出力トランジスタの他端とが接続され、
前記第１及び第２の出力トランジスタのゲート電圧の振幅が、それぞれ前記高電位側電圧と前記低電位側電圧との間の電圧差より大きいことを特徴とするコモン電圧生成回路。 In any one of Claims 1 thru | or 10.
A first output transistor having one end supplied with the high potential side voltage;
A second output transistor to which the low potential side voltage is supplied at one end;
The other end of the first output transistor and the other end of the second output transistor are connected;
A common voltage generation circuit, wherein the amplitude of the gate voltage of each of the first and second output transistors is larger than a voltage difference between the high potential side voltage and the low potential side voltage.
前記第１及び第２の出力トランジスタのゲート電圧の振幅が、
前記走査線に印加される走査電圧の振幅と同じであることを特徴とするコモン電圧生成回路。 In claim 11,
The amplitude of the gate voltage of the first and second output transistors is
A common voltage generating circuit having the same amplitude as that of a scanning voltage applied to the scanning line.
前記高電位側電圧を前記コモン電極に供給する期間及び前記低電位側電圧を前記コモン電極に供給する期間のうち、前記低電位側電圧を前記コモン電極に供給する期間において前記チャージポンプ動作を行うためのチャージクロックの周波数を設定するためのチャージクロック設定レジスタを含み、
前記高電位側電圧を前記コモン電極に供給する期間では、前記チャージクロック設定レジスタの設定値にかかわらず、所定の周波数のチャージクロックに基づいてチャージポンプ動作を行い、
前記低電位側電圧を前記コモン電極に供給する期間では、前記チャージクロック設定レジスタの設定値に対応した周波数のチャージクロックに基づいて前記チャージポンプ動作を行うことを特徴とするコモン電圧生成回路。 In any one of Claims 1 to 12,
The charge pump operation is performed in a period in which the low potential side voltage is supplied to the common electrode among a period in which the high potential side voltage is supplied to the common electrode and a period in which the low potential side voltage is supplied to the common electrode. A charge clock setting register for setting the frequency of the charge clock for
In the period of supplying the high potential side voltage to the common electrode, regardless of the setting value of the charge clock setting register, a charge pump operation is performed based on a charge clock of a predetermined frequency,
The common voltage generation circuit, wherein the charge pump operation is performed based on a charge clock having a frequency corresponding to a set value of the charge clock setting register during a period in which the low potential side voltage is supplied to the common electrode.
請求項１乃至１３のいずれか記載のコモン電圧生成回路と、
前記走査線の走査電圧を生成すると共に、前記走査電圧の高電位側電圧及び低電位側電圧を前記コモン電圧生成回路に供給する走査電圧生成回路とを含むことを特徴とする電源回路。 A power supply circuit for supplying power to an electro-optical device including a plurality of scanning lines and a plurality of data lines,
A common voltage generation circuit according to any one of claims 1 to 13,
And a scanning voltage generation circuit that generates a scanning voltage of the scanning line and supplies a high-potential-side voltage and a low-potential-side voltage of the scanning voltage to the common voltage generation circuit.
請求項１５記載の電源回路と、
前記走査電圧を用いて、前記走査線を駆動する走査線駆動回路を含むことを特徴とする表示ドライバ。 A display driver for driving an electro-optical device including a plurality of scanning lines and a plurality of data lines,
A power supply circuit according to claim 15,
A display driver, comprising: a scanning line driving circuit for driving the scanning line using the scanning voltage.
表示データに基づいて、前記データ線を駆動するデータ線駆動回路を含むことを特徴とする表示ドライバ。 In claim 16,
A display driver comprising: a data line driving circuit for driving the data line based on display data.
請求項１４記載の電源回路と、
表示データに基づいて、前記データ線を駆動するデータ線駆動回路を含むことを特徴とする表示ドライバ。 A display driver for driving an electro-optical device including a plurality of scanning lines and a plurality of data lines,
A power supply circuit according to claim 14,
A display driver comprising: a data line driving circuit for driving the data line based on display data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005057204A JP4543964B2 (en) | 2004-03-04 | 2005-03-02 | Common voltage generation circuit, power supply circuit, display driver, and display device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004060793 | 2004-03-04 | ||
| JP2005057204A JP4543964B2 (en) | 2004-03-04 | 2005-03-02 | Common voltage generation circuit, power supply circuit, display driver, and display device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007069929A Division JP4858250B2 (en) | 2004-03-04 | 2007-03-19 | Common voltage generation circuit, power supply circuit, display driver, and common voltage generation method |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005284271A JP2005284271A (en) | 2005-10-13 |
| JP2005284271A5 true JP2005284271A5 (en) | 2007-05-10 |
| JP4543964B2 JP4543964B2 (en) | 2010-09-15 |
Family
ID=35182651
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005057204A Expired - Fee Related JP4543964B2 (en) | 2004-03-04 | 2005-03-02 | Common voltage generation circuit, power supply circuit, display driver, and display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4543964B2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4901252B2 (en) * | 2006-03-20 | 2012-03-21 | ローム株式会社 | Negative boost charge pump circuit, LCD driver IC, liquid crystal display device |
| JP4881070B2 (en) * | 2006-05-29 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | Driving circuit for active matrix liquid crystal display device |
| JP5332156B2 (en) * | 2006-10-10 | 2013-11-06 | セイコーエプソン株式会社 | Power supply circuit, driving circuit, electro-optical device, electronic apparatus, and counter electrode driving method |
| JP5353123B2 (en) * | 2007-08-29 | 2013-11-27 | カシオ計算機株式会社 | Display device |
| JP5448477B2 (en) * | 2009-02-04 | 2014-03-19 | ルネサスエレクトロニクス株式会社 | Booster circuit, display device using the booster circuit, boosting method using the booster circuit, and method of supplying power to the display device using the booster method |
| JP5212304B2 (en) * | 2009-08-03 | 2013-06-19 | カシオ計算機株式会社 | Liquid crystal display device and driving method thereof |
| US8775842B2 (en) | 2009-09-16 | 2014-07-08 | Sharp Kabushiki Kaisha | Memory device, display device equipped with memory device, drive method for memory device, and drive method for display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3029940B2 (en) * | 1993-02-09 | 2000-04-10 | シャープ株式会社 | Display device gradation voltage generator and signal line drive circuit |
| JP4701475B2 (en) * | 1999-06-01 | 2011-06-15 | セイコーエプソン株式会社 | Electro-optical device power supply circuit, electro-optical device drive circuit, electro-optical device drive method, electro-optical device, and electronic apparatus |
| JP3791355B2 (en) * | 2001-06-04 | 2006-06-28 | セイコーエプソン株式会社 | Driving circuit and driving method |
| JP3948224B2 (en) * | 2001-06-07 | 2007-07-25 | 株式会社日立製作所 | Display device |
| JP3854905B2 (en) * | 2002-07-30 | 2006-12-06 | 株式会社 日立ディスプレイズ | Liquid crystal display |
-
2005
- 2005-03-02 JP JP2005057204A patent/JP4543964B2/en not_active Expired - Fee Related
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