JP5212304B2 - Liquid crystal display device and driving method thereof - Google Patents

Description

  The present invention relates to a liquid crystal display device having a brightness adjustment function and a driving method thereof.

  In general, a liquid crystal display device has a display panel in which display pixels each having a liquid crystal layer sandwiched between a pixel electrode and a common electrode are arranged two-dimensionally. Display is performed by applying a voltage to each of the electrodes. Since the liquid crystal that constitutes the liquid crystal layer has the characteristic of changing the light transmittance depending on the magnitude of the applied voltage, the voltage applied to the common electrode is kept constant, and the gradation of the image to be displayed By applying a display signal voltage having a magnitude corresponding to the image data indicating the level information to the pixel electrode, it is possible to display an image at a desired gradation level.

  Here, the liquid crystal constituting the liquid crystal layer has a property that the characteristics deteriorate when a DC voltage is applied for a long time. Therefore, it is necessary to change the polarity of the voltage applied to the liquid crystal layer in an alternating manner in order to extend the life of the liquid crystal. There are various methods for this purpose. The polarity of the voltage applied to the liquid crystal layer (the magnitude relationship between the pixel electrode voltage generated at the pixel electrode based on the display signal voltage and the common voltage applied to the common electrode). Frame inversion driving for inverting the corresponding) in units of frames, line inversion driving for inverting the polarity of the voltage applied to the liquid crystal layer in units of rows of the display panel, and the like are well known. The polarity of the voltage applied to the liquid crystal layer can also be changed by changing only the potential level of the display signal voltage. However, when only the potential level of the display signal voltage is changed, a high voltage is required to generate the display signal voltage. For this reason, in recent years, the potential level of the common voltage as well as the potential level of the display signal voltage has been reversed in units of frames or lines.

  By the way, some recent liquid crystal display devices have a brightness adjustment function. This brightness adjustment function can be realized by changing the magnitude of the common voltage without changing the center potential of the common voltage. As a technique for realizing such a brightness adjustment function, for example, the technique of Patent Document 1 has been proposed. The technique disclosed in Patent Document 1 is obtained by amplifying a polarity inversion signal for controlling polarity inversion between a display signal voltage (video signal) and a common voltage (counter electrode signal) according to the setting of the brightness adjustment unit. A common voltage is generated according to the setting of the adjustment unit. In the technique disclosed in Patent Document 1, the peak-peak amplitude of the common voltage can be changed while the DC level of the display signal voltage is fixed, thereby enabling brightness adjustment.

JP 2001-265300 A

  The technique of Patent Document 1 is based on a coupling method in which a signal having a characteristic that a potential level periodically inverts around a predetermined potential is appropriately amplified to generate a common voltage. Here, as a method for generating the common voltage, in addition to the coupling method, a method for directly generating a high level common voltage and a low level common voltage is known. In the case of such a system that directly generates the high-level side common voltage and the low-level side common voltage, it is difficult to realize the brightness adjustment function by applying the technique of Patent Document 1. In the case of a method of directly generating a common voltage on the high level side and a common voltage on the low level side, if both of the signals are amplified by applying the technique of Patent Document 1, the brightness before and after the brightness adjustment is obtained. This is because the center potential of the common voltage changes after the adjustment.

  The present invention has been made in view of the above circumstances, and in a liquid crystal display device that directly generates a high-level common voltage and a low-level common voltage and performs polarity inversion, the liquid crystal capable of adjusting the brightness. It is an object of the present invention to provide a display device and such a driving method.

  In order to achieve the above object, a liquid crystal display device according to a first aspect of the present invention is a liquid crystal display device having a display unit in which a plurality of display pixels arranged two-dimensionally are arranged, and for a predetermined period. Display signal voltage applying means for generating a display signal voltage whose polarity is inverted every time and applying it to the pixel electrode of each display pixel; a first common voltage having a first potential level; and the first potential level. Generates a second common voltage having a different second potential level, and applies either the first common voltage or the second common voltage to the common electrode of each display pixel every predetermined period. Common voltage application means, and brightness adjustment means for adjusting the brightness of the display unit, the common voltage application means according to the brightness adjusted by the brightness adjustment means, The first common voltage and the first common voltage Amplitude setting means for setting an amplitude value corresponding to the sum of absolute values with the common voltage, and the first half of the increase / decrease value of the amplitude value determined according to the amplitude value set in the amplitude setting means. First common voltage generating means for generating the first common voltage by increasing or decreasing a third common voltage having a third potential level different from the first potential level; and the first potential level is the second potential level. When the potential level is higher than the first common voltage, the second common voltage is generated by subtracting a voltage corresponding to the amplitude value set in the amplitude setting means from the first common voltage, and the first potential is generated. When the level is lower than the second potential level, the second common voltage is generated by adding a voltage corresponding to the amplitude value set in the amplitude setting means to the first common voltage. 2 common voltage generating means To.

  In order to achieve the above object, a method for driving a liquid crystal display device according to the second aspect of the present invention is a liquid crystal display device having a display unit in which a plurality of display pixels arranged in a two-dimensional manner are arranged. According to a driving method, a first common voltage having a first potential level and a second common voltage having a second potential level different from the first potential level according to the brightness of the display unit, An amplitude value corresponding to the sum of absolute values of the first potential level is set, and a third potential level having a third potential level different from the first potential level by a half value of the increase / decrease value of the amplitude value determined according to the amplitude value is set. The first common voltage is generated by increasing / decreasing the common voltage, and when the first potential level is higher than the second potential level, the voltage corresponding to the amplitude value from the first common voltage To generate the second common voltage by subtracting When the first potential level is lower than the second potential level, the second common voltage is generated by adding a voltage corresponding to the amplitude value to the first common voltage, and is generated every predetermined period. In addition, any one of the first common voltage and the second common voltage is applied to a common electrode of each display pixel of the display unit.

  According to the present invention, it is possible to adjust brightness in a liquid crystal display device that directly generates a high-level side common voltage and a low-level side common voltage and performs polarity inversion.

It is a figure which shows the external appearance of the mobile telephone as an example of the electronic device provided with the liquid crystal display device which concerns on one Embodiment of this invention. It is a figure which shows the structure of the liquid crystal display device which concerns on one Embodiment of this invention. 6 is a timing chart showing the operation of the scan driver. It is a figure shown about the structure of a signal driver. It is a figure which shows the structure of a VCOM production | generation part. The figure which showed an example of the calculation performed by the VCOM amplitude adjustment data set to the VCOM amplitude register, the VCOMH data set to the VCOMH register, the calculation performed by the calculation circuit, and the calculation performed by the subtraction circuit in one embodiment of the present invention It is. When VREF = 5 [V], VCOM amplitude adjustment data set in the VCOM amplitude register, VCOMH data set in the VCOMH register, calculation performed in the calculation circuit, calculation performed in the subtraction circuit, VCOM It is the figure which showed central potential VCOM / c collectively. It is a figure for demonstrating the outline | summary of brightness adjustment.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating an external appearance of a mobile phone as an example of an electronic apparatus including a liquid crystal display device according to an embodiment of the present invention. A cellular phone 10 shown in FIG. 1 includes a microphone 11, an antenna 12, a speaker 13, a liquid crystal display device 14, and an operation unit 15. The basic configuration of the mobile phone 10 is well known in the art and is different from the essence of the present embodiment, and will be briefly described below.

  The microphone 11 converts sound input by the user of the mobile phone 10 into an electrical signal. The antenna 12 is an antenna for the mobile phone 10 to communicate with a base station (not shown). The speaker 13 converts an audio signal received by the antenna 12 from another mobile phone or the like via a base station into sound and outputs the sound. The liquid crystal display device 14 displays various images. The operation unit 15 is an operation unit for a user of the mobile phone 10 to operate the mobile phone 10.

  FIG. 2 is a diagram showing a configuration of the liquid crystal display device 14 according to an embodiment of the present invention. As shown in FIG. 2, the liquid crystal display device 14 includes a display panel 100, a scan driver 200, a signal driver 300, a control unit 400, and a power supply adjustment circuit 500. Here, the liquid crystal display device 14 according to the present embodiment can adjust the brightness of the display panel 100.

  The display panel 100 is a display unit that displays an image based on the image data D supplied from the outside of the liquid crystal display device 14. The display panel 100 is configured by sandwiching a liquid crystal layer LC between a pixel side substrate 101 and a counter side substrate 102.

  The pixel-side substrate 101 and the counter-side substrate 102 are bonded to each other with a sealant 103, and the liquid crystal constituting the liquid crystal layer LC is not leaked from between the pixel-side substrate 101 and the counter-side substrate 102 by the sealant 103. It is sealed. The pixel-side substrate 101 is a substrate such as a glass substrate, and includes a plurality of scanning lines G (j) (j = 1, 2,..., N) and a plurality of signal lines S (i) (i = 1, 2, ..., m) are extended and arranged so as to intersect each other. Further, a display pixel Pix is disposed at a position corresponding to each intersection of the scanning line G (j) and the signal line S (i), and the display pixel Pix includes the scanning line G (j) and the signal line S (i). Each of which is electrically connected. Therefore, i display pixels Pix are connected to each scanning line, and j display pixels Pix are connected to each signal line. In FIG. 2, only one display pixel is illustrated.

  Here, the pixel-side substrate 101 is made of, for example, a glass substrate. The pixel-side substrate 101 is formed with a pixel electrode made of a transparent conductive film such as an ITO (indium tin oxide) film corresponding to each of the plurality of display pixels Pix for forming a display pixel. . The pixel electrode is connected to a thin film transistor (TFT) as a switching element. Further, the TFT is also connected to the scanning line G (j) and the signal line S (i).

  On the other hand, the opposite substrate 102 is a transparent substrate such as a glass substrate. A lattice-shaped light shielding film is formed on the surface of the counter substrate 102 facing the pixel substrate 101. The light shielding film is formed so that the opening thereof is located at a position corresponding to the pixel electrode, whereby the light shielding film functions as a black matrix. A color filter corresponding to a predetermined color component (for example, red (R), green (G), blue (B)) is provided for each display pixel Pix in the opening formed by the light shielding film. Yes. Further, a common electrode is formed on the color filter. The potential of the common electrode is a common potential in each display pixel Pix.

  The scan driver 200 includes a shift register and the like, and sequentially applies scan signals to the scan lines G (j) of the display panel 100. The scan driver 200 receives the vertical synchronization signal Vs and the first gate clock signal GCK1 and the second gate clock signal GCK2 as the horizontal synchronization signal Hs from the control unit 400. As shown in FIG. 3, the scan driver 200 starts applying scan signals to n scan lines each time a vertical synchronization signal Vs is input. At this time, every time the scanning driver 200 receives the horizontal control signal Hs from the control unit 400, the scanning driver 200 switches the scanning signal for turning on the TFTs for one row from the gate-off level Vgl to the gate-on level Vgh. The first gate clock signal GCK1 and the second gate clock signal GCK2 are rectangular signals having opposite phases.

  As shown in FIG. 3, the vertical control signal Vs is applied every frame, which is a period for displaying one screen of the display panel 100. Further, the horizontal control signal Hs is applied every horizontal period, which is a period for writing display signal voltages (gradation signals) for one row (one scanning line) of the display panel 100. In synchronization with the horizontal control signal Hs, the scanning driver 200 sequentially sets the potential to the gate-on level Vgh from the scanning line G (1). When the potential of the scanning line G (j) becomes the gate-on level Vgh, the TFT connected to the scanning line G (j) is turned on. At this time, the display signal voltage applied to the signal line S (i) through the TFT that is turned on is applied to the pixel electrode of the corresponding display pixel Pix.

  The signal driver 300 having a function as a display signal voltage applying unit applies a display signal voltage to the signal line S (i) of the display panel 100. As shown in FIG. 4, the signal driver 300 includes a sampling memory 301, a data latch unit 302, a D / A conversion circuit (DAC) 303, and a display signal voltage generation circuit 304.

  The sampling memory 301 receives the horizontal synchronization signal Hs output from the control unit 400, and sets the image data D corresponding to i display pixels Pix corresponding to one horizontal period to 1 in synchronization with the reference clock signal CLK. Store sequentially for each pixel. Therefore, the sampling memory 301 has the same number of data storage areas as the number of signal lines S (i). Here, the image data D is gradation level information to be displayed in each display pixel, and is represented as, for example, 8-bit digital data.

  The data latch unit 302 receives the horizontal synchronization signal Hs and simultaneously fetches the image data D for one horizontal period stored in each storage area of the sampling memory 301, and inputs the fetched image data to the D / A conversion circuit 303. Output.

  The D / A conversion circuit 303 decodes the image data D output from the data latch unit 302, and a display signal voltage corresponding to the gradation level information indicated as a result of the decoding is supplied from the display signal voltage generation circuit 304. A display signal voltage is selected and output to the corresponding signal line S (i). The D / A conversion circuit 303 includes a plurality of DAC units 3031 and an output amplifier unit 3032. The DAC unit 3031 selects the display signal voltage supplied from the display signal voltage generation circuit 304 according to the decoding result of the image data D. The output amplifier unit 3032 amplifies the display signal voltage selected by the corresponding DAC unit 3031 and outputs it to the corresponding signal line S (i). The display signal voltage output to the signal line S (i) is applied to the pixel electrode through the TFT turned on by the scan driver 200. As a result, a difference voltage between the pixel electrode voltage generated at the pixel electrode and the common voltage by applying the display signal voltage is applied to the liquid crystal layer LC, and an image is displayed on the corresponding display pixel.

  The display signal voltage generation circuit 304 generates a display signal voltage corresponding to a gradation level that the image data D can take (for example, 256 gradations when D is represented as 8-bit digital data), for example, a predetermined power supply. The voltage is generated by a resistance division method in which a voltage is divided by a plurality of resistors corresponding to the number of gradation levels. Here, the liquid crystal constituting the liquid crystal layer LC has a property that the characteristics deteriorate when a DC voltage is applied for a long time. Therefore, the polarity of the voltage applied to the liquid crystal layer LC (the magnitude relationship between the pixel electrode voltage and the common voltage) needs to be changed in an alternating manner in order to extend the lifetime of the liquid crystal. As a technique for this purpose, for example, frame inversion driving is used in the present embodiment. The frame inversion driving is a driving method in which the polarity of the voltage applied to the liquid crystal layer LC is changed in units of frames. In order to perform such frame inversion driving, the display signal voltage generation circuit 304 displays the display signal voltage and the pixel electrode corresponding to the positive polarity that is the polarity when the pixel electrode voltage is higher than the common voltage for each gradation level. The display signal voltage corresponding to the negative polarity, which is the polarity when the voltage is lower than the common voltage, can be generated. The display signal voltage generation circuit 304 uses either the positive polarity display signal voltage or the negative polarity display signal voltage as a pixel electrode in accordance with the polarity inversion control signal Pol supplied from the control unit 400 in units of frames. Apply. For example, in this embodiment, when the polarity inversion control signal Pol is at a high level, the display signal voltage on the positive polarity side is applied to the pixel electrode, and when the polarity inversion control signal Pol is at a low level, the display signal voltage on the negative polarity side. Is applied to the pixel electrode.

  The control unit 400 controls the scanning driver 200 and the signal driver 300 so that a desired image is displayed on the display panel 100. That is, the control unit 400 generates and outputs various control signals such as a vertical synchronization signal Vs, a horizontal synchronization signal Hs, a polarity inversion control signal Pol, and a reference clock signal CLK that are synchronized with the output timing of the image data D. The control unit 400 also has a function as brightness adjustment means. That is, the control unit 400 also outputs a brightness adjustment signal according to the brightness of the display panel 100 and the brightness of the display panel 100 adjusted by the user's operation of the operation unit 15 to the power supply adjustment circuit 500.

  The power supply adjustment circuit 500 having a function as a common voltage application unit generates a voltage necessary for the operation of each block in FIG. 2 from a predetermined power supply, and supplies the generated voltage to the corresponding block. Here, the power supply adjustment circuit 500 according to the present embodiment includes at least a VCOM generation unit 501 that generates common voltages VCOMH and VCOML, and generates a gate-off level Vgl and a gate-on level Vgh of a scanning signal, and a display signal voltage. A circuit for generating a power supply voltage for performing the operation.

  FIG. 5 is a diagram illustrating a configuration of the VCOM generation unit 501. The VCOM generation unit 501 in the present embodiment has a circuit configuration that can directly generate a high-level side common voltage VCOMH and a low-level side common voltage VCOML. In general, in the case of a VCOM generation unit having a circuit configuration capable of directly generating a high-level side common voltage VCOMH and a low-level side common voltage VCOML, either the high-level side common voltage VCOMH or the low-level side common voltage VCOML The circuit configuration for generating one of them and determining the common voltage on the other side from the amplitude of the desired common voltage is the simplest. Therefore, the VCOM generation unit 501 in the present embodiment also adopts a circuit configuration according to this simple circuit configuration.

  5 includes an optimal VCOMH memory 5011, a VCOMH register 5012, a VCOM amplitude register 5013, an arithmetic circuit 5014, a VCOM generation ladder resistor 5015, a multiplexer 5016, an amplifier circuit 5017, and a multiplexer. 5018, a subtraction circuit 5019, and a polarity changeover switch 5020.

  The optimum VCOMH memory 5011 is composed of, for example, a nonvolatile memory. Generally, in a liquid crystal display device, it is known that the optimum value of the common voltage differs for each liquid crystal display device due to manufacturing variations of the display panel 100. The optimum VCOMH memory 5011 is a memory for storing an optimum DC level value of a different common voltage for each liquid crystal display device. The optimum VCOMH memory 5011 in the present embodiment stores, for example, the optimum DC level of the high level side common voltage VCOMH. The optimum value of the common voltage VCOMH is an optimum value based on the characteristics of the display panel 100 when the VCOM generating unit 501 is operated with a predetermined VCOM amplitude.

  The VCOMH register 5012 is a register in which VCOMH data corresponding to the optimum DC level value of the common voltage VCOMH stored in the optimum VCOMH memory 5011 is set, and the optimum value VCOMH ′ of the common voltage VCOMH from the VCOMH data set in the register And a table for calculating. The VCOM amplitude register 5013 having a function as an amplitude setting unit is a peak-to-peak amplitude of the common voltage, which is a common voltage VCOMH on the high level side and a common voltage on the low level side according to the brightness adjustment signal from the control unit 400. A register in which VCOM amplitude adjustment data corresponding to a voltage corresponding to a sum of absolute values with VCOML (hereinafter referred to as VCOM amplitude) is set, and a table for calculating an amplitude value VCOM amplitude from the VCOM adjustment data set in the register And have.

  The arithmetic circuit 5014 generates a brightness adjustment signal from the voltage value VCOMH ′ corresponding to the VCOMH data set in the VCOMH register 5012 and the voltage value VCOM amplitude corresponding to the VCOM amplitude adjustment data set in the VCOM amplitude register 5013. The voltage value of the common voltage VCOMH on the high level side according to is calculated.

For example, it is assumed that the VCOM amplitude adjustment data set in the VCOM amplitude register 5013 and the voltage value VCOM amplitude corresponding to each VCOM amplitude adjustment data correspond as shown in FIG. The example of FIG. 6A is an example in the case where the adjustment data set in the VCOM amplitude register 5013 and the voltage value VCOM amplitude have the relationship shown in the following (formula 1).
VCOM amplitude = VREF × 94.4 + VREF × (VCOM amplitude adjustment data × coefficient)%
(Formula 1)
Here, VREF × 94.4 shown in (Expression 1) is a reference value of the VCOM amplitude. In this embodiment, as an example, the voltage value of the VCOM amplitude when the optimum DC level of VCOMH is obtained is expressed as a percentage with respect to the voltage value VREF of the reference voltage source connected to the VCOM generation ladder resistor 5015. A reference value for the VCOM amplitude is defined. Further, VREF × (VCOM amplitude adjustment data × coefficient) shown in (Expression 1) corresponds to an increase / decrease value of the VCOM amplitude. As described above, the VCOM amplitude adjustment data is set according to the brightness adjustment signal, and the value of VREF × (VCOM amplitude adjustment data × coefficient) also varies according to the brightness adjustment signal.

  FIG. 6A shows an example in which the VCOM amplitude adjustment data set in the VCOM amplitude register 5013 is configured as 6-bit data, and the most significant bit indicates the increase / decrease direction of the VCOM amplitude, and the remaining 5 bits. Indicates the value. Further, in the example of FIG. 6A, the coefficient is set to 0.8. Actually, the coefficient of (Equation 1) is preferably set according to the brightness adjustment interval of the display panel 100. For example, when the coefficient is made smaller than 0.8, the brightness adjustment interval of the display panel 100 becomes finer. Conversely, by increasing the coefficient to be greater than 0.8, the brightness adjustment interval of the display panel 100 becomes coarser.

In the present embodiment, VCOMH is set so that 1/2 of the increase / decrease value of the VCOM amplitude becomes the increase / decrease value of VCOMH with respect to the increase / decrease value of the VCOM amplitude determined according to the VCOM amplitude defined as in (Equation 1). The voltage value of is calculated. In other words, the arithmetic circuit 5014 performs the calculation shown in the following (Equation 2).
VCOMH = VCOMH ′ + VREF × ((VCOM amplitude adjustment data × coefficient) / 2)%
(Formula 2)
Here, the coefficient of (Expression 2) is the same as the coefficient of (Expression 1).

  The VCOM generation ladder resistor 5015 is configured by connecting a plurality of resistors in series. Furthermore, the VCOM generation ladder resistor 5015 has one end connected to the reference voltage source VREF and the other end grounded. Such a VCOM generation ladder resistor 5015 generates the common voltage VCOMH generation voltage and the VCOM amplitude generation voltage by dividing the voltage VREF of the reference voltage source.

As described above, in this embodiment, the voltage value of VCOMH is calculated so that 1/2 of the increase / decrease value of the VCOM amplitude becomes the increase / decrease value of VCOMH. Therefore, it is necessary to make the minimum adjustment amount of VCOMH as fine as twice the VCOM amplitude. That is, the minimum adjustment amount of the VCOM amplitude needs to be 2 ^N (N is a natural number) that is the minimum adjustment amount of VCOMH. For example, if the minimum adjustment amount of the VCOM amplitude is 100 mV interval, the minimum adjustment amount of VCOMH needs to be 50 mV interval, 25 mV interval, 12.5 mV interval,. Therefore, it is necessary to determine the resistance value of the resistor constituting the VCOM generation ladder resistor 5015 so that a voltage satisfying such a relationship can be generated.

  The multiplexer 5016 selects a resistor constituting the VCOM generation ladder resistor 5015 so that an analog voltage corresponding to the voltage value of the common voltage VCOMH calculated by the arithmetic circuit 5014 is input, and thereby the VCOM generation ladder is selected. The voltage VCOMH input from the resistor 5015 is output to the amplifier circuit 5017. The amplifier circuit 5017 amplifies the voltage VCOMH input from the multiplexer 5016 with a gain of 1 and outputs the amplified signal to the subtractor circuit 5019. The arithmetic circuit 5014, the VCOM generation ladder resistor 5015, the multiplexer 5016, and the amplifier circuit 5017 in the present embodiment constitute first common voltage generation means.

  The multiplexer 5018 selects a resistor constituting the VCOM generation ladder resistor 5015 so that an analog voltage corresponding to the voltage value corresponding to the VCOM amplitude adjustment data set in the VCOM amplitude register 5013 is input. The voltage VCOM amplitude input from the VCOM generation ladder resistor 5015 is output to the subtraction circuit 5019.

  The subtracting circuit 5019 generates the low-level common voltage VCOML by subtracting the voltage VCOM amplitude input from the multiplexer 5018 from the voltage VCOMH input from the amplifier circuit 5017. That is, the subtracting circuit 5019 performs the calculation shown in the following (Equation 3).

VCOML = VCOMH−VCOM amplitude (Formula 3)
The VCOM generation ladder resistor 5015, the multiplexer 5018, and the subtraction circuit 5019 in the present embodiment constitute second common voltage generation means.

  6B shows the relationship between the VCOM amplitude adjustment data set in the VCOM amplitude register 5013, the VCOMH data set in the VCOMH register 5012, the calculation performed by the calculation circuit 5014, and the calculation performed by the subtraction circuit 5019. Is shown as an example. Here, FIG. 6B shows an example in which the VCOMH data set in the VCOMH register 5012 and the corresponding voltage value VCOMH ′ have the relationship shown by the following (formula 4).

VCOMH ′ = VREF × (49+ (VCOMH data × 0.2))% (Formula 4)
The polarity changeover switch 5020 applies either the high level side common voltage VCOMH or the low level side common voltage VCOML to the common electrode in accordance with the polarity inversion control signal Pol supplied from the control unit 400 in units of frames. For example, in this embodiment, when the polarity inversion control signal Pol is at a high level, the common voltage VCOML is applied to the common electrode, and when the polarity inversion control signal Pol is at a low level, the common voltage VCOMH is applied to the pixel electrode. To do.

  FIG. 7 shows the VCOM amplitude adjustment data set in the VCOM amplitude register, the VCOMH data set in the VCOMH register, the calculation performed by the calculation circuit 5014, and the subtraction circuit 5019 when VREF = 5 [V]. It is the figure which showed collectively the calculation performed, and the relationship of the center electric potential VCOM / c of VCOM. Note that the VCOM central potential VCOM / c = (VCOMH + VCOML) / 2. The polarity of the common voltage VCOM is inverted around the center potential VCOM / c.

  When VREF = 5 [V], the correspondence relationship between the VCOM amplitude adjustment data set in the VCOM amplitude register 5013 and the voltage value VCOM amplitude is as shown in FIG. Further, from (Equation 4), VCOMH ′ when VCOMH data set in the VCOMH register 5012 is 00h, 7Fh, and FFh is 2.45 [V] and 3.72 respectively as shown in FIG. 7B. [V] and 5.00 [V]. In FIG. 7B, the VCOM amplitude is changed in three steps for each VCOMH ′. In this embodiment, the VCOM center potential VCOM / c is all changed with respect to the VCOM amplitude changed in three steps. Will be equal.

  That is, in this embodiment, brightness adjustment is performed to increase the VCOM amplitude by 100 mV with respect to the original VCOM amplitude, for example, by generating VCOMH and VCOML according to the relationship of (Expression 1) to (Expression 3). In this case, the voltage value of VCOMH is a value increased by 50 mV from the original voltage value. On the other hand, the voltage value of VCOML is a value that is decreased by 100 mV with respect to VCOMH whose voltage value is increased by 50 mV, that is, a value that is decreased by 50 mV from the original voltage value. Therefore, while the VCOM amplitude increases by 100 mV, the center potential of the common voltage VCOM does not change.

  Thus, in this embodiment, the values of VCOMH and VCOML are calculated so that the increase amount of VCOMH and the decrease amount of VCOML are always equal to the VCOM amplitude set in accordance with the brightness adjustment amount. Correct brightness adjustment can be performed by changing only the VCOM amplitude without changing the center potential of the VCOM.

  FIG. 8 is a diagram illustrating an outline of brightness adjustment according to the present embodiment. As shown in FIG. 8, the vertical synchronization signal Vs is output from the control unit 400 at an interval of one frame, and display of one screen on the display panel 100 is started. The scanning driver 200 sequentially outputs the scanning signal G (j) in synchronization with the vertical synchronization signal Vs, and the TFTs corresponding to the corresponding scanning lines are turned on. As a result, the display signal voltage output from the signal driver 300 is written to the pixel electrode via the TFTs that are turned on. In addition, the common voltage output from the VCOM generation unit 501 is applied to a common electrode arranged to face the pixel electrode. As a result, a difference voltage between the pixel electrode voltage generated at the pixel electrode and the common voltage by applying the display signal voltage is applied to the liquid crystal layer LC, and an image is displayed on the corresponding display pixel. Here, as described above, the polarities of the display signal voltage and the common voltage are inverted for each frame in accordance with the polarity inversion control signal Pol.

  In the present embodiment, the brightness of the display panel 100 is changed by changing the amplitude of the common voltage. For example, the brightness of the display panel 100 can be made darker by applying the common voltage VCOM2 having a smaller VCOM amplitude than the common voltage VCOM1 from the state in which the common voltage VCOM1 is applied. This corresponds to, for example, the case of changing from the state of VCOM amplitude = 5.30 [V] to the state of VCOM amplitude = 4.70 [V] in the example of FIG. As shown in FIG. 7B, in this embodiment, it is possible to change only the value of the VCOM amplitude without changing the center potential VCOM / c of VCOM. In addition, it is possible to make the brightness of the display panel 100 brighter by applying the common voltage VCOM3 having a larger VCOM amplitude than the common voltage VCOM1 from the state in which the common voltage VCOM1 is applied. This corresponds to, for example, the case of changing from the state of VCOM amplitude = 5.30 [V] to the state of VCOM amplitude = 5.94 [V] in the example of FIG.

  As described above, according to this embodiment, in the liquid crystal display device that directly generates the high-level side common voltage VCOMH and the low-level side common voltage VCOL and performs polarity inversion, according to the brightness adjustment amount. Since the values of VCOMH and VCOML are calculated so that the amount of increase in VCOMH and the amount of decrease in VCOML are always equal to the set VCOM amplitude, only the VCOM amplitude is changed without changing the center potential of VCOM. Adjustments can be made.

  In addition, unlike the VCOM coupling method, a liquid crystal display device that directly generates a high-level common voltage VCOMH and a low-level common voltage VCOL and performs polarity reversal is a common due to a capacitive coupling effect during polarity reversal. Since there is no voltage fluctuation, it is possible to display images with higher image quality than the VCOM coupling method.

  Here, in the example of FIG. 5 in the above-described embodiment, first, the high-level side common voltage VCOMH is generated with respect to the VCOM amplitude set according to the brightness adjustment amount, and the VCOM amplitude is generated from the generated common voltage VCOMH. By subtracting, the common voltage VCOML on the low level side is generated. On the other hand, a low-level common voltage VCOML is first generated with respect to the VCOM amplitude set according to the brightness adjustment amount, and the VCOM amplitude is added to the generated common voltage VCOML to thereby generate a high-level common voltage. VCOMH may be generated.

  Further, in the above-described embodiment, the frame inversion driving in which the polarity of the common voltage is inverted in units of frames is illustrated, but the technique of the above-described embodiment can also be applied to the line inversion driving in which the polarity of the common voltage is inverted in units of lines. It is.

  Although the present invention has been described above based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications and applications are naturally possible within the scope of the gist of the present invention. For example, in the above-described embodiment, an example in which the liquid crystal display device 14 is provided in a mobile phone is shown. However, the technology of the above-described embodiment can be applied to various portable devices having a liquid crystal display device such as a digital camera and a PDA.

  Further, the above-described embodiments include various stages of the invention, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some configuration requirements are deleted from all the configuration requirements shown in the embodiment, the above-described problem can be solved, and this configuration requirement is deleted when the above-described effects can be obtained. The configuration can also be extracted as an invention.

  DESCRIPTION OF SYMBOLS 10 ... Mobile phone, 11 ... Microphone, 12 ... Antenna, 13 ... Speaker, 14 ... Liquid crystal display device, 15 ... Operation part, 100 ... Display panel, 200 ... Scan driver, 300 ... Signal driver, 400 ... Control part, 500 ... Power adjustment circuit, 501... VCOM generation unit, 5011... VCOMH memory, 5012... VCOMH register, 5013... VCOM amplitude register, 5014 ... Arithmetic circuit, 5015 ... VCOM generation ladder resistor, 5016. Multiplexer, 5019 ... Subtractor, 5020 ... Polarity switch

Claims (4)

A liquid crystal display device having a display unit in which a plurality of display pixels arranged two-dimensionally are arranged,
Display signal voltage application means for generating a display signal voltage whose polarity is inverted every predetermined period and applying it to the pixel electrode of each display pixel;
A first common voltage having a first potential level and a second common voltage having a second potential level different from the first potential level are generated, and the first common voltage is generated every predetermined period. And a common voltage applying means for applying either of the second common voltage to the common electrode of each display pixel;
Brightness adjustment means for adjusting the brightness of the display unit;
Comprising
The common voltage applying means includes
Amplitude setting means for setting an amplitude value corresponding to a sum of absolute values of the first common voltage and the second common voltage according to the brightness adjusted by the brightness adjustment means;
The third common voltage having a third potential level different from the first potential level is increased or decreased by a half value of the increase / decrease value of the amplitude value determined according to the amplitude value set in the amplitude setting means. First common voltage generating means for generating the first common voltage;
When the first potential level is higher than the second potential level, the second common is obtained by subtracting a voltage corresponding to the amplitude value set in the amplitude setting means from the first common voltage. When a voltage is generated and the first potential level is lower than the second potential level, a voltage corresponding to the amplitude value set in the amplitude setting means is added to the first common voltage. Second common voltage generating means for generating the second common voltage;
A liquid crystal display device comprising: The first common voltage generating means includes
The voltage value of the first common voltage is calculated by increasing / decreasing the voltage value of the third common voltage by half the value of the increase / decrease value of the amplitude value determined according to the amplitude value set in the amplitude setting means. An arithmetic circuit to
A first common voltage generation circuit comprising a plurality of resistors for generating a voltage corresponding to the voltage value of the first common voltage calculated by the calculation means;
Have
The resistance values of the plurality of resistors are determined so that the minimum adjustment amount of the amplitude setting means is 2 ^N (N is a natural number), which is the minimum amount of voltage that can be generated by the first common voltage generation circuit. The liquid crystal display device according to claim 1.   The liquid crystal display device according to claim 1, wherein the third common voltage is an optimum value of the first common voltage. A method for driving a liquid crystal display device having a display unit in which a plurality of display pixels arranged two-dimensionally are arranged,
Corresponds to the sum of absolute values of a first common voltage having a first potential level and a second common voltage having a second potential level different from the first potential level according to the brightness of the display unit Set the amplitude value
The first common voltage is increased / decreased by a third common voltage having a third potential level different from the first potential level by half of the increase / decrease value of the amplitude value determined according to the amplitude value. Produces
When the first potential level is higher than the second potential level, the second common voltage is generated by subtracting a voltage corresponding to the amplitude value from the first common voltage, and the second common voltage is generated. When the potential level of 1 is lower than the second potential level, the second common voltage is generated by adding a voltage corresponding to the amplitude value to the first common voltage;
Applying either the first common voltage or the second common voltage to a common electrode of each display pixel of the display unit every predetermined period;
A driving method of a liquid crystal display device.

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