JP3029940B2 - Display device gradation voltage generator and signal line drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device, and more particularly to a gradation voltage generating device for generating an alternating voltage of a plurality of voltage levels, which is used for a display device for performing a gradation display by an oscillating voltage method. The present invention relates to a signal line driving circuit using the same.

[0002]

2. Description of the Related Art A liquid crystal display device has a signal line driving circuit for driving a signal line of a display body for displaying. The grayscale voltage generator supplies a plurality of alternating voltage levels as grayscale voltages to a signal line drive circuit, and the signal line drive circuit outputs a voltage corresponding to input image data to a display. The display body has picture elements which are one unit of display in a matrix. Each picture element has a common electrode and a signal electrode via a liquid crystal therebetween, and the liquid crystal serves as a display medium. An input voltage from a signal line drive circuit is applied to each signal electrode via a signal line, and this voltage is charged to each picture element. In this way, display on the liquid crystal display device is realized. When a liquid crystal is used as the display medium, the picture element is degraded or destroyed when a DC voltage is applied. To prevent this, the signal electrode is driven by an AC voltage centered on a certain reference voltage. I do.

[0003] FIG. 7 shows that the applicant of the present invention has a Japanese Patent Application No. Hei 3-211.
No. 149 shows an example of a gradation voltage generator proposed.

[0004] This grayscale voltage generating device uses a common electrode voltage V
operational amplifier OP _c for generating _com, as well as an operational amplifier OP ₀ for generating the gradation voltages V ₀ ~V ₃ respectively -
It has a OP _3. Operational amplifiers OP _c , OP ₀ and OP ₁
To the inverting input of it is given signal POL, the inverting input of the operational amplifier OP ₂ and OP ₃ signal POL is given through an inverter INV. Each operational amplifier OP _c
From OP _{0 to} OP ₃ , the outputs of the resistive voltage dividers PD _com and PD _{0 to} PD ₃ are given to the respective non-inverting inputs. Each resistor divider PD _com and PD _{0 to} PD _3
Are two fixed resistors R _c1 and R _c2 , R ₀₁ and R
_02, R ₁₁ and R _12, R ₂₁ and R _22, and R ₃₁ and R ₃₂
And one of the resistors R _c1 , R ₀₁ , R ₁₁ , and R ₂₁
And R ₃₁ one end of which is connected to a power supply V _dd of positive potential, one end of the other resistor _{R c2, R 02, R 12} , R 22 and R ₃₂ are connected to a power source V _ss ground potential.

FIG. 8 shows an example of an output waveform of the above-mentioned gradation voltage device. This figure shows waveforms in the case of line inversion driving in which the polarity of the voltage is inverted for each horizontal line, and the same applies hereinafter. From the operational amplifiers OP _c and OP ₀ ~OP ₃ of the above configuration, the fixed resistors _{R 01, R 02, R 11} , R 12, R 21,
By appropriately setting R ₂₂ , R ₃₁ and R ₃₂ , the AC voltages V _com and V _{0 to} V ₃ oscillating in synchronization with the signal POL using the applied voltage of each non-inverting input as the reference voltage VM.
Is output. However, as can be seen from the figure, the voltage V _c
om , V ₀ and V ₁ and the voltages V ₂ and V ₃ have opposite phases. These voltage amplitude values are calculated by each operational amplifier OP _c
And OP _{0 to} OP ₃ .

[0006] Each operational amplifier OP _c and OP mentioned above ₀ ~ O
P ₃ is current-amplified, in order to output the high inrush current flowing when switching the polarity of the output, also be configured as shown in FIG. In this configuration, the output of the operational amplifier OP, is amplified by bidirectional current amplifier circuit using two transistors Q ₁ and Q _2.

The thus obtained gradation voltages V _{0 to} V ₃
Is supplied to the signal line driving circuit. The signal line drive circuit is
Or by selecting one of the given gradation voltages V ₀ ~V ₃ directly outputs, or by outputting the interpolated voltage of the voltage V ₀ ~V ₃ produced by the oscillating voltage method, corresponding to the image data Charges voltage to picture elements. The oscillating voltage method is a method of obtaining an arbitrary voltage between two different voltages by vibrating between two different voltages at a very short cycle as compared with one horizontal cycle. For details, refer to Japanese Patent Application No. 4-129164 filed by the present applicant.

[0008]

In the above conventional gray scale voltage generator, when the signal line drive circuit selects any of the gray scale voltages V _{0 to} V ₃ , the polarity of the output of the gray scale voltage generator is switched. Sometimes a sudden load change occurs. When the oscillating voltage method is adopted for the signal line driving circuit, the load fluctuation is large and the change speed is large as compared with the method of simply selecting the gradation voltage.

Such a load change causes a change in the output voltage. FIG. 10 shows an example of an output waveform at one voltage level of the grayscale voltage generator when the oscillating voltage method is employed for the signal line driving circuit. As shown in the drawing, if the voltage of the output waveform itself of the grayscale voltage generator fluctuates, the voltage charged to the picture element will be uneven, resulting in a problem of deterioration of display quality.

In order to solve the above problem, a capacitor is provided between the output terminal of the gray scale voltage generator and the gray scale voltage input terminal of the signal line driving circuit, so that the absorption and supply of the electric charge with respect to the voltage fluctuation can be achieved. It is possible to do it. However, in this case, it has been difficult to deal with the problem by using a capacitor having a sufficient capacity. The reason will be described below.

When a capacitor is connected to the output terminal of the gray scale voltage generator, the capacitor itself becomes a load of the gray scale voltage generator that performs AC driving. Therefore, it is necessary to charge and discharge the capacitor by the grayscale voltage generator itself when the polarity of the grayscale voltage is switched. As a result, not only is the output waveform of the grayscale voltage generator delayed, but also there are problems such as an increase in power consumption due to charging and discharging. For these reasons, it has been virtually impossible to use a capacitor of sufficient capacity.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and makes it possible to use a capacitor having a necessary and sufficient capacity without imposing a load on a gradation voltage generator. It is a first object of the present invention to provide a grayscale voltage generator and a signal line driving circuit which can sufficiently cope with a sudden load change.

A second object of the present invention is to provide a grayscale voltage generator and a signal line driving circuit which enable a liquid crystal display device with low power consumption in addition to the above objects.

[0014]

According to the present invention, there is provided a gradation voltage generator for a display device, comprising: a first DC power supply for outputting a first constant voltage; and a second DC power supply having a level different from the first constant voltage. A second DC power supply that outputs a constant voltage, a first transistor that repeats selection and non-selection of the first constant voltage according to a POL signal, and a second transistor that converts the second constant voltage according to a POL signal. If the first transistor is in a selected state, it is not selected,
A second transistor to be selected when the first transistor is in a non-selected state, and a selection period of the first transistor and the second transistor to control the first constant voltage and the second constant Means for outputting an AC voltage by alternately outputting a voltage, the first DC power supply, and the first DC power supply;
A transistor provided on the wiring for electrically connecting the transistor
1 capacitor, the second DC power supply and the second transformer.
A second connector provided on the wiring for electrically connecting the
Capacitor, the first DC power supply, and the first transistor
And a wiring for electrically connecting the second DC power supply and the second DC power supply.
Between the two transistors and the wiring that electrically connects them.
And a third capacitor, which achieves the above object.

The signal line drive circuit according to the present invention comprises a first DC power supply for outputting a first constant voltage, and a second DC power supply for outputting a second constant voltage having a level different from the first constant voltage. A first transistor that repeats selection and non-selection of the first constant voltage according to the POL signal, and a second transistor that selects the second constant voltage according to the POL signal. A second transistor to be unselected and to be selected when the first transistor is in a non-selected state;
And means for outputting an AC voltage by outputting transistors and a constant voltage and a constant voltage of the second selection period to control the first transistor of the second alternating, said
1 DC power supply and the first transistor are electrically connected.
A first capacitor provided on the wiring to be
An electrical connection between the power supply and the second transistor.
A second capacitor provided on the line, and the first DC power supply
And a wire for electrically connecting the first transistor and the first transistor;
Electrically connecting the second DC power supply and the second transistor
A third capacitor provided between the wiring and a connecting line;
And the above object is achieved.

[0016]

[0017]

[0018] A plurality of capacitors may be provided for one voltage source.

[0019]

[0020]

The signal line driving circuit oscillates two of a plurality of AC voltages of different voltage levels output from the voltage generating circuit to correspond to image data to be displayed on the display. The display device may be driven by a voltage method in which the generated voltage is generated and output to the display body.

The signal line drive circuit selects one of a plurality of AC voltages of different voltage levels output from the grayscale voltage generator in accordance with image data to be displayed on the display; The selected AC voltage level may be output to the display.

[0023] The voltage source may include an operational amplifier.

[0024] The switch may be a field effect transistor.

[0025]

According to the above arrangement, the two DC power supplies output constant voltages having different levels and are controlled by the POL signal.
The two transistors alternately select each output from two DC power supplies and output an AC voltage. With this, two
Output voltages from two DC power supplies are both selected
Period and period when both output voltages are not selected
Will not occur, and capacitors will be unnecessary
In addition to suppressing the load, the output voltage may become unstable.
Can be prevented. In addition, the first DC
A wiring for electrically connecting the power supply and the first transistor;
And electrically connecting the second DC power supply and the second transistor
Due to the capacitor provided on the wiring to be connected,
Voltage fluctuations due to load fluctuations are reduced, and
The charge stored in the capacitor switches the transistor.
Is supplied as part of the inrush current charge
Thus, power consumption can be reduced.

Further, in the case where a capacitor is provided in each wiring for electrically connecting the DC power supply and the transistor , the connection to each DC power supply and the capacitor is separated from each other by the transistor . Each capacitor can be set to a capacity of a value sufficient for absorption, and it is possible to further reduce the voltage fluctuation and further improve the effect of supplying the charge of the rush current.

In the case where the gradation voltage generating device of the present invention has a configuration in which wirings for electrically connecting a DC power supply and a transistor are electrically connected via a capacitor, In the same manner as in the case described above, it is possible to reduce the voltage fluctuation and improve the effect of supplying the charge of the rush current.

The signal line driving circuit according to the present invention has a configuration in which the output from the gradation voltage generator is applied to the means for outputting to the display a voltage corresponding to the image data to be displayed on the display. Even if the capacitive load of the body changes, the change is absorbed by the capacitor of the grayscale voltage generator. As a result, voltage fluctuation is suppressed. Further, since the grayscale voltage generator has low power consumption, the power consumption of the entire display device is reduced.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments.

<First Embodiment> FIG. 1 shows a basic configuration diagram of a voltage generating circuit according to a first embodiment of the present invention. This voltage generating circuit has two DC voltage sources Y and Z, and the output voltage Vy of the voltage source Y is set to be higher than the output voltage Vz of the voltage source Z. The outputs of voltage sources Y and Z include:
One ends of the switches SWy and SWz are connected to each other, and the other ends of the switches SWy and SWz are connected to each other. The voltage at the connection point between the switches SWy and SWz becomes the output voltage Vs. Switches SWy and SWz are switches for selecting voltage sources Y and Z, respectively.
The control signal POL is supplied to the switch SWy, and the control signal POL is supplied to the switch SWz via the inverter INV. That is, the switch SWz is turned off when the switch SWy is on, and the switch SWz is turned on when the switch SWy is off. Voltage source Y
At the connection point between the voltage source Z and the switch SWz, and at the connection point between the voltage source Z and the switch SWz, respectively.
z is connected to one end, and the other ends of the capacitors Cy and Cz are grounded. Note that in order to reduce the output impedance of the output voltage Vs, it is preferable that the switches SWy and SWz use elements whose impedance at the time of ON is as low as possible.

FIG. 2 is a timing chart of the circuit shown in FIG. The operation of the voltage generation circuit will be described with reference to the timing chart.

As shown in the figure, the control signal POL is a signal that is inverted every horizontal time in line inversion driving. When the signal POL is at a high level, a time period (timing) for charging a pixel to a positive voltage is provided. And a low level means a time period for charging the picture element to a negative voltage. The switches SWy and SWz are turned on when the control signal input is at a high level, and are turned off when the control signal is at a low level.

In the case of the voltage generating circuit shown in FIG. 1, when the control signal POL is at a high level, the switch SWy is turned on and the switch SWz is turned off. Therefore, the DC voltage Vy from the voltage source Y is applied to the voltage Vs through the switch SWy.
Is output as During this time, since the capacitor Cz is separated from the voltage source Y by the switch SWz,
The capacitor Cz does not load the output of the voltage source Y.
Further, the capacitor Cy, which has been charged to the voltage Vy of the voltage source Y in advance, serves as a supply source of charge for charging and discharging corresponding to a load change via the switch SWy. Similarly, the control signal PO
When L is at the low level, the DC voltage Vz is output from the voltage source Z as the voltage Vs through the switch SWz, and the capacitor Cz serves as a supply source of charge for charging and discharging corresponding to a load change.

As described above, the capacitors Cy and Cz are connected only to the DC voltage sources Y and Z, respectively. When the polarity of the output voltage Vs is switched, the capacitors Cy and Cz themselves are connected to the load of the output of the voltage generating circuit. Not be.
Therefore, it is possible to use capacitors having sufficient capacity to absorb voltage fluctuations due to load fluctuations as the capacitors Cy and Cz.

<Second Embodiment> FIG. 3 is a circuit diagram of a voltage generating circuit according to a second embodiment. In this embodiment, the voltage source Y及<br/> beauty Z at voltage generating circuit of the first embodiment, is implemented using the respective operational amplifiers OPY and OP Z. The non-inverting input of the operational amplifier OPY is between the voltage Vhigh and the voltage Vlow, of the fixed resistors R _1, R ₂ and R ₃ which are connected in series from the voltage Vhigh side, the connection between the fixed resistors R ₁ and R ₂ is connected to the point, the non-inverting input of the operational amplifier OP Z is connected to a connection point between the fixed resistor R ₂ and R _3. Switches SWy and SWz in the voltage generating circuit
Use field effect transistors FETy and FETz. A field-effect transistor is bidirectional and has an extremely low on-resistance, and thus is suitable for use as the switch of the present invention. The gates of the transistors FETy and FETz are fixed resistors Ry and Rz, respectively.
Is connected to the level conversion circuit T via The level conversion circuit T includes the transistors FETy and FETz.
The circuit converts a signal POL provided at a theoretical level and an inverted signal thereof into a level suitable for controlling the transistors FETy and FETz. This level conversion circuit T is unnecessary depending on the characteristics of the field effect transistor used.

[0036] In the voltage generating circuit having the above configuration, operational amplifier OPY and OP Z is an operational amplifier OP _c with a voltage generating circuit shown in FIG. 7, as the OP ₀ and OP _1, direct AC voltage (Tan'noriha) It does not act as a source and operates only as a DC voltage source. Therefore, it is not necessary to consider the rising characteristics (slew rate) of the operational amplifier to be used, so that an operational amplifier having a sufficiently small current capacity but a sufficiently large current capacity can be used.

In this voltage generation circuit, when the polarity of the output is switched, a part of the electric charge required to charge and discharge the capacitive load positively and negatively can be obtained from the capacitors Cy and Cz. Such a transistor for flowing an inrush current is basically unnecessary. Depending on the characteristics of the required driving circuit, provision of a current amplifying transistor is not a problem.

The above-mentioned capacitors Cy and Cz correspond to load fluctuations caused by an oscillating voltage or the like during one horizontal period, and charge and discharge a capacitive load when switching the output polarity. It supplies the charge of the inrush current.
However, the present invention is not limited to the above-described configuration, and each of the voltage sources Y and Z is provided with a plurality of capacitors for the purpose of responding to a load change during one horizontal period and a plurality of capacitors for the purpose of supplying an inrush current charge. You may. Such a configuration is effective particularly when the capacitance constants of the capacitors required for these purposes are large and different.

<Third Embodiment> FIG. 4 is a circuit diagram of a voltage generating circuit according to a third embodiment. Portions having the same functions as those of the voltage generating circuit shown in FIG. 3 are denoted by the same reference numerals. The voltage generating circuit according to the present embodiment includes a capacitor Cyz between the connection point between the operational amplifier OPY and the transistor FETy and between the operational amplifier OPZ and the transistor FETz in addition to the voltage generating circuit shown in FIG. I have.

In the voltage generating circuit of this embodiment, since the capacitor Cyz is connected between the voltages Vy having different polarities, the capacitor Cy has one end grounded.
In particular, the effect of supplying the charge of the rush current at the time of the switching is easily improved as compared with the case of Cz and Cz.

<Fourth Embodiment> FIG. 5 is a circuit diagram of a gradation voltage generator according to a fourth embodiment. Normally, a grayscale voltage generator requires a plurality of voltage generating circuits as shown in FIG. 7, and each voltage generating circuit has a set of DC voltage sources. As shown in the figure, the gray scale voltage generating device of the present embodiment includes two voltage generating circuits having the same configuration as that of the second embodiment in order to output two kinds of voltages Va and Vb. Each voltage generating circuit includes operational amplifiers OPJ and OP as voltage sources.
K, and operational amplifiers OPY and OPZ. The non-inverting input of the operational amplifier OPJ has a voltage Vhigh and a voltage Vlow.
And a fixed resistor R connected in series from the voltage Vhigh side.
_4, R ₅ and out of R _6, it is connected to a connection point between the fixed resistor R ₄ and R _5, the non-inverting input of the operational amplifier OPK is connected to a connection point between the fixed resistor R ₅ and R ₆ . Similarly, the non-inverting input of the operational amplifier OPY is between the voltage Vhigh and the voltage Vlow, of the voltage Vhigh fixed resistor R ₁ connected in series from the side, R ₂ and R _3, fixed resistors R ₁ and R ₂ It is connected to a connection point between the non-inverting input of the operational amplifier OPX is connected to a connection point between the fixed resistor R ₂ and R _3. Operational amplifier O
The respective output voltages Vj, Vk, Vy and Vz of PJ, OPK, OPY and OPZ are set to predetermined values by appropriately setting the resistance values of the fixed resistors R _{1 to} R ₆ , and different voltages Va and Vb are obtained. To be able to

The output of the operational amplifier OPJ is connected to a capacitor Cj and a field effect transistor FETj. The output of each operational amplifier OPK, OPY and OPZ is also connected to a capacitor Ck and a transistor FETk, a capacitor Cy and a transistor FETy, and a capacitor Cz and a transistor FETz, respectively. Transistors FETj, FETk, FETy and F
Each gate of ETz has a fixed resistance Rj, Rk, R
It is connected to the level conversion circuit T via y and Rz. The level conversion circuit T converts the signal POL given at the theoretical level into the transistors FETj and FETy.
Of each transistor FE
Tj and FETy, and the inverted signal of the signal POL is converted to a level suitable for controlling each of the transistors FETk and FETz.
Give to Etz. The level conversion circuit T is unnecessary depending on the characteristics of the field effect transistor used.

In this embodiment, in addition, a capacitor Cji is provided between the output of the voltage source OPJ and the output of the voltage source OPY, and a capacitor Ckz is provided between the output of the voltage source OPK and the output of the voltage source OPZ. I have.

As in the second embodiment, the grayscale voltage generator supplies charges of inrush current and absorbs voltage fluctuations due to load fluctuations without increasing power consumption. Furthermore, since the capacitors Czy and Ckz are provided, in addition to the effects of the voltage generating circuit of the second embodiment, it is particularly effective against load fluctuations such as oscillating voltage. In the oscillating voltage method, the signal line drive circuit alternately selects / deselects the voltage Va and the voltage Vb within one horizontal period. For example, when the transistors FETj and FETy are selected during this one horizontal period. In some cases, the capacitor Czy can effectively absorb the voltage fluctuation.

Although the gray scale voltage generator of this embodiment is composed of two voltage generators, the number of the voltage generators is not limited to two, as in the gray scale voltage generator shown in FIG. You may comprise three or more. In this case, a capacitor provided between the outputs of the two DC voltage sources (the capacitor Cji in FIG. 5)
And Ckz) can be provided between any DC voltage sources of any voltage generating circuit.

The gradation voltage generator of this embodiment can be applied to a signal line driving circuit. FIG. 6 shows an output waveform of the voltage generating circuit of the present invention when the signal line driving circuit is driven by the oscillating voltage method. This figure corresponds to the output waveform shown in FIG. 10 of the conventional example. As can be seen from FIGS. 6 and 10, in the present invention, the rise and fall of the waveform at the time of polarity switching are faster than in the conventional example. This is because the charge stored in the capacitor is supplied as a part of the rush current. Further, the present invention suppresses voltage fluctuation as compared with the conventional example. This is because the capacitor also compensates for a load change due to an oscillating voltage or the like. Therefore, in the signal line driving circuit to which the gradation voltage generating device of the present embodiment is applied, the output waveform has a small voltage fluctuation and a small delay at rising and falling. The signal line drive circuit is
The configuration may be such that the grayscale voltage generator is integrated and incorporated.

[0047]

As is apparent from the above description, the grayscale voltage generator and the signal line drive circuit of the display device according to the present invention can be used.
According to the description, two DC power supplies output constant voltages with different levels.
Two transistors controlled by the POL signal
Alternately select each output from two DC power supplies
Outputs voltage, so two outputs from two DC power supplies
The period during which both voltages are selected, and the two output voltages
You can ensure that there is no period in which neither is selected,
To prevent the capacitor from unnecessarily loading the output.
And prevent output voltage from becoming unstable
be able to. At the same time, the first DC power supply and the first transformer
Wiring for electrically connecting the second DC power supply to the second
Wiring that electrically connects the two transistors
Voltage fluctuations due to load fluctuations
Can be reduced and stored in this capacitor
Charge that flows when the transistor switches
Power supply as part of the charge
can do. Further, in the case where a capacitor is provided in each wiring for electrically connecting the DC power supply and the transistor , the connection to each DC power supply and the capacitor is separated from each other by the transistor , so that the voltage fluctuation is absorbed. Therefore, each capacitor can be set to a capacity sufficient to satisfy the requirements described above, and the effects of reducing voltage fluctuations and supplying charges of inrush current can be further improved.
Further, the gradation voltage generator of the present invention is connected to a DC power supply and a transformer.
When a configuration is used in which the respective wires that electrically connect to the resistors are electrically connected via capacitors, the effects of reducing voltage fluctuations and supplying rush current charges are the same as in the above case. Can be improved.

In the conventional circuit, the operational amplifier generates an AC signal (short rectangular wave) and consumes power for directly charging / discharging the capacitive load. In this case, since a part of the charge for charging and discharging is supplied by the capacitor, power consumption can be reduced accordingly. Further, in the conventional example as shown in FIG. 9, the power consumed by the current amplifying transistor becomes unnecessary in the present invention, and the power consumption can be reduced accordingly.

Further, since the voltage source does not need to output an AC voltage, an inexpensive general-purpose operational amplifier having a low slew rate can be used as described above. As a result, the effect of cost reduction can be obtained. The cost reduction effect is even greater when the transistor for the inrush current is eliminated.

If a grayscale voltage generator having such an effect is applied to a signal line driving circuit, the output waveform of the grayscale voltage generator has a small voltage fluctuation and a small delay at rising and falling. As a result, display quality is improved. Further, since the power consumption of the signal line driver circuit is reduced, a display device with low power consumption can be realized.

[Brief description of the drawings]

FIG. 1 is a basic configuration diagram of a voltage generation circuit according to a first embodiment.

FIG. 2 is a basic timing diagram of the voltage generation circuit shown in FIG.

FIG. 3 is a circuit diagram of a voltage generation circuit according to a second embodiment.

FIG. 4 is a circuit diagram of a voltage generation circuit according to a third embodiment.

FIG. 5 is a circuit diagram of a grayscale voltage generator according to a fourth embodiment.

FIG. 6 is an example of an output waveform of the grayscale voltage generator according to the present invention when a voltage fluctuation occurs due to a load fluctuation.

FIG. 7 is an example of a circuit diagram of a conventional gradation voltage generator.

FIG. 8 is an output timing diagram of the gray scale voltage generator shown in FIG. 7;

FIG. 9 is an example of a circuit diagram of a conventional voltage generation circuit including a current amplification circuit.

FIG. 10 is an example of an output waveform of a conventional voltage generation circuit when a voltage fluctuation occurs due to a load fluctuation.

[Explanation of symbols]

 Y DC voltage source Z DC voltage source SWj switch SWk switch SWy switch SWz switch Cy capacitor Cz capacitor Cj capacitor Ck capacitor Cyz capacitor Czy capacitor Ckz capacitor OPY operational amplifier OPZ operational amplifier OPJ operational amplifier OPK operational amplifier T level conversion circuit FETy field effect transistor FETz Field-effect transistor FETj Field-effect transistor FETk Field-effect transistor

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-1-147525 (JP, A) JP-A-1-145632 (JP, A) JP-A-61-33091 (JP, A) (58) Survey Field (Int.Cl. ⁷ , DB name) G02F 1/133 G09G 3/36

Claims (2)

(57) [Claims] 1. A first DC power supply for outputting a first constant voltage, a second DC power supply for outputting a second constant voltage having a level different from the first constant voltage, and a POL signal A first transistor that repeats selection and deselection of the first constant voltage; and a second constant voltage in response to a POL signal when the first transistor is in a selected state, A second transistor to be selected when the other transistor is in a non-selected state; and controlling a selection period of the first transistor and the second transistor to alternate the first constant voltage and the second constant voltage. Means for outputting an AC voltage by outputting the first DC power supply and the first transistor.
A first capacitor provided on a wiring to be connected, the second DC power supply, and the second transistor are electrically connected to each other.
Electrically connecting the second capacitor provided on the wiring to be connected to the first DC power supply and the first transistor;
Wiring to be connected, the second DC power supply and the second transistor
A third wire provided between the first wire and a wire for electrically connecting the
And a capacitor for the display device. 2. A first DC power supply for outputting a first constant voltage, a second DC power supply for outputting a second constant voltage having a level different from the first constant voltage, and a POL signal. A first transistor that repeats selection and deselection of the first constant voltage; and a second constant voltage in response to a POL signal when the first transistor is in a selected state, A second transistor to be selected when the other transistor is in a non-selected state; and controlling a selection period of the first transistor and the second transistor to alternate the first constant voltage and the second constant voltage. Means for outputting an AC voltage by outputting the first DC power supply and the first transistor.
A first capacitor provided on a wiring to be connected, the second DC power supply, and the second transistor are electrically connected to each other.
Electrically connecting the second capacitor provided on the wiring to be connected to the first DC power supply and the first transistor;
Wiring to be connected, the second DC power supply and the second transistor
A third wire provided between the first wire and a wire for electrically connecting the
A signal line driver circuit characterized in that it comprises a capacitor, a.