JP2005284055A - Liquid crystal display and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce vertical crosstalk by sufficiently enlarging a pixel capacity Clc to a parasitic capacitance C1. <P>SOLUTION: In a two-terminal element liquid crystal display, a plurality of scanning lines are formed on a color filter substrate, a plurality of data lines and a pixel electrode and the like are formed on an element substrate, and liquid crystal is sealed between both the substrates. The parasite capacity C1 is generated between each pixel electrode, each adjacent signal lines not connected thereto, and the pixel capacity Clc exists between each pixel electrode and each opposite electrodes. Vertical crosstalks are generated by changing the voltage of the pixel electrode by a voltage Vc applied due to the parasite capacity C1 between adjacent data lines during a holding period Th. Thus, the upper limit of the voltage Vc is set so as to be smaller than the application voltage value V(T50) in voltage/transmittance characteristics. In other words, Vlc=äC1/(Clc+C1)}×Vd<V(T50) is set, and the pixel capacity Clc is sufficiently larger than the parasitic capacity C1. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a liquid crystal display device and an electronic apparatus suitable for use in displaying various types of information.

  In a liquid crystal display device called a two-terminal element type active matrix or TFD (Thin Film Diode), a scanning line is provided on one of two substrates facing each other, and a signal line (data line) is provided on the other substrate. ) And pixel electrodes are formed, and liquid crystal is sealed between the substrates. The substrate on which the pixel electrode is formed is provided with an element having non-linear current-voltage characteristics, and the element is connected to the pixel electrode and the signal line, respectively. In such a liquid crystal display device, the pixel electrode is formed at substantially the center position of the signal lines on both sides thereof.

  However, in such an active matrix type liquid crystal display device, the interval between the pixel electrode and each signal line on both sides of the pixel electrode is narrow, so in particular, between the pixel electrode and an adjacent signal line not connected thereto. There is a problem in that the so-called vertical crosstalk occurs due to the influence of the generated parasitic capacitance, and the display quality deteriorates. This vertical crosstalk has a rectangular background color such as cyan, magenta, yellow, etc., which is a single color such as red, blue, green, etc. or a complementary color for each color of red, blue, green, with gray as the background color. This is a phenomenon in which the area positioned in the vertical direction of the rectangular display area is displayed brighter than the background color to be originally displayed and is displayed in a slightly colored manner.

  In addition, as this type of liquid crystal display device, for example, the parasitic capacitance between the pixel electrode and the scanning line or signal line adjacent to the pixel electrode is reduced to eliminate unevenness in brightness and crosstalk of the display image, thereby providing good image display. A liquid crystal display device that realizes the above has been proposed (see, for example, Patent Document 1). In Patent Document 1, parasitic capacitance is eliminated by a shield electrode having electrostatic shielding properties that is disposed so as to overlap at least a part of the peripheral portion of the pixel electrode and at least a part of the scanning line and the signal line. Thus, high-quality image display is realized while avoiding uneven brightness and crosstalk.

Japanese Patent Laid-Open No. 5-203994

  The present inventor conducted various considerations and experiments in order to solve the above problems. As a result, it has been found that the vertical crosstalk is greatly influenced by the pixel capacitance Clc in the liquid crystal display device and the parasitic capacitance C1 generated between the pixel electrode and the signal line not connected thereto. Furthermore, it has been found that the relationship between the capacitance characteristics and the VT characteristics (voltage-transmittance characteristics) greatly affects the vertical crosstalk. The pixel capacity Clc means a liquid crystal capacity for one pixel.

  The present invention has been made on the basis of the above knowledge. The pixel capacitance Clc is set with respect to the parasitic capacitance C1 so that the pixel capacitance Clc, the parasitic capacitance C1, and the VT characteristic are appropriately set and the setting is satisfied. It is an object to reduce the vertical crosstalk as described above by making it sufficiently large.

  In one aspect of the present invention, a liquid crystal display device includes a plurality of signal lines, a plurality of pixel electrodes, and a plurality of two-terminal elements connected to each of the signal lines and each of the pixel electrodes. A first substrate and a second substrate having a plurality of scanning lines and disposed opposite to the substrate, wherein liquid crystal is sealed between the first substrate and the second substrate, Each parasitic capacitance generated between adjacent signal lines not connected to each pixel electrode is C1, and each pixel capacitance of the liquid crystal sandwiched between each pixel electrode and each opposing scanning line is Clc. In this case, each pixel capacitance Clc is set to a large value with respect to each parasitic capacitance C1 based on the voltage-transmittance characteristics of the liquid crystal.

  The liquid crystal display device is configured by connecting a plurality of signal lines for supplying data signals and a plurality of pixel electrodes by switching elements such as TFD elements and TFT elements. Two signal lines are disposed adjacent to both sides of the pixel electrode. Parasitic capacitance is generated between the pixel electrode and the adjacent signal line, but the parasitic between the signal line that is not connected to the pixel electrode through the two-terminal element among the two adjacent signal lines. The potential of the pixel electrode changes due to the capacitance, so-called vertical crosstalk occurs, and the image quality deteriorates. Therefore, when each pixel capacitance of the liquid crystal sandwiched between each pixel electrode and each opposed scanning line is Clc, each pixel capacitance Clc is determined based on the voltage-transmittance characteristics of the liquid crystal. Set a large value for. As a result, since the ratio of the parasitic capacitance to the pixel capacitance can be reduced, the voltage applied to the pixel electrode due to the parasitic capacitance with the adjacent data line can be reduced, and the vertical cross tor can be reduced. .

  In one mode of the above liquid crystal display device, when the data amplitude voltage of the signal line is Vd and the voltage corresponding to 50% transmittance in the voltage-transmittance characteristics of the liquid crystal is V (T50), {C1 / (Clc + C1)} × Vd <V (T50).

  According to this aspect, since the upper limit of the voltage Vlc is set to be smaller than V (T50), each pixel capacitance Clc is set to a large value with respect to each parasitic capacitance C1 so as to satisfy this condition. The Thereby, the transmittance of the liquid crystal layer can be properly maintained, and vertical crosstalk can be reduced.

  In addition, an electronic device including the above-described liquid crystal display device can be configured.

  The best mode for carrying out the present invention will be described below with reference to the drawings. In the following embodiments, the present invention is applied to a liquid crystal display device. In the present embodiment, the occurrence of vertical crosstalk is reduced by appropriately setting the pixel capacitance Clc and the parasitic capacitance C1, and making the pixel capacitance Clc sufficiently larger than the parasitic capacitance C1 so as to satisfy the setting. To obtain a high-quality display image.

  First, the configuration of the liquid crystal display device according to the embodiment of the present invention will be described. FIG. 1 is a plan view schematically showing a schematic configuration of a liquid crystal display device 100 of the present invention. In FIG. 1, the configuration of electrodes and wirings of the liquid crystal display device 100 is mainly shown as a plan view. Here, the liquid crystal display device 100 of the present invention is an active matrix driving method using a TFD element, and is a transflective liquid crystal display device. FIG. 2 is a schematic cross-sectional view along the cutting line A-A ′ in the liquid crystal display device 100 of FIG. 1.

  First, the cross-sectional configuration of the liquid crystal display device 100 taken along the cutting line A-A ′ will be described with reference to FIG. 2, and then the configuration of electrodes and wirings of the liquid crystal display device 100 will be described.

  In FIG. 2, the liquid crystal display device 100 includes an element substrate 92 and a color filter substrate 91 disposed so as to face the element substrate 92 with a frame-shaped seal member 3 interposed therebetween, and liquid crystal is sealed inside. Thus, the liquid crystal layer 4 is formed. A conductive member 7 such as a plurality of gold particles is mixed in the frame-shaped seal member 3. The element substrate 92 includes a transparent substrate 1 such as glass (hereinafter also referred to as “upper substrate”), and the color filter substrate 91 includes a transparent substrate 2 such as glass (hereinafter also referred to as “lower substrate”). .

  On the inner surface of the lower substrate 2, a scattering layer 9 having fine irregularities formed on the surface is formed. On the inner surface of the scattering layer 9, a reflective layer 5 having a predetermined thickness is formed for each subpixel SG. A plurality of rectangular openings 20 (hereinafter also referred to as “transparent areas”) are formed in each reflective layer 5. Each reflective layer 5 can be formed of a thin film such as aluminum, an aluminum alloy, or a silver alloy. The opening 20 is formed so as to have an area of a predetermined ratio with respect to the total area of the sub-pixel SG for each sub-pixel SG arranged in a matrix in the vertical and horizontal directions on the inner surface of the color filter substrate 91.

  On the reflective layer 5 and between the sub-pixels SG, a black light-shielding layer BM is provided between the adjacent sub-pixels SG to prevent light from entering from one sub-pixel to the other sub-pixel. Is formed. The black light shielding layer BM can be made of a black resin material, for example, a black pigment dispersed in a resin. Instead of this, an overlapping light shielding layer (not shown) formed by overlapping R, G, and B colored layers may be used.

  On the reflective layer 5 and the opening 20, colored layers 6R, 6G, and 6B made of any of the three colors R, G, and B are formed for each subpixel SG. A color filter is constituted by the colored layers 6R, 6G, and 6B. A pixel G indicates a region for one color pixel composed of R, G, and B sub-pixels SG. In the following description, when referring to a colored layer regardless of color, it is simply referred to as “colored layer 6”, and when referring to a colored layer by distinguishing colors, it is referred to as “colored layer 6R” or the like. Further, as shown in FIG. 2, the thickness of the colored layer 6 formed on the opening 20 is formed to be thicker than the thickness of the colored layer 6 formed on the reflective layer 5. Thus, the colored layer 6 is designed to exhibit a desired hue and brightness in the reflective display mode and the transmissive display mode, respectively.

  A protective layer 18 made of a transparent resin or the like is formed on the colored layer 6 and the black light shielding layer BM. The protective layer 18 has a function of protecting the colored layer 6 from corrosion and contamination caused by chemicals used during the manufacturing process of the color filter substrate 91 and the liquid crystal display device 100. On the surface of the protective layer 18, a transparent electrode (scanning electrode) 8 (hereinafter also referred to as “scanning line of the lower substrate 2”) such as striped ITO (Indium-Tin Oxide) is formed. One end of the transparent electrode 8 extends into the seal member 3 and is electrically connected to the conducting member 7 in the seal member 3.

  On the other hand, the TFD element 21 and the pixel electrode 10 are formed on the inner surface of the upper substrate 1 for each subpixel. A protective layer 17 made of transparent resin or the like is formed on the inner surfaces of the TFD element 21 and the pixel electrode 10. Scan lines 31 are formed on the left and right peripheral edge portions on the inner surfaces of the upper substrate 1 and the protective layer 17. One end of the scanning line 31 extends into the seal member 3, and the scanning line 31 is electrically connected to the conduction member 7 in the seal member 3.

  An alignment film (not shown) is formed on the inner surface of the transparent electrode 8 of the lower substrate 2 and the inner surface of the protective layer 17 of the upper substrate 1. In order to keep the thickness of the liquid crystal layer 4 uniform between these alignment films, particulate spacers (not shown) are randomly arranged. As a material for the spacer, a material mainly composed of silica or resin is preferable.

  A retardation plate (¼ wavelength plate) 11 and a polarizing plate 12 are arranged on the outer surface of the lower substrate 2, and a retardation plate (¼ wavelength plate) on the outer surface of the upper substrate 1. 13 and a polarizing plate 14 are arranged. A backlight 15 is disposed below the polarizing plate 12. The backlight 15 is preferably a point light source such as an LED (Light Emitting Diode) or a linear light source such as a cold cathode fluorescent tube.

  The transparent electrode 8 of the lower substrate 2, that is, the scanning line of the lower substrate 2, and the scanning line 31 of the upper substrate 1 are vertically connected via the conductive member 7 mixed in the seal member 3.

  When the reflective display is performed in the liquid crystal display device 100 of the present embodiment, the external light incident on the liquid crystal display device 100 travels along the path R shown in FIG. That is, the external light incident on the liquid crystal display device 100 is reflected by the reflective layer 5 and reaches the observer. In this case, the external light passes through the region where the colored layer 6 is formed, is reflected by the reflective layer 5 below the colored layer 6, and passes through the colored layer 6 again to have a predetermined hue. And brightness. Thus, a desired color display image is visually recognized by the observer.

  On the other hand, when transmissive display is performed, the illumination light emitted from the backlight 15 travels along the path T shown in FIG. 1 and is observed through the transmissive region, that is, the colored layer 6 on the opening 20. To the person. In this case, the illumination light has a predetermined hue and brightness by passing through the colored layer 6. Thus, a desired color display image is visually recognized by the observer.

  Next, with reference to FIG. 1, FIG. 3, and FIG. 4, the configuration of the electrodes and wirings of the element substrate 92 and the color filter substrate 91 of the present invention will be described. FIG. 3 is a plan view showing a configuration of electrodes, wirings, and the like of the element substrate 92 when the element substrate 92 is observed from the back direction (that is, the lower side in FIG. 2). FIG. 4 is a plan view showing the configuration of the electrodes of the color filter substrate 91 when the color filter substrate 91 is observed from the front direction (that is, the upper side in FIG. 2). In FIG. 3, the electrodes and wirings are formed on the back side in the observation direction, but are represented by solid lines for convenience of explanation. 3 and 4, other elements other than the electrodes and wiring are not shown for convenience of explanation.

  In FIG. 1, a region where the pixel electrode 10 of the element substrate 92 and the transparent electrode 8 of the color filter substrate 91 intersect constitute a sub-pixel SG which is the minimum unit of display. A region in which a plurality of the sub-pixels SG are arranged in a matrix in the vertical direction and the horizontal direction in the drawing is a display region V (region surrounded by a two-dot chain line). In the display area V, images such as letters, numbers, and figures are displayed. In FIG. 1, an area defined by the outer shape of the liquid crystal display device 100 and the display area V is a frame area 38 that does not contribute to image display.

  First, with reference to FIG. 3, the structure of the electrode and wiring of the element substrate 92 will be described. The element substrate 92 includes a TFD element 21, a pixel electrode 10, a plurality of scanning lines 31, a plurality of data lines 32, a Y driver IC 33, an X driver IC 34, and a plurality of external connection terminals 35.

  On the projecting region 36 of the element substrate 92, a Y driver IC 33 and an X driver IC 34 are mounted, for example, via an ACF (Anisotropic Conductive Film). In FIG. 3, the direction from the side 92a on the projecting region 36 side of the element substrate 92 to the side 92c on the opposite side is defined as the X direction, and the direction from the side 92d to the side 92b is defined as the Y direction.

  A plurality of external connection terminals 35 are formed on the overhang region 36. Each input terminal (not shown) of the Y driver IC 33 and the X driver IC 34 is connected to the plurality of external connection terminals 35 through conductive bumps. The external connection terminal 35 is connected to a wiring board (not shown) such as a flexible printed board via ACF or solder. Thereby, for example, signals and power are supplied to the liquid crystal display device 100 from an electronic device such as a mobile phone or an information terminal.

  The output terminal (not shown) of the X driver IC 34 is connected to the plurality of data lines 32 through conductive bumps. On the other hand, the output terminal (not shown) of each Y driver IC 33 is connected to the plurality of scanning lines 31 via conductive bumps. Accordingly, each Y driver IC 33 outputs a scanning signal to the plurality of scanning lines 31, and the X driver IC 34 outputs a data signal to the plurality of data lines 32.

  The plurality of data lines 32 are linear wirings extending in the vertical direction on the paper surface, and are formed in the X direction from the overhanging region 36 to the display region V. Each data line 32 is formed at a constant interval. Each data line 32 is connected to a plurality of TFD elements 21 at appropriate intervals, and each TFD element 21 is connected to a corresponding pixel electrode 10.

  The plurality of scanning lines 31 includes a main line portion 31a and a bent portion 31b that bends at substantially right angles to the main line portion 31a. Each main line portion 31 a is formed in the X direction from the overhanging region 36 in the frame region 38. Each main line portion 31a is formed substantially parallel to each data line 32 and at a predetermined interval. Each bent portion 31b extends in the Y direction to the inside of the seal member 3 located on the left and right in the frame region 38. The end portion of the bent portion 31 b is connected to the conductive member 7 in the seal member 3.

  Next, the configuration of the electrodes of the color filter substrate 91 will be described. The color filter substrate 91 has stripe-shaped transparent electrodes (scanning electrodes) 8 formed in the Y direction. As shown in FIGS. 1 and 4, the left end portion or the right end portion of each transparent electrode 8 extends into the seal member 3 and is connected to the conduction member 7 in the seal member 3.

  FIG. 1 shows a state where the color filter substrate 91 and the element substrate 92 are bonded together via the seal member 3 as described above. As shown in the figure, each transparent electrode 8 of the color filter substrate 91 is orthogonal to each data line 32 of the element substrate 92 and overlaps the plurality of pixel electrodes 10 in a row in a plane. Thus, the region where the transparent electrode 8 and the pixel electrode 10 overlap constitutes the sub-pixel SG.

  Further, the transparent electrode 8 (that is, the scanning line on the color filter substrate 91 side) of the color filter substrate 91 and the scanning line 31 of the element substrate 92 alternately overlap between the left side and the right side as shown in the figure. The transparent electrode 8 and the scanning line 31 are vertically connected via the conductive member 7 in the seal member 3. That is, conduction between each scanning line of the color filter substrate 91 as the transparent electrode 8 and each scanning line 31 of the element substrate 92 is alternately realized between the left side and the right side as shown in the figure. Thereby, the transparent electrode 8 of the color filter substrate 91 is electrically connected to the Y driver ICs 33 located on the left and right sides of the paper via the scanning lines 31 of the element substrate 92.

  Next, a gradation display method in the liquid crystal display device 100 will be described with reference to FIG. In this example, it is assumed that the liquid crystal panel is normally white. FIG. 5A shows a driving waveform of the scanning potential VA applied to the scanning electrode 8 from the Y driver IC 33 via the scanning line 31. FIG. 5B shows a drive waveform of the signal potential VB applied from the X driver IC 34 to the data line 32. FIG. 5C shows a driving waveform of the interelectrode voltage VAB of the scanning electrode 8 and the data line 32.

  The Y driver IC 33 applies a scanning potential VA to the scanning electrode 8 through the scanning line 31. On the other hand, the X driver IC 34 applies the signal potential VB to the data line 32. The potentials VA and VB will be described. First, a scanning potential VA as shown in FIG. 5A is applied to the scanning electrode 8. For each line selection period T, each scanning electrode 8 is sequentially selected via each scanning line 31, and a potential difference of ± Vsel with respect to a certain common potential VGND, that is, any potential having a voltage is applied. This voltage Vsel is called a selection voltage. Then, after the line selection period T, any potential having a voltage of ± Vhld with respect to the common potential VGND is applied. In the holding period Th, when the potential at the time of selection is VGND + Vsel, the potential of VGND + Vhld is applied, and when the potential at the time of selection is VGND-Vsel, the potential of VGND-Vhld is applied. This voltage Vhld is called a holding voltage. A period in which all the scan electrodes 8 are selected in a round is called a field period. In the next field period, the scan electrodes are sequentially selected using a selection voltage having a characteristic opposite to that of the previous field period. .

  On the other hand, as shown in FIG. 5B, any potential having a voltage of ± Vsig with respect to the common potential VGND is applied to the data line 32. Here, when the potential applied to the scan electrode 8 selected in a certain selection period is VGND + Vsel, VGND−Vsig is used as the ON potential Von, and VGND + Vsig is used as the OFF potential Voff. Further, when the potential applied to the scan electrode 8 selected in a certain selection period is VGND−Vsel, VGND + Vsig is used as the on potential Von and VGND−Vsig is used as the off potential Voff.

  That is, the waveform of the signal potential VB in each line selection period T is set according to the gradation of each pixel in the column related to the data line 32. First, the signal potential VB is set for each line selection period T. Are divided into an ON section and an OFF section, and are set to the ON potential Von in the ON section and to the OFF potential Voff in the OFF section. That is, the signal potential VB is pulse width modulated according to the gradation value. Then, the higher the gradation to be given to the pixel (the darker the normally white mode), the larger the proportion occupied by the ON section.

  Next, the interelectrode voltage VAB of the scan electrode 8 and the data line 32 is indicated by a solid line in FIG. This interelectrode potential VAB is applied to the liquid crystal layer 4. As shown in the figure, it can be seen that the absolute value of the interelectrode voltage VAB increases during the selection period of the pixel. Further, the liquid crystal layer voltage VLC applied to the liquid crystal layer 4 is indicated by hatching in FIG. When the liquid layer voltage VLC changes, the capacity formed by the liquid crystal layer 4 must be charged and discharged, so the liquid crystal layer voltage VLC changes in a transient response to the interelectrode voltage VAB. In FIG. 5C, the voltage VNL is the difference between the interelectrode voltage VAB and the liquid layer voltage VLC, that is, the terminal voltage of the TFD element 21. As described above, in the liquid crystal display device 100, gradation display is performed by pulse width modulation of the driving voltage applied to the liquid crystal layer 4.

[Generation principle of vertical crosstalk]
First, vertical crosstalk will be described with reference to FIG. FIG. 6 is an enlarged plan view of only the display area V in the liquid crystal display device 100, and schematically shows a state in which vertical crosstalk has occurred in the display area V. FIG.

  A scanning line voltage and a data line voltage are applied to the liquid crystal display device 100 so that the background area B and the area C have the same gray level. In the area A, the scanning line voltage and the data line voltage are applied so that a monochrome or complementary color rectangular display with a specified brightness is obtained. However, in practice, the gray level on the display image differs between Area B and Area C, which should have the same gradation level, due to the occurrence of vertical crosstalk. That is, the area C positioned in the vertical direction of the area A is displayed somewhat brighter than the area B, and is displayed in a slightly colored manner. Area A is displayed darker than the specified brightness. Such vertical crosstalk occurs when a monochrome or complementary color rectangle is displayed against a gray background.

  Next, the principle of occurrence of this vertical crosstalk will be described with reference to FIG. FIG. 7 shows a partially enlarged plan view in which one pixel (RGB three subpixels) in the liquid crystal display device 100 is enlarged.

  The pixel electrode 10 is usually formed at a substantially central position between the pair of data lines 32. This is due to a design reason that the aperture ratio of the pixel is increased within a range in which the pixel electrode 10 is not too close to the adjacent data lines 32. The data lines 32a, 32b, and 32c are connected to the pixel electrodes 10a, 10b, and 10c via the TFD element 21. For example, when paying attention to the pixel electrode 10b, the data line 32a is adjacent to the pixel electrode 10b, but is not connected to the pixel electrode 10b. Parasitic capacitances C1 and C2 exist between the pixel electrode 10b and two adjacent data lines 32a and 32b, respectively.

  In the liquid crystal display device 100, in order to display a desired image, a desired voltage is applied to each of the pixel electrodes 10a to 10c in the line selection period T. In the example of FIG. 7, a desired voltage Vlc is applied to the pixel electrode 10b from the data line 32b via the TFD element 21.

  However, since the parasitic capacitance C1 between the pixel electrode 10b and the adjacent data line 32a exists, a voltage corresponding to the parasitic capacitance C1 is applied from the data line 32a. The potential Vlc of the electrode 10b changes from a desired potential. That is, the potential of a certain pixel electrode changes due to a parasitic capacitance between the pixel electrode and an adjacent data line. As a result, the transmittance of the pixel changes and vertical crosstalk occurs.

  Now, as described above, it is assumed that blue is displayed in area A and gray is displayed in areas B and C in FIG. In FIG. 7, the pixel electrode 10a corresponding to the data line 32a is a subpixel corresponding to blue, the pixel electrode 10b is a subpixel corresponding to red, and the rightmost pixel electrode 10c is a subpixel corresponding to green. Let it be a pixel.

  When these three-color sub-pixels are present in area B in FIG. 6, the area is displayed in gray, so that the voltages applied to the three data lines 32a, 32b, 32 are substantially equal, and the parasitic capacitance C1 is The influence on the pixel electrode 10b is small.

  On the other hand, since blue is displayed in the area A, only the data line 32a is also at a low potential (potential corresponding to white) in the area C, and the data lines 32b and 32c are set to high potential (potential corresponding to black). Become. Therefore, in the area C, a potential difference is generated between the data line 32a and the pixel electrode 10b during the holding period, and the potential of the pixel electrode 10b is lowered by the parasitic capacitance C1. As a result, the transmissivity of the red sub-pixel formed by the pixel electrode 10b is increased, and the area C becomes brighter and appears somewhat reddish. This is the principle of occurrence of vertical crosstalk. That is, vertical crosstalk occurs when the potential of an adjacent pixel electrode changes from a desired potential due to the influence of parasitic capacitance.

[How to reduce vertical crosstalk]
Next, a method of reducing vertical crosstalk will be described with reference to FIG. FIG. 8 is a diagram for explaining a method of reducing vertical crosstalk according to the embodiment of the present invention. FIG. 8A shows, as an example, a layer cross-sectional view in which a local portion of a general transmissive liquid crystal panel is enlarged. FIG. 8B shows an example of a graph of voltage-transmittance characteristics of the liquid crystal panel.

  As described above, the vertical crosstalk occurs because the voltage Vlc of the pixel electrode changes due to the influence of the parasitic capacitance C1 between the adjacent data lines.

  Here, during the holding period, the voltage applied to the liquid crystal from the adjacent data line, that is, the voltage Vc caused by the parasitic capacitance can be expressed as follows.

Vc = {C1 / (Clc + C1)} × Vd (Formula 2)
Here, as described above, C1 is the parasitic capacitance between the adjacent data line and the pixel electrode, Clc is the pixel capacitance of the pixel electrode, and Vd is the amplitude voltage of the data signal applied to the data line. In order to reduce the vertical crosstalk, it is necessary to suppress the voltage Vc from the adjacent data line to a certain level due to the parasitic capacitance.

  Therefore, in the present embodiment, the voltage Vc is regulated to a certain level so that the pixel capacitance Clc is sufficiently larger than the parasitic capacitance C1. This suppresses the voltage applied to the pixel electrode from the adjacent data line during the holding period Th, thereby reducing the vertical crosstalk.

  Specifically, it is desirable to determine the upper limit value of the voltage Vc in relation to the applied voltage value in the voltage-transmittance characteristics as shown in FIG. Here, with reference to FIGS. 8A and 8B, voltage-transmittance characteristics of a general transmissive liquid crystal panel will be described.

  The voltage-transmittance characteristics (so-called VT characteristics) of the liquid crystal layer 503 are expressed as in the graph of FIG. 8B, for example. In the graph shown in FIG. 8B, as shown in FIG. 8A, the light T1 is transmitted through the liquid crystal layer 503 sandwiched between the transparent electrodes 501 and 502, and the voltage V applied between the electrodes is changed. In this case, how the transmittance of the liquid crystal layer 503 changes is shown by way of an example of a normally white display mode. From this graph, it can be seen that the transmittance of the liquid crystal decreases as the voltage V applied to the liquid crystal layer 503 increases. In the graph, V (T10) indicates a voltage when the transmittance is 10%, and V (T50) indicates a voltage when the transmittance is 50%.

  In particular, in the liquid crystal display device 100 of the present embodiment, the upper limit value of the voltage Vc is set to be smaller than V (T50) as shown in the following equation.

That is, the voltage Vc is
Vc = {C1 / (Clc + C1)} × Vd <V (T50) (Formula 3)
Set to be.

  The pixel capacitance Clc is made sufficiently larger than the parasitic capacitance C1 so as to satisfy Equation 3 above. In order to increase the pixel capacitance Clc, as understood with reference to Equation 1 above, (1) the cell gap between the element substrate 92 and the color filter substrate 91 is reduced, and (2) the dielectric of the liquid crystal layer 4 Examples of the method include increasing the rate, and (3) increasing the area of the pixel electrode 10. However, since the area of the pixel electrode 10 is determined to some extent for design reasons, in the present invention, it is preferable to apply the above (1) and (2) rather than the above (3).

  As described above, in this embodiment, the upper limit of the voltage Vc is set to be smaller than V (T50), and the pixel capacitance Clc is made sufficiently larger than the parasitic capacitance C1. For this reason, the potential of the pixel electrode can be prevented from fluctuating due to the parasitic capacitance between the adjacent data lines during the holding period Th, and the transmittance of the liquid crystal layer 4 can be maintained appropriately. Thereby, vertical crosstalk can be reduced, and a high-quality display image can be obtained. Therefore, in the liquid crystal display device 100, a high-quality display image can be obtained even when a rectangular display such as a single color or a complementary color is used with gray as a background color.

In the above description, the case where the voltage-transmittance characteristic of the liquid crystal layer 4 is used as a reference for defining the voltage Vc to be a certain magnitude has been described. It is considered that the characteristic (so-called VR characteristic) is included. For example, as shown in FIG. 9, the voltage-reflectance characteristic supplies light R1 reflected by the reflective film 504 to the liquid crystal layer 503 sandwiched between the transparent electrodes 501 and 502, and a voltage V applied between the electrodes. It shows how the reflectance of the reflected light changes when it is changed. For example, if the voltage corresponding to the reflectance of 50% is V (R50), the voltage Vlc is
Vlc = {C1 / (Clc + C1)} × Vd <V (R50)
Can be set to Note that V (R50) and V (T50) are not necessarily the same value. Also in this case, the potential of the pixel electrode can be prevented from fluctuating due to the parasitic capacitance between the adjacent data lines during the holding period Th, and the transmittance of the liquid crystal layer 4 can be properly maintained. Therefore, vertical crosstalk can be reduced, and a high-quality display image can be obtained.

(Modification)
In the above embodiment, the present invention is applied to the transflective liquid crystal display device 100. However, the present invention is not limited to this, and the present invention can also be applied to a reflective or transmissive liquid crystal display device. In the above embodiment, the present invention is applied to the normally white liquid crystal display device 100. However, the present invention is not limited to this, and the present invention can also be applied to a normally black liquid crystal display device. In the above embodiment, a liquid crystal display device using a TFD element as an active element has been exemplified. However, the present invention can be similarly applied to a liquid crystal display apparatus using a TFT element as an active element.

[Electronics]
Next, an embodiment in which the liquid crystal display device 100 according to the present invention is used as a display device of an electronic apparatus will be described.

  FIG. 10 is a schematic configuration diagram showing the overall configuration of the present embodiment. The electronic apparatus shown here includes the liquid crystal display device 100 and a control unit 410 that controls the liquid crystal display device 100. Here, the liquid crystal display device 100 is conceptually divided into a panel structure 403 and a drive circuit 402 composed of a semiconductor IC or the like. Further, the control means 410 includes a display information output source 411, a display information processing circuit 412, a power supply circuit 413, and a timing generator 414.

  The display information output source 411 includes a memory such as a ROM (Read Only Memory) or a RAM (Random Access Memory), a storage unit such as a magnetic recording disk or an optical recording disk, and a tuning circuit that tunes and outputs a digital image signal. The display information is supplied to the display information processing circuit 412 in the form of an image signal of a predetermined format based on various clock signals generated by the timing generator 414.

  The display information processing circuit 412 includes various well-known circuits such as a serial-parallel conversion circuit, an amplification / inversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and executes processing of input display information to obtain image information. Are supplied to the drive circuit 402 together with the clock signal CLK. The driving circuit 402 includes a scanning line driving circuit, a data line driving circuit, and an inspection circuit. The power supply circuit 413 supplies a predetermined voltage to each of the above-described components.

  Next, specific examples of electronic devices to which the liquid crystal display device 100 according to the present invention can be applied will be described with reference to FIG.

  First, an example in which the liquid crystal display device 100 according to the present invention is applied to a display unit of a portable personal computer (so-called notebook personal computer) will be described. FIG. 11A is a perspective view showing the configuration of this personal computer. As shown in the figure, the personal computer 710 includes a main body 712 having a keyboard 711 and a display 713 to which the liquid crystal display panel according to the present invention is applied.

  Next, an example in which the liquid crystal display device 100 according to the present invention is applied to a display unit of a mobile phone will be described. FIG. 11B is a perspective view showing the configuration of this mobile phone. As shown in the figure, the cellular phone 720 includes a plurality of operation buttons 721, a reception port 722, a transmission port 723, and a display unit 724 to which the liquid crystal display device 100 according to the present invention is applied.

  Electronic devices to which the liquid crystal display device 100 according to the present invention can be applied include a liquid crystal television and a viewfinder in addition to the personal computer shown in FIG. 11A and the mobile phone shown in FIG. Type / monitor direct-view type video tape recorder, car navigation device, pager, electronic notebook, calculator, word processor, workstation, videophone, POS terminal, digital still camera, etc.

The top view which shows the structure of the electrode and wiring of the liquid crystal display device which concern on this embodiment. The cross-sectional structure of the liquid crystal display device which concerns on this embodiment is shown. The top view which shows the structure of the electrode of the element substrate which concerns on this embodiment, and wiring. The structure of the electrode of the color filter substrate which concerns on this embodiment is shown. It is a wave form diagram of signal potential VA, VB, and VAB concerning this embodiment. It is a figure explaining longitudinal crosstalk. It is a figure explaining the generation | occurrence | production principle of vertical crosstalk. It is a figure explaining the reduction method of the vertical crosstalk which concerns on this embodiment. It is a figure explaining the reduction method of the vertical crosstalk which concerns on this embodiment. 1 is a circuit block diagram of an electronic apparatus to which a liquid crystal display device of the present invention is applied. 6 shows examples of electronic devices to which the liquid crystal display device of the present invention is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Upper substrate, 2 Lower substrate, 3 Seal member, 6 Colored layer, 7 Conductive member, 8 Scan electrode, 10, 10 'pixel electrode, 31 Scan line, 32, 32a, 32b, 32c Data line, 21 TFD element, 91 color filter substrate, 92 element substrate, 100 liquid crystal display device

Claims (3)

A first substrate having a plurality of signal lines, a plurality of pixel electrodes, a plurality of two-terminal elements connected to each of the signal lines and each of the pixel electrodes, and a plurality of scanning lines, A liquid crystal display device comprising: a second substrate opposed to the substrate; and a liquid crystal sealed between the first substrate and the second substrate,
Each parasitic capacitance generated between each pixel electrode and an adjacent signal line not connected to each pixel electrode is C1.
When each pixel capacitance of the liquid crystal sandwiched between each pixel electrode and each opposing scanning line is Clc,
Each of the pixel capacitors Clc is set to a large value with respect to each of the parasitic capacitors C1 based on the voltage-transmittance characteristics of the liquid crystal. The data amplitude voltage of the signal line is Vd,
When the voltage corresponding to the transmittance of 50% in the voltage-transmittance characteristics of the liquid crystal is V (T50),
2. The liquid crystal display device according to claim 1, wherein {C1 / (Clc + C1)} × Vd <V (T50). An electronic apparatus comprising the liquid crystal display device according to claim 1.

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