JP2005268249A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To integrally form an RF circuit ready for a high frequency band such as 10 GHz or above and an IC circuit on a silicon substrate at a low cost. <P>SOLUTION: The semiconductor device comprises: an active element 2 formed on the surface of the silicon substrate 1; an insulation film 3 formed on the surface of the silicon substrate 1 and separated from the active element 2; and a passive element 4 formed on the insulation film 3. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device including an active element and a passive element and a manufacturing method thereof, and more particularly to a semiconductor device suitable for an RF mixed system LSI in which an RF (Radio Frequency) circuit and an IC circuit are integrally formed, and the manufacturing thereof. Regarding the method.

  Conventionally, an RF-IC circuit used in a wireless communication system has an IC circuit formed on the surface of an expensive compound semiconductor substrate such as GaAs, and this IC circuit is formed on a ceramic sheet by screen printing or the like. An analog passive element such as an inductor has been manufactured by electrically connecting to the outside by wire bonding or the like.

  In recent years, with the spread of mobile phones and the development of short-range wireless communication systems such as Bluetooth (registered trademark) and wireless LAN, it is possible to manufacture a low-voltage and power-saving RF circuit capable of operating at a low cost and CMOS technology. Therefore, an attempt has been made to integrally form an IC circuit on a silicon (Si) substrate.

  However, when an RF circuit is formed on a silicon substrate 201 by CMOS technology as in the semiconductor device 200 shown in FIG. 5, an RF passive element 202 which is an example of an analog passive element including an inductor is formed as a so-called on-chip inductor. When formed, due to the parasitic effect of the silicon substrate 201, an electromagnetic field or the like leaks from the RF passive element 202 to the silicon substrate 101, and power loss occurs. In the figure, reference numeral 203 denotes an active element such as a transistor.

In order to avoid the performance degradation of the analog passive device due to such power loss, a CMOS process using an SOI (Silicon-On-Insulator) substrate, that is, a CMOS / SOI process has been proposed. According to this CMOS / SOI process, the analog passive element and the active element (CMOS) are separated by the insulating layer formed in the SOI substrate, so that the problem of power loss is eliminated. Therefore, a low voltage and power saving RF circuit can be manufactured by CMOS technology (see Non-Patent Document 1, etc.).
IEICE Transactions C, Vol. J86-C, No7, pp674-686, July 2003

  However, in the CMOS / SOI process described in Non-Patent Document 1, an expensive SOI substrate must be used in order to eliminate power loss. For this reason, a large amount of RF circuits cannot be supplied at low cost. Further, even when an extremely expensive fully depleted SOI substrate is employed, it is impossible to completely prevent the electromagnetic field from leaking out of the inductor (coil), so that the operating speed is limited due to power loss. For this reason, for example, an RF-IC circuit of 2 GHz to 5 GHz band can only be realized, and there is a problem that an RF circuit corresponding to a high frequency band of 10 GHz or more cannot be inexpensively manufactured on a silicon substrate.

  In order to solve the above-described problems, an object of the present invention is to provide a semiconductor device capable of inexpensively manufacturing an RF circuit corresponding to, for example, a high frequency band of 10 GHz or more on a silicon substrate, and a manufacturing method thereof. To do.

  The invention according to claim 1 includes an active element formed on the surface of the silicon substrate, an insulating film formed on the surface of the silicon substrate apart from the active element, and a passive element formed on the insulating film. A semiconductor device is provided.

  The invention according to claim 2 is the semiconductor device according to claim 1, wherein the insulating film has a thickness of 5 μm to 120 μm.

  The invention according to claim 3 is the semiconductor device according to claim 1, wherein the insulating film includes a photosensitive resin layer that can be exposed by X-rays.

  According to a fourth aspect of the present invention, there is provided a step of forming an active element on the surface of the silicon substrate, a step of forming an insulating film on the surface of the silicon substrate apart from the active element, and the insulating film connectable to the active element A method of manufacturing a semiconductor device, comprising: forming an opening in the insulating film; and forming a passive element electrically connected to the active element through the opening on the insulating film. .

  The invention according to claim 5 is characterized in that the step of forming, on the insulating film, a passive element that is electrically connected to the active element through the opening includes a lithography process of exposing with X-rays. A method for manufacturing a semiconductor device according to claim 4.

  The invention according to claim 6 is characterized in that the step of covering the surface of the silicon substrate with the insulating film includes the step of forming the insulating film so that the film thickness becomes 5 μm or more and 120 μm or less. 4. A method for manufacturing a semiconductor device as described in item 4.

  The invention according to claim 7 is the method for manufacturing a semiconductor device according to claim 4, wherein the insulating film includes a photosensitive resin layer that can be exposed by X-rays.

  According to the present invention, since the passive element is formed on the insulating film formed on the silicon substrate, the passive element and the active element formed on the silicon substrate surface can be completely separated by the insulating film. Therefore, power loss due to the parasitic effect of the silicon substrate can be avoided or reduced without using an expensive fully depleted SOI substrate.

  In addition, a passive element that is electrically connected to the active element through an opening that can be connected to the active element formed on the surface of the silicon substrate is accurately formed on the insulating film by one X-ray exposure. Can do. For this reason, for example, an RF circuit capable of high-speed operation corresponding to a high frequency band of 10 GHz or more can be manufactured on a silicon substrate at a low cost and with a high yield. For this reason, since the manufacturing cost can be reduced, the RF circuit and the IC circuit can be integrally formed at a lower cost. Therefore, for example, a large amount of semiconductor devices including an RF-IC circuit corresponding to a high frequency band of 10 GHz or more can be provided at low cost.

  The best mode for carrying out a semiconductor device and a method for manufacturing the same according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a perspective view showing a semiconductor device 100 as an embodiment of the present invention.

  As shown in FIG. 1, the semiconductor device 100 according to the present embodiment is formed on the surface of the silicon substrate 1 while being separated from the active element 2 formed on the surface of the silicon substrate 1 and the region where the active element 2 is formed. And the passive element 4 formed on the insulating film 3. The active element 2 is, for example, a MOS-FET, and its surface is covered with a CVD insulating film 2a.

  The insulating film 3 is configured to include a photosensitive resin layer made of a photosensitive resin that can be exposed by X-rays, for example, polymethyl methacrylate (PMMA) or a photosensitive polyimide.

  The insulating film 3 is formed so that the film thickness H is not less than 5 μm and not more than 120 μm. Next, the reason why the film thickness H of the insulating film 3 is limited to 5 μm or more and 120 μm or less will be described.

  That is, for example, when forming an RF circuit corresponding to a high frequency band higher than 5 GHz, if the film thickness H is less than 5 μm, leakage of the electromagnetic field from the passive element 4 cannot be completely prevented. The power loss at 4 cannot be sufficiently suppressed. For this reason, an RF circuit capable of high-speed operation cannot be formed.

Further, since the insulating film 3 includes the above-described photosensitive resin layer, it is difficult to form the insulating film 3 so that the film thickness H exceeds 120 μm, which causes a decrease in yield. Further, in an RF circuit having a frequency band of 5 GHz, for example, if the passive element 4 is about 100 μm away from the silicon substrate 1, the influence of the silicon substrate 1 can be sufficiently eliminated. It has been confirmed by simulation results that a separation distance of about 50 μm is sufficient for an RF circuit of 10 GHz and about 10 μm is sufficient for an RF circuit of 50 GHz.

  Accordingly, even when a 100 GHz RF mixed system LSI is manufactured, the insulating film 3 is formed so as to be 5 μm or more and 120 μm or less, so that the interaction between the silicon substrate 1 and the RF circuit including the passive element 4 can be achieved. It is possible to reliably eliminate the power loss caused by the. In addition, if the film thickness is 5 μm or more and 120 μm or less, even the insulating film 3 including the photosensitive resin layer can be easily and firmly formed. In the process of forming the passive element 4 and the like, the yield can be kept high. Therefore, when the inductor 4a is formed as the passive element 4, as shown in FIG. 2, an RF circuit such as an LC tuning circuit (tank circuit) 5 including an inductor L and a capacitor C, and a MOS-FET are used. Since an IC circuit including the active element 2 can be integrally formed on the silicon substrate 1, an RF embedded system LSI capable of high-speed operation can be realized without using an expensive SOI substrate.

  FIG. 3 is a schematic diagram showing a configuration of a 100 GHz-RF mixed system LSI 100a to which the semiconductor device 100 is applied. This 100 GHz-RF mixed system LSI 100a includes an MPU 2b and a memory 2c as an active element 2 on a silicon substrate 1, and also includes a millimeter wave amplifier circuit 4b and an IF-BB (Intermediate Frequency Baseband) circuit 4c as a passive element 4. Composed. On the silicon substrate 1, a MEMS (Micro-Electro Mechanical System) 6 is provided as necessary.

  Next, an example of a method for manufacturing the 100 GHz-RF mixed system LSI 100a will be described with reference to FIG. Here, a case where the MOS-FET 2d as an example of the active element 2 and a plurality of coiled spiral inductors 41, 42, 43 as an example of the passive element 4 are integrally formed on the silicon substrate 1 will be described.

  First, a MOS-FET 2d having a gate length of, for example, about 0.25 μm is formed as the active element 2 on the surface of the silicon substrate 1a by a known CMOS process.

  Next, a photosensitive resin layer 31 is formed as a layer of the insulating film 3 on the surface of the silicon substrate 1 on which the MOS-FET 2d is formed. The photosensitive resin layer 31 is coated with a photosensitive resin solution that can be exposed to X-rays, such as PMMA or photosensitive polyimide, so that the thickness is 5 μm or more and 120 μm or less, for example, a thickness of about 20 μm. To cover the surface of the silicon substrate 1.

  Then, a region for connection with the MOS-FET 2d is irradiated with X-rays from a known X-ray exposure apparatus, and a part of the photosensitive resin layer 31 covering the MOS-FET 2d is removed. Thus, the photosensitive resin layer 31 is formed with a thickness of about 20 μm, and the pad 21 connected to the contact 22 formed by the CMOS process is exposed. The pad 21 is, for example, an electrode formed in a rectangle having a side of about 5 μm.

  Next, the planarizing insulating layer 32 is formed on the photosensitive resin layer 31 to form the insulating film 3. The planarization insulating layer 32 is formed by forming a fluid CVD film such as ozone (O3) TEOS-CVD, or by forming a coating film such as a well-known SOG or SiLK (registered trademark). Then, a steep step of about 20 μm due to the photosensitive resin layer 31 is relaxed.

  By forming the planarizing insulating film 32 in this way, the insulating film 3 including the photosensitive resin layer 31 can be formed thickly to 5 μm or more and 120 μm or less, and the surface thereof is gently uneven by the planarizing insulating layer 32. Can be arranged.

  Thereafter, an opening 33 is formed in a region for connection to the MOS-FET 2d by a known resist process. Since the opening 33 may be a large opening of about 20 μm to 30 μm, the opening is formed in the insulating film 3 so as to be connectable to the MOS-FET 2d by a lithographic process of exposing with ultraviolet light such as g-line or i-line. 33 can be formed.

  Finally, inductors 41, 42, and 43 that are electrically connected to the MOS-FET 2 d through the opening 33 are formed as the passive elements 4 on the planarization insulating layer 32 of the insulating film 3. These inductors 41, 42, and 43 can be easily and accurately formed by a metallization process including a lithography process in which exposure is performed by X-rays.

  In this metallization step, first, an aluminum (Al) film having a thickness of about 2 μm is formed on the surface of the planarization insulating layer 32 of the insulating film 3 by sputtering, MO-CVD, electrolytic plating, or the like. As a result, aluminum is embedded in the opening 33, and the inductors 41, 42, and 43 are electrically connected to the MOS-FET 2d.

  Next, an inexpensive resist capable of X-ray exposure, such as a KrF exposure resist, is applied to the surface of the aluminum film, and the inductors 41, 42, 43 and the inductors 41, 42, 43 are electrically connected to each other by X-ray lithography. And an electrode pad 44 for connection to the electrode. The inductors 41, 42, and 43 formed here are formed extremely large as compared with the MOS-FET 2d so that the spiral line width W is, for example, about 10 μm and the outermost peripheral diameter is about 100 μm. Even large inductors 41, 42, and 43 can be formed with high accuracy on the surface having irregularities according to X-ray lithography.

  Further, since the metal filling in the opening 33, that is, the electrical connection with the MOS-FET 2d can be completed by a single exposure process, the “mortar-shaped contact” for electrical connection with the MOS-FET 2d. Can be easily formed. Therefore, the inductors 41, 42, and 43 and the MOS-FET 2d can be formed with a small number of steps and a high yield, so that the manufacturing cost can be suppressed.

  In order to physically and chemically protect the inductors 41, 42 and 43 thus formed and the mortar-shaped contact, a BPSG film is formed on the surface by atmospheric pressure CVD or the like, and then plasma CVD is performed. A passivation film is formed by forming a SiON film of about 0.5 μm or the like. As a result, the active element 2 and the passive element 4 for constituting the 100 GHz-RF mixed system LSI 100a can be integrally formed on the silicon substrate 1 at a very low cost.

  As described above in detail, according to the method of manufacturing a semiconductor device according to the present invention, the passive element 4 is accurately formed on the insulating film 3 formed on the surface of the silicon substrate 1 with a film thickness of 5 μm or more and 120 μm or less. In addition to being able to be formed, the passive element 4 and the active element 2 formed on the surface of the silicon substrate 1 a can be electrically separated almost completely by the insulating film 3. Therefore, power loss due to an electromagnetic field leaking from the passive element 4 can be avoided without using an expensive fully depleted SOI substrate. For this reason, it is possible to design an RF-IC circuit with these active elements 2 and passive elements 4 without limitation on the operation speed.

  In addition, according to the present invention, the passive element 4 and the MEMS 6 formed by separating the active element 2 from the active element 2 by the distance H by the insulating film 3 and the active element 2 by adopting a lithography process that exposes with X-rays. The connection can be easily made by a metallization process according to a known wiring process. For this reason, since the manufacturing cost can be reduced, the RF circuit and the IC circuit can be integrally formed at a lower cost. Therefore, for example, a semiconductor device including an RF-IC circuit corresponding to a high frequency band of 10 GHz or more, for example, a 100 GHz-RF mixed system LSI 100a can be manufactured in large quantities on an inexpensive silicon substrate 1 by a CMOS process. Become.

1 is a perspective view of a main part of a semiconductor device according to an embodiment of the present invention. The circuit diagram which shows the tank circuit as an example of the circuit containing the passive element shown in FIG. The schematic diagram which shows the structure of 100 GHz-RF hybrid system LSI100a to which the semiconductor device which concerns on this embodiment is applied. The principal part cross-section perspective view which shows the structure of the principal part of 100 GHz-RF mixed mounting system LSI100a in a partial cross section. Schematic which shows the structure of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Active element 3 Insulating film 31 Photosensitive resin layer 32 Planarizing insulating layer 4 Passive element 5 RF circuit 100, 200 Semiconductor device

Claims (7)

An active element formed on the surface of the silicon substrate;
An insulating film formed on the surface of the silicon substrate apart from the active element;
A semiconductor device comprising: a passive element formed on the insulating film. The semiconductor device according to claim 1, wherein the insulating film has a thickness of 5 μm to 120 μm. The semiconductor device according to claim 1, wherein the insulating film includes a photosensitive resin layer that can be exposed by X-rays. Forming an active element on the surface of the silicon substrate;
Forming an insulating film on the surface of the silicon substrate apart from the active element;
Forming an opening in the insulating film so as to be connectable to the active element;
Forming a passive element electrically connected to the active element through the opening on the insulating film. A method for manufacturing a semiconductor device, comprising: 5. The semiconductor device according to claim 4, wherein the step of forming a passive element electrically connected to the active element through the opening on the insulating film includes a lithography process of exposing with X-rays. Manufacturing method. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the step of covering the surface of the silicon substrate with the insulating film includes a step of forming the insulating film so as to have a film thickness of 5 μm to 120 μm. Method. The method of manufacturing a semiconductor device according to claim 4, wherein the insulating film includes a photosensitive resin layer that can be exposed by X-rays.

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