JP2005259970A - Semiconductor light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element capable of improving the take-out efficiency of light emitted from an active layer, and further, capable of reducing an operating voltage by preventing the warpage or the like of a substrate and improving ohmic properties of a p-type contact layer and a positive electrode, by a method wherein a semiconductor film is employed as a positive electrode and recesses and projections are formed on the surface of the p-type contact layer. <P>SOLUTION: The semiconductor light emitting element is provided with the positive electrode formed on the p-type semiconductor layer through the p-type contact layer, and the recesses and projections are formed on the surface of the p-type contact layer while the positive electrode is constituted of the semiconductor film comprising at least one kind of an element selected from a group composed of zinc, indium, tin and magnesium. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device in which irregularities are formed on the surface of a semiconductor layer.

Conventionally, a structure in which a p-type semiconductor layer and an n-type semiconductor are stacked on a substrate and an electrode electrically connected to each of the p-type and n-type semiconductor layers is formed as a semiconductor light emitting device. . Further, as an electrode electrically connected to the p-type semiconductor layer, a structure is known in which an electrode made of a translucent material is formed on the entire surface of the p-type semiconductor layer, and a metal electrode is formed thereon.
In the semiconductor light emitting device having such a configuration, a transparent metal thin film such as a Ni / Au electrode or a conductive oxide film such as ITO, ZnO, In ₂ O ₃ or SnO _{2 is used} as the entire surface electrode on the p-type semiconductor layer. (For example, Patent Documents 1 and 2).

However, the metal thin film has a low light transmittance, and there is a limit to improving the light extraction efficiency.
In addition, since conductive oxide, for example, ITO itself exhibits n-type semiconductor characteristics, it does not necessarily have good ohmic properties with the semiconductor layer, and various factors such as the type of semiconductor layer, conductivity type, film formation method, etc. Therefore, a Schottky barrier is formed, and the contact resistance may be increased. Therefore, the film formation conditions, type, impurity concentration, conductivity type, etc. of the semiconductor layer and the ITO film are limited, or the power efficiency is lowered due to the deterioration of the ohmic property of the conductive oxide film to the semiconductor layer. There was a problem that the extraction efficiency was lowered.

Furthermore, the semiconductor light emitting device is configured by laminating a nitride semiconductor layer or the like on a sapphire substrate, for example, but there is a problem that crystal defects are likely to occur due to a difference in lattice constant between the sapphire substrate and the nitride semiconductor layer. . In order to solve this problem, when growing a nitride semiconductor layer on a sapphire substrate, various methods such as partially forming a growth suppression film or growing a buffer layer at a low temperature are employed. .
However, even if a nitride semiconductor layer with relatively few crystal defects is formed by these methods, a tensile strain or a compressive strain based on the difference in lattice constant occurs inside the sapphire substrate or nitride semiconductor layer. In some cases, the warp of the nitride semiconductor layer including the sapphire substrate may occur.

JP 2000-164922 A JP 2001-210867 A

  The present invention has been made in view of the above problems, and can improve the extraction efficiency of light emitted from the active layer by forming irregularities on the surface of the p-type contact layer provided as a layer in contact with the positive electrode. Further, it is an object of the present invention to provide a semiconductor light emitting device capable of preventing the warpage of the substrate and the like, improving the ohmic property between the p-type contact layer and the positive electrode, and reducing the operating voltage.

The semiconductor light-emitting device of the present invention is a semiconductor light-emitting device comprising a positive electrode formed on a p-type semiconductor layer via a p-type contact layer, wherein irregularities are formed on the surface of the p-type contact layer. And the positive electrode is made of a semiconductor film containing at least one element selected from the group consisting of zinc, indium, tin and magnesium.
The semiconductor light emitting device may be configured by stacking a p-type semiconductor layer on a sapphire substrate.

The positive electrode is made of an oxide, and is particularly preferably an ITO film.
Furthermore, it is preferable that the p-type semiconductor layer and / or the p-type contact layer is a nitride semiconductor, particularly the p-type semiconductor layer is GaN.
Further, the unevenness on the surface of the p-type contact layer can be either a periodic or irregular lattice pattern, or a pattern in which polygons or substantially polygons are arranged periodically or irregularly.
Further, an n-type semiconductor layer may be formed above or below the p-type contact layer, a negative electrode may be connected to the n-type semiconductor layer, and a metal film may be formed on the positive electrode.
Further, the negative electrode and the positive electrode, or the negative electrode and the positive electrode and further the metal film formed thereon may be formed in the same layer structure.

  According to the semiconductor light-emitting device of the present invention, the semiconductor includes at least one element selected from the group consisting of zinc, indium, tin and magnesium, with irregularities formed on the surface of the p-type contact layer, and the positive electrode. Since it is made of a film, warpage of the p-type contact layer caused by the difference between the lattice constant of the p-type contact layer and the lattice constant of the semiconductor film is prevented by adhesion in the film thickness direction with the semiconductor film on the surface of the p-type contact layer. It becomes possible to do. In addition, since the contact area between the p-type contact layer and the semiconductor film increases, the adhesion of the semiconductor film to the p-type contact layer can be further improved.

Further, when the p-type semiconductor layer is formed on the sapphire substrate, the p-type semiconductor layer and the p-type contact layer have a lattice constant different from that of the sapphire substrate. Warping occurs in the p-type semiconductor layer and the p-type contact layer. However, due to the lattice constant of the semiconductor film on the surface of the p-type contact layer, the warpage of the p-type semiconductor layer and the p-type contact layer is offset by the stress of the semiconductor film, which is more advantageous.
Furthermore, when the positive electrode is an oxide, particularly an ITO film, the cubic a-axis lattice constant of the ITO film is 1.0117 nm, which is considerably larger than that of the p-type contact layer. The effect is more remarkable.
In addition, when the p-type semiconductor layer and / or the p-type contact layer is a nitride semiconductor, particularly when the p-type semiconductor layer is GaN, the lattice constant is smaller than that of the semiconductor film constituting the positive electrode. The above effects can be ensured.

Further, when the irregularities on the surface of the p-type contact layer are either a periodic or irregular lattice pattern, or a pattern in which polygons or substantially polygons are arranged periodically or irregularly, The light generated in the layer can control the reflection of light to the irregularities on the surface of the p-type contact layer, and the light extraction efficiency can be improved.
When an n-type semiconductor layer is formed above or below the p-type contact layer, a negative electrode is connected to the n-type semiconductor layer, and a metal film is formed on the positive electrode, the metal film is p It can reduce the Schottky barrier when directly applied to the mold contact layer, and ensures good adhesion of the metal film regardless of the form of the metal film, such as solder bonding or wire bonding. can do. In particular, when W or Rh is used as the metal film, the adhesion with the positive electrode becomes very good, and the reliability of electrical connection can be improved. In particular, when the metal film uses a single layer film or laminated film of W, Rh, Ag, Pt, Pd, and Al, especially W, Rh, or Pt, the adhesion to the positive electrode, for example, the ITO film is extremely high. It becomes good and the reliability of electrical connection is high.

  Further, when the negative electrode and the positive electrode, or the negative electrode and the positive electrode and the metal film formed thereon are formed in the same layer structure, the electrodes are simultaneously formed by the same process. Since it can be formed, the manufacturing cost can be reduced and an inexpensive semiconductor light emitting element can be obtained.

The p-type semiconductor layer in the semiconductor light emitting device of the present invention is not particularly limited, and elemental semiconductors such as silicon and germanium, compound semiconductors such as III-V group, II-VI group, and VI-VI group, etc. Can be mentioned. In particular, a nitride semiconductor, among others _{In X Al Y Ga 1-X} -Y N (0 ≦ X, 0 ≦ Y, X + Y ≦ 1) gallium nitride-based compound such as a semiconductor is preferably used.
The p-type semiconductor layer is a part of a semiconductor multilayer structure that constitutes a semiconductor light-emitting element, and may have a single-layer structure, but may have a multilayer structure or a superlattice structure of layers having different compositions and film thicknesses. This p-type semiconductor layer can be formed by a known technique such as metal organic chemical vapor deposition (MOCVD), hydride vapor deposition (HVPE), molecular beam epitaxy (MBE), or the like. The thickness of the p-type semiconductor layer is not particularly limited, and various thicknesses can be applied.

Usually, the semiconductor light emitting device includes such a p-type semiconductor layer and is configured by a semiconductor stacked structure such as a homo structure, a hetero structure, or a double hetero structure having a MIS junction, a PIN junction, or a PN junction. Examples of the semiconductor light emitting element include elements known in the art such as LEDs and laser diodes. Specifically, the semiconductor light emitting device is configured by laminating an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer on a substrate, and electrodes are connected to the n-type and p-type semiconductor layers, respectively. Similar to the p-type semiconductor layer, the n-type semiconductor layer may have a single-layer structure, but may have a stacked structure of layers having different compositions and film thicknesses, or a superlattice structure. The active layer may have a single quantum well structure or a multiple quantum well structure in which thin films that generate quantum effects are stacked. Note that the n-type semiconductor layer and the p-type semiconductor layer may be stacked in reverse order on the substrate.

  As a substrate on which this type of semiconductor light emitting element is formed, an insulating substrate such as sapphire or a conductive substrate such as a nitride semiconductor can be used. Of these, an insulating substrate is preferable. When the insulating substrate is not finally removed, both the p-electrode and the n-electrode are normally formed on the same surface side of the semiconductor layer, and face-up mounting (that is, the main light extraction is performed on the semiconductor layer side). Surface) and flip chip mounting (face-down mounting, that is, the insulating substrate side is the main light extraction surface). In this case, metallization layers (bumps: Ag, Au, Sn, In, Bi, Cu, Zn, etc.) for connection with external electrodes or the like are formed on the p electrode and the n electrode, respectively. A pair of positive and negative external electrodes provided on the submount are connected to each other, and wires are wired to the submount. Further, the substrate may be finally removed and used for either face-up mounting or flip chip mounting. In addition, as a board | substrate, it is not limited to sapphire, For example, well-known board | substrates, such as a spinel, SiC, GaN, GaAs, can be used. Further, by using a conductive substrate such as SiC, GaN, or GaAs as the substrate, the p electrode and the n electrode may be arranged to face each other.

The p-type contact layer formed on the p-type semiconductor layer is used to improve contact with the positive electrode electrically connected to the p-type semiconductor layer, and is electrically connected to the positive electrode. In general, it is formed of a layer having a lower resistance than the p-type semiconductor layer. As a p-type contact layer, it can select suitably from the material illustrated by the p-type semiconductor layer, for example. The p-type contact layer may have a function as a clad layer or other layers. The p-type contact layer is usually doped with p-type impurities to reduce the resistance. The dopant is not particularly limited, and it is appropriate to use an element exhibiting p-type conductivity depending on the material of the p-type contact layer. For example, the p-type contact layer is a nitride semiconductor, that is, GaN, AlN, InN, or a mixed crystal thereof (for example, In _x Al _y Ga _1-xy N, 0 ≦ x, 0 ≦ y, x + y ≦ 1). And the like, examples of the p-type impurity include Mg, Zn, Cd, Be, Ca, Ba, and the like. Among these, Mg is preferable. The doping concentration is, for example, about 1 × 10 ¹⁸ cm ⁻³ or more, preferably about 1.5 × 10 ²⁰ to 1 × 10 ²² cm ⁻³ . The p-type contact layer is formed by any method known in the art such as MOVPE, MOCVD (metal organic chemical vapor deposition), HVPE (halide vapor deposition), MBE (molecular beam vapor deposition). can do. Impurity doping may be performed simultaneously with film formation, or may be performed by vapor phase diffusion, solid phase diffusion, ion implantation, or the like after film formation.

Irregularities are formed on the surface of the p-type contact layer. The shape of the unevenness is not particularly limited, and can be appropriately adjusted in consideration of light extraction efficiency.
For example, a periodic or irregular lattice pattern, a circular shape, a polygonal shape, or a substantially polygonal periodic or irregular arrangement pattern in which the corners of the polygon are slightly rounded. Among them, a convex shape such as a triangle, a quadrangle, a hexagon, or the like, in which unevenness can be densely arranged, is preferable. Depending on the formation method, these patterns may have different shapes on the pattern surface and the bottom surface, that is, shapes that become narrower as the pattern surface is approached, shapes that have rounded corners, and the like. In the case of a periodic pattern, the pitch is suitably about 1 μm or less, about 700 nm or less, about 500 nm or less, about 300 nm or less, for example. The height of the unevenness is not particularly limited and can be appropriately adjusted depending on the material, film thickness, etc. of the p-type contact layer. For example, the height is about 2 μm or less, about 500 nm or less, preferably about 10 to 500 nm. It is done. Such a concavo-convex pattern is preferably set so as to satisfy the relationship of d ≦ W, where, for example, the depth of the recess is d and the width of the upper surface of the pattern is W. Thereby, reflection of light can be controlled and light extraction efficiency can be improved.

The positive electrode in the present invention is formed on a p-type semiconductor layer via a p-type contact layer, and includes a semiconductor film containing at least one element selected from the group consisting of zinc, indium, tin and magnesium Consists of. Specific examples include oxides, in particular, ZnO, In ₂ O ₃ , SnO ₂ , ITO (complex oxide of In and Sn), MgO, and the like. Of these, an ITO film is preferable.
The film thickness of the positive electrode is not particularly limited, and can be appropriately set according to its resistance value, transmittance, and the like. For example, about 5 micrometers or less, about 2.5 micrometers or less, and about 100-1000 nm are mentioned. The film thickness of the positive electrode may be uniform over the entire positive electrode, or may be non-uniform depending on the uneven shape of the p-type contact layer. Further, the p-type contact layer side has a shape corresponding to the uneven shape of the p-type contact layer, but the surface side may be a shape corresponding to the uneven shape of the p-type contact layer, or flat. It may be.

The semiconductor film constituting the positive electrode is not only visible light, but also, for example, light generated from the active layer made of the above-described gallium nitride compound semiconductor, that is, a wavelength of about 360 nm to 650 nm, preferably 380 nm to 560 nm, preferably 400 nm to 600 nm. It is preferable that the light can be efficiently transmitted, for example, at a transmittance of 90% or more, 85% or more, or 80% or more without absorbing the light. Thereby, it can utilize as an electrode of the semiconductor light emitting element of the intended wavelength. Furthermore, for example, the specific resistance of the semiconductor film is preferably 1 × 10 ⁻⁴ Ωcm or less, and more preferably about 1 × 10 ⁻⁴ to 1 × 10 ⁻⁶ Ωcm. Thereby, it can utilize effectively as an electrode.

The semiconductor film can be formed by a method known in the art. For example, sputtering method, reactive sputtering method, vacuum deposition method, ion beam assisted deposition method, ion plating method, laser ablation method, CVD method, spray method, spin coating method, dipping method or a combination of these methods and heat treatment Various methods can be used.
The semiconductor film preferably has a lower density than the surface side at the interface with the p-type contact layer. In other words, the porous state is preferably only in the vicinity of the interface with the semiconductor layer. Examples of the porous state include a state where a plurality of pores having a diameter of about 20 to 200 nm are present uniformly or non-uniformly. Examples of the density include about 90 to 30% on the surface side of the semiconductor film. The state of such a semiconductor film is, for example, a method of observing a cross section by transmission electron microscopy (TEM), a method of observing by scanning electron microscopy (SEM), a method of measuring an electron diffraction pattern, or an ultra-thin film evaluation apparatus It can measure by the method of observing with.

  In this case, the surface side of the semiconductor film is a transparent film having good crystallinity, and may have a partially amorphous region in a low density region, but it is not completely amorphous. It is preferably formed as a transparent film or a substantially transparent film.

  It is appropriate that the low density region exists in the range of 10 to 50% of the total thickness of the semiconductor film from the interface with the p-type contact layer. Thus, since the density is low only on the p-type contact layer side, the translucency can be improved while ensuring the ohmic property with the p-type contact layer.

  As described above, as a method for forming semiconductor films having different densities in the film thickness direction, for example, when a semiconductor film, for example, an ITO film is formed by sputtering, the oxygen partial pressure is small or zero as a sputtering gas. In addition to the method of switching from gas to large gas or gradually increasing the oxygen partial pressure and using the target for ITO film formation, a target with a large amount of In or a target with a small amount of oxygen is used. Examples thereof include a method of switching to a target or a target having a small amount of oxygen, and a method of forming a film by gradually or rapidly increasing the input power of the sputtering apparatus. In addition, when a semiconductor film such as an ITO film is formed by vacuum deposition, a method of rapidly or gradually increasing or decreasing the temperature of the semiconductor layer, a method of rapidly decreasing a film formation rate, oxygen using an ion gun The method etc. which irradiate ion from the middle of film-forming are mentioned.

  Furthermore, when a semiconductor film such as an ITO film is formed by an ion plating method, the oxygen gas is turned into plasma from the middle of the film formation, and this oxygen plasma is taken into the ITO film to form the film, ITO When dissolving or dispersing or suspending fine particles in a solvent to form a film by a spray method, spin coating method, or dipping method, a plurality of types in which the In content or the oxygen content of the ITO-containing solution or the like is changed are changed. Examples include a method of using a solution or the like, a method of controlling the atmosphere or temperature during drying or baking, and a method of controlling the flow rate of oxygen gas or raw material oxygen-containing gas when forming an ITO film by a CVD method.

  In addition, after forming a semiconductor film, for example, an ITO film, for example, in a reducing gas atmosphere (specifically, carbon monoxide, hydrogen, argon, etc. or a mixed gas of two or more thereof) at 200 to 650 ° C. For example, a method of annealing for a predetermined time according to the thickness of the semiconductor film may be used. Alternatively, a multi-stage heat treatment may be used, such as forming a semiconductor film, for example, an ITO film halfway, followed by heat treatment, followed by film formation and heat treatment. Examples of the heat treatment method include a lamp annealing process and an annealing process using a heating furnace. Further, as a process after forming the ITO film, electron beam irradiation or laser ablation may be used. Furthermore, these methods may be arbitrarily combined.

  In the semiconductor light emitting device, the positive electrode made of the semiconductor film described above is preferably formed as a full-surface electrode covering substantially the entire surface at least on the p-type semiconductor layer. Usually, a semiconductor film is hard to obtain ohmic property on a p-type contact layer made of a p-type semiconductor layer, but good ohmic property can be obtained by using a semiconductor film as described above.

  The semiconductor film may be formed not only on the p-type semiconductor layer (p-type contact layer) but also on the n-type semiconductor layer (for example, n-type contact layer). When it is formed on the n-type semiconductor layer, that is, when it is formed as a negative electrode, its type, laminated structure, film thickness, etc. may be different from those formed on the p-type contact layer. Preferably they are the same. In the case where the positive electrode and the negative electrode are formed of the same semiconductor film in the same process, the manufacturing process is simplified, and as a result, an inexpensive and highly reliable semiconductor light emitting device can be obtained.

  In the present invention, a metal film may be formed in a partial region on the positive electrode. The metal film is preferably one that can function as a pad electrode or the like bonded by solder or wire bonded. The kind and form of the metal film are not particularly limited, and any metal film can be used as long as it is normally used as an electrode. For example, zinc (Zn), nickel (Ni), platinum (Pt), palladium (Pd), rhodium (Rh), ruthenium (Ru), osmium (Os), iridium (Ir), titanium (Ti), zirconium (Zr) ), Hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), cobalt (Co), iron (Fe), manganese (Mn), molybdenum (Mo), chromium (Cr), tungsten (W ), Lanthanum (La), copper (Cu), silver (Ag), gold (Au), yttrium (Y), and other metals, alloy single layer films or laminated films. Among them, those having low resistance are preferable, and specific examples include single layer films or laminated films of W, Rh, Ag, Pt, Pd, Al, and the like. Furthermore, a semiconductor film, for example, a film having good adhesion to an ITO film, specifically, a single layer film or a laminated film of W, Rh, and Pt is preferable.

  Specifically, Rh / Pt / Au electrodes in which Rh, Pt, and Au are sequentially stacked from the semiconductor layer side by sputtering (the film thickness is, for example, 100 nm / 200 nm / 500 nm, respectively); each of Pt and Au A Pt / Au electrode (thickness of each of which is, for example, 20 nm / 700 nm) and the like, which are sequentially laminated by sputtering. By using Au as the uppermost layer of the metal film, it is possible to ensure good connection with a conductive wire or the like mainly composed of Au. Further, by stacking Pt between Rh and Au, diffusion of Au or Rh can be prevented, and highly reliable electrical connection as an electrode can be obtained. Rh is excellent in light reflectivity and barrier properties, and can be suitably used because light extraction efficiency is improved. Among these, a laminated film of Pt / Au (in the case of face up) and Rh / Pt / Au (in the case of face down) is preferable. In the case of face-down mounting, it is preferable to further form a metallized layer on the metal film. The metallized layer can be formed of Ag, Au, Sn, In, Bi, Cu, Zn, or the like.

  In addition, the metal film and the metallized layer may be formed not only electrically connected to the positive electrode but also electrically connected to the negative electrode. In this case, the metal film may be formed directly on the n-type semiconductor layer, or may be formed via a semiconductor film (for example, ITO) as described above. In addition, the metal film formed on the positive electrode and the metal film formed directly on the n-type semiconductor layer or through the semiconductor film such as ITO are different in type, laminated structure, film thickness, etc. However, it is preferable that they are the same. When these metal films are formed in the same process, the manufacturing process is simplified, and as a result, an inexpensive and highly reliable semiconductor light emitting device can be obtained.

  Examples of the semiconductor multilayer structure constituting the semiconductor light emitting device in the present invention include the multilayer structures as shown in the following (1) to (5).

(1) A buffer layer made of GaN having a thickness of 200 mm, an n-type contact layer made of Si-doped n-type GaN having a thickness of 4 μm, and a single layer made of undoped In _0.2 Ga _0.8 N having a thickness of 30 mm. An active layer having a quantum well structure, a p-type cladding layer made of Mg-doped p-type Al _0.1 Ga _0.9 N having a thickness of 0.2 μm, and a p-type made of Mg-doped p-type GaN having a thickness of 0.5 μm Contact layer.

(2) A buffer layer made of AlGaN having a thickness of about 100 mm, an undoped GaN layer having a thickness of 1 μm, an n-side contact layer made of GaN containing 4.5 × 10 ¹⁸ / cm ³ of Si having a thickness of 5 μm, and 3000 μm undoped. An n-side first multilayer film layer (total film) consisting of three layers: a lower layer made of GaN, an intermediate layer made of GaN containing 4.5 × 10 ¹⁸ / cm ^{3 of} 300 Ｓｉ Si, and an upper layer made of 50 Å undoped GaN. (Thickness: 3350 mm), 40 mm of nitride semiconductor layer made of undoped GaN and 20 mm of nitride semiconductor layer made of undoped In _0.1 Ga _0.9 N are stacked alternately and 10 layers each, and further made of undoped GaN. N-side second multilayer film layer (total film thickness: 640 mm) having a superlattice structure in which a nitride semiconductor layer is formed with a film thickness of 40 mm, an undoped film with a thickness of 250 mm barrier layer and the film thickness made of aN are laminated by six layers alternately repeated and a well layer made of _In 0.3 _{Ga 0.7} N of 30 Å, the barrier further comprising thickness of undoped GaN of 250Å was formed An active layer having a multiple quantum well structure (total film thickness: 1930 Å), a nitride semiconductor layer made of Al _0.15 Ga _0.85 N containing 5 × 10 ¹⁹ / cm ³ of Mg, and 5 × 10 ¹⁹ / Mg of Mg Five layers of nitride semiconductor layers composed of In _0.03 Ga _0.97 N containing cm ³ are repeatedly stacked in layers of 25%, and further Al _0.15 Ga containing 0.5 × 10 ¹⁹ / cm ^{3 of} Mg _. A p-side multilayer film layer (total film thickness: 365 mm) having a superlattice structure in which a nitride semiconductor layer made of ₈₅ N is formed with a thickness of 40 mm, GaN containing 1 × 10 ²⁰ / cm ³ of Mg with a film thickness of 1200 mm P consisting of Contact layer.

(3) A buffer layer made of AlGaN having a thickness of about 100 Å, an undoped GaN layer having a thickness of 1 μm, an n-side contact layer made of GaN containing 4.5 × 10 ¹⁸ / cm ³ of Si having a thickness of 5 μm, An n-side first multilayer film composed of three layers: a lower layer made of undoped GaN, an intermediate layer made of GaN containing 4.5 × 10 ¹⁸ / cm ^{3 of} 300 Ｓｉ Si, and an upper layer made of 50 Å undoped GaN (total A film thickness of 3350 mm), 40 mm of nitride semiconductor layers made of undoped GaN, and 20 mm of nitride semiconductor layers made of undoped In _0.1 Ga _0.9 N are alternately stacked in layers of 10 layers, and further made of undoped GaN. N-side second multilayer film layer (total film thickness) 640 mm) having a superlattice structure in which a nitride semiconductor layer is formed with a film thickness of 40 mm, and initially the film thickness is 2 First barrier thickness Following a barrier layer made of undoped GaN of 0Å is a well layer and the film thickness made of _In 0.3 _{Ga 0.7} N of 30Å consisting 100Å of _In 0.02 _{Ga 0.98} N An active layer (total film thickness of 1930 mm) formed by repeatedly stacking six layers of layers and a second barrier layer made of undoped GaN having a thickness of 150 mm (total film thickness of 1930 mm) the preferred range of 3 layers to 6 layers), Mg and 5 × ¹⁰ 19 / cm ³ comprising _Al 0.15 _{Ga 0.85} 5 × a 40Å and Mg nitride semiconductor layer made of N ¹⁰ 19 / cm ³ containing in Nitride composed of Al _0.15 Ga _0.85 N containing 5 × 10 ¹⁹ / cm ^{3 of} Mg 3 × 10 ¹⁹ / cm ^3, in which 5 layers of nitride semiconductor layers composed of _0.03 Ga _0.97 N are alternately stacked in layers of 25%. Semiconductor A p-side multilayer layer (total film thickness 365 mm) having a superlattice structure in which the body layer is formed with a film thickness of 40 mm, and a p-side contact layer made of GaN containing 1 × 10 ²⁰ / cm ³ of Mg having a film thickness of 1200 mm. _{Further, a lower layer made of 3000 ア ン undoped GaN provided on the n side, a first layer made of 1500 ア ン undoped GaN from the bottom, a} second layer made of GaN containing _{5 Å 10} ¹⁷ / cm ^{3 of} _{100 Ｓｉ Si,} and 1500 Å By using a lower layer of a three-layer structure composed of a third layer made of undoped GaN, it becomes possible to suppress the variation in _{Vf with} the lapse of the driving time of the light emitting element.

(4) Buffer layer, undoped GaN layer, n-side contact layer made of GaN containing 6.0 × 10 ¹⁸ / cm ^{3 of} Si, undoped GaN layer (the above is an n-type nitride semiconductor layer having a total film thickness of 6 nm), Si the 2.0 × ¹⁰ 18 / cm ³ comprising GaN barrier layer and the active layer of the InGaN well layer and a multiple quantum well which is repeated alternately stacked five layers of, 5.0 × the Mg having a thickness of 1300 Å ^{10 18} / A p-type nitride semiconductor layer made of GaN containing cm ³ and an InGaN layer having a thickness of 50 mm may be provided between the light-transmitting conductive layer and the p-type nitride semiconductor layer. When a 50-inch InGaN layer is provided, this layer is in contact with the positive electrode and can be a p-side contact layer.

(5) Buffer layer, undoped GaN layer, n-side contact layer made of GaN containing 1.3 × 10 ¹⁹ / cm ^{3 of} Si, undoped GaN layer (the above is an n-type nitride semiconductor layer with a total film thickness of 6 nm), Si Is an active layer (total film thickness: 800 mm) of multiple quantum wells in which seven layers of GaN barrier layers and InGaN well layers containing 3.0 × 10 ¹⁸ / cm ³ are alternately stacked, and Mg having a film thickness of 1300 mm A p-type nitride semiconductor layer made of GaN containing 2.5 × 10 ²⁰ / cm ^3, and an InGaN layer having a thickness of 50 mm between the translucent conductive layer and the p-type nitride semiconductor layer may be provided. . When a 50-inch InGaN layer is provided, this layer is in contact with the positive electrode and can be a p-side contact layer.

  In addition, the semiconductor light emitting device of the present invention may have a light conversion member that converts part of light from the light emitting device into light having a different wavelength. As a result, a light-emitting device in which light from the light-emitting element is converted can be obtained, and a light-emitting device in white or light bulb color can be obtained by using mixed color light of the light emission from the light-emitting element and converted light.

  As the light conversion member, aluminum containing Al and containing at least one element selected from Y, Lu, Sc, La, Gd, Tb, Eu, and Sm and one element selected from Ga and In And garnet phosphors, and aluminum garnet phosphors containing at least one element selected from rare earth elements. Thereby, even when the light emitting element is used with high output and high heat generation, a light emitting device having excellent temperature characteristics and excellent durability can be obtained.

The light conversion member is (Re _1−x R _x ) ₃ (Al _1−y Ga _y ) ₅ O ₁₂ (0 <x <1, 0 ≦ y ≦ 1, where Re is Y, Gd, La, Lu , Tb, Sm, and at least one element selected from the group consisting of Sb, Tb, and Sm, and R may be Ce or Ce and Pr). Thus, as described above, a high-power light-emitting element can be an element having excellent temperature characteristics and durability. In particular, when the active layer is InGaN, the temperature characteristics change along with black body radiation, and white This is advantageous in system light emission.

Furthermore, the light conversion member contains N and is selected from at least one element selected from Be, Mg, Ca, Sr, Ba and Zn, and from C, Si, Ge, Sn, Ti, Zr and Hf. It may be a nitride-based phosphor containing at least one element and activated by at least one element selected from rare earth elements. Specifically, the general formula _{L X Si Y N (2 /} 3X + 4 / 3Y): Eu or _{L X Si Y O Z N (} 2 / 3X + 4 / 3Y-2 / 3Z): Eu (L is, Sr or Ca, Or any one of Sr and Ca.). As a result, similar to the phosphor described above, excellent temperature characteristics and durability can be obtained in a high-output light emitting device. Of these, a silicon oxynitride compound is preferable. Further, by combining with the above-described aluminum / garnet phosphor, the temperature characteristics of the two interact with each other, and a light emitting device in which the temperature change of the mixed color is small can be obtained.

  In the semiconductor light emitting device of the present invention, it is preferable that the metal film is not only used as a pad electrode but also provided with an extended conductive portion. As a result, the entire active layer can emit light efficiently, which is particularly effective when the semiconductor light emitting device of the present invention is provided by face-up mounting.

Examples of the pad electrode provided with the extended conductive portion include the configurations shown in FIGS.
As shown in FIGS. 1 and 2, the n-electrode 53 is formed so as to be close to at least one side of the semiconductor light emitting device. For example, a p-type semiconductor layer 52 and a part of the active layer are removed by etching at the center of one side to provide a notch 51a in which the n-type contact layer 51 is exposed, and an n-electrode is formed on the notch 51a. 53 is formed.

  The p-side pad electrode 55 is formed at a position adjacent to the side opposite to the side on which the n electrode is adjacent on the transparent electrode 54. The p-side pad electrode 55 is connected to an extended conductive portion 56 on two lines, and the extended conductive portion 56 extends along sides adjacent to the p-side pad electrode 55 on both sides of the p-side pad electrode 55. . Thereby, the active layer located between the p-side pad electrode 55 and the n-electrode 53 can emit light efficiently. Further, by forming the extended conductive portion 56 connected to the p-side pad electrode 55 so as to be electrically conductive on the transparent electrode 54, the current is effectively diffused throughout the p layer, and the entire light emitting layer is efficiently formed. Can emit light. In addition, light emission with high luminance can be obtained at the periphery of the p-side pad electrode 55 and the extended conductive portion 56. Therefore, in the present invention, it is more preferable to effectively use light emission with high luminance in the peripheral portion of the extended conductive portion 56.

  More specifically, the extended conductive portion 56 and the peripheral portion where the above-described high-luminance light emission is obtained are secured between the extended conductive portion 56 and the edge of the light emitting layer and the p layer formed along the extended conductive portion 56. As described above, it is preferable to leave a space between the edge and the extended conductive portion 56. When the sheet resistance RnΩ / □ of the n-type contact layer 51 and the sheet resistance RpΩ / □ of the translucent p-electrode 54 satisfy the relationship of Rp ≧ Rn, the edge of the extended conductive portion 56 and the light emitting layer Is preferably 20 μm or more and 50 μm or less. This is because if the interval is smaller than 20 μm, a sufficient peripheral region where light emission with high luminance can be obtained cannot be secured (the region where light emission with high luminance should be obtained protrudes outside). This is because a portion having a low emission luminance is formed along the line, resulting in a decrease in luminance as a whole.

Further, as shown in FIG. 1, each of the extended conductive portions 56 is preferably formed in an arc shape so as to be equidistant from the n-electrode 53, and when this is provided linearly as shown in FIG. Compared to the above, a more uniform emission distribution can be obtained.
Further, as shown in FIGS. 3 and 4, the n electrode 63 is provided at one corner of the semiconductor light emitting element so as to be close to two sides, and the pad electrode is diagonally opposite to the corner at which the n electrode 63 is adjacent. It is preferable that it is provided in the other corner part which comprises.

  Even when the n-electrode 63 and the p-side pad electrode 65 are arranged diagonally, as shown in FIGS. 3 and 4, the extended conductive portions 66 are each formed in an arc shape so as to be equidistant from the n-electrode 63. It is preferable that higher luminance and more uniform light emission can be obtained. In this case as well, the distance between the extended conductive portion 66 and the edge of the light emitting layer is preferably 20 μm or more and 50 μm or less in order to secure a sufficient region where light emission with high luminance can be obtained as described above. .

Hereinafter, a semiconductor light emitting device of the present invention will be described in detail with reference to the drawings.
The semiconductor light emitting device of this embodiment is shown in FIG.
In this semiconductor light emitting device 10, a buffer layer (not shown) made of Al _0.1 Ga _0.9 N and a non-doped GaN layer (not shown) are stacked on a sapphire substrate 1, and an n-type semiconductor layer 2 is formed thereon. A n-type contact layer made of Si-doped GaN, a superlattice n-type cladding layer in which a GaN layer (40Å) and an InGaN layer (20Å) are alternately laminated 10 times, and a GaN layer As an active layer 3 and a p-type semiconductor layer 4 having a multiple quantum well structure in which (250 （) and InGaN layers (30Å) are alternately stacked 3 to 6 times, an Mg-doped Al _0.1 Ga _0.9 N layer (40Å) and Mg-doped A superlattice p-type cladding layer in which InGaN layers (20 Å) are alternately laminated 10 times and a p-type contact layer made of Mg-doped GaN are laminated in this order.

  Irregularities are formed on the surface of the p-type contact layer. As shown in FIGS. 6A and 6B, the unevenness here is a hexagonal convex pattern, the pattern upper surface width WU = 4 μm, pattern bottom surface width WD = 5.15 μm), pitch P = It is processed into a pattern of 7.15 μm and height H = 1.0 μm.

  In a part of the n-type semiconductor layer 2, the active layer 3 and the p-type semiconductor layer 4 stacked thereon are removed, and a part of the n-type semiconductor layer 2 itself in the thickness direction is removed. An n-electrode 7 is formed on the exposed n-type semiconductor layer 2.

  On the p-type semiconductor layer 3, a positive electrode, which is a semiconductor film 5 made of ITO, is formed on almost the entire surface including irregularities, and a pad electrode 6 is formed on a part of the positive electrode, which is the semiconductor film 5. Has been. The positive electrode, which is the semiconductor film 5, has a low density because a plurality of voids are formed in the film on the p-type contact layer side.

Such a semiconductor light emitting device can be formed by the following manufacturing method.
<Formation of semiconductor layer>
First, a sapphire substrate having a diameter of 2 inches and a C plane as a main surface is set in a MOVPE reaction vessel, and the temperature is set to 500 ° C., and trimethylgallium (TMG), trimethylaluminum (TMA), and ammonia (NH ₃ ) are used. A buffer layer made of Al _0.1 Ga _0.9 N is grown to a thickness of 100 mm.

After forming the buffer layer, the temperature is set to 1050 ° C., and an undoped GaN layer is grown to a thickness of 1.5 μm using TMG and ammonia. This layer acts as a base layer (growth substrate) in the growth of each layer forming the element structure.
Next, an n-type contact layer made of GaN doped with 1 × 10 ¹⁸ / cm ³ of Si at 1050 ° C. using TMG, ammonia, and silane gas as an impurity gas as an n-type semiconductor layer 2 on the base layer. Growing with a film thickness of 2.165 μm.
On top of that, a superlattice n-type cladding layer in which a GaN layer (40 cm) and an InGaN layer (20 cm) are alternately stacked 10 times while the temperature is set to 800 ° C. and trimethylindium is intermittently supplied to the source gas. 5 is grown to a thickness of 640 Å, and an active layer 3 having a multiple quantum well structure in which GaN layers (250 Å) and InGaN layers (30 Å) are alternately stacked 3 to 6 times is grown.

As the p-type semiconductor layer 4, a superlattice p-type cladding layer in which Mg-doped Al _0.1 Ga _0.9 N layers (40 Å) and Mg-doped InGaN layers (20 Å) are alternately stacked 10 times is grown by 0.2 μm.
Finally, at 900 ° C. in a hydrogen atmosphere, 4 cc of TMG, 3.0 liters of ammonia, 2.5 liters of hydrogen gas as a carrier gas were introduced, and Mg was added to the p-type cladding layer at 1.5 × 10 ²⁰ / A p-type contact layer made of cm ³ -doped p-type GaN is grown to a thickness of 0.5 μm.
A mask pattern having a predetermined shape was formed on the obtained p-type contact layer, and the surface of the p-type contact layer was etched by RIE to form an uneven pattern.
Thereafter, the obtained wafer was annealed in a reaction vessel at 600 ° C. in a nitrogen atmosphere to further reduce the resistance of the p-type cladding layer and the p-type contact layer.

<Etching>
After annealing, the wafer was taken out of the reaction vessel, a mask having a predetermined shape was formed on the surface of the uppermost p-type contact layer, and etching was performed from above the mask with an etching apparatus to expose a part of the n-type contact layer.

<Formation of ITO film>
After removing the mask, the wafer was placed in the sputtering apparatus, and an oxide target made of a sintered body of In ₂ O ₃ and SnO ₂ was placed in the sputtering apparatus. Using a sputtering apparatus, the wafer is maintained at 300 ° C. in an oxygen gas atmosphere, and sputtering is performed with a mixed gas (20: 1) of argon gas and oxygen as a sputtering gas, for example, at an RF power of 10 W / cm ² for 20 minutes. Then, by changing the RF power to 2 W / cm ² and performing sputtering for 20 minutes, a positive electrode, which is the semiconductor film 5 made of ITO, was formed with a film thickness of 5000 mm on almost the entire surface of the p-type contact layer 8 of the wafer.

<Formation of pad electrode and n electrode>
A mask having a predetermined pattern is formed on the positive electrode, which is the semiconductor film 5, and on the n-type contact layer, and a W layer 200 mm, a Pt layer 2000 mm, and an Au layer 5000 mm are stacked in this order on the mask, and lift-off is performed. A pad electrode 6 for bonding was formed on the semiconductor film 5 and an n electrode 7 was formed on the n-type contact layer by the method.
Next, heat treatment was performed at about 400 to 600 ° C. with a lamp annealing apparatus.
The obtained wafer was divided at a predetermined location to obtain a semiconductor light emitting device 10.

The cross section of the semiconductor light emitting device formed as described above was observed by STEM. As a result, it was confirmed that the warpage amount in the state of the 2-inch wafer before dividing into the semiconductor light emitting element from the sapphire substrate to the semiconductor layer, the p-type contact layer, and the ITO film was reduced by about 17%. It was.
Further, a thermal shock test was performed on the adhesion at the interface between the p-type contact layer and the ITO film. That is, the cycle of holding at −40 ° C. for 10 minutes, raising the temperature to 100 ° C. and holding for 10 minutes was repeated 1000 cycles, and the subsequent peeling state was measured. The p-type contact layer and the ITO film were found to be p-type contacts. A strong adhesion was observed along the irregularities of the layer.
Further, the ITO film was confirmed to have a good crystal state in which a plurality of holes of about 20 to 200 nm were observed only in the vicinity of the interface on the semiconductor layer side, the density was low, and the density was high on the surface side. . The area where the holes were formed was about 50% of the total thickness of the ITO film. It was confirmed that the ITO film itself was transparent and had good crystallinity.

For comparison, a semiconductor light emitting device was formed in the same manner as described above except that the p-type contact layer was not uneven.
When the characteristics of the obtained semiconductor light emitting device were evaluated, the warpage was hardly alleviated, and a partially insufficient region was observed for the adhesion between the p-type contact layer and the ITO film.

  Thus, with the configuration of the semiconductor light emitting device of the present invention, the adhesion between the ITO film and the p-type contact can be strengthened, and the current density between the ITO film and the p-type contact layer can be increased. Thus, the Schottky barrier can be reduced, and the contact resistance between the ITO film and the p-type contact layer can be reduced. Also, in the ITO film, the current can be spread uniformly in the in-plane direction, and further, the current can be spread uniformly from the ITO film to the entire semiconductor layer, enabling the active layer to emit light efficiently. Become.

Example 2
In the semiconductor light emitting device of this example, the ITO film is formed without changing the conditions during film formation, the uneven pattern on the surface of the p-type contact layer is a hexagonal concave pattern, and the pad electrode and the n electrode are formed as follows. Thus, a semiconductor light emitting device similar to that of Example 1 was formed except that they were formed separately.
That is, a mask having a predetermined pattern was formed on the positive electrode, which is the semiconductor film 5, with a resist, and a pad electrode 6 made of Rh (1000 ／) / Pt (2000 （) / Au (5000 Å) was formed thereon.
Thereafter, a W layer 200 Å, a Pt layer 2000 Å, and an Au layer 5000 Å were laminated in this order on the n-type contact layer to form an n electrode 7.
When warping and peeling of the obtained semiconductor light emitting device were observed, the same effect as in Example 1 was obtained.

Example 3
The semiconductor light emitting device of this example is the same semiconductor as that of Example 1 except that the ITO film is formed without changing the conditions during film formation, and the uneven pattern on the surface of the p-type contact layer is a circular protruded pattern. A light emitting element was formed.
Although the obtained semiconductor light emitting device showed a slight decrease in the light extraction effect, the same effect as in Example 1 was obtained when warping and peeling were observed.

Example 4
The semiconductor light emitting device of this example is the same as that of Example 1 except that the ITO film is formed without changing the conditions during film formation, and the uneven pattern on the surface of the p-type contact layer is changed to a frustoconical convex pattern. A semiconductor light emitting device was formed.
Although the obtained semiconductor light emitting device showed a slight decrease in the light extraction effect, the same effect as in Example 1 was obtained when warping and peeling were observed.

Example 5
In Example 1, the same process is performed until the semiconductor film 5 made of ITO is formed on the substantially entire surface of the p-type contact layer to a thickness of 5000 mm, and further Ag is deposited on the semiconductor film 5 made of ITO by sputtering to a thickness of 1000 mm. This was used as a positive electrode.
Thereafter, an n-electrode 7 made of Rh / Pt / Au was formed on the n-type contact layer with a film thickness of 7000 mm.
Next, heat treatment was performed at about 400 to 600 ° C. with a lamp annealing apparatus.
As described above, the wafer in which the electrodes were formed on the n-type contact layer and the p-type contact layer was divided into 320 μm square chips to obtain a semiconductor light emitting device.
The obtained semiconductor light emitting device 20 was flip-chip mounted on the submount 11 as shown in FIG. In other words, the pad electrode 6 and the n electrode 7 of the semiconductor light emitting element 20 are provided on the submount 11, and the respective electrodes are connected by a pair of positive and negative metallization layers 12 made of Ag, for example. Furthermore, a wire 13 is wired to the submount 11.
Thereby, the board | substrate 1 of the semiconductor light-emitting device 20 can be made into the main light extraction surface.

The cross section of the semiconductor light emitting device formed as described above was observed by STEM. As a result, the warpage amount in the state of the 2-inch wafer before dividing into the semiconductor light emitting element from the sapphire substrate to the semiconductor layer, the p-type contact layer, and the ITO film is reduced by about 17% as in the first embodiment. It has been confirmed.
Further, a thermal shock test was conducted in the same manner as in Example 1 for the adhesion at the interface between the p-type contact layer and the ITO film. As a result, it was recognized that the p-type contact layer and the ITO film were firmly adhered along the unevenness of the p-type contact layer.
Further, in the same manner as in Example 1, in the ITO film, a plurality of holes of about 20 to 200 nm are observed only in the vicinity of the interface on the semiconductor layer side, the density is low, and the surface side has a high density and a good crystal state. It was confirmed that. It was confirmed that the ITO film itself was transparent and had good crystallinity.

  The semiconductor light emitting device of the present invention can be suitably used for a semiconductor light emitting device constituting various light sources such as a backlight light source, a display, illumination, and a vehicle lamp.

It is a top view for demonstrating the electrode shape of the semiconductor light-emitting device in this invention. It is a top view for demonstrating another electrode shape of the semiconductor light-emitting device in this invention. It is a top view for demonstrating another electrode shape of the semiconductor light-emitting device in this invention. It is a top view for demonstrating another electrode shape of the semiconductor light-emitting device in this invention. It is sectional drawing which shows embodiment of the semiconductor light-emitting device in this invention. It is the top view (a) and sectional drawing (b) for demonstrating the uneven | corrugated pattern of the p-type contact layer in the semiconductor light-emitting device of this invention. It is sectional drawing which shows embodiment which mounted the semiconductor light-emitting device in this invention face down.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 n-type semiconductor layer 3 Active layer 4 p-type semiconductor layer 5 Semiconductor film 6 Pad electrode 7 N-electrode 10, 20 Semiconductor light emitting element 11 Submount 12 Metallized layer 13 Wire 51 N-type contact layer 51a Notch 52 p-type Semiconductor layers 53, 63 n-electrodes 54, 64 Transparent electrodes 55, 65 P-side pad electrodes 56, 57, 66 Extended conductive portion

Claims (9)

A semiconductor light emitting device comprising a positive electrode formed on a p-type semiconductor layer via a p-type contact layer,
Unevenness is formed on the surface of the p-type contact layer, and the positive electrode is made of a semiconductor film containing at least one element selected from the group consisting of zinc, indium, tin and magnesium. A semiconductor light emitting device. The semiconductor light emitting element according to claim 1, wherein the p-type semiconductor layer is laminated on a sapphire substrate. The semiconductor light emitting element according to claim 1, wherein the positive electrode is made of an oxide. The semiconductor light-emitting element according to claim 1, wherein the positive electrode is made of an ITO film. The semiconductor light-emitting device according to claim 1, wherein the p-type semiconductor layer and / or the p-type contact layer is made of a nitride semiconductor. The semiconductor light emitting device according to claim 1, wherein the p-type contact layer is GaN. The unevenness on the surface of the p-type contact layer is any one of a periodic or irregular lattice pattern, a polygon or a pattern in which substantially polygons are arranged periodically or irregularly. The semiconductor light emitting element as described in any one. The n-type semiconductor layer is further formed above or below the p-type contact layer, a negative electrode is connected to the n-type semiconductor layer, and a metal film is formed on the positive electrode. The semiconductor light-emitting device according to any one of the above. 9. The semiconductor light emitting device according to claim 8, wherein the negative electrode and the positive electrode, or the negative electrode, the positive electrode, and the metal film formed thereon are formed in the same layer structure.

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