JP2005258219A - Display device and its driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the power consumption of a low-resolution side panel whose display frequency becomes high in twin panel constitution. <P>SOLUTION: A display device is equipped with a sub-panel 10, a main panel 20 in which respective source bus lines 16 are connected to corresponding source bus lines 16 of the sub-panel 10 and which has more pixels than the sub-panel 10, and a display drive circuit. The display drive circuit performs writing respective pixel electrodes of the sub-panel 10 in a time shorter than a maximum write time which can be set as a time for writing to the respective pixel electrodes of the sub-panel 10 when the sub-panel 10 and main panel 20 are set to the same one vertical period in pixel electrode writing operation in which a gate signal is supplied to gate bus lines 14 and 24 and a display data signal is supplied to the source bus lines 16. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device and a driving method of a liquid crystal display device having a plurality of display panels of active matrix type.

  In recent years, for example, so-called twin panels composed of two main and sub display panels are frequently used for portable devices, particularly clamshell type cellular phones (foldable cellular phones). The display operation of these panels is controlled as follows according to the opening / closing operation by the folding function. For example, the control is such that one is turned on and the other is turned off, the control for displaying a part of the content displayed on the main panel on the sub-panel, or the reverse control. As described above, the main panel and the sub panel constituting the twin panel are normally controlled as components of one display system.

  Here, in a twin panel used for a mobile device, for example, a mobile phone, low power consumption is desired from the viewpoint of battery life. In particular, the sub-panel is usually mounted on the back surface (outer surface in a folded state) of a mobile phone, and there is a need for continuous display such as a clock display, so the degree of demand for low power consumption is increasing.

  Therefore, conventionally, according to the performance required for each display device, if it is a liquid crystal panel, a high-definition and high-quality TFT type is adopted for the main panel, and low power consumption driving is possible for the sub-panel. The STN type was often adopted. However, in this case, the main panel and the sub panel are completely separate display devices. For this reason, there is a problem that the control of the panel becomes complicated, and a power supply circuit, an input I / F circuit, a memory, and the like having similar configurations when viewed as the whole system are provided separately. I was invited.

  From this point of view, a twin panel that drives a main panel and a sub panel with a common driving device has been attracting attention. FIG. 14 shows a circuit diagram of a twin panel 581 including a main panel 582 and a sub panel 583 as an example.

  The main panel 582 is sandwiched between a TFT substrate 584 having a thin film transistor (TFT) 592 provided on the substrate, a counter substrate 585 facing the TFT substrate 584, and the TFT substrate 584 and the counter substrate 585. And a liquid crystal layer (LC) 594 as a display medium.

  A plurality of gate bus lines 588 and a plurality of source bus lines 589 are provided on the TFT substrate 584. In the vicinity of the intersection between the gate bus line 588 and the source bus line 589, TFT592 is disposed. This TFT592 has a gate connected to the gate bus line 588, its source is connected to the source bus line 589, a drain connected to the pixel electrode. Then, applying the pixel electrode, between the counter electrode (COM) 593 which is provided on the counter substrate 585, a voltage LC594 as pixels. By performing each TFT592 this, to display an image. Note that among the source bus lines 589, those belonging to the first wiring group 595 are shared with the sub-panel 583, and those belonging to the second wiring group 596 are not shared with the sub-panel 583.

  The main panel 582 is further provided with a gate driver 590 and a source driver 591. Lead line from the gate driver 590 is connected to the gate bus line 588, lead lines from the source driver 591 is connected to the source bus line 589. The gate driver 590, source driver 591, to each of the bus lines, the gate signal voltage, the display data signal is applied.

  On the other hand, sub-panel 583 includes a TFT substrate 586 which the thin film transistor 592 is provided on the substrate, a liquid crystal as a display medium sandwiched between the counter substrate 587 facing the TFT substrate 586, the TFT substrate 586 and the counter substrate 587 and a layer (LC) 594.

  The sub panel 583 is connected to the main panel 582 via an FPC (Flexible Printed Circuits) (not shown). Thus, the gate signal voltage or the display data signal is supplied from the gate driver 590 and the source driver 591 of the main panel 582 to each bus line of the sub panel 583 via the wiring in the main panel 582 and FPC (Flexible Printed Circuits). Applied.

  On the TFT substrate 586, a plurality of gate bus lines 588 and a plurality of source bus lines 589 are provided. In the vicinity of the intersection between the gate bus line 588 and the source bus line 589, TFT592 is disposed. This TFT592 has a gate connected to the gate bus line 588, its source is connected to the source bus line 589, a drain connected to the pixel electrode. Then, applying the pixel electrode, between the counter electrode (COM) 593 which is provided on the counter substrate 587, a voltage LC594 as pixels. By performing each TFT592 this, to display an image. Thus, in the main panel 582 or the sub-panel 583, the image can be displayed.

  As described above, as a conventional document disclosing a specific configuration for driving a twin panel by a common driving device, for example, JP 2001-0667049 (first conventional technique), JP 2001-282145 (second). And Japanese Patent Laid-Open No. 2003-131250 (third prior art).

  The first prior art discloses a foldable mobile communication terminal equipped with a twin panel comprising a first liquid crystal display unit (first liquid crystal display device) and a second liquid crystal display unit (second liquid crystal display device). Has been. In this mobile communication terminal, the cover (folder cover) can be opened and closed with respect to the main body, the first liquid crystal display is provided on the inner surface (the inner surface in the folded state) of the cover, and the second liquid crystal display The portion is provided on the outer surface of the cover portion (the outer surface in the folded state). First and second liquid crystal display unit is driven by one driver, the driver is provided on the first liquid crystal display unit side. That is, the output from the driver is input to the second liquid crystal unit via the first liquid crystal display unit. The display area of the second liquid crystal display unit is smaller than that of the first liquid crystal display unit (see FIGS. 4 and 5 of Patent Document 1). In addition to the time, schematic information is displayed on the second liquid crystal display unit. various information is displayed on the first liquid crystal display unit. Further, in a state in which the cover portion is closed it is performed display by only the second liquid crystal display unit, in a state in which the cover portion is open display by only the first liquid crystal display unit is performed.

  As in the first prior art, the second prior art includes a folding panel having a twin panel composed of a first liquid crystal display unit (inner liquid crystal display unit) and a second liquid crystal display unit (outer liquid crystal display unit). mobile phone is disclosed. This mobile phone can open and close the cover (upper housing) with respect to the main body (lower housing), and the first liquid crystal display is provided on the inner surface (the inner surface in the folded state) of the cover, The 2nd liquid crystal display part is provided in the outer surface (outer surface in the state folded) of the cover part. First and second liquid crystal display unit is driven by one driver, the driver is provided on the first liquid crystal display unit side. That is, the output from the driver is input to the second liquid crystal display unit via the first liquid crystal display unit. The second liquid crystal display unit is smaller display area than the first liquid crystal display unit (Patent Document 2 in FIG. 3, see FIG. 4). Further, in a state in which the cover portion is closed it is performed display by only the second liquid crystal display unit, in a state in which the cover portion is open display by only the first liquid crystal display unit is performed.

As in the first prior art, the third prior art discloses a foldable mobile phone provided with a twin panel comprising a first liquid crystal display (LCD) and a second liquid crystal display (LCD). Yes. In this cellular phone, the cover (lid) can be opened and closed with respect to the main body, the first liquid crystal display is provided on the inner surface (the inner surface in the folded state) of the cover, and the second liquid crystal display is covered. It is provided on the outer surface of the part (the outer surface in the folded state). First and second liquid crystal display unit is driven by one driver, the driver is provided on the first liquid crystal display unit side. That is, the output from the driver is input to the second liquid crystal unit via the first liquid crystal display unit. The display area of the second liquid crystal display unit is smaller than that of the first liquid crystal display unit (see FIGS. 1 and 10 of Patent Document 3), and the second liquid crystal display unit can easily receive an incoming call, date, etc. Information is displayed, and main information is displayed on the first liquid crystal display unit.
Patent 2001-067049 (2001 03 May 16, 2009 published) Patent 2001-282145 (2001 October 12 published) JP2003-131250 (published May 08, 2003)

  In the above conventional configuration, since only one driving device is commonly used for the main panel and the sub panel, the power consumption of the sub panel having a high display frequency (low resolution) is sufficiently achieved. Not. Therefore, an object of the present invention is to provide a display device capable of sufficiently reducing power consumption for a sub-panel having a relatively high display frequency, and a driving method thereof.

  The display device of the present invention is arranged in the vicinity of a plurality of gate signal lines, a plurality of source signal lines, and intersections between the gate signal lines and the source signal lines, and a control terminal for switching operation is connected to the gate signal lines. Switching means, and a first display means having a pixel electrode connected to the source signal line through the switching means, and a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, respectively. Each source signal line is connected to a corresponding source signal line of the first display means, the second display means having a larger number of pixels than the first display means, and the switching means for turning on the gate signal line A write signal is supplied to the pixel electrode by supplying a gate signal to the source signal line and supplying a display data signal to the source signal line. In the shift operation, when one vertical period is the same for the first display means and the second display means, the time is shorter than the maximum writing time that can be set as the writing time to each pixel electrode of the first display means. And a display driving circuit for writing to each pixel electrode of the first display means by a short-time writing operation.

  The display device driving method according to the present invention includes a plurality of gate signal lines, a plurality of source signal lines, and each gate signal line and a source signal line that are arranged in the vicinity of each intersection, and a switching operation control terminal is the gate. Switching means connected to a signal line; first display means having a pixel electrode connected to the source signal line via the switching means; and a plurality of the gate signal lines, source signal lines, switching means, and Driving a display device having a pixel electrode, each source signal line being connected to a corresponding source signal line of the first display means, and a second display means having a larger number of pixels than the first display means In the method, a gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line. In this writing operation, when one vertical period is the same for the first display means and the second display means, writing to each pixel electrode of the first display means is performed. Writing to each pixel electrode of the first display means is performed by a short-time writing operation with a time shorter than the maximum writing time that can be set as time.

  According to the above configuration, in the writing operation of the display data signal to the pixel electrode, one vertical period is the same for each pixel electrode of the first display unit in the first display unit and the second display unit. In this case, writing is performed in a time shorter than the maximum writing time that can be set as the writing time to each pixel electrode of the first display means.

  The maximum writing time ta is, for example, tb for writing time to each pixel electrode of the second display means (substantially the same in one horizontal period), Pa for the number of lines (small number of lines) of the first display means, This is the time that can be obtained by ta = tb × (Pb / Pa), where Pb is the number of lines (number of lines) of the display means 2.

  Therefore, in the writing operation of the display data signal to the first display means, a writing pause period that is a period in which writing is not performed occurs in one vertical period, and no operation in the display driver circuit is required in this writing pause period. The operation of a simple circuit unit can be stopped. Thereby, power consumption can be reduced in the first display device.

  The display device of the present invention is arranged in the vicinity of a plurality of gate signal lines, a plurality of source signal lines, and intersections between the gate signal lines and the source signal lines, and a control terminal for switching operation is connected to the gate signal lines. Switching means, and a first display means having a pixel electrode connected to the source signal line through the switching means, and a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, respectively. Each source signal line is connected to a corresponding source signal line of the first display means, the second display means having a larger number of pixels than the first display means, and the switching means for turning on the gate signal line A write signal is supplied to the pixel electrode by supplying a gate signal to the source signal line and supplying a display data signal to the source signal line. And a display driving circuit for performing writing to each pixel electrode of the first display means in a short-time writing operation in the same or substantially the same time as writing to each pixel electrode of the second display means. It is characterized by being.

  The display device driving method according to the present invention includes a plurality of gate signal lines, a plurality of source signal lines, and each gate signal line and a source signal line that are arranged in the vicinity of each intersection, and a switching operation control terminal is the gate. Switching means connected to a signal line; first display means having a pixel electrode connected to the source signal line via the switching means; and a plurality of the gate signal lines, source signal lines, switching means, and Driving a display device having a pixel electrode, each source signal line being connected to a corresponding source signal line of the first display means, and a second display means having a larger number of pixels than the first display means In the method, a gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line. In this writing operation, each pixel electrode of the first display means is subjected to a short-time writing operation in the same or substantially the same time as the writing to each pixel electrode of the second display means. It is characterized by performing writing to.

  According to the above configuration, in the writing operation of the display data signal to the pixel electrode, each pixel electrode of the first display unit is applied to the pixel electrode of the second display unit at the same or substantially the same time as the writing to each pixel electrode of the second display unit. Is written. Note that the substantially same time can be, for example, a time within ± 30% of the writing time to each pixel electrode of the second display means.

  Therefore, in the writing operation of the display data signal to the first display means, a writing pause period that is a period in which writing is not performed occurs in one vertical period, and no operation in the display driver circuit is required in this writing pause period. The operation of a simple circuit unit can be stopped. Thereby, power consumption can be reduced in the first display device.

  In the above display device, the display driving circuit continuously performs the short-time writing operation on each pixel electrode of the first display means within one vertical period, and provides a writing pause period within one vertical period. It is good.

  Further, the driving method of the display device may be configured such that the short-time writing operation to each pixel electrode of the first display means is continuously performed in one vertical period, and a writing pause period is provided in one vertical period. .

  According to the above configuration, in the writing operation to each pixel electrode of the first display means, the operation of the circuit portion that does not require the operation in the display driving circuit is stopped during the writing suspension period provided in one vertical period. be able to. Thereby, power consumption can be reduced in the first display device.

  In the display device described above, the display driving circuit performs the first display for each horizontal period set in the first display unit when the same vertical period is used for the first display unit and the second display unit. The short-time writing operation to each pixel electrode of one display means may be performed, and a writing pause period may be provided within one horizontal period.

  Further, the driving method of the display device described above is performed for each horizontal period set in the first display means when one vertical period is the same for the first display means and the second display means. The short-time writing operation to each pixel electrode of the display means may be performed to provide a writing pause period within one horizontal period.

  According to the above configuration, in the writing operation to each pixel electrode of the first display means, the operation of the circuit portion that does not require the operation in the display driving circuit is stopped during the writing suspension period provided for each horizontal period. be able to. Thereby, power consumption can be reduced in the first display device.

  In the display device and the driving method of the display device, the first display unit may be configured to be used in a state where the display frequency is higher than that of the second display unit.

  According to the above configuration, since the first display means capable of reducing power consumption is used in a state where the display frequency is higher than that of the second display means, the power consumption of the entire display device can be reduced. It can be further promoted.

  In the display device, the display driving circuit includes a gate signal line driving circuit that supplies a gate signal to the gate signal line, and a source signal line driving circuit that supplies a display data signal to the source signal line, and the source The signal line driver circuit may be provided in the first display means, and supply of the gate signal to the second display means may be performed via the gate signal line of the first display means.

  The display device driving method may be configured to supply the gate signal to the second display means through the gate signal line of the first display means.

  According to the above configuration, the display data signal is directly supplied from the source signal line driving circuit to the first display means without passing through the load of the second display means. Here, in the display device including the first display unit and the second display unit, the first display unit has a relatively small number of pixels and a small resolution, and always displays time and the like. Compared with the second display means having a large number of pixels and high resolution, it is usually used for applications where the display frequency is high. In this way, by enabling the first display device used for applications with a high display frequency to be displayed in a low load state, it is possible to further reduce power consumption.

  In the display device and the driving method of the display device, a plurality of source signal lines in the second display means correspond to one source signal line in the first display means. Time-division drive means for supplying a display data signal of one source signal line in the display means to a plurality of source signal lines in the second display means corresponding to the source signal line by sequentially switching in a time-division manner It is good also as a structure provided with.

  According to the above configuration, when the display data signal is supplied to the second display unit via the first display unit, the source signal line corresponding to the source signal line of the second display unit having a large number of pixels is provided. Even if the first display means with a small number of pixels is insufficient, the display data signal is supplied via the source signal line of the first display means without providing a separate signal line for supplying the display data signal. Can be appropriately supplied to the source signal line of the display means.

  In the display device, the display driving circuit includes a gate signal line driving circuit that supplies a gate signal to the gate signal line, and a source signal line driving circuit that supplies a display data signal to the source signal line, and the source The signal line driver circuit may be provided in the second display means, and supply of the gate signal to the first display means may be performed via the gate signal line of the second display means.

  The display device driving method may be configured to supply the gate signal to the first display means via the gate signal line of the second display means.

  In the above display device, the first display means and the second display means are provided in an apparatus capable of opening and closing the second housing portion with respect to the first housing portion, and the first display means includes: A display surface is provided on the outer surface side of the first or second casing in the folded state in which the second casing is closed with respect to the first casing, and the second display means The display surface may be provided on the inner surface side of the first or second casing in the folded state.

  Further, in the driving method of the display device driving method, the first display means and the second display means are provided in a device capable of opening and closing the second housing portion with respect to the first housing portion. The first display means is provided with a display surface arranged on the outer surface side of the first or second housing portion in a folded state in which the second housing portion is closed with respect to the first housing portion, The second display means may have a configuration in which a display surface is provided on the inner surface side of the first or second casing in the folded state.

  According to the above configuration, in a device including a display device and capable of opening and closing the second housing portion with respect to the first housing portion, the first housing portion is in a state of use of the display device. Thus, the frequency of the folded state with the second casing closed is increased. Accordingly, the first display means is provided with the display surface arranged on the outer surface side of the first or second casing portion in the folded state, and the second display means is provided in the first or second state in the folded state. structure on the inner surface side of the casing is provided by arranging the display surface is suitable in reducing power consumption.

  The display device of the present invention includes a first display unit and a second display unit in which each source signal line is connected to a corresponding source signal line of the first display unit, and the number of pixels is larger than that of the first display unit. A gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line to perform a writing operation to the pixel electrode. When the same vertical period is used for the first display means and the second display means, the time is shorter than the maximum writing time that can be set as the writing time for each pixel electrode of the first display means. And a display driving circuit that performs writing to each pixel electrode of the first display means in a writing operation.

  In the display device driving method of the present invention, a gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line. In this writing operation, when one vertical period is the same for the first display means and the second display means, the writing time for each pixel electrode of the first display means can be set. In this configuration, writing to each pixel electrode of the first display means is performed by a short-time writing operation with a time shorter than the maximum writing time.

  Therefore, in the writing operation of the display data signal to the first display means, a writing pause period that is a period in which writing is not performed occurs in one vertical period, and no operation in the display driver circuit is required in this writing pause period. The operation of a simple circuit unit can be stopped. Thereby, power consumption can be reduced in the first display device.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 shows a circuit diagram of a liquid crystal display device (display device) 1 of the present embodiment. As shown in FIG. 1, the liquid crystal display device 1 has a twin panel configuration including a sub panel (first display means) 10 and a main panel (second display means) 20. These panels 10 and 20 are of an active matrix type which is excellent in terms of contrast and response speed and has high display quality.

  The main panel 20 is sandwiched between a TFT substrate 21 having a thin film transistor (TFT) 25 provided on the substrate, a counter substrate 22 facing the TFT substrate 21, and the TFT substrate 21 and the counter substrate 22. And a liquid crystal layer (LC) 26 as a display medium.

  A plurality of gate bus lines (gate signal lines) 24 and a plurality of source bus lines (source signal lines) 16 are provided on the TFT substrate 21. A TFT 25 is disposed in the vicinity of the intersection between the gate bus line 24 and the source bus line 16. The TFT 25 has a gate connected to the gate bus line 24, a source connected to the source bus line 16, and a drain connected to the pixel electrode. Then, a voltage is applied to the LC 26 serving as a pixel between the pixel electrode and a counter electrode (COM) 27 provided on the counter substrate 22. By performing this in each TFT 25, an image is displayed. Of the source bus lines 16, those belonging to the second wiring group 32 are all used as the source bus lines 16 of the main panel 20, and those belonging to the first wiring group 31 are those of the sub panel 10 and the main panel 20. Used as the source bus line 16.

  The main panel 20 further includes a gate driver 13 and a source driver 15. A lead line from the gate driver 13 is connected to the gate bus line 24 of the main panel 20 and a gate bus line (gate signal line) 14 of the sub panel 10, and a lead line from the source driver 15 is connected to the source bus line 16. . Then, a gate signal voltage and a display data signal are applied from the gate driver 13 and the source driver 15 to the respective bus lines.

  In the present embodiment, only the gate driver 13 shared by the sub panel 10 and the main panel 20 is provided as the gate driver, but the sub panel 10 and the main panel 20 are provided with dedicated gate drivers, respectively. May be.

  The sub-panel 10 is a TFT substrate 11 provided with a TFT (Thin Film Transistor) 25, a counter substrate 12 facing the TFT substrate 11, and a display medium sandwiched between the TFT substrate 11 and the counter substrate 12. And a liquid crystal layer. The liquid crystal layer constitute a liquid crystal capacitor 26.

  The sub-panel 10 has fewer source bus lines 16 and fewer pixels than the main panel 20, and therefore has a lower resolution than the main panel 20.

  Similar to the main panel 20, the sub-panel 10 includes a TFT substrate 11 having a thin film transistor 25 provided on the substrate, a counter substrate 12 facing the TFT substrate 11, and a display sandwiched between the TFT substrate 11 and the counter substrate 12. And a liquid crystal layer (LC) 26 as a medium.

  The sub panel 10 is connected to the main panel 20 via an FPC (Flexible Printed Circuits) (not shown). As a result, the gate signal voltage or the display data signal is supplied from the gate driver 13 and the source driver 15 of the main panel 20 to each bus line of the sub panel 10 via the wiring in the main panel 20 and the FPC (Flexible Printed Circuits). Applied.

  When the liquid crystal display device 1 is provided in one device, for example, a portable device, the sub-panel 10 is used as a display panel that has a higher display frequency (longer usage time) than the main panel 20. For example, the sub-panel 10 is used as a display device indicating the time, the current state of the device, or some summary information in the applied device, and the main panel 20 starts a display operation based on, for example, the operation of the operator It is used as a display device that displays more detailed information (some detailed information) than the display information on the sub-panel 10.

  Specifically, for example, as shown in FIGS. 2A and 2B, the cover (second housing) 42 can be opened and closed with respect to the main body (first housing) 41. In the cellular phone 40 of the type, the sub panel 10 is provided on the outer surface of the cover portion 42 (outer surface in the folded state), and the main panel 20 is provided on the inner surface of the cover portion 42 (inner surface in the folded state). It shows a longitudinal sectional view of a main part of the cover portion 42 in this state in FIG. As shown in the figure, the sub-panel 10 and the main panel 20 are provided in a state of facing each other back to back inside the cover portion 42. Therefore, the liquid crystal display device 1 has a configuration in which the source driver 15 shared by the sub-panel 10 and the main panel 20 is provided on the side of the sub-panel 10 having the higher display frequency.

  In the cellular phone 40 described above, during a telephone call, during use of the contents confirmation or the like of the transmission operation time and receiving mail email and opened the cover portion 42. In this case, the display operation of the sub panel 10 is turned off, and the display operation of the main panel 20 is turned on. On the other hand, in the standby state (power-on state) with the cover 42 closed, the display operation of the sub panel 10 is turned on and the display operation of the main panel 20 is turned off. In the cellular phone 40, for example, there are more cases in which the cover portion 42 is closed than in a state in which the cover portion 42 is opened within a day, for example, so that the display frequency of the sub panel 10 is higher than that of the main panel 20. Become.

  Next, the display operation of the first and second liquid crystal panels 10 and 20 will be described in more detail. Here, it is assumed that the number of pixels of the sub-panel 10 is 1/2 with respect to the number of pixels of the main panel 20 in the column direction and the row direction, respectively, and the total number of pixels is 1/4. As an example, the sub panel 10 is 120 × 3 (RGB) × 160, and the main panel 20 is 240 × 3 (RGB) × 320.

  When displaying the sub-panel 10, as shown in FIG. 4, a display data signal is applied to the source bus line 16 from the source driver 13, and a gate for turning on / off the TFT 25 from the gate driver 13 to the gate bus line 14. A signal is applied. At this time, when the voltage of the gate bus line 14 becomes High, the TFT 25 connected to the gate bus line 14 is turned on, and the display data signal applied to the source bus line 16 is written to the pixel (liquid crystal capacitor 26). It is.

  In FIG. 4, 16a1, 16a2, 16a3... Indicate the first, second, third... Source bus lines 16 belonging to the first wiring group 31, and 14-1, 14-2. , Second... Gate bus lines 14, and 24-1, 24-2.

  In the display driving of the sub-panel 10, a display data signal is applied to the source bus lines 16a1, 16a2, 16a3... And the gate bus lines 14-1, 14-2. ) Repeatedly. At this time, since the main panel 20 does not display, the gate signal (driving signal) is not applied from the gate driver 13 to the gate bus lines 24-1, 24-2,.

  On the other hand, when displaying the main panel 20, as shown in FIG. 5, the display data signal is applied from the source driver 15 to the source bus line 16 and the gate driver 23 is applied to the gate bus line 24 as in the case of the sub panel 10. A gate signal for turning on / off the TFT 25 is applied. At this time, when the voltage of the gate bus line 24 becomes High, the TFT 25 connected to the gate bus line 24 is turned on, and the display data signal applied to the source bus line 16 is written to the pixel (liquid crystal capacitor 26). It is.

  5, 16b1, 16b2, 16b3... Indicate the first, second, third... Source bus lines 16 belonging to the second wiring group 32.

  In the display driving of the main panel 20, a display data signal is applied to the source bus lines 16b1, 16b2, 16b3... And the gate bus lines 24-1, 24-2. Repeat writing. At this time, since the sub-panel 10 does not display, the gate signal (driving signal) is not applied from the gate driver 13 to the gate bus lines 14-1, 14-2.

  Here, in the conventional liquid crystal display device having a twin panel configuration, the writing time (selection period of each gate bus line) to each pixel electrode in the sub-panel 10 corresponds to the writing time to each pixel electrode in the main panel 20. Is set to 4 times. This value is set based on the reciprocal of the total number of pixels (number of pixel electrodes) of the sub-panel 10 with respect to the total number of pixels (number of pixel electrodes) of the main panel 20. FIG. 6 shows the relationship between the writing times to the pixel electrodes of the panels 10 and 20 in this case. That is, in the figure, the pulse length of the gate signal waveform in the sub-panel 10 is four times the pulse length of the gate signal waveform in the main panel 20.

  On the other hand, in the liquid crystal display device 1 of the present embodiment, the writing time to each pixel electrode in the sub panel 10 is shortened, and the writing to the sub panel 10 is performed for a short time. In this short time writing, the writing time to each pixel electrode in the sub-panel 10 is set to substantially the same time as the writing to each pixel electrode in the main panel 20, for example. Thereby, in the liquid crystal display device 1, the power consumption when the sub-panel 10 performs display can be reduced.

  As short-time writing methods for the sub-panel 10, there are first and second methods as shown in FIG. Waveforms showing the first and second methods in the figure show the writing time and writing timing of each pixel electrode in the sub-panel 10.

  The writing time (the pulse length of the gate signal waveform) to each pixel electrode in the sub-panel 10 in the first and second systems is the writing time that can be inherently given to the sub-panel 10, that is, one horizontal period (hereinafter referred to as standard writing time). In this case, it is 1/4 of the conventional method for writing. The standard writing time can be set as follows, for example, from the relationship with the writing time to each pixel electrode in the main panel 20. That is, the standard writing time is the reciprocal times (Pa / Pb) of the ratio (Pa / Pb) of the total pixel number Pa of the sub panel 10 to the total pixel number Pb of the main panel 20 with respect to the writing time to each pixel electrode in the main panel 20. Pb / Pa).

  In the first method, as shown in FIG. 7, writing is continuously performed on each pixel electrode of the sub-panel 10 in a time shorter than the standard writing time, and the sub-panel 10 is set in a time shorter than one vertical period. Writing to each pixel electrode is terminated. This causes a writing pause period in which writing is stopped within one vertical period. In this case, the frame frequency is set to 50 to 60 Hz, for example.

  In this case, the writing time to each pixel electrode can be set to substantially the same time as the writing time to each pixel electrode in the main panel 20 as described above. In this case, the gate driver 13 and the source driver 15 are driven with respect to the sub panel 10 under the same conditions as the main panel 20. That is, the gate driver 13 and the source driver 15 are operated at a frequency when writing to the main panel 20, and the gate bus lines 14 are sequentially selected by the gate signal from the gate driver 13. The display data signal is written to each pixel electrode.

  In the second method, as shown in FIG. 7, writing is performed on each pixel electrode of the sub-panel 10 in one horizontal period (standard writing time) of the sub-panel 10 in a time shorter than the standard writing time. Writing to each of the ten pixel electrodes for each horizontal period is completed in a time shorter than one horizontal period. This causes a writing pause period in which writing is stopped within each horizontal period.

  The writing time to each pixel electrode in this case can be set to substantially the same time as the writing time to each pixel electrode in the main panel 20 as in the case of the first method. In this case, the selection period of each gate bus line 14 is the same as the conventional one, while the drive frequency of the source driver 15 is the same as that of the main panel 20 except that it is an intermittent operation.

  The liquid crystal display device 1 adopts the first or second method for writing on the sub-panel 10 based on the following concept. That is, when the sub-panel and the main panel are driven by dedicated source drivers, respectively, as in the past, the optimal design for each module (panel) including the source driver is made according to the driving conditions of each panel. Will do. On the other hand, in the liquid crystal display device 1 in which the source driver 15 is shared by the sub panel 10 and the main panel 20, it is handled as one twin panel system including the sub panel 10 and the main panel 20, and basically the sub panel 10 and the main panel 20 are connected. The same panel technology is used for the panel 20. Therefore, the display data signal can be written (charged) in the same writing time as the main panel 20 having a relatively large number of pixels even in the sub-panel 10 having a relatively small number of pixels.

  Next, the reason why the power consumption of the sub-panel 10 can be reduced by adopting the first or second method in the liquid crystal display device 1 will be described.

  The power consumption of the liquid crystal display device 1 is steadily consumed by the original power consumption for driving the liquid crystal display device 1 proportional to the drive frequency and the peripheral circuit (drive circuit). It can be divided into power consumption that has nothing to do with the driving itself.

The former (power consumption C1 and C2 in FIGS. 9A and 9B) is automatically determined according to the driving conditions of the liquid crystal display device 1, and the latter (power consumption B1 and B2 in FIGS. 9A and 9B). Can be reduced by the following ideas.
• Do not allow bias currents such as operational amplifiers in the drive circuit to flow during the write pause.
• Stop unnecessary power circuit operations.
During the writing suspension period, since the power consumption of the entire liquid crystal display device 1 is reduced, the power consumption of the power supply circuit unit is reduced by lowering the oscillation frequency of the power supply circuit and the conversion efficiency is improved.

  In this way, by reducing the power consumption of the peripheral circuits during the writing suspension period, the power consumption of the entire liquid crystal display device 1 can be reduced. In the first and second schemes, it is ideal to reduce the power consumption of the peripheral circuit during the writing suspension period, but in reality, the power consumptions A1 and A2 in FIGS. Therefore, it is difficult to make it completely zero.

  Specifically, the display device driving circuit (display driving circuit) 33 including the source driver 15 includes a control unit 33a, a power supply unit 33b, a DA converter 33c, and a reference voltage generating circuit as shown in FIG. 33d and a column electrode driving operational amplifier 33e. The circuit function of the display device drive circuit (display drive circuit) 33 may be divided into a plurality of IC chips from the viewpoint of cost and the like.

  FIGS. 9A and 9B schematically show the power consumption of the sub-panel 10 within the standard writing time. That is, FIG. 9A shows the power consumption in the conventional writing method in which writing is performed on each pixel electrode in the standard writing time, and FIG. 9B shows the power consumption in the second method. Note that although the first method and the second method have different writing timings, the substantial writing time is the same, so that the power consumption can be regarded as the same.

  In the figure, power consumptions A1 and A2 basically indicate power consumed by the sub-panel 10 regardless of the conventional method and the second method (first method) in the power-on state of the liquid crystal display device 1. . The power consumptions B1 and B2 indicate the power consumed when each circuit is brought into an operable state regardless of whether or not writing to the pixel electrode is performed in the display device driving circuit 33. This power consumption is generated by an internal clock generating operation in the control unit 33a, a voltage generating operation in the power supply unit 33b, and a bias current flowing through the reference voltage generating circuit 33d and the column electrode driving operational amplifier 33e. The power consumptions C1 and C2 indicate the power consumed by the actual writing operation at each pixel electrode.

  When the power consumption in the conventional method (FIG. 9A) and the power consumption in the second method (first method) (FIG. 9B) are compared, both of the power consumptions A1 and A2 and The power consumption B1 and B2 are almost the same. That is, in the second method (first method), since the drive frequency at the time of writing becomes high, the power consumption at that time increases, but the power consumption C2 in the writing suspension period becomes 0 (zero). Therefore, the power consumption C2 can be regarded as the same as the power consumption C1.

  On the other hand, the power consumption B1 and B2 are significantly different between the conventional method and the second method (first method), and the power consumption can be significantly reduced in the second method compared to the conventional method. This is due to the following reason. In the conventional method in which writing is performed according to the standard writing time, an internal clock generation operation in the control unit 33a, a voltage generation operation in the power supply unit 33b, and a bias current flows through the reference voltage generation circuit 33d and the column electrode driving operational amplifier 33e. Therefore, power consumption always occurs during the standard writing time. On the other hand, in the second method (first method) in which writing is performed for ¼ time of the standard writing time, these operations are stopped during the writing suspension period, and the power consumption by these operations is reduced to zero (zero). ). Regarding the point of stopping the unnecessary power source during the writing suspension period, for example, the on / off power source for the pixel such as the TFT 25 cannot be stopped, but the power source for the counter electrode and the power source used in the display device driving circuit can be stopped. is there.

  The writing time to each pixel electrode of the sub panel 10 is preferably substantially the same as the writing time to each pixel electrode of the main panel 20, but is not limited to this, and one vertical period is set to the sub panel 10 and the main panel. 20 can be arbitrarily set under the condition that the time is shorter than the maximum writing time that can be set as the writing time to each pixel electrode of the sub-panel 10. The same applies to other examples described below.

[Embodiment 2]
Another embodiment of the present invention will be described below with reference to the drawings.
The liquid crystal display device (display device) 2 of the present embodiment has a configuration shown in FIG. That is, the liquid crystal display device 2 is a twin-panel configuration that includes a sub-panel (first display means) 100 and a main panel (second display means) 200. Subpanel 100 and the main panel 200 is an active matrix panel. In the sub-panel 100 and the main panel 200, gate drivers for driving the gate bus lines are provided with dedicated gate drivers 113 and 123, respectively. The source drivers for driving the source bus lines are the sub-panel 100 and the main panel 200. It is one of the source driver 115 are provided in the shared.

  The display data signal output from the source driver 115 is supplied to the source bus line of the main panel 200 via the source bus line of the sub panel 100. The connection between the source bus line of the sub-panel 100 and the source bus line of the main panel 200 is made via a connecting member having a flexible structure, for example, an FPC 30 provided between the two panels.

  Here, the main panel 200 has more pixels than the sub panel 100 and has a higher resolution than the sub panel 100. Therefore, the source bus lines of the main panel 200 are larger than the source bus lines of the sub panel 100. Therefore, in the liquid crystal display device 2, and it made to correspond to one of the source bus lines subpanel 100 to a plurality of source bus lines of the main panel 200. That is, in the liquid crystal display device 2, the display data signal of one source bus line in the sub-panel 100 is given to a plurality of (for example, three) source bus lines in the main panel 200 by the time division driving unit 119. Specifically, by the changeover switch time division driving unit 119 comprising a plurality of changeover switches, the plurality of source bus lines display data signals of one source bus lines in the sub-panel 100 corresponding to the main panel 200 It is given by switching by time division for.

  Thus, the source driver 115 provided on the sub-panel 100 side having a small number of pixels, subpanel 100 performs normal driving (non-time division driving), the main panel 200 having a large number of pixels by performing time division driving , it becomes possible to display a high resolution than subpanel 100 in the main panel 200.

FIG. 11 is a circuit diagram of the liquid crystal display device 2 shown in FIG.
In the liquid crystal display device 2, the sub panel 100 includes the TFT substrate 11 provided with the TFTs 25, the counter substrate 12, and the liquid crystal capacitor 26 including the liquid crystal layer, as in the sub panel 10. On the TFT substrate 11, a plurality of gate bus lines 14, a plurality of source bus lines 16 and the TFT25 are arranged. TFT25 applies a voltage to the liquid crystal capacitor 26 constituting a pixel between the counter electrode (COM) 27 provided on the counter substrate 12 and the pixel electrode.

  Similar to the main panel 20, the main panel 200 includes a TFT substrate 21 provided with TFTs 25, a counter substrate 22, and a liquid crystal capacitor 26 including a liquid crystal layer. On the TFT substrate 21, a plurality of gate bus lines 24, a plurality of source bus lines 28 and the TFT25 are arranged. TFT25 applies a voltage to the liquid crystal capacitor 26 constituting a pixel between the counter electrode (COM) 27 provided on the counter substrate 22 and the pixel electrode.

  In the liquid crystal display device 2 of the present embodiment, the time division drive unit 119 is provided on the main panel 200. The time division drive unit 119 includes a switching TFT 17 provided for each source bus line 28 of the main panel 200. These switching TFTs 17 are provided at the end of the source bus line 28 on the sub panel 100 side.

  The liquid crystal display device 2 has a configuration in which a display data signal supplied from one source bus line 16 of the sub-panel 100 is given to, for example, two source bus lines 28 of the main panel 200 in a time-sharing manner. Each switching TFT 17 is one set. One source bus line 16 can be conducted through the switching TFT 17 with respect to the two source bus lines 28 corresponding to the pair of switching TFTs 17.

  The time division drive unit 119 includes first and second switching control signal lines 18a and 18b corresponding to the first and second switching TFTs 17 of each set. Among these, the first switching control signal line 18a is connected to the gates of the first switching TFTs 17 in each group, and the second switching control signal line 18b is connected to the gates of the second switching TFTs 17 in each group. The first and second switching control signal lines 18a and 18b are provided with one source bus for driving each group of switching TFTs 17 in a time-sharing manner, that is, two source bus lines 28 corresponding to each group. A switching control signal for connecting to the line 16 in a time division manner is supplied.

  Further, the time division driving unit 119 has a function of separating the sub panel 100 (the source bus line 16 of the sub panel 100) from the main panel 200 (the source bus line 28 of the main panel 200).

  For example, when considering the wiring efficiency, the time-division driving unit 119 may be located at the sub-panel 100 or between the sub-panel 100 and the main panel 200.

  The sub panel 100 and the main panel 200 are used in the same manner as the sub panel 10 and the main panel 20, respectively. For example, in the mobile phone 40 shown in FIGS. 2 (a) and 2 (b), the sub panel 100 is provided at the position of the sub panel 10. The main panel 200 is provided on the main panel 20.

  As described above, in the liquid crystal display device 2, the source driver 115 is provided on the side of the sub-panel 100 having a low resolution, and the two display panels (the sub-panel 100 and the main panel 200) are driven by one driving circuit (the source driver 115). and, the time-division driving section 119, so that decouple the divided driving time of the main panel 200, and two display panels (subpanel 100 and the main panel 200).

  In the liquid crystal display device 2 described above, the display operation of only the subpanel 100 in the closed state of the cover portion 42 is turned on, the main panel 200 displays operation is turned off. In this case, all the switching TFTs 17 of the time division drive unit 119 are turned off by the switching control signal from the source driver 115, and the display data signal from the source driver 115 is not supplied to the source bus line 28 of the main panel 200. The gate driver 113 while performing the operation, the gate driver 123 stops operating.

  On the other hand, the display operation of only the main panel 200 is turned on in a state where the open cover portion 42, sub-panel 100 displays operation is turned off. In this case, by switching TFT17 time division driving unit 119 that operates in accordance with the switching control signal from the source driver 115, the display data signal from the source driver 115 is supplied to the source bus line 28 of the main panel 200. The gate driver 113 is stopped while the operation, the gate driver 123 performs the operation.

  It will now be described in detail display operation of the subpanel 100 and the main panel 200 as described above. For example, the relationship between the number of pixels of the sub panel 100 and the number of pixels of the main panel 200 is the same as the number of pixels of the sub panel 10 and the number of pixels of the main panel 20. It is assumed that the number of pixels is ½ in the column direction and the row direction, respectively, and the total number of pixels is ¼.

  When displaying the sub-panel 100, a display data signal is applied to the source bus line 16 from the source driver 115, and a gate signal for turning on / off the TFT 25 is applied to the gate bus line 14 from the gate driver 113. Here, when the voltage of the gate bus line 14 becomes High, the TFT 25 connected to the gate bus line 14 is turned on, and the display data signal applied to the source bus line 16 is written to the pixel (liquid crystal capacitor 26). It is.

  In the display drive of the sub-panel 100, display data signals are applied to the source bus lines 16 and the gate bus lines 14 are driven line-sequentially, thereby displaying (writing) one screen repeatedly.

  At this time, since the main panel 200 does not display, the Low voltage is applied from the source driver 115 to the first and second switching control signal lines 18a and 18b to turn off all the switching TFTs 17 of the time division driving unit 119. The source bus line 28 of the main panel 200 is electrically disconnected. At this time, the gate bus line 24 of the main panel 200 is not driven.

  In the above operation, when displaying a low resolution subpanel 100, electrically disconnecting the load of high resolution main panel 200. Therefore, the liquid crystal display device 2 can further reduce power consumption.

  On the other hand, when displaying the main panel 200, a display data signal is applied from the source driver 115 to the source bus line 16, and a gate signal for turning on / off the TFT 25 is applied from the gate driver 123 to the gate bus line 24. The At this time, when the voltage of the gate bus line 24 becomes High, the TFT 25 connected to the gate bus line 24 is turned on, and the display data signal applied to the source bus line 16 is written to the pixel (liquid crystal capacitor 26). It is.

  Here, in the liquid crystal display device 2, the display data signal from the source driver 115 is transmitted to the source bus line 28 of the main panel 200 having a high resolution through the source bus line 16 of the sub-panel 100 having a low resolution. and time division so driving the panel 200.

  In the display driving of the main panel 200, a display data signal is applied to the source bus line 16, and the gate bus line 24 is driven in a line sequential manner, thereby repeatedly displaying (writing) one screen.

  At this time, although the sub-panel 100 does not display, the display data signal is applied to the main panel 200, so that the switching TFT 17 of the time-division driving unit 119 is turned on / off. Specifically, the switching control signals from the first and second switching control signal lines 18a and 18b are used to control on / off of the switching TFTs 17 connected to them, thereby forming a pair of two source bus lines. 28, for example, display data signals are given to the source bus lines 28-1 and 28-2 in a time division manner. However, the gate bus line 14 is not driven.

  In the above operation, when displaying the main panel 200 high resolution can not disconnect the load of lower resolution subpanel 100 electrically, require extra power. However, in the twin-panel configuration that includes a low resolution high main panel 200 and resolution subpanel 100, the mobile phone 40 or the like of the foldable usually lower resolution subpanel 100 relative display frequent applications is used, the main panel 200 high resolution is used low display frequency applications. Therefore, in the liquid crystal display device 2, in its use state, the frequency is low resulting in the above state in which the display main panel 200, can realize reduction in power consumption as the entire liquid crystal display device 2.

  The above electrical load are those mainly caused like the parasitic capacitance of the capacitive, and TFT25 portion of the insulating portion in the portion which crosses the gate bus line 14.

  Here, also in the liquid crystal display device 2 of the present embodiment, similarly to the liquid crystal display device 1, writing to each pixel electrode of the sub-panel 100 by the first or second method which is a short-time writing method for the sub-panel 100 is performed. Therefore, the power consumption when the sub panel 100 performs display can be reduced. The reason is as described above.

  In the case of the liquid crystal display device 2, the display data signal is supplied to the main panel 200 through the source bus line 16 and the time division driving unit 119 of the sub panel 100. Therefore, as shown in FIG. 12, half of the standard write time (sub-panel gate signal waveform) is the selection time (main panel gate signal waveform) of the gate bus line 24 of the main panel 200. Within the selected time, the time-division drive unit 119 switches the two sets of source bus lines 28 to perform time-division drive (time-division drive unit switch waveform). Thus, also in the liquid crystal display device 2, writing to each pixel electrode of the sub-panel 100 by the first or second method is performed in substantially the same time as writing to each pixel electrode of the main panel 200.

  In the above embodiment, the switching TFT 17 connected to the capacitive load may be configured as shown in FIG. The switching TFT 17 shown in FIG. 1 includes an N-channel MOSFET 301, a P-channel MOSFET 302, and an inverter 303. Such a CMOS configuration is preferable from the point of view of capability and stable voltage level control as well as capability of switching more accurately than a single channel configuration. As the switching operations, there is no problem in a configuration consisting of the switching elements of one channel.

  In the liquid crystal display device 2, the combination of the resolution of the sub-panel 100 and the main panel 200 can be freely determined by either the drive what divides time division driving of the main panel 200. In this embodiment, since the main panel 200 is divided into two time-division drives, the main panel 200 can display at a resolution up to twice the resolution of the sub-panel 100.

  As described above, in the liquid crystal display device having a twin panel configuration, the source driver (column electrode driving circuit) can be mounted on either the sub panel side or the main panel side. However, low power consumption is required for a panel that is likely to be used or always necessary in a display state. On the other hand, in the configuration (liquid crystal display device 1) in which the source driver (column electrode drive circuit) is mounted on the main panel, the source bus line of the main panel, that is, the source bus line of the sub-panel is driven via a load. This increases the load on the output section of the source driver, which is disadvantageous for reducing the power consumption of the sub-panel. Therefore, if it is necessary to reduce the power consumption of the sub panel, it is preferable to mount a source driver on the sub panel side.

  In the liquid crystal display device 2, when the switch for switching TFT17 time division driving of the divided driving unit 119, and so also serves as a switch for disconnecting the subpanel 100 and the main panel 200, a dedicated switch each Compared to the case, the number of parts is small, the configuration is simple, and the cost is low.

  Further, in the mobile phone 40, the sub-panels 10 and 100 on the side where the source driver 115 is provided, in other words, the sub-panels 10 and 100 provided on the outer surface of the cover 42 are displayed when the cover 42 is opened. The display operation may be always on regardless of whether the cover 42 is opened or closed.

  In the above embodiment, the switching TFT17 is it is assumed that driven by signals from the source driver 15 or the source driver 115, it may be driven by other drive circuits.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The display device of the present invention has a plurality of display units and can be used for a stationary type or a fixed type device exclusively using an AC power source. However, the display device has a plurality of types such as a mobile phone and a PDA (Personal Digital Assistants). It is particularly suitable for a portable device that has a display portion and requires low power consumption for battery operation.

It is a circuit diagram showing a configuration of a display device according to an embodiment of the present invention. 2A is a perspective view showing a folded state in which the cover part of the mobile phone provided with the display device shown in FIG. 1 is closed, and FIG. 2B is a state in which the cover part of the mobile phone is opened. FIG. It is a longitudinal sectional view showing a main part of the cover portion in the mobile phone shown in FIG. 3 is a timing chart showing an operation when displaying a sub-panel in the display device shown in FIG. 1. 3 is a timing chart showing an operation when displaying a main panel in the display device shown in FIG. 1. It is a wave form diagram explaining the relationship between the writing time to each pixel electrode in the sub panel in the liquid crystal display device of the conventional twin panel structure, and the writing time to each pixel electrode in a main panel. FIG. 2 is a waveform diagram for explaining a relationship between a writing time to each pixel electrode in a sub-panel and a writing time to each pixel electrode in a main panel in the liquid crystal display device having a twin panel configuration shown in FIG. 1. It is a block diagram which shows the structure of a general display apparatus drive circuit. FIG. 9A is an explanatory diagram showing power consumption in a sub-panel in a conventional liquid crystal display device, and FIG. 9B is an explanatory diagram showing power consumption in a sub-panel in the liquid crystal display device of the present embodiment. It is a front view showing a schematic configuration of a display device according to another embodiment of the present invention. It is a circuit diagram which shows the structure of the display apparatus shown in FIG. 12 is a waveform diagram illustrating a relationship between a writing time to each pixel electrode in the sub-panel and a writing time to each pixel electrode in the main panel in the liquid crystal display device having the twin panel configuration illustrated in FIG. FIG. 12 is a circuit diagram illustrating another example of the switching TFT illustrated in FIG. 11. It is a circuit diagram showing a display device of a conventional twin-panel configuration.

Explanation of symbols

1,2 Liquid crystal display device (display device)
10,100 Subpanel (first display means)
11,21 TFT substrate
13,113,123 Gate driver (gate signal line drive circuit, display drive circuit)
14,24 Gate bus line (gate signal line)
15,115 Source driver (source signal line drive circuit, display drive circuit)
16,28 Source bus line (source signal line)
17 Switching TFT
18 switching control signal line 18a first switching control signal line 18b second switching control signal line
20,200 Main panel (second display)
25 TFT (switching means)
26 Liquid Crystal Capacitor 27 Counter Electrode 30 FPC
40 portable telephone 41 main unit (first housing part)
42 Cover (second housing)
119 Time division drive unit (Time division drive means)

Claims (18)

A plurality of gate signal lines, a plurality of source signal lines, switching means disposed near each intersection of the gate signal lines and the source signal lines, and a switching operation control terminal connected to the gate signal lines, and the switching First display means having a pixel electrode connected to the source signal line via the means;
Each has a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, and each source signal line is connected to a corresponding source signal line of the first display means, and the number of pixels is larger than that of the first display means. Second display means having a large number of
A gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line to perform a writing operation to the pixel electrode. When the vertical period is the same for the first display means and the second display means, the short-time write operation with a time shorter than the maximum write time that can be set as the write time for each pixel electrode of the first display means And a display driving circuit for writing to each pixel electrode of the first display means. A plurality of gate signal lines, a plurality of source signal lines, switching means disposed near each intersection of the gate signal lines and the source signal lines, and a switching operation control terminal connected to the gate signal lines, and the switching First display means having a pixel electrode connected to the source signal line via the means;
Each has a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, and each source signal line is connected to a corresponding source signal line of the first display means, and the number of pixels is larger than that of the first display means. Second display means having a large number of
A gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line to perform a writing operation to the pixel electrode. And a display driving circuit for performing writing to each pixel electrode of the first display means by a short-time writing operation in the same or substantially the same time as writing to each pixel electrode of the second display means. Display device.   2. The display driving circuit according to claim 1, wherein the short-time writing operation to each pixel electrode of the first display means is continuously performed in one vertical period, and a writing pause period is provided in one vertical period. 3. The display device according to 1 or 2.   The display driving circuit is configured so that each of the first display means is set for each horizontal period set in the first display means when one vertical period is the same for the first display means and the second display means. The display device according to claim 1, wherein the short-time writing operation to the pixel electrode is performed, and a writing pause period is provided within one horizontal period.   The display device according to claim 1 or 2, wherein the first display means is used in a state where the display frequency is higher than that of the second display means.   The display driving circuit includes a gate signal line driving circuit that supplies a gate signal to the gate signal line, and a source signal line driving circuit that supplies a display data signal to the source signal line, and the source signal line driving circuit includes: 3. A display device according to claim 1, wherein the display device is provided in one display means, and a gate signal is supplied to the second display means via a gate signal line of the first display means.   A plurality of source signal lines in the second display means correspond to one source signal line in the first display means, and display data signals of one source signal line in the first display means are 7. A time-division driving unit corresponding to the source signal line and switching and supplying the plurality of source signal lines in the second display unit in a time-division manner is provided. Display device.   The display driving circuit includes a gate signal line driving circuit that supplies a gate signal to the gate signal line, and a source signal line driving circuit that supplies a display data signal to the source signal line, and the source signal line driving circuit includes: 3. The display device according to claim 1, wherein the display device is provided in the second display unit, and the gate signal is supplied to the first display unit through the gate signal line of the second display unit.   The first display means and the second display means are provided in an apparatus capable of opening and closing the second housing part with respect to the first housing part, and the first display means is the first housing part. The display surface is arranged on the outer surface side of the first or second housing portion in the folded state in which the second housing portion is closed, and the second display means is in the folded state. The display device according to claim 1, wherein a display surface is provided on an inner surface side of the first or second housing portion. A plurality of gate signal lines, a plurality of source signal lines, switching means disposed near each intersection of the gate signal lines and the source signal lines, and a switching operation control terminal connected to the gate signal lines, and the switching First display means having a pixel electrode connected to the source signal line through the means, and a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, and each source signal line has a first In a driving method of a display device including a second display unit connected to a corresponding source signal line of one display unit and having a larger number of pixels than the first display unit,
A gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line to perform a writing operation to the pixel electrode. When the vertical period is the same for the first display means and the second display means, the short-time write operation with a time shorter than the maximum write time that can be set as the write time for each pixel electrode of the first display means And writing to each pixel electrode of the first display means. A plurality of gate signal lines, a plurality of source signal lines, switching means disposed near each intersection of the gate signal lines and the source signal lines, and a switching operation control terminal connected to the gate signal lines, and the switching First display means having a pixel electrode connected to the source signal line through the means, and a plurality of the gate signal lines, source signal lines, switching means, and pixel electrodes, and each source signal line has a first In a driving method of a display device including a second display unit connected to a corresponding source signal line of one display unit and having a larger number of pixels than the first display unit,
A gate signal for turning on the switching means is supplied to the gate signal line, and a display data signal is supplied to the source signal line to perform a writing operation to the pixel electrode. A method for driving a display device, wherein writing to each pixel electrode of the first display means is performed in a short-time writing operation in the same or substantially the same time as writing to each pixel electrode of the second display means.   12. The short-time write operation to each pixel electrode of the first display means is continuously performed in one vertical period, and a write pause period is provided in one vertical period. A driving method of a display device.   When one vertical period is the same for the first display unit and the second display unit, the short period to each pixel electrode of the first display unit is set for each horizontal period set for the first display unit. 12. The method for driving a display device according to claim 10, wherein a time writing operation is performed and a writing pause period is provided within one horizontal period.   12. The method for driving a display device according to claim 10, wherein the first display means is used in a state where the display frequency is higher than that of the second display means.   12. The display device driving method according to claim 10, wherein the gate signal is supplied to the second display means through the gate signal line of the first display means.   A plurality of source signal lines in the second display means correspond to one source signal line in the first display means, and display data signals of one source signal line in the first display means are 16. The display device driving method according to claim 15, wherein the plurality of source signal lines in the second display means corresponding to the source signal lines are sequentially switched and supplied in a time division manner.   12. The display device driving method according to claim 10, wherein the gate signal is supplied to the first display means through the gate signal line of the second display means.   The first display means and the second display means are provided in an apparatus capable of opening and closing the second housing part with respect to the first housing part, and the first display means is the first housing part. The display surface is arranged on the outer surface side of the first or second housing portion in the folded state in which the second housing portion is closed, and the second display means is in the folded state. The display device driving method according to claim 10 or 11, wherein a display surface is arranged on an inner surface side of the first or second casing.

Images