JP2005244185A - Display device, its manufacturing method and television receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a substrate having a film pattern such as an insulating film, a semiconductor film and a conductive film by a simple method, and to inexpensively provide a manufacturing method of a display device high in throughput and yield. <P>SOLUTION: A first film pattern is formed on the substrate by using a photosensitive material. The first film pattern is irradiated with a first laser beam and developed. A second film pattern is formed and the surface of the second film pattern is reformed to a splash liquid surface. A conductive material is discharged to the outer edge of the splash liquid surface by a drop discharge method. A semiconductor region, a gate insulating film and a gate electrode are formed on the source electrode and the drain electrode. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device including a thin film transistor formed using a droplet discharge method typified by an ink jet method and a manufacturing method thereof.

  2. Description of the Related Art Conventionally, so-called active matrix drive type display panels composed of thin film transistors (hereinafter also referred to as “TFTs”) on a glass substrate are subjected to a light exposure process using a photomask, as in the semiconductor integrated circuit manufacturing technology. It has been manufactured by patterning various thin films.

  That is, in forming a thin film pattern in a thin film transistor, a resist is applied and formed on the entire surface of the substrate, pre-baked, and then subjected to a photolithography process of irradiating ultraviolet rays or the like through the mask pattern and forming a resist pattern by development. Thereafter, a method of forming a thin film pattern by etching away a film (a thin film formed of a semiconductor material, an insulator material, or a conductive material) existing in a portion that does not become a thin film pattern using the resist pattern as a mask pattern. It is used.

  When the size of the glass substrate or the display panel is small, the patterning process can be performed relatively easily by the exposure apparatus. However, as the substrate size increases, the entire surface of the display panel can be obtained by a single exposure process. Cannot be processed simultaneously. As a result, a method has been developed in which a region coated with a photoresist is divided into a plurality of portions, an exposure process is performed for each predetermined block region, and the entire surface of the substrate is repeatedly exposed in order (for example, patents). Reference 1).

  In manufacturing a semiconductor device, for the purpose of reducing the cost of equipment and simplifying the process, it is considered to use a droplet discharge device for forming a pattern of a thin film or a wiring used for a thin film transistor.

Patent Document 2 discloses a technique for forming a film on a semiconductor wafer using an apparatus capable of continuously discharging a resist from a small-diameter nozzle in order to suppress consumption of a liquid required for film formation.
Japanese Patent Laid-Open No. 11-326951 JP 2000-188251 A

  In order to form a thin film transistor having a small occupied area by a droplet discharge method using the technique described in Patent Document 2, a solution having a small droplet diameter may be discharged. For this purpose, it is only necessary to reduce the diameter of the discharge port. In this case, the discharge solution composition adheres to the tip of the discharge port, dries and solidifies, resulting in clogging and the like. Is difficult to discharge continuously and stably, and there is a problem in that the throughput and yield of the semiconductor device formed of the thin film transistors are reduced.

  The present invention has been made in view of such problems, and a method for manufacturing a thin film transistor having a fine structure without reducing the diameter of the discharge port. Further, a semiconductor with low cost and high throughput and yield. It is an object to provide a method for manufacturing a device.

  One method for manufacturing a display device of the present invention is to form a thin film, discharge or apply a photosensitive resin (resist) on the thin film, and irradiate the photosensitive resin with a laser beam to form a resist mask. The thin film is etched using the resist mask as a mask to form a thin film pattern having a desired shape, and a part of the lyophobic surface is used as a lyophilic surface while using the thin film pattern.

  One method of manufacturing a display device of the present invention is to discharge or apply a photosensitive resin, irradiate the photosensitive resin with a laser beam to form a pattern, and then perform a liquid repellent treatment on the photosensitive resin pattern. Features.

  One method for manufacturing a display device of the present invention is characterized in that a liquid repellent region and a lyophilic region are formed by partially irradiating a surface subjected to a liquid repellent treatment with a laser beam.

Moreover, this invention includes the structure shown below.

According to one aspect of the present invention, a first film pattern is formed on a substrate using a photosensitive material, and the first film pattern is irradiated with a laser beam and developed to form a second film pattern, After modifying the surface of the second film pattern to a liquid repellent surface, a conductive material is discharged to the outer edge of the liquid repellent surface by a droplet discharge method to form a source electrode and a drain electrode. And forming a semiconductor layer, a gate insulating film, and a gate electrode.

According to another aspect of the present invention, a first film pattern is formed using a solution that forms a liquid-repellent surface on a substrate, and the first film pattern is irradiated with a laser beam to form a liquid-repellent region and a lyophilic region. And forming a source electrode and a drain electrode by discharging a conductive material onto a lyophilic surface of the second film pattern by a droplet discharge method, and then forming a source electrode and a drain electrode on the surface of the source electrode and the drain electrode. And forming a semiconductor layer, a gate insulating film, and a gate electrode.

According to another aspect of the present invention, a first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. A region where the film pattern and the photosensitive material overlap is irradiated with a first laser beam and developed to form a mask pattern, and then the first film pattern is etched using the mask pattern as a mask to obtain a desired pattern. Forming a gate electrode having a shape; forming an insulating film on the gate electrode; forming a region for forming a liquid repellent surface on the insulating film; and Irradiating a second laser beam transmitted through a light-transmitting substrate to modify a part of the region having the liquid repellent surface to a lyophilic surface, the lyophilic surface, the gate electrode, and the insulating film Form source and drain electrodes on top , And forming a semiconductor layer on the hydrophobic surface.

According to another aspect of the present invention, a first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. A region where the film pattern and the photosensitive material overlap is irradiated with a first laser beam and developed to form a mask pattern, and then the first film pattern is etched using the mask pattern as a mask to obtain a desired pattern. Forming a gate electrode having a shape;
Forming a first insulating film on the gate electrode; forming a semiconductor layer on the first insulating film; and forming a liquid repellent surface on the surfaces of the first insulating film and the semiconductor layer. After the formation, a part of the region having the liquid repellent surface is irradiated with a second laser beam transmitted through the light-transmitting substrate so that the part of the region having the liquid repellent surface becomes a lyophilic surface. Modifying, forming a source electrode and a drain electrode on the lyophilic surface, and etching the part of the semiconductor layer using the source electrode and the drain electrode as a mask to form a source region and a drain region. And

According to another aspect of the present invention, a first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. After forming a mask pattern by irradiating a first laser beam to a region where the film pattern and the photosensitive material overlap, the first film pattern is etched using the mask pattern as a mask to obtain a desired shape. Forming a gate electrode having
Forming a first insulating film on the gate electrode; forming a first semiconductor layer on the first insulating film; forming a second insulating film on the first semiconductor layer; After forming a second semiconductor layer on the first semiconductor layer and the second insulating film and forming a region for forming a liquid repellent surface on the surface of the first insulating film and the second semiconductor layer, A part of the region having the liquid repellent surface is irradiated with a second laser beam transmitted through the light-transmitting substrate to modify a part of the region having the liquid repellent surface to a lyophilic surface, A source electrode and a drain electrode are formed on a lyophilic surface, and the second semiconductor layer is etched using the source electrode and the drain electrode as a mask to form a source region and a drain region.

In the present invention, the first laser beam has any wavelength of ultraviolet light or infrared light. The second laser beam has any wavelength of ultraviolet light or infrared light.

The photosensitive material is a negative photosensitive resin or a positive photosensitive resin.

Further, the present invention is a television including a display device formed by the above method for manufacturing a display device.

The display device is a liquid crystal display device or a light emitting device.

  According to the present invention, by combining liquid repellent treatment and lyophilic treatment of a portion subjected to liquid repellent treatment by laser beam irradiation, a thin film pattern can be miniaturized when discharged by a droplet discharge method. For example, fine control of the distance between the source wiring and the drain wiring on the channel formation region of the thin film transistor is possible, and the characteristics of the thin film transistor can be improved.

  Furthermore, a thin film transistor having a fine structure can be manufactured without particularly reducing the diameter of the discharge port. By using the thin film transistor, a semiconductor device such as a highly integrated circuit or a display device with a high aperture ratio can be obtained. It can be manufactured at low cost and with high throughput and yield.

  The best mode for carrying out the invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention should not be construed as being limited to the description of the embodiment modes. In the drawings, common portions are denoted by the same reference numerals, and detailed description thereof is omitted.

  FIG. 1 is a top view showing a structure of a display panel according to the present invention. A pixel portion 101 in which pixels 102 are arranged in a matrix on a substrate 100 having an insulating surface, a scanning line side input terminal 103, and a signal line side input. A terminal 104 is formed. The number of pixels may be provided in accordance with various standards. For XGA, 1024 × 768 × 3 (RGB), for UXGA, 1600 × 1200 × 3 (RGB), and for full specification high vision, 1920 × 1080. X3 (RGB) may be used.

  When the display panel according to the present invention is an EL display panel, the pixel 102 includes a scanning line extending from the scanning line side input terminal 103 and a signal line extending from the signal line side input terminal 104 intersecting each other. Are arranged in a matrix. Each of the pixels 102 includes a transistor for controlling a connection state with a signal line (hereinafter referred to as a “switching transistor”, and also referred to as a “switching TFT” when a TFT is used as the transistor), and a current flowing to the light-emitting element. A transistor to be controlled (hereinafter referred to as a “driving transistor”, also referred to as a “driving TFT” when a TFT is used as the transistor) is provided, and the driving transistor is connected in series with the light emitting element.

  When the display panel according to the present invention is a liquid crystal display panel, the pixel 102 includes a scanning line extending from the scanning line side input terminal 103 and a signal line extending from the signal line side input terminal 104 intersecting each other. Are arranged in a matrix. Each of the pixels 102 includes a switching element and a pixel electrode connected to the switching element. A typical example of the switching element is a TFT. By connecting the gate electrode side of the TFT to a scanning line and the source or drain side to a signal line, each pixel can be controlled independently by a signal input from the outside. Yes.

  A TFT includes a semiconductor layer, a gate insulating layer, and a gate electrode layer as main components, and a wiring layer connected to a source region and a drain region formed in the semiconductor layer is attached to the TFT. Structurally, the top gate type in which the semiconductor layer, the gate insulating layer and the gate electrode layer are arranged from the substrate side, and the bottom gate type in which the gate electrode layer, the gate insulating layer and the semiconductor layer are arranged from the substrate side are representative. In the present invention, any of those structures may be used.

  As a material for forming the semiconductor layer, an amorphous semiconductor (hereinafter also referred to as “AS”) manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane is used. A polycrystalline semiconductor crystallized using energy or thermal energy, a semi-amorphous (also referred to as microcrystal or microcrystal, hereinafter, also referred to as “SAS”) semiconductor, or the like can be used.

SAS is a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal) and having a third state that is stable in terms of free energy and has a short-range order and a lattice. It includes a crystalline region with strain. A crystal region of 0.5 to 20 nm can be observed in at least a partial region in the SAS film. When silicon is the main component, the Raman spectrum derived from the Si—Si bond is from 520 cm ⁻¹ . Is also shifted to the low wavenumber side. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. As a terminator for dangling bonds, 1 atom% or more of hydrogen or halogen is contained. The SAS can be formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, GeF ₄ may be mixed. This silicide gas may be diluted with H ₂ and one or more elements selected from He, Ar, Kr, and Ne. The dilution rate is in the range of 2 to 1000 times, the pressure is in the range of approximately 0.1 Pa to 133 Pa, the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz, and the substrate heating temperature may be 300 ° C. or less. As an impurity element in the film, impurities of atmospheric components such as oxygen, nitrogen, and carbon are desirably 1 × 10 ²⁰ / cm ³ or less, and in particular, the oxygen concentration is 5 × 10 ¹⁹ / cm ³ or less, preferably 1 × 10 ¹⁹ / cm ³ or less.

  FIG. 1 shows the structure of a display panel in which signals input to scanning lines and signal lines are controlled by an external drive circuit. As shown in FIG. 2, a driver IC 105, a COG (Chip On Glass) is used. 106 may be mounted on the substrate 100. The driver ICs 105 and 106 may be formed on a single crystal semiconductor substrate or may be formed on a glass substrate with TFTs.

  In the case where a TFT provided for a pixel is formed using SAS, a scanning line side driver circuit 107 can be formed over the substrate 100 and integrated as shown in FIG.

  One mode of a droplet discharge device used for forming a pattern is shown in FIG. The individual heads 1405 and 1412 of the droplet discharge means 1403 are connected to the control means 1407, which can draw a pre-programmed pattern under the control of the computer 1410. For example, the drawing place may be determined based on the marker 1411 formed on the substrate 1400. Alternatively, the reference point may be determined based on the edge of the substrate 1400. This is detected by an imaging means 1404 such as an image sensor using a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS), and converted into a digital signal by an image processing means 1409 and recognized by a computer 1410. A control signal is generated and sent to the control means 1407. Information on the pattern to be formed on the substrate 1400 is stored in the storage medium 1408. Based on this information, a control signal is sent to the control means 1407, and each head 1405, 1412 of the droplet discharge means 1403 is sent. Can be controlled individually. The material to be discharged is supplied from material supply sources 1413 and 1414 to the heads 1405 and 1412 through piping. Currently, an apparatus capable of separately ejecting metal, organic, and inorganic with one head is studied so that RGB can be ejected with one inkjet head when forming an EL layer. In the case of discharging an interlayer insulating layer or the like, thin lines may be discharged in multiple layers using the same material in order to improve throughput. In FIG. 27, the distance at which the individual heads 1405 and 1412 of the droplet discharge means 1403 are aligned matches the width of the substrate, but the width is larger than the distance at which the individual heads 1405 and 1412 of the droplet discharge means 1403 are aligned. It is possible to form a pattern by repeatedly scanning a large-sized substrate having a pattern. In that case, the heads 1405 and 1412 can freely scan on the substrate in the direction of the arrow to freely set a drawing region, and a plurality of the same patterns can be drawn on one substrate.

  Next, a manufacturing process of the light-emitting device of the present invention will be described below.

(First embodiment)
As a first embodiment, a manufacturing method of a channel protection type bottom gate TFT will be described.

  FIG. 4A illustrates a step of forming a gate electrode layer, a gate wiring layer connected to the gate electrode layer, and a capacitor wiring layer over the substrate 100 by a droplet discharge method. 4A schematically shows a longitudinal sectional structure, and FIG. 12 shows a planar structure corresponding to AB and CD, which can be referred to at the same time.

  The substrate 100 has a heat resistance capable of withstanding the processing temperature of this manufacturing process in addition to a non-alkali glass substrate manufactured by a fusion method or a float method, such as barium borosilicate glass, aluminoborosilicate glass, or aluminosilicate glass, or a ceramic substrate. A plastic substrate or the like can be used. Alternatively, a substrate in which an insulating layer is provided on the surface of a semiconductor substrate such as single crystal silicon or a metal substrate such as stainless steel may be used. Further, as the substrate 100, a large area substrate such as 320 mm × 400 mm, 370 mm × 470 mm, 550 mm × 650 mm, 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm can be used.

  A metal material such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), or Mo (molybdenum) is formed on the substrate 100 by a method such as sputtering or vapor deposition. It is preferable to form the base layer 201 formed using the oxide. The underlayer 201 may be formed to a thickness of 0.01 to 10 μm, but may be formed extremely thin, and thus does not necessarily have a layer structure. Note that the base layer 201 is provided in order to form the gate electrode layer with good adhesion. If sufficient adhesion can be obtained, the underlying layer 201 is omitted and the gate electrode layer is dropped onto the substrate 100 as a droplet. You may form directly by the discharge method. In addition, atmospheric pressure plasma treatment or the like may be performed in order to form with good adhesion. Further, not only when the gate electrode layer is formed, but when a conductive layer is formed on a layer such as an organic layer, an inorganic layer, or a metal layer by a droplet discharge method, or conductivity formed by a droplet discharge method. Even when an organic layer, an inorganic layer, a metal layer, or the like is formed on the layer, the same treatment may be performed to improve the adhesion with the lower layer.

  A composition containing a conductive material is discharged over the base layer 201 by a droplet discharge method, so that the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205 are formed. As the conductive material for forming these layers, Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, A metal such as Ba or an alloy thereof, a metal nitride thereof, a silver halide fine particle, or a dispersible nanoparticle can be used. Or ITO (indium tin oxide alloy) used as a transparent conductive material, ITO with silicon oxide as a composition, organic indium, organic tin, zinc oxide (ZnO), titanium nitride (TiN: Titanium Nitride), etc. It can be used as appropriate. The gate wiring layer is not preferable to have a low resistance, and considering the specific resistance value, it is preferable to use a material in which any of gold, silver and copper is dissolved or dispersed in a solvent. More preferably, low resistance silver or copper may be used. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As a barrier film in the case of using copper as a wiring, an insulating or conductive material containing nitrogen such as silicon nitride, silicon oxynitride, aluminum nitride, titanium nitride, tantalum nitride (TaN: Tantalum Nitride) is preferably used. May be formed by a droplet discharge method. As the solvent, esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like can be used. The surface tension and the viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

  The viscosity of the composition used for the droplet discharge method is preferably 5 to 20 mPa · s, which is to prevent the drying from occurring and to smoothly discharge the composition from the discharge port. . The surface tension is preferably 40 N / m or less. Note that the viscosity of the composition may be appropriately adjusted according to the solvent to be used and the application. For example, the viscosity of a composition in which ITO, ITO having silicon oxide as a composition, organic indium, and organic tin are dissolved or dispersed in a solvent is 5 to 20 mPa · s, and the viscosity of the composition in which silver is dissolved or dispersed in a solvent. Is 5 to 20 mPa · s, and the viscosity of a composition in which gold is dissolved or dispersed in a solvent is 10 to 20 mPa · s.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.5 to 10 μm. On the other hand, when formed by a gas evaporation method, the nanoparticles protected with the dispersant are as fine as about 7 nm. When the surface of each particle is covered with a coating agent, the nanoparticles aggregate in the solvent. It is stable at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  The step of discharging the composition may be performed under reduced pressure. This is because the solvent of the composition volatilizes before the composition is discharged and landed on the object to be processed, and the subsequent drying and firing steps can be omitted or shortened. After discharging the solution, depending on the material of the solution, one or both of drying and baking steps are performed under normal pressure or reduced pressure by laser light irradiation, instantaneous lamp heating, treatment in a heating furnace, or the like. The drying and firing steps are both heat treatment steps. For example, the drying is performed at 100 degrees for 3 minutes, and the firing is performed at 200 to 350 degrees for 15 minutes to 120 minutes. Time is different. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is 100 to 800 degrees (preferably 200 to 350 degrees). It is. Through this heating step, the solvent in the solution is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion. The atmosphere is an oxygen atmosphere, a nitrogen atmosphere or air. However, it is preferable to perform in an oxygen atmosphere in which the solvent in which the metal element is decomposed or dispersed is easily removed.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. The former gas laser includes an excimer laser, and the latter solid-state laser includes a laser using a crystal such as YAG, YVO ₄ , GdVO ₄ or the like doped with Cr, Nd, or the like. Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate, the heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds. Instant lamp heating (RTA) uses an infrared lamp or a halogen lamp that emits ultraviolet light or infrared light in an inert gas atmosphere to rapidly increase the temperature, from several microseconds to several minutes. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, there is an advantage that only the outermost thin film can be heated substantially without affecting the lower layer film.

  In this embodiment mode, the gate wiring layer 202 and the capacitor wiring layer 204 are formed by a droplet discharge method; however, a plasma CVD method or a sputtering method may be used.

  Next, as illustrated in FIG. 4B, a photosensitive resin 206 which is a resist mask material is discharged or applied over the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205. In the case of coating, a spin coater or a slit coater may be used. As the photosensitive resin 206, a negative photosensitive resin or a positive photosensitive resin that is sensitive from ultraviolet light to infrared light is used. In the present embodiment, a negative photosensitive resin is used.

  Next, the photosensitive resin 206 is irradiated with a laser beam 208 using a laser beam drawing device 207, and a pattern is drawn while moving the substrate or the laser.

  Here, the laser beam drawing apparatus will be described with reference to FIG. As shown in FIG. 33, a laser beam drawing apparatus 2001 includes a personal computer (hereinafter referred to as a PC) 2002 that executes various controls when irradiating a laser beam, a laser oscillator 2003 that outputs a laser beam, and a laser. A power source 2004 of the oscillator 2003, an optical system (ND filter) 2005 for attenuating the laser beam, an acousto-optic modulator (AOM) 2006 for modulating the intensity of the laser beam, and an enlargement or reduction of the cross section of the laser beam An optical system 2007 composed of a lens for carrying out an optical path, a mirror for changing an optical path, etc., a substrate moving mechanism 2009 having an X stage and a Y stage, and D for digital-analog conversion of control data output from a PC / A converter 2010 and the sound according to the analog voltage output from the D / A converter It includes a driver 2011 for controlling the academic modulator 2006, a driver 2012 for outputting a driving signal for driving the substrate moving mechanism 2009.

As the laser oscillator 2003, a laser oscillator that can oscillate ultraviolet light, visible light, or infrared light can be used. As the laser oscillator, excimer laser oscillators such as KrF, ArF, KrF, XeCl, and Xe, gas laser oscillators such as He, He-Cd, Ar, He-Ne, and HF, YAG, GdVO ₄ , YVO ₄ , YLF, and YAlO Cr crystal such as _{3, Nd, Er, Ho,} Ce, Co, solid-state laser oscillator using a crystal doped with Ti or Tm, can be used GaN, GaAs, GaAlAs, a semiconductor laser oscillator of InGaAsP or the like. In the solid-state laser oscillator, it is preferable to apply the second to fifth harmonics of the fundamental wave.

  Next, a photosensitive material exposure method using a laser beam direct writing apparatus will be described. When the substrate 2008 is mounted on the substrate moving mechanism 2009, the PC 2002 detects the position of the marker attached to the substrate by a camera (not shown). Next, the PC 2002 generates movement data for moving the substrate movement mechanism 2009 based on the detected marker position data and drawing pattern data input in advance. After the laser beam output from the laser oscillator 2003 is attenuated by the optical system 2005, the PC 2002 controls the output light amount of the acousto-optic modulator 2006 via the driver 2011, whereby the acousto-optic modulator 2006 performs a predetermined process. The amount of light is controlled so as to be the amount of light. After that, the laser beam output from the acousto-optic modulator 2006 is changed in optical path and beam shape by the optical system 2007, condensed by the lens, and then irradiated to the photosensitive material applied on the substrate, and the photosensitive material is exposed to light. To do. At this time, the substrate movement mechanism 2009 is controlled to move in the X direction and the Y direction according to the movement data generated by the PC 2002. As a result, a predetermined position is irradiated with a laser beam, and the photosensitive material is exposed.

  By developing after exposure, the region irradiated with the laser beam becomes a resist mask 209 as shown in FIG. Here, since the negative type is used as the photosensitive resin, the region irradiated with the laser beam becomes the resist mask. A part of the energy of the laser beam is converted into heat by the resist and reacts a part of the resist, so that the width of the resist mask is slightly larger than the width of the laser beam. Further, since the shorter the laser beam, the smaller the beam diameter can be focused. Therefore, it is preferable to irradiate the laser beam with a short wavelength in order to form a resist mask with a fine width.

  Further, the spot shape of the laser beam on the surface of the photosensitive resin is processed by an optical system so as to be a dot shape, a circle shape, an ellipse shape, a rectangle shape, or a line shape (strictly, an elongated rectangle shape). The spot shape may be circular, but a linear shape is preferable because a resist mask having a uniform width can be formed.

  In this example, the exposure is performed by irradiating laser light from the front surface side of the substrate. However, the optical system 2007 and the substrate moving mechanism 2009 are appropriately changed, and exposure is performed by irradiating the laser light from the back surface side of the substrate. A laser beam drawing apparatus may be used.

  In addition to selectively irradiating the laser beam by moving the substrate, the laser beam can be irradiated by scanning the laser beam in the X-Y axis direction. In the latter case, it is preferable to use a polygon mirror, a galvanometer mirror, or an acousto-optic deflector (AOD) for the optical system 2007. Alternatively, the laser beam may be scanned in one direction of the X axis or the Y axis, the substrate may be moved in the other direction of the X axis or the Y axis, and the laser beam may be irradiated to a predetermined place on the substrate.

  Next, using the resist mask 209 as a mask, the gate electrode layer 203 and the gate electrode layer 205 are etched by a known method such as dry etching or wet etching (FIG. 5B). Subsequently, the resist mask is removed. As a result, narrow gate electrode layers 203 and 205 can be formed as shown in FIG.

  Next, it is desirable to perform one of the following two steps as a treatment of the base layer 201 exposed on the surface.

  The first method is a step of forming an insulator layer 210 by insulating a portion of the base layer 201 that does not overlap with the gate wiring layer 202, the gate electrode layers 203 and 205, and the capacitor wiring layer 204 (FIG. 5 ( See C). That is, the base layer 201 which does not overlap with the gate wiring layer 202, the gate electrode layer 203, the gate electrode layer 205, and the capacitor wiring layer 204 is oxidized and insulated. As described above, when the base layer 201 is oxidized to be insulated, it is preferable to form the base layer 201 with a thickness of 0.01 to 10 μm, so that the base layer 201 can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  As a second method, the base layer 201 is removed by etching using the gate wiring layer 202, the gate electrode layers 203 and 205, and the capacitor wiring layer 204 as a mask. When this process is used, the thickness of the base layer 201 is not limited.

  Next, the gate insulating layer 211 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method (see FIG. 6A). As a particularly preferable embodiment, a three-layer structure including an insulator layer 212 made of silicon nitride, an insulator layer 213 made of silicon oxide, and an insulator layer 214 made of silicon nitride is formed as the gate insulating layer 211. Note that in order to form a dense insulating layer with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in a reaction gas and mixed into the formed insulating layer. By forming the insulator layer in contact with the gate wiring layer 202, the gate electrode layers 203 and 205, and the capacitor wiring layer 204 using silicon nitride or silicon nitride oxide, deterioration due to oxidation can be prevented. Further, by using NiB (nickel boron) for the insulator layer in contact with the gate wiring layer 202, the gate electrode layers 203 and 205, and the capacitor wiring layer 204, the surface can be smoothed.

  Next, the semiconductor layer 215 is formed. The semiconductor layer 215 is formed by AS or SAS manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane. As the vapor phase growth method, a plasma CVD method or a thermal CVD method can be used.

When the plasma CVD method is used, AS is formed using SiH ₄ which is a semiconductor material gas or a mixed gas of SiH ₄ and H ₂ . SAS is either a mixed gas obtained by diluting the SiH ₄ to 3 to 1000 times with H _2, or a Si ₂ H ₆ and GeF gas flow ratio of ₄ Si ₂ H ₆ pairs GeF ₄ 20-40 1-0. When diluted with 9, SAS having a Si composition ratio of 80% or more can be obtained. In particular, the latter is preferable because the semiconductor layer 215 can have crystallinity from the interface with the base.

  An insulator layer 216 is formed over the semiconductor layer 215 by a plasma CVD method or a sputtering method. As shown in a later step, the insulator layer 216 is left on the semiconductor layer 215 over the gate electrode layers 203 and 205 to form a channel protective layer, so that the cleanliness of the interface is ensured. In order to prevent the semiconductor layer 215 from being contaminated with impurities such as organic substances, metal substances, and water vapor, it is preferable to form a dense film. In the glow discharge decomposition method, it is preferable to form a silicon nitride film in which a silicide gas is diluted 100 to 500 times with argon or the like because a dense silicon nitride film can be formed even at a film forming temperature of 100 ° C. or less. If necessary, an insulating film may be stacked.

  In the steps so far, the gate insulating layer 211 to the insulator layer 216 can be continuously formed without being exposed to the air. In other words, each stacked interface can be formed without being contaminated by atmospheric components or contaminating impurity elements floating in the atmosphere, so that variations in TFT characteristics can be reduced.

  Next, the composition is selectively discharged over the insulator layer 216 over the gate electrode layer 203 and the gate electrode layer 205, so that a mask layer 217 is formed (see FIG. 6A). The mask layer 217 is formed using a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin. Also, using organic materials such as benzocyclobutene, parylene, flare, translucent polyimide, compound materials made of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. It is formed by a droplet discharge method. Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

  The insulator layer 216 is etched using the mask layer 217 to form an insulator layer 218 functioning as a channel protective layer. The mask layer 217 is removed, and an n-type semiconductor layer 219 is formed over the semiconductor layer 215 and the insulator layer 218. The n-type semiconductor layer 219 may be formed using silane gas and phosphine gas, and may be formed using AS or SAS.

  Next, a mask layer 220 is formed over the n-type semiconductor layer 219 by a droplet discharge method (see FIG. 6B). By using the mask layer 220, the n-type semiconductor layer 219 and the semiconductor layer 215 are etched to form the semiconductor layer 221 and the n-type semiconductor layer 222 (see FIG. 6C). In this case, the mask layer 220 can be finely formed by exposing the photosensitive resin with laser light to be finely formed. Note that FIG. 6C schematically shows a longitudinal cross-sectional structure, and a planar structure corresponding to AB, CD, and EF is shown in FIG.

  Subsequently, the mask layer 220 is removed.

Next, a through hole 223 is formed in part of the gate insulating layer 211 by etching, so that part of the gate electrode layer 205 disposed on the lower layer side is exposed (see FIG. 7A). Etching may be performed using a mask layer formed by the same droplet discharge method as described above. As the etching process, either plasma etching or wet etching may be employed, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and He or Ar may be added as appropriate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  Subsequently, a solution for forming a liquid repellent surface is discharged or applied. As an example of the composition of the solution that forms the liquid repellent surface, there is a silane coupling agent represented by a chemical formula of Rn-Si-X (4-n) (n = 1, 2, 3). Here, R is a substance containing a relatively inert group such as an alkyl group. X is a hydrolyzable group such as halogen, methoxy group, ethoxy group or acetoxy group, which can be bonded by condensation with a hydroxyl group on the substrate surface or adsorbed water.

Further, by using a fluorine-based silane coupling agent (fluoroalkylsilane (hereinafter referred to as FAS)) having a fluoroalkyl group in R as the silane coupling agent, the liquid repellency can be further improved. R of FAS has a structure represented by (CF ₃ ) (CF ₂ ) x (CH ₂ ) y (x: an integer of 0 or more and 10 or less, y: an integer of 0 or more and 4 or less), and a plurality of R Alternatively, when X is bonded to Si, R and X may all be the same or different. Typical FAS includes fluoroalkylsilanes such as heptadefluorotetrahydrodecyltriethoxysilane, heptadecafluorotetrahydrodecyltrichlorosilane, tridecafluorotetrahydrooctyltrichlorosilane, and trifluoropropyltrimethoxysilane.

  As the solvent of the solution forming the liquid repellent surface, n-pentane, n-hexane, n-heptane, n-octane, n-decane, dicyclopentane, benzene, toluene, xylene, durene, indene, tetrahydronaphthalene, decahydro A hydrocarbon solvent such as naphthalene or squalane or tetrahydrofuran is used.

  Further, as an example of a composition of a solution that forms a liquid repellent surface, a material having a fluorocarbon chain (fluorine resin) can be used. Examples of fluorine resins include polytetrafluoroethylene (PTFE; tetrafluoroethylene resin), perfluoroalkoxyalkane (PFA; tetrafluoroethylene perfluoroalkyl vinyl ether copolymer resin), and perfluoroethylene propene copolymer (PFEP; four fluoropolymer). Ethylene-hexafluoropropylene copolymer resin), ethylene-tetrafluoroethylene copolymer (ETFE; tetrafluoroethylene-ethylene copolymer resin), polyvinylidene fluoride (PVDF; vinylidene fluoride resin), polychlorotrifluoroethylene (PCTFE; trifluoroethylene chloride resin), ethylene-chlorotrifluoroethylene copolymer (ECTFE; trifluoroethylene chloride-ethylene copolymer resin), polytetrafluoroethylene-perfluorodioxide Rukoporima (TFE / PDD), polyvinyl fluoride (PVF; a vinyl fluoride resin), or the like can be used.

  Subsequently, when the surface to which the solution forming the liquid repellent surface is attached is washed with ethanol, a layer 224 that forms an extremely thin liquid repellent surface can be formed (see FIG. 7B).

  Next, a laser such as ultraviolet rays is irradiated from the back side of the substrate. At this time, since the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205 block the laser light, the layer 224 that forms the liquid repellent surface thereabove is not irradiated. As a result, only the upper part of the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205 remains the liquid repellent surface, and the other regions become the lyophilic surface (see FIG. 7C). .) After that, a laser is irradiated onto the capacitor wiring layer 204 from the substrate surface, and this region becomes the lyophilic surface. Here, an example in which only a necessary place is used later as a lyophilic surface is shown, but a lyophobic surface may be selectively formed using a resist.

  Next, a composition containing a conductive material is selectively discharged, so that source and drain wiring layers 225 to 229 are formed by a droplet discharge method (see FIG. 8A). At this time, since an extremely thin film 260 having a liquid repellent effect exists above the gate electrode layer 203 and the gate electrode layer 205, the interval 230 between the source and drain wirings can be finely controlled in a self-aligning manner.

  Further, the very thin film 260 having a liquid repellent effect may or may not be removed thereafter. In the case of this embodiment mode, when the n-type semiconductor layer 219 which is the following process is etched, the extremely thin film 260 having a liquid repellent effect is removed.

  8 (A) to 8 (C) schematically show longitudinal sectional structures corresponding to AB, CD and EF among the planar structures shown in FIG. 14 or FIG. . As shown in FIG. 14, a signal wiring layer 250 extending from one end of the substrate 100 is formed simultaneously with the source and drain wiring layers 225 and 226 so that the source and drain wiring layers 225 and the signal wiring layer 250 are electrically connected. Arrange. In addition, the source / drain wiring layer 226 and the gate electrode layer 205 are electrically connected to each other through the through hole 223 formed in the gate insulating layer 211. As a conductive material for forming the wiring layer, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. be able to. Further, light-transmitting indium tin oxide (ITO), ITSO made of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  Next, using the source and drain wiring layers 225 to 229 as a mask, the n-type semiconductor layer 219 over the insulator layer 218 is etched to form n-type semiconductor layers 231 and 232 for forming source and drain regions. (See FIG. 8B.)

  A composition containing a conductive material is selectively discharged so as to be electrically connected to the source and drain wiring layers 229, so that a first electrode 233 corresponding to a pixel electrode is formed (see FIG. 8C). . 8C schematically shows the longitudinal cross-sectional structures of AB, CD, and EF shown in the planar structure of FIG. 15, so refer to FIG. 15 at the same time. Can do. Through the above steps, the switching TFT 234, the driving TFT 235, and the capacitor portion 236 are formed.

The first electrode 233 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide, or zinc oxide (ZnO) when a downward emission type EL display panel is manufactured using a droplet discharge method. A predetermined pattern may be formed by a composition containing tin oxide (SnO ₂ ) and the like, and may be formed by firing.

  Further, it is preferably formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide, zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide is used by a sputtering method using a target containing 2 to 10% by weight of silicon oxide in ITO. In addition, an oxide conductive material in which silicon oxide is included and indium oxide is mixed with 2 to 20% by weight of zinc oxide (ZnO) may be used. After the first electrode 233 is formed by a sputtering method, a mask layer is formed by a droplet discharge method, and the first electrode 233 connected to the source and drain wiring layers 229 is formed by etching using the mask layer. Just do it.

  As a preferable structure of this embodiment mode, the first electrode 233 formed of indium tin oxide containing silicon oxide is formed in close contact with the insulator layer 214 made of silicon nitride contained in the gate insulating layer 211, thereby An effect that the ratio of light emitted from the EL layer to the outside can be increased can be exhibited.

  Further, when a light emitting light is emitted to the side opposite to the substrate 100 side, that is, when a top emission type EL display panel is manufactured, Ag (silver), Au (gold), Cu (copper), A composition containing metal particles such as W (tungsten) or Al (aluminum) as a main component can be used as the material of the first electrode 233. As another method, a transparent conductive film or a light reflective conductive film may be formed by a sputtering method, a mask pattern may be formed by a droplet discharge method, and an etching process may be combined to form the first electrode.

  Further, a protective layer 247 of silicon nitride or silicon nitride oxide and an insulator layer 248 are formed on the entire surface. Next, after forming an insulating layer over the entire surface of the insulator layer 248 by spin coating or dipping, openings are formed as shown in FIG. 8C by etching. This etching is performed so as to expose the first electrode 233 and the gate wiring layer 202 by simultaneously performing the protective layer 247 and the gate insulating layer 211 below the insulator layer 248. Further, if the insulating layer 248 is formed by a droplet discharge method, etching is not necessarily required. Further, if the hole portion is a liquid repellent surface, the hole can be formed in a self-aligning manner.

  The insulator layer 248 is formed with an opening that matches the position of the first electrode 233. This insulator layer 248 includes silicon oxide, silicon nitride, silicon oxide containing nitrogen, aluminum oxide, aluminum nitride, aluminum oxide containing nitrogen, and other inorganic insulating materials, or acrylic acid, methacrylic acid and derivatives thereof, or polyimide Including a heat-resistant polymer such as (polyimide), aromatic polyamide, polybenzimidazole (polybenzimidazole), or a compound composed of silicon, oxygen and hydrogen formed from a siloxane-based material as a starting material, it contains a Si—O—Si bond. An inorganic siloxane or an organic siloxane insulating material in which hydrogen on silicon is substituted with an organic group such as methyl or phenyl can be used. When a photosensitive or non-photosensitive material such as acrylic or polyimide is used, the side surface has a shape in which the curvature radius changes continuously, and the upper thin film is formed without being cut off.

  Through the above steps, a TFT substrate 200 for an EL display panel in which a bottom gate type (also referred to as an inverted stagger type) TFT and a first electrode layer are connected to the substrate 100 is completed.

  Before the EL layer 237 is formed, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulator layer 248 or on the surface thereof. Further, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the EL layer 237 by a vacuum evaporation method or a droplet discharge method under reduced pressure without being exposed to the air as it is.

  Further, the surface of the first electrode 233 may be subjected to surface treatment by exposing it to oxygen plasma or irradiating ultraviolet light. The second electrode 238 is formed over the EL layer 237, whereby the light emitting element 239 is formed. The light emitting element 239 has a structure connected to the driving TFT 235.

  Subsequently, a sealing material 240 is formed and sealed using a sealing substrate 241. Thereafter, the flexible wiring substrate 251 may be connected to the gate wiring layer 202. The same applies to the signal wiring layer 250 (see FIG. 9).

  Through the above process, a light-emitting device having a channel protective thin film transistor with a bottom gate can be manufactured.

(Second Embodiment)
As a second embodiment, a method for manufacturing a channel etch type TFT will be described with reference to FIGS.

  A composition containing a conductive material is discharged over the substrate 100 by a droplet discharge method, so that the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205 are formed. Next, a photosensitive resin is discharged or applied and irradiated with a laser beam to form a resist mask. Using the mask, the gate electrode layer 203 and the gate electrode layer 205 are etched and finely processed, and then the resist mask is removed. Next, the gate insulating layer 211 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method. As a particularly preferable embodiment, a three-layered structure including an insulator layer made of silicon nitride, an insulator layer made of silicon oxide, and an insulator layer made of silicon nitride is used as the gate insulating layer 212. Further, a semiconductor layer 215 functioning as an active layer is formed. The above steps are the same as those in the first embodiment.

  An n-type semiconductor layer 219 is formed over the semiconductor layer 215 (see FIG. 10A). Next, a mask layer 302 is formed by selectively discharging a composition over the n-type semiconductor layer 219. Subsequently, by using the mask layer 302, the semiconductor layer 215 and the n-type semiconductor layer 219 are simultaneously etched to be separated into island shapes. In this case, a TFT can be miniaturized by using a photosensitive resin as a material of the mask layer 302 and finely forming the mask layer 302 by exposure with laser light.

  Subsequently, the mask layer 302 is removed.

  Subsequently, a solution for forming a liquid repellent surface is discharged or applied, and ethanol cleaning is performed. Next, in order to use the gate wiring layer 202, the gate electrode layer 203, the capacitor wiring layer 204, and the gate electrode layer 205 as a mask, exposure is performed from the back surface of the substrate, and a laser on the liquid-repellent surface of the n-type semiconductor layer 219 is obtained. The irradiated part is defined as the lyophilic surface.

  Next, a composition containing a conductive material is selectively discharged, so that source and drain wiring layers 225, 226, 228, and 229 are formed by a droplet discharge method (see FIG. 10B). At this time, since the fine liquid-repellent surface exists in the n-type semiconductor layer 219 above the gate electrode layer 203 and the gate electrode layer 205, the interval 230 between the source and drain wirings is finely controlled in a self-aligning manner. it can. Next, the n-type semiconductor layers 219 and 232 are formed by etching the n-type semiconductor layer 219 using the source and drain wiring layers 225, 226, 228, and 229 as masks. Since the etching is relatively difficult to selectively process the n-type semiconductor layer 219 and the semiconductor layer 215, a part 303 of the semiconductor layer 215 forming the channel is also etched. Also, before this etching process, as in the first embodiment, the through hole 223 is formed in a part of the gate insulating layer 211 by the etching process, and the gate electrode layer 205 disposed on the lower layer side is formed. By performing a step of exposing a part of the gate electrode layer 205, a connection structure between the source / drain wiring layer 226 and the gate electrode layer 205 can be formed (see FIG. 10C).

  Subsequently, a composition containing a conductive material is discharged so as to be electrically connected to the source and drain wiring layers 229, so that the first electrode 233 is formed (see FIG. 10C).

  After that, as in the first embodiment, a protective layer 247, an insulator layer 248, an EL layer 237, and a second electrode 238 are formed, a sealing material 240 is further formed, and sealing is performed using a sealing substrate 241. Stop. Thereafter, the flexible wiring substrate 251 may be connected to the gate wiring layer 202.

  Through the above process, a light-emitting device having a channel-etched thin film transistor with a bottom gate can be manufactured.

  In the present invention, the difference in liquid repellency and lyophilicity can be expressed by the difference in wettability. This difference in wettability is a relative relationship between the two regions, and the wettability of the composition containing a conductive material between the formation region of the extremely thin film having a liquid repellent effect and the non-formation region around the film formation region It only has to have a difference. Also, having a difference in wettability means that the contact angle of the composition containing the conductive material is different, and the region having a large contact angle of the composition containing the conductive material is more wettable. A region having a low contact angle and a small contact angle is a region having high wettability. When the contact angle is large, the liquid composition having fluidity does not spread on the surface of the region and repels the composition, so that the surface is not wetted. However, when the contact angle is small, the composition has fluidity on the surface. Because it spreads out and wets the surface well. Therefore, regions having different wettability also have different surface energies. The surface energy of the surface in the region with low wettability is small, and the surface energy at the surface of the region with high wettability is large. In the present invention, the difference in contact angle between the regions having different wettability is 30 degrees or more, preferably 40 degrees or more.

(Third embodiment)
As a third embodiment, a method for manufacturing a channel protection type TFT will be described.

  FIG. 47A shows a step of forming a gate electrode layer and a gate wiring layer connected to the gate electrode layer over a substrate 3100 by a droplet discharge method. Note that FIG. 47A schematically shows a longitudinal sectional structure, and a planar structure corresponding to AB and CD is shown in FIG.

    The substrate 3100 has heat resistance capable of withstanding the processing temperature of this manufacturing process in addition to a non-alkali glass substrate manufactured by a fusion method or a float method, such as barium borosilicate glass, aluminoborosilicate glass, or aluminosilicate glass, or a ceramic substrate. A plastic substrate or the like can be used. Alternatively, a substrate in which an insulating layer is provided on the surface of a semiconductor substrate such as single crystal silicon or a metal substrate such as stainless steel may be used. Further, as the substrate 3100, a large area substrate such as 320 mm × 400 mm, 370 mm × 470 mm, 550 mm × 650 mm, 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm can be used.

  A metal material such as Ti (titanium), W (tungsten), Cr (chromium), Ta (tantalum), Ni (nickel), or Mo (molybdenum) is formed on the substrate 3100 by a method such as sputtering or vapor deposition. It is preferable to form the base layer 3201 formed using the oxide. The base layer 3201 may be formed with a thickness of 0.01 to 10 μm. However, since the base layer 3201 may be formed extremely thin, it does not necessarily have a layer structure. Note that the base layer 3201 is provided to form the gate electrode layer with good adhesion. If sufficient adhesion can be obtained, the base layer 3201 is omitted and the gate electrode layer is dropped on the substrate 3100. You may form directly by the discharge method. In addition, atmospheric pressure plasma treatment or the like may be performed. In addition to the formation of the gate electrode layer, a conductive layer formed by a droplet discharge method on a layer such as an organic layer, an inorganic layer, or a metal layer, or a conductive layer formed by a droplet discharge method When an organic layer, an inorganic layer, a metal layer, or the like is formed on the top, the same treatment may be performed to improve the adhesion with the lower layer.

  A composition containing a conductive material is discharged over the base layer 3201 by a droplet discharge method, so that the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 are formed. As the conductive material for forming these layers, Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, A metal or alloy such as Ba, silver halide fine particles, or the like, or dispersible nanoparticles can be used. Alternatively, ITO (indium tin oxide alloy) used as a transparent conductive film, ITO having silicon oxide as a composition, organic indium, organic tin, zinc oxide (ZnO), titanium nitride, or the like can be used as appropriate. In particular, it is not preferable to reduce the resistance of the gate wiring layer, and it is preferable to use a material in which any one of gold, silver, and copper is dissolved or dispersed in consideration of the specific resistance value. More preferably, low resistance silver or copper may be used. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As a barrier film in the case of using copper as a wiring, an insulating or conductive substance containing nitrogen such as silicon nitride, silicon oxynitride, aluminum nitride, titanium nitride, or tantalum nitride is preferably used. It may be formed. As the solvent, esters such as butyl acetate, alcohols such as isopropyl alcohol, organic solvents such as acetone, and the like can be used. The surface tension and the viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

  The viscosity of the composition used for the droplet discharge method is preferably 5 to 20 mPa · s, which is to prevent the drying from occurring and to smoothly discharge the composition from the discharge port. . The surface tension is preferably 40 N / m or less. Note that the viscosity of the composition may be appropriately adjusted according to the solvent to be used and the application. For example, the viscosity of a composition in which ITO, ITO having silicon oxide as a composition, organic indium, and organic tin are dissolved or dispersed in a solvent is 5 to 20 mPa · s, and the viscosity of the composition in which silver is dissolved or dispersed in a solvent. Is 5 to 20 mPa · s, and the viscosity of a composition in which gold is dissolved or dispersed in a solvent is 10 to 20 mPa · s.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.5 to 10 μm. However, when formed by the gas evaporation method, the nanoparticles protected with the dispersant are as fine as about 7 nm. When the nanoparticles are covered with a coating agent, the nanoparticles are aggregated in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  The step of discharging the composition may be performed under reduced pressure. This is because the solvent of the composition volatilizes before the composition is discharged and landed on the object to be processed, and the subsequent drying and firing steps can be omitted or shortened. After the solution is discharged, one or both of drying and baking steps are performed by laser light irradiation, instantaneous lamp heating, a heating furnace, or the like under normal pressure or reduced pressure depending on the material of the solution. The drying and firing steps are both heat treatment steps. For example, the drying is performed at 100 degrees for 3 minutes, and the firing is performed at 200 to 350 degrees for 15 minutes to 120 minutes. Time is different. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is 100 to 800 degrees (preferably 200 to 350 degrees). And Through this heating step, the solvent in the solution is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion. The atmosphere is oxygen, nitrogen or air. However, it is preferable to perform in an oxygen atmosphere in which the solvent in which the metal element is decomposed or dispersed is easily removed.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. Examples of the former gas laser include an excimer laser and a YAG laser. Examples of the latter solid-state laser include a laser using a crystal such as YAG, YVO ₄ , and GdVO ₄ doped with Cr, Nd, and the like. It is done. Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate, the heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds. Instant lamp heating (RTA) uses an infrared lamp or a halogen lamp that emits ultraviolet light or infrared light in an inert gas atmosphere to rapidly increase the temperature, from several microseconds to several minutes. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, there is an advantage that only the outermost thin film can be heated substantially without affecting the lower layer film.

  In this embodiment mode, the gate wiring layer and the capacitor wiring layer are formed by a droplet discharge method, but a plasma CVD method or a sputtering method may be used.

  Next, as illustrated in FIG. 47B, a photosensitive resin 3205 is discharged or applied over the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204. In the case of coating, a spin coater or a slit coater may be used. As the photosensitive resin, a negative photosensitive resin or a positive photosensitive resin that is sensitive from ultraviolet light to infrared light is used. In the present embodiment, a negative photosensitive resin is used.

  Next, the photosensitive resin 3205 is irradiated with a laser beam 3207 using a laser beam direct writing apparatus 3206, and a pattern is drawn while moving the substrate or the laser (FIG. 47C).

    As a result, a predetermined position is irradiated with a laser beam, the photosensitive resin is exposed, and then development is performed, so that a resist mask 3208 is applied to the region irradiated with the laser beam as shown in FIG. Is formed. Here, since the negative type is used as the photosensitive resin, the region irradiated with the laser beam becomes the resist mask. A part of the energy of the laser beam is converted into heat by the resist and reacts a part of the resist, so that the width of the resist mask is slightly larger than the width of the laser beam. In addition, the shorter the laser beam, the shorter the beam diameter can be focused. Therefore, it is preferable to irradiate the laser beam with a short wavelength in order to form a resist mask with a fine width.

  Further, the spot shape of the laser beam on the surface of the photosensitive resin 3205 is processed by an optical system so as to be a dot shape, a circle shape, an ellipse shape, a rectangle shape, or a line shape (strictly, an elongated rectangle shape). Note that the spot shape may be circular, but a linear resist mask having a uniform width can be formed.

  Next, using the resist mask 3208 as a mask, the gate electrode layer 3203 is etched by a known method such as dry etching or wet etching (FIG. 48B). Subsequently, the resist mask is removed. As a result, a narrow gate electrode layer 3203 can be formed as shown in FIG.

  Next, as a treatment of the base layer 3201 exposed on the surface, it is desirable to perform one of the following two steps.

  As a first method, an insulating layer 3209 is formed by insulating a base layer 3201 that does not overlap with the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 (see FIG. 48C). ). That is, the base layer 3201 that does not overlap with the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 is oxidized and insulated. As described above, in the case where the base layer 3201 is oxidized and insulated, the base layer 3201 is preferably formed with a thickness of 0.01 to 10 μm, and can be easily oxidized. . As a method of oxidizing, a method of exposing to an oxygen atmosphere or a method of performing heat treatment may be used.

  As a second method, the base layer 3201 is etched and removed using the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 as a mask. When this step is used, there is no restriction on the thickness of the base layer 3201.

  Next, the gate insulating layer 3210 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method (see FIG. 49A). As a particularly preferable mode, a three-layer structure including an insulator layer 3211 made of silicon nitride, an insulator layer 3212 made of silicon oxide, and an insulator layer 3213 made of silicon nitride is formed as the gate insulating layer 3210. Note that in order to form a dense insulating layer with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably included in the reaction gas and mixed into the formed insulating layer. By forming the insulator layer 3211 in contact with the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 with silicon nitride or silicon nitride containing oxygen, deterioration due to oxidation can be prevented. Further, by using NiB (nickel boron) for the insulating layer 3211 in contact with the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204, the surface can be smoothed.

  Next, the semiconductor layer 3214 is formed. The semiconductor layer 3214 is formed by AS or SAS manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane. As the vapor phase growth method, a plasma CVD method or a thermal CVD method can be used.

When the plasma CVD method is used, AS is formed using SiH ₄ which is a semiconductor material gas or a mixed gas of SiH ₄ and H 2. SiH ₄ or is formed using a gas mixture was diluted 3-fold to 1000-fold with H _2, or Si ₂ and H ₆ and GeF gas flow ratio of ₄ Si ₂ H ₆ pairs GeF ₄ 20-40 1-0 When diluted with .9, a SAS having a Si composition ratio of 80% or more can be obtained. In particular, the latter is preferable because the semiconductor layer 3214 can have crystallinity from the interface with the base.

  An insulating layer 3215 is formed over the semiconductor layer 3214 by a plasma CVD method or a sputtering method. As shown in a later step, the insulator layer 3215 is left on the semiconductor layer 3214 on the gate electrode layer to form a channel protective layer. In order to prevent the semiconductor layer 3214 from being contaminated with impurities such as metal and water vapor, it is preferably formed using a dense film. In the glow discharge decomposition method, a silicon nitride film formed using a gas obtained by diluting a silicide gas 100 to 500 times with argon or the like is preferable because it is a dense film even at a film forming temperature of 100 ° C. or less. If necessary, an insulating film may be stacked.

  In the above steps, the gate insulating layer 3210 to the insulator layer 3215 can be formed successively without being exposed to the air. In this case, since each stacked interface can be formed without being contaminated by atmospheric components or contaminating impurity elements floating in the atmosphere, variations in TFT characteristics can be reduced.

  Next, the composition is selectively discharged over the insulator layer 3215 and over the gate electrode layer 3203 to form a mask layer 3216 (see FIG. 49A). For the mask layer 3216, a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin is used. Also, organic materials such as benzocyclobutene, parylene, flare, translucent polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. And formed by a droplet discharge method. Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

  The insulator layer 3215 is etched using the mask layer 3216 to form an insulator layer 3217 that functions as a channel protective layer. The mask layer 3216 is removed, and an n-type semiconductor layer 3218 is formed over the semiconductor layer 3214 and the insulator layer 3217 (see FIG. 49B). The n-type semiconductor layer 3218 may be formed using silane gas and phosphine gas, and may be formed using AS or SAS.

  Next, a mask layer 3219 is formed over the n-type semiconductor layer 3218 by a droplet discharge method. By using the mask layer 3219, the n-type semiconductor layer 3218 and the semiconductor layer 3214 are etched to form the semiconductor layer 3220 and the n-type semiconductor layer 3221 (see FIG. 49C). In this case, the mask layer 3219 is finely formed by exposing a photosensitive resin with a laser beam, whereby the TFT can be miniaturized. Note that FIG. 49C schematically shows a longitudinal cross-sectional structure, and a planar structure corresponding to AB and CD is shown in FIG.

  Subsequently, the mask layer 3219 is removed.

  Subsequently, a solution for forming a liquid repellent surface is discharged or applied (see FIG. 50A). As a composition of the solution that forms the liquid repellent surface, a silane coupling agent represented by a chemical formula of Rn-Si-X (4-n) (n = 1, 2, 3) is used. Here, R is a substance containing a relatively inert group such as an alkyl group. X is a hydrolyzable group such as halogen, methoxy group, ethoxy group or acetoxy group, which can be bonded by condensation with a hydroxyl group on the substrate surface or adsorbed water.

Further, by using a fluorine-based silane coupling agent (fluoroalkylsilane (FAS)) having a fluoroalkyl group in R as the silane coupling agent, the liquid repellency can be further improved. R of FAS has a structure represented by (CF ₃ ) (CF ₂ ) x (CH ₂ ) y (x: an integer of 0 or more and 10 or less, y: an integer of 0 or more and 4 or less), and a plurality of R Alternatively, when X is bonded to Si, R and X may all be the same or different. Typical FAS includes heptadefluorotetrahydrodecyltriethoxysilane, heptadecafluorotetrahydrodecyltrichlorosilane, tridecafluorotetrahydrooctyltrichlorosilane, trifluoropropyltrimethoxysilane, and the like.

  As the solvent of the solution forming the liquid repellent surface, n-pentane, n-hexane, n-heptane, n-octane, n-decane, dicyclopentane, benzene, toluene, xylene, durene, indene, tetrahydronaphthalene, decahydro A hydrocarbon solvent such as naphthalene or squalane or tetrahydrofuran is used.

  Further, as a solution composition having a property of forming a liquid repellent surface, a material having a fluorocarbon chain (fluorine resin) can be used. Examples of fluorine resins include polytetrafluoroethylene (PTFE; tetrafluoroethylene resin), perfluoroalkoxyalkane (PFA; tetrafluoroethylene perfluoroalkyl vinyl ether copolymer resin), and perfluoroethylene propene copolymer (PFEP; four fluoropolymer). Ethylene-hexafluoropropylene copolymer resin), ethylene-tetrafluoroethylene copolymer (ETFE; tetrafluoroethylene-ethylene copolymer resin), polyvinylidene fluoride (PVDF; vinylidene fluoride resin), polychlorotrifluoroethylene (PCTFE; trifluoroethylene chloride resin), ethylene-chlorotrifluoroethylene copolymer (ECTFE; trifluoroethylene chloride-ethylene copolymer resin), polytetrafluoroethylene-perfluorodioxide Rukoporima (TFE / PDD), polyvinyl fluoride (PVF; a vinyl fluoride resin), or the like can be used.

  Subsequently, when the surface to which the solution forming the liquid repellent surface is attached is washed with ethanol, a layer 3222 that forms an extremely thin liquid repellent surface can be formed.

  Next, a laser such as ultraviolet rays is irradiated from the back side of the substrate. At this time, since the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 block laser light, the layer 3222 forming the liquid repellent surface thereabove is not irradiated. As a result, only the n-type semiconductor layer 3218 above the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 maintains a liquid-repellent surface, and the other regions are lyophilic surfaces (see FIG. 50B). .)

  Next, a composition containing a conductive material is selectively discharged, so that source and drain wiring layers 3225 and 3226 are formed by a droplet discharge method (see FIG. 50C). At this time, since a very thin film 3223 having a liquid repellent effect exists above the gate electrode layer 3203, the interval 3224 between the source and drain wirings can be finely controlled in a self-aligning manner.

  Thereafter, the extremely thin film 3223 having a liquid repellent effect may or may not be removed. In the case of this embodiment mode, the n-type semiconductor layer 3218 is removed in the following process.

  FIG. 51A schematically shows a longitudinal sectional structure, and FIG. 58 shows a planar structure corresponding to AB and CD. As shown in FIG. 58, a signal wiring layer 3250 extending from one end of the substrate 3100 is formed simultaneously with the source and drain wiring layers 3225 and 3226. This is disposed so as to be electrically connected to the source / drain wiring layer 3225. As a conductive material for forming the wiring layer, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. be able to. Further, light-transmitting indium tin oxide (ITO), organic indium composed of indium tin oxide and silicon oxide, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  Next, using the source and drain wiring layers 3225 and 3226 as a mask, the n-type semiconductor layer 3221 over the insulator layer 3217 is etched to form n-type semiconductor layers 3227 and 3228 for forming source and drain regions. (Refer to FIG. 51A.)

A pixel electrode layer 3229 is formed by selectively discharging a composition containing a conductive material so as to be electrically connected to the source and drain wiring layers 3226. (See FIG. 51B.) In the case of manufacturing a transmissive liquid crystal display panel, the pixel electrode layer 3229 is made of indium tin oxide (ITO), indium tin oxide containing silicon oxide, zinc oxide (ZnO), tin oxide (SnO ₂ ), or the like. A predetermined pattern may be formed by the composition containing the pixel electrode, and the pixel electrode may be formed by baking. Further, when a reflective liquid crystal display panel is manufactured, metal particles such as Ag (silver), Au (gold), Cu (copper)), W (tungsten), and Al (aluminum) are mainly used. Compositions can be used. As another method, a pixel electrode layer may be formed by forming a transparent conductive film or a light reflective conductive film by a sputtering method, forming a mask pattern by a droplet discharge method, and combining etching processes. Note that FIG. 51B schematically shows a longitudinal sectional structure, and a planar structure corresponding to AB and CD is shown in FIG.

  Through the above steps, a TFT substrate 3200 for a liquid crystal display panel in which a bottom gate type (also referred to as an inverted stagger type) TFT and a pixel electrode are connected to the substrate 3100 is completed.

  Next, an insulating layer 3230 called an alignment film is formed by a printing method or a spin coating method so as to cover the pixel electrode layer 3229. Note that the insulator layer 3230 can be selectively formed as shown in the drawing by using a screen printing method or an offset printing method. Then, rubbing is performed. Subsequently, a sealant 3231 is formed in a peripheral region where pixels are formed by a droplet discharge method (see FIG. 51C).

  After that, a counter substrate 3234 provided with an insulator layer 3232 functioning as an alignment film and a conductor layer 3233 functioning as a counter electrode is bonded to the TFT substrate 3200 through a spacer, and a liquid crystal layer 3350 is provided in the gap. Thus, a liquid crystal display panel can be manufactured (see FIG. 52A). The sealant 3231 may be mixed with a filler, and the counter substrate 3234 may be formed with a color filter, a shielding film (black matrix), or the like. Note that as a method for forming the liquid crystal layer 3350, a dispenser type (dropping type) or a dip type (pumping type) in which liquid crystal is injected using a capillary phenomenon after the counter substrate 3234 is bonded can be used.

  In the liquid crystal dropping injection method adopting a dispenser method, a closed loop is formed with a sealant 3231, and liquid crystal is dropped therein once or a plurality of times. Subsequently, the substrates are bonded together in a vacuum, and thereafter UV curing is performed to fill the liquid crystal.

Next, the insulator layers 3211 to 213 shown in the region 3235 are removed by an ashing process using oxygen gas under atmospheric pressure or in the vicinity of atmospheric pressure (see FIG. 52B). This treatment is performed using oxygen gas and one or more selected from hydrogen, CF ₄ , NF ₃ , H ₂ O, and CHF ₃ . In this step, in order to prevent damage and destruction due to static electricity, ashing is performed after sealing using the counter substrate. However, if there is little influence from static electricity, it may be performed at any timing. .

  Subsequently, a connection terminal 3236 for connection is provided so that the gate wiring layer 3202 is electrically connected through the anisotropic conductor layer. The connection terminal 3236 plays a role of transmitting an external signal or potential. Through the above steps, a liquid crystal display panel including a channel protection type switching TFT 3237 and a capacitor element 3238 is completed. The capacitor 3238 is formed of a capacitor wiring layer 3204, a gate insulating layer 3210, and a pixel electrode layer 3229.

  Through the above steps, a liquid crystal display device having a channel protective thin film transistor with a bottom gate can be manufactured.

(Fourth embodiment)
In the third embodiment, the configuration in which the pixel electrode layer 3229 and the source / drain wiring layer 3226 directly form a contact is shown. However, as another mode, an example in which an insulating layer is interposed between the two is shown. .

  After performing the steps up to FIG. 51A in the same manner as in the third embodiment, an insulator layer 3239 that functions as a protective film is formed (see FIG. 53A). As this protective film, a silicon nitride or silicon oxide film formed by sputtering or plasma CVD may be used. By forming the opening 3240 in the insulator layer 3239, the source / drain wiring layer 3226 and the pixel electrode layer 3229 are electrically connected to each other through the opening 3240 (see FIG. 53B). Note that when the opening 3240 is formed, an opening 3241 necessary for attaching the connection terminal later may be formed at the same time.

  A method for forming the openings 3240 and 3241 is not particularly limited. For example, it is possible to selectively open holes by plasma etching at atmospheric pressure, or after forming a mask by a droplet discharge method, wet etching treatment is performed. You can go. In addition, when an inorganic siloxane or organic siloxane film is formed by a droplet discharge method to form the insulator layer 3239, the step of forming an opening can be omitted. Further, if the hole portion is a liquid repellent surface, the hole can be formed in a self-aligning manner.

  The subsequent steps are the same as those of the third embodiment, whereby the liquid crystal display panel shown in FIG. 53 including the bottom gate channel protection type switching TFT 3237 and the capacitance blocking 3238 is completed.

(Fifth embodiment)
As a fifth embodiment, a manufacturing method of a channel etch type TFT will be described with reference to FIGS. 54 (A) to (C) and FIG.

  A composition containing a conductive material is discharged over the substrate 3100 by a droplet discharge method, so that the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 are formed. Next, a photosensitive resin is discharged or applied, exposed by irradiating a laser beam, and then developed to form a resist mask. Using the resist mask, the gate electrode layer 3203 is etched and finely processed, and then the resist mask is removed. Next, the gate insulating layer 3210 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method. As a particularly preferable embodiment, a three-layer structure of an insulator layer 3211 made of silicon nitride, an insulator layer 3212 made of silicon oxide, and an insulator layer 3213 made of silicon nitride corresponds to the gate insulating layer. Further, a semiconductor layer 3214 functioning as an active layer is formed. The above steps are the same as those in the first embodiment.

  An n-type semiconductor layer 3218 is formed over the semiconductor layer 3214 (see FIG. 54A). Next, a mask layer 3302 is formed over the n-type semiconductor layer 3218 by selectively discharging a composition. Subsequently, the semiconductor layer 3214 and the n-type semiconductor layer 3218 are simultaneously etched using the mask layer 3302 to be separated into island shapes. In this case, the mask layer 3302 can be finely formed by exposing the photosensitive resin with laser light to be fine. Thereafter, the mask layer 3302 is removed.

  Subsequently, a solution for forming a liquid repellent surface is discharged or applied, and ethanol cleaning is performed. Next, in order to use the gate wiring layer 3202, the gate electrode layer 3203, and the capacitor wiring layer 3204 as a mask, light is irradiated from the back surface of the substrate, so that part of the liquid-repellent surface and the lyophilic surface are obtained.

  Next, a composition containing a conductive material is selectively discharged, so that source and drain wiring layers 3225 and 3226 are formed by a droplet discharge method (see FIG. 54B). At this time, since an extremely thin film having a liquid repellent effect exists above the gate electrode layer 3203, the interval 3224 between the source and drain wirings can be finely controlled in a self-aligning manner. Next, using this wiring layer as a mask, the n-type semiconductor layer 3218 is etched to form n-type semiconductor layers 3227 and 3228. Since etching is relatively difficult to selectively process the n-type semiconductor layer 3221 and the semiconductor layer 3220, a part 3303 of the semiconductor layer 3220 which forms a channel is also etched. Next, a pixel electrode layer 3229 is formed by discharging a composition containing a conductive material so as to be electrically connected to the source and drain wiring layers 3226 (see FIG. 54C).

  Next, an insulator layer 3230 that functions as an alignment film is formed. Subsequently, a sealant 3231 is formed, and a counter substrate 3234 on which a substrate 3100, a conductor layer 3233 functioning as a counter electrode, and an insulator layer 3232 functioning as an alignment film are formed is attached using the sealant 3231. Match. After that, a liquid crystal layer 3350 is formed between the substrate 3100 and the counter substrate 3234. Next, a region where the connection terminal is pasted is exposed by etching under atmospheric pressure or near atmospheric pressure, and a flexible wiring substrate 3236 is pasted on the connection terminal, whereby a liquid crystal display panel having a display function can be manufactured. (See FIG. 55).

(Sixth embodiment)
As a sixth embodiment, an EL display panel manufactured by the first embodiment, the second embodiment, the third embodiment, the fourth embodiment, and the fifth embodiment, and In the liquid crystal display panel, the case where the semiconductor layer is formed of SAS and the driving circuit on the scanning line side is formed over the substrate 100 as described with reference to FIG.

FIG. 24 shows a block diagram of a scanning line side driving circuit constituted by an n-channel TFT using SAS that can obtain a field effect mobility of 1 to 15 cm ² / V · sec.

  The block shown in FIG. 24 corresponds to a pulse output circuit 800 that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. A pixel 802 (corresponding to the pixel 102 in FIG. 3) is connected to the end of the buffer circuit 801.

  FIG. 25 shows a specific configuration of the pulse output circuit 800, and the circuit is composed of n-channel TFTs 601 to 613. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

  A specific configuration of the buffer circuit 801 is shown in FIG. Similarly, the buffer circuit is composed of n-channel TFTs 620 to 635. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 to 1800 μm.

  When the display panel is an EL display panel, it is necessary to connect the TFTs with wirings in order to realize such a circuit. FIG. 16 shows a configuration example of wirings in that case. In FIG. 16, as in the first embodiment, a gate electrode layer 203, a gate insulating layer 211 (an insulating layer 212 made of silicon nitride, an insulating layer 213 made of silicon oxide, and an insulating layer 214 made of silicon nitride). 3), a semiconductor layer 215 formed of SAS, n-type semiconductor layers 231 and 232 forming source and drain, and source and drain wiring layers 225 and 226 are formed. In this case, connection wiring layers 270, 271, and 272 are formed on the substrate 100 in the same process as the gate electrode layer 203. Then, a part of the gate insulating layer is etched so that the connection wiring layers 270, 271, and 272 are exposed, and the TFT is appropriately formed by the source and drain wiring layers 225 and 226 and the connection wiring layer 273 formed in the same process. Various circuits can be realized by connection.

  Further, in order to realize such a circuit in the liquid crystal display panel, it is necessary to connect the TFTs with each other by wiring, and FIG. In FIG. 11, as in the third embodiment, a gate electrode layer 3203, a gate insulating layer 3210 (an insulating layer 3211 made of silicon nitride, an insulating layer 3212 made of silicon oxide, and an insulating layer 3213 made of silicon nitride). 3 shows a state in which a semiconductor layer 3214 formed of SAS, n-type semiconductor layers 3227 and 3228 forming source and drain, and source and drain wiring layers 3225 and 3226 are formed. In this case, connection wiring layers 3270, 3271, and 3272 are formed over the substrate 3100 in the same process as the gate electrode layer 3203. Then, a part of the gate insulating layer is etched so that the connection wiring layers 3270, 3271, and 3272 are exposed, and a TFT is appropriately formed by the source and drain wiring layers 3225 and 3226 and the connection wiring layer 3273 formed in the same process. Various circuits can be realized by connection.

(Seventh embodiment)
As a seventh embodiment, a top-gate TFT will be described with reference to FIGS. 28 and 34A to 36B.

  A base layer 201 is formed on the substrate 100 by a method such as sputtering or vapor deposition. A solution for forming a liquid repellent surface is discharged or applied over the base layer 201 (see FIG. 34A). Subsequently, when the surface to which the solution forming the liquid repellent surface is attached is washed with ethanol, an extremely thin film 120 having a liquid repellent effect can be formed.

  Next, the laser beam 208 is irradiated using the laser beam direct writing device 207, and the substrate or the laser is moved to make a part of the liquid-repellent surface 121 and the lyophilic surface (see FIG. 34B). . In contrast to the present embodiment, a method may be used in which the irradiated region becomes a liquid repellent surface by partial irradiation with laser light after forming the lyophilic surface.

  Next, a composition containing a conductive material is selectively discharged so as to sandwich the liquid repellent surface 121, and source and drain wiring layers 122 to 125 are formed by a droplet discharge method (FIG. 35A). reference.). At this time, since the liquid repellent surface 121 exists, the distance 230 between the source and drain wirings can be finely controlled in a self-aligning manner. Subsequently, the base layer 201 is insulated. At this time, the extremely thin film 120 having a liquid repellent effect may or may not be removed. Further, the extremely thin film 120 having a liquid repellent effect can be removed simultaneously with the insulation of the underlayer.

  Next, regions 126 to 129 in which phosphorus is selectively doped only on the surfaces of the source and drain wiring layers 122 to 125 are formed by a plasma doping method (see FIG. 35B).

Note that the region doped with phosphorus reacts with part of a semiconductor layer to be formed later, so that n-type semiconductor layers 126a to 129a are formed as shown in FIG.

  The plasma doping method is a method in which only the source and drain wiring layer surfaces are selectively doped by RF glow discharge while flowing phosphine gas using an apparatus such as P-CVD.

Next, AS or SAS is formed by a vapor deposition method such as a plasma CVD method or a sputtering method. When the plasma CVD method is used, AS is formed using SiH ₄ which is a semiconductor material gas or a mixed gas of SiH ₄ and H ₂ . The SAS is formed of a mixed gas by diluting SiH ₄ with H ₂ 3 to 1000 times. In the case of forming a SAS with this gas type, the surface side of the semiconductor layer has better crystallinity and is suitable for combination with a top gate type TFT in which a gate electrode is formed in an upper layer of the semiconductor layer.

  The semiconductor layer 130 is formed at a position corresponding to the source and drain wiring layers 122 to 125 using a mask layer formed by a droplet discharge method. That is, the semiconductor layer 130 is formed so as to straddle the source and drain wiring layers 122 and 123 (or 124 and 125) (see FIG. 36A).

  Next, as illustrated in FIG. 28, the gate insulating layer 211 is formed by a plasma CVD method or a sputtering method. As a particularly preferable mode, a three-layered structure including an insulator layer made of silicon nitride, an insulator layer made of silicon oxide, and an insulator layer 214 made of silicon nitride is formed as the gate insulating layer 211. Next, a through-hole 223 is formed in the gate insulating layer 211 to expose part of the source and drain wiring layers 122 and 125, and then a gate electrode layer 279 is formed by a droplet discharge method (see FIG. 28). . As a conductive material for forming the gate electrode layer 279, a composition containing metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) as a main component is used. Can be used.

  A composition containing a conductive material is selectively discharged so as to be electrically connected to the source and drain wiring layers 125 through the n-type semiconductor layer, so that the first electrode 233 corresponding to the pixel electrode is formed. . Through the above steps, a TFT substrate on which the switching TFT 291, the driving TFT 292, and the capacitor portion 293 are formed can be obtained (see FIG. 28).

  Further, as shown in FIG. 36B, if the first electrode 233 corresponding to the pixel electrode is formed before the gate insulating layer 211 is formed, it is not necessary to expose the source and drain wiring layer 125.

The first electrode 233 is formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide, zinc oxide (ZnO), when a transmissive EL display panel is manufactured using a droplet discharge method. A predetermined pattern may be formed with a composition containing tin oxide (SnO ₂ ) and the like, and may be formed by firing.

  Further, it is preferably formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide, zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide may be used by a sputtering method using a target containing 2 to 10% by weight of silicon oxide in ITO.

  As a preferable structure of this embodiment mode, the first electrode 233 formed of indium tin oxide containing silicon oxide is formed in close contact with the insulator layer 214 made of silicon nitride contained in the gate insulating layer 211, thereby The effect that the rate at which the light emitted from the EL layer is emitted to the outside can be increased can be exhibited.

  Further, an insulator layer 248 is formed on the entire surface. After an insulating layer is formed on the entire surface by spin coating or dipping, openings are formed by etching as shown in FIG. This etching is performed so that the first electrode 233 and the connection wiring layer 271 at the end of the substrate are exposed by simultaneously performing the gate insulating layer 211 at the end of the substrate under the insulator layer 248. Further, if the insulator layer 248 is selectively formed by a droplet discharge method, etching is not necessarily required. Further, if a liquid repellent surface is formed in the aperture region, the aperture can be formed in a self-aligning manner.

  The insulator layer 248 is formed with an opening of a through hole in accordance with the position where the light emitting region on the first electrode 233 is formed. This insulator layer 248 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, amonium oxynitride and other inorganic insulating materials, or acrylic acid, methacrylic acid and derivatives thereof, or polyimide (polyimide), Inorganic siloxanes containing Si—O—Si bonds among silicon, oxygen and hydrogen compounds formed from aromatic polyamides, heat-resistant polymers such as polybenzimidazole, or siloxane-based materials as starting materials The upper hydrogen can be formed of an organic siloxane-based insulating material substituted with an organic group such as methyl or phenyl. When a photosensitive or non-photosensitive material such as acrylic or polyimide is used, the side surface has a shape in which the curvature radius changes continuously, and the upper thin film is formed without being cut off.

  Through the above steps, a TFT substrate for an EL display panel in which a top gate type (also referred to as a forward stagger type) TFT and a first electrode 233 are connected to the substrate 100 is completed.

  Before the EL layer 237 is formed, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the insulator layer 248 or on the surface thereof. Further, it is preferable that heat treatment is performed at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and the EL layer 237 is formed by a vacuum evaporation method or a droplet discharge method under reduced pressure without being exposed to the air as it is.

  Further, the second electrode 238 is formed over the EL layer 277, whereby the light emitting element 239 is formed. The light emitting element 239 has a structure connected to the driving TFT 292.

  Subsequently, a sealing material 240 is formed and sealed using a sealing substrate 241. Thereafter, the flexible wiring board 251 may be connected to the connection wiring layer 271. The same applies to the signal wiring layer 250.

  Through the above process, a light-emitting device having a top-gate thin film transistor can be manufactured.

(Eighth embodiment)
As an eighth embodiment, a method for performing a liquid repellent process on a resist mask will be described with reference to FIGS. 28 and 37 to 40.

  As shown in FIG. 37A, a photosensitive resin 206 serving as a resist material is discharged or applied over the base film 201 over the substrate 100. In the case of coating, a spin coater or a slit coater may be used. As the photosensitive resin 206, a material negative photosensitive resin or positive photosensitive resin sensitive to ultraviolet light to infrared light is used. In the present embodiment, a negative photosensitive resin is used.

  Next, the photosensitive resin 206 is irradiated with a laser beam 208 using a laser beam direct writing device 207, and a pattern is drawn while moving the substrate or the laser.

  Subsequent development forms a resist mask 133 in the region irradiated with the laser beam, as shown in FIG. Here, since the negative type is used as the photosensitive resin, the region irradiated with the laser beam becomes the resist mask.

  Next, the resist mask 133 is subjected to a treatment such as fluorine plasma so that the resist mask 133 itself has a liquid repellent effect (see FIG. 38B).

  Next, a composition containing a conductive material is selectively discharged so that the resist mask 133 is interposed therebetween, so that source and drain wiring layers 135 to 138 are formed by a droplet discharge method (see FIG. 39A). ). At this time, the distance 230 between the source and drain wirings can be finely controlled in a self-aligning manner by the liquid repellent effect of the resist mask 133. Subsequently, the base layer 201 is insulated. At this time, the resist mask 133 may or may not be removed. Further, the extremely thin film 134 having a liquid repellent effect can be removed simultaneously with the insulation of the underlayer.

  In the subsequent steps, as in the seventh embodiment, regions 126 to 129 doped with phosphorus, n-type semiconductor layers 126a to 129a, a first electrode 233, a semiconductor layer 132, and a gate insulating layer 211 are formed. To do.

(Ninth embodiment)
As a ninth embodiment, a bottom-gate TFT will be described with reference to FIGS.

  As shown in FIG. 41A, the gate electrode layer 203 is formed over the substrate 100 by a plasma CVD method or a sputtering method. Alternatively, it may be selectively formed by a droplet discharge method.

  Next, the photosensitive resin 206 is discharged or applied. In the case of coating, a spin coater or a slit coater may be used. As the photosensitive resin, a negative photosensitive resin or a positive photosensitive resin that is sensitive from ultraviolet light to infrared light is used. In the present embodiment, a negative photosensitive resin is used.

  Next, as shown in FIG. 41B, the photosensitive resin 206 is irradiated with a laser beam 208 using a laser beam direct drawing apparatus 207, and a pattern is drawn while moving the substrate or the laser.

    Then, development is performed to form a resist mask 209 in the region irradiated with the laser beam as shown in FIG. Here, since the negative type is used as the photosensitive resin, the region irradiated with the laser beam becomes the resist mask.

  Next, using the resist mask 209 as a mask, the gate electrode layer 203 is etched by a known method such as dry etching or wet etching. Subsequently, the resist mask is removed. As a result, a fine gate electrode layer 203 can be formed as shown in FIG.

  Next, the gate insulating layer 211 is formed with a single layer or a stacked structure by a plasma CVD method or a sputtering method (see FIG. 43A). As a particularly preferable embodiment, a three-layered structure including an insulator layer made of silicon nitride, an insulator layer made of silicon oxide, and an insulator layer made of silicon nitride is formed as the gate insulating layer.

  Next, a solution for forming a liquid repellent surface is discharged or applied.

  Subsequently, when the surface to which the solution forming the liquid repellent surface is attached is washed with ethanol, an extremely thin film 224 having a liquid repellent effect can be formed.

  Next, laser light such as ultraviolet rays is irradiated from the back side of the substrate. At this time, since the gate electrode layer 203 shuts off the laser, the extremely thin film 224 having a liquid repellent effect thereabove is not irradiated with laser light. As a result, only the upper part of the gate electrode layer 203 remains as a liquid repellent surface, and the other region becomes a lyophilic surface (see FIG. 43B).

  Next, a composition containing a conductive material is selectively discharged, so that source and drain wiring layers 135 to 138 are formed by a droplet discharge method (see FIG. 44A). At this time, since a very thin film 224 having a fine liquid repellent effect exists above the gate electrode layer 203, the distance 230 between the source and drain wirings can be finely controlled in a self-aligning manner.

  Next, a region 139 in which phosphorus is selectively doped only on the surfaces of the source and drain wiring layers 135 to 138 is formed by a plasma doping method (see FIG. 44B).

Note that the region 139 doped with phosphorus reacts with part of a semiconductor layer to be formed later, so that an n-type semiconductor layer 139a as shown in FIG. 45 is formed.

  In addition, when the region 139 doped with phosphorus is formed, the extremely thin liquid repellent surface 224 can be removed depending on plasma doping conditions.

  Next, the semiconductor layer 215 is formed. The semiconductor layer 215 is formed by AS or SAS manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane. As the vapor phase growth method, a plasma CVD method or a thermal CVD method can be used.

  Next, as shown in FIG. 45B, a negative photosensitive resin 140 is ejected or applied, and a laser beam 208 is irradiated using a laser beam direct drawing apparatus 207 to perform exposure and development, and a resist mask 141 is formed. Form. At this time, if it is not necessary to form the resist mask finely, it may be formed by discharging with a droplet discharge device.

  Next, using the resist mask 141 as a mask, the semiconductor layer 215 is etched and patterned. Thereafter, a first electrode 233 corresponding to the pixel electrode is formed, and then a protective film 247 is formed.

  The subsequent steps are the same as those in the first embodiment or the third embodiment.

(Tenth embodiment)
The form of the light emitting element applicable in the first to ninth embodiments will be described with reference to FIGS.

  FIG. 19A shows an example in which the first electrode 11 is formed of a light-transmitting oxide conductive material, which is formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. An EL layer 16 in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second electrode 17 is formed of a first electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or MgAg and a second electrode layer 34 formed of a metal material such as aluminum. A pixel having this structure can emit light from the first electrode 11 side as indicated by an arrow in the drawing.

  FIG. 19B shows an example in which light is emitted from the second electrode 17, and the first electrode 11 is a metal such as aluminum or titanium, or a metal material containing nitrogen at a concentration equal to or lower than the stoichiometric composition ratio with the metal. And a fourth electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. An EL layer 16 in which a hole injection layer or hole transport layer 41, a light emitting layer 42, an electron transport layer or an electron injection layer 43 are stacked is provided thereon. The second electrode 17 is formed by a first electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF and a second electrode layer 34 formed of a metal material such as aluminum. By setting the thickness to 100 nm or less so that light can be transmitted, light can be emitted from the second electrode 17.

  FIG. 20A shows an example in which light is emitted from the first electrode 11, and the EL layer is stacked in the order of an electron transport layer or electron injection layer 43, a light emitting layer 42, a hole injection layer or a hole transport layer 41. Shows the configuration. The second electrode 17 is a fourth electrode layer 32 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic% from the EL layer 16 side, a metal such as aluminum or titanium, or a chemical with the metal The third electrode layer 35 is formed of a metal material containing nitrogen at a concentration equal to or lower than the stoichiometric composition ratio. The first electrode 11 is formed of a first electrode layer 33 containing an alkali metal or alkaline earth metal such as LiF or CaF, and a second electrode layer 34 formed of a metal material such as aluminum. By setting the thickness to 100 nm or less so that light can be transmitted, light can be emitted from the first electrode 11.

  FIG. 20B shows an example in which light is emitted from the second electrode 17, and the EL layer is stacked in the order of the electron transport layer or electron injection layer 43, the light emitting layer 42, the hole injection layer or hole transport layer 41. Shows the configuration. The first electrode 11 has a structure similar to that shown in FIG. 20A, and is formed to be thick enough to reflect light emitted from the EL layer. The second electrode 17 is made of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. In this structure, the hole injection layer or the hole transport layer 41 is formed of an inorganic metal oxide (typically molybdenum oxide or vanadium oxide), and thus introduced when the second electrode 17 is formed. As a result, the hole injection property is improved and the driving voltage can be lowered.

  By forming the first electrode with a light-transmitting oxide conductive material and keeping the second electrode in a state where light can be transmitted or with a light-transmitting oxide conductive material, the first electrode, Light can be emitted from either of the second electrodes.

  In addition, the EL layer is formed using a charge injecting and transporting substance containing an organic compound or an inorganic compound and a light emitting material. Is an organic compound having a chain length of 10 μm or less, and includes one or a plurality of layers selected from high-molecular organic compounds, and has an electron injection / transport property or a hole injection / transport property. You may combine with these inorganic compounds.

Among the charge injecting and transporting materials, materials having a particularly high electron transporting property include, for example, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (5-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), quinoline skeleton or benzoquinoline Examples thereof include metal complexes having a skeleton. As a substance having a high hole-transport property, for example, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD), 4,4′-bis [ N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: TDATA) ), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) (ie, benzene ring-nitrogen) And a compound having a bond of

Among the charge injecting and transporting materials, materials having particularly high electron injecting properties include alkali metals or alkaline earths such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF ₂ ) and the like. Metal compounds can be mentioned. In addition, a mixture of a substance having a high electron transport property such as Alq ₃ and an alkaline earth metal such as magnesium (Mg) may be used.

Among the charge injecting and transporting materials, examples of the material having a high hole injecting property include molybdenum oxide (MoOx), vanadium oxide (VOx), ruthenium oxide (RuOx), tungsten oxide (WOx), and manganese oxide. Examples thereof include metal oxides such as (MnOx). In addition, phthalocyanine compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPC) can be given.

  The EL layer may be configured to perform color display by forming EL layers having different emission wavelength bands for each pixel. Typically, an EL layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, by providing a filter (colored layer) that transmits light in the emission wavelength band on the light emission side of the pixel, the color purity is improved and the pixel portion is mirrored (reflected). Prevention can be achieved. By providing the filter (colored layer), it is possible to omit a circularly polarizing plate that has been conventionally required, and it is possible to eliminate the loss of light emitted from the EL layer. Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

There are various kinds of light emitting materials. Among the low molecular weight organic light emitting materials, 4-dicyanomethylene-2-methyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (abbreviation: DCJT), 4- Dicyanomethylene-2-t-butyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (abbreviation: DPA), perifuranthene, 2,5-dicyano-1, 4-bis (10-methoxy-1,1,7,7-tetramethyljulolidyl-9-enyl) benzene, N, N′-dimethylquinacridone (abbreviation: DMQd), coumarin 6, coumarin 545T, tris (8 - quinolinolato) aluminum (abbreviation: Alq _3), 9,9'-bianthryl, 9,10-diphenyl anthracene (abbreviation: DPA) and 9,10-bis (2-naphthyl) anthracene ( Abbreviations: DNA) and the like can be used. Other substances may also be used.

  The polymer organic light emitting material has higher physical strength than the low molecular weight material, and the durability of the light emitting element is high. In addition, since a film can be formed by coating, it is relatively easy to manufacture a light-emitting element. The structure of the light emitting element using the polymer organic light emitting material is basically the same as that when the low molecular organic light emitting material is used, and the anode, the organic EL layer, and the cathode are sequentially laminated from the substrate side. It becomes a structure. However, when forming an EL layer using a high molecular weight organic light emitting material, it is difficult to form a laminated structure as in the case of using a low molecular weight organic light emitting material, and in many cases, a two-layer structure is formed. . Specifically, the anode, the hole transport layer, the EL layer, and the cathode are stacked in this order from the substrate side.

  Since the emission color is determined by the material for forming the EL layer, a light-emitting element that emits desired light can be formed by appropriately selecting these materials. Examples of the polymer electroluminescent material that can be used for forming the EL layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

  Examples of the polyparaphenylene vinylene include poly (paraphenylene vinylene) [PPV] derivatives, poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′- Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like. Examples of polyparaphenylene include derivatives of polyparaphenylene [PPP], poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4-phenylene). ) And the like. Polythiophene series includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl). -4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) -2,2 bithiophene] [PTOPT] and the like. Examples of the polyfluorene series include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting organic light-emitting material. Examples of the hole-transporting polymer organic light emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. .

  Further, the EL layer can be configured to emit monochromatic or white light. In the case of using a white light emitting material, color display can be made possible by providing a filter (colored layer) that transmits light of a specific wavelength on the light emission side of the pixel.

To form the EL layer that emits white light, for _{example, Alq 3, Alq 3, Alq} 3 doped with Nile Red which is partly red light emitting pigment, p-EtTAZ, by TPD (aromatic diamine) evaporation A white color can be obtained by sequentially laminating. Further, in the case where the EL layer is formed by a coating method using spin coating, it is preferably fired by vacuum heating after coating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) that acts as a hole injection layer is applied and fired on the entire surface, and then the luminescent center dye (1,1) that acts as an EL layer. 1,4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile Red, Coumarin 6 Etc.) A doped polyvinyl carbazole (PVK) solution may be applied to the entire surface and fired.

  The EL layer can be formed as a single layer, and an electron transporting 1,3,4-oxadiazole derivative (PBD) may be dispersed in hole transporting polyvinyl carbazole (PVK). Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red). In addition to the light-emitting element that can emit white light as shown here, a light-emitting element that can emit red light, green light, or blue light can be manufactured by appropriately selecting the material of the EL layer.

  Furthermore, a triplet excitation material containing a metal complex or the like may be used for the EL layer in addition to the singlet excitation light-emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited luminescent material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when applied to a red pixel, the amount of current flowing through the light emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using a metal complex as a dopant, and metal complexes having a third transition series element platinum as the central metal and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  The substances forming the EL layer listed above are examples, and functionalities such as a hole injecting and transporting layer, a hole transporting layer, an electron injecting and transporting layer, an electron transporting layer, a light emitting layer, an electron blocking layer, and a hole blocking layer. A light emitting element can be formed by appropriately stacking each layer. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the EL layer can be changed, and instead of having a specific electron injection region or light emitting region, the electrode layer can be provided exclusively for this purpose, or a light emitting material can be dispersed. Can be permitted without departing from the spirit of the present invention.

  A light-emitting element formed using the above materials emits light by being forward-biased. A pixel of a display device formed using a light-emitting element can be driven by a simple matrix method or an active matrix method as described in Embodiment 2. In any case, each pixel emits light by applying a forward bias at a specific timing, but is in a non-light emitting state for a certain period. By applying a reverse bias during this non-light emitting time, the reliability of the light emitting element can be improved. In the light emitting element, there are a deterioration mode in which the light emission intensity decreases under a constant driving condition and a deterioration mode in which the non-light emitting area is enlarged in the pixel and the luminance is apparently decreased. By performing AC driving, the progress of deterioration can be delayed and the reliability of the light-emitting device can be improved.

(Eleventh embodiment)
Next, a mode in which a driver circuit for driving is mounted on the display panel manufactured according to the first to sixth embodiments will be described with reference to FIGS.

  First, a display device employing a COG method is described with reference to FIGS. Over a substrate 1001, a pixel portion 1002 for displaying information such as characters and images, and driving circuits 1003 and 1004 on the scanning side are provided. The substrates 1005 and 1008 provided with a plurality of drive circuits are divided into rectangular shapes, and the divided drive circuits (hereinafter referred to as driver ICs) are mounted on the substrate 1001. FIG. 21A shows a mode in which a plurality of driver ICs 1007 and a tape 1006 are mounted on the ends of the driver ICs 1007. FIG. 21B shows a driver IC 1010 and a form in which a tape 1009 is mounted on the tip of the driver IC 1010.

  Next, a display device employing a TAB method is described with reference to FIG. Over the substrate 1001, a pixel portion 1002 and driving circuits 1003 and 1004 on the scanning side are provided. FIG. 22A shows a mode in which a plurality of tapes 1006 are attached to a substrate 1001 and a driver IC 1007 is mounted on the tapes 1006. FIG. 22B illustrates a mode in which a tape 1009 is attached to a substrate 1001 and a driver IC 1010 is mounted on the tape 1009. When the latter is adopted, a metal piece or the like for fixing the driver IC 1010 may be attached together due to strength problems.

  A plurality of driver ICs mounted on these display panels are preferably formed on rectangular substrates 1005 and 1008 each having a side of 300 mm or more from the viewpoint of improving productivity.

  That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit are formed on the substrates 1005 and 1008, and finally divided and taken out. Considering the length of one side of the pixel portion and the pixel pitch, the driver IC has a long side of 15 to 80 mm and a short side of 15 to 80 mm as shown in FIGS. It may be formed in a rectangular shape of 1 to 6 mm, or as shown in FIGS. 21B and 22B, a length obtained by adding one side of the pixel portion 1002 and one side of each of the driver circuits 1003 and 1004. Or may be one side of the pixel portion 1002.

  The advantage of the external dimensions of the driver IC over the IC chip is the length of the long side. When a driver IC having a long side of 15 to 80 mm is used, the number necessary for mounting corresponding to the pixel portion 1002 is used. However, the manufacturing yield can be improved as compared with the case where the IC chip is used. Further, when a driver IC is formed over a glass substrate, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  21A and 21B and FIGS. 22A and 22B, a driver IC 1007 or 1009 in which a driver circuit is formed is mounted in a region outside the pixel portion 1002. These driver ICs 1007 and 1010 are drive circuits on the signal line side. In order to form a pixel region corresponding to RGB full color, the number of signal lines in the XGA class is 3072 and the number in the UXGA class is 4800. The signal lines formed in such a number are divided into several blocks at the end of the pixel portion 1002 to form lead lines, and are collected according to the pitch of the output terminals of the driver ICs 1007 and 1010.

  The driver IC is preferably formed using a crystalline semiconductor on a substrate, and the crystalline semiconductor is preferably formed by irradiating continuous-emitting laser light. Therefore, a continuous light emitting solid state laser or gas laser is used as an oscillator for generating the laser light. When a continuous light emission laser is used, a transistor can be formed using a polycrystalline semiconductor layer having a large grain size with few crystal defects. In addition, since the polycrystalline semiconductor layer has good mobility and response speed, it can be driven at high speed, and the operating frequency of the element can be improved as compared with the conventional one. it can. Note that for the purpose of further improving the operating frequency, the channel length direction of the transistor and the scanning direction of the laser light are preferably matched. This is because, in the laser crystallization process using a continuous emission laser, the highest mobility is obtained when the channel length direction of the transistor and the scanning direction of the laser beam with respect to the substrate are substantially parallel (preferably −30 ° to 30 °). It is because it is obtained. Note that the channel length direction corresponds to the direction in which current flows in the channel formation region, in other words, the direction in which charges move. The transistor thus fabricated has an active layer composed of a polycrystalline semiconductor layer in which crystal grains extend in the channel direction, which means that the crystal grain boundaries are formed substantially along the channel direction. means.

  In order to perform laser crystallization, it is preferable to significantly narrow down the laser beam, and the width of the beam spot is preferably about 1 to 3 mm, which is the same width as the short side of the driver IC. Further, in order to ensure a sufficient and efficient energy density for the irradiated object, the beam spot of the laser light is preferably linear. However, the line shape here does not mean a line in a strict sense, but means a rectangle or an ellipse having a large aspect ratio. For example, the aspect ratio is 2 or more (preferably 10 to 10,000). In this manner, a method for manufacturing a display device with improved productivity can be provided by setting the width of the beam spot of the laser light to the same length as the short side of the driver IC.

  21 and 22, the scanning line driver circuit is formed integrally with the pixel portion, and a driver IC is mounted as a signal line driver circuit. However, the present invention is not limited to this mode, and a driver IC may be mounted as both the scanning line driving circuit and the signal line driving circuit. In that case, the specifications of the driver ICs used on the scanning line side and the signal line side may be different.

In the pixel portion 1002, a signal line and a scanning line intersect to form a matrix, and a transistor is disposed at each intersection. The present invention is characterized in that a TFT using an amorphous semiconductor or a semi-amorphous semiconductor as a channel portion is used as a transistor arranged in the pixel portion 1002. The amorphous semiconductor is formed by a method such as a plasma CVD method or a sputtering method. A semi-amorphous semiconductor can be formed by a plasma CVD method at a temperature of 300 ° C. or lower. For example, even a non-alkali glass substrate having an outer dimension of 550 × 650 mm has a film thickness necessary for forming a transistor. Can be formed in a short time. Such a feature of the manufacturing technique is effective in manufacturing a large-screen display device. In addition, a semi-amorphous TFT can obtain a field effect mobility of ² to 10 cm ² / V · sec by forming a channel formation region with SAS. Therefore, this TFT can be used as a switching element for a pixel or an element constituting a driving circuit on the scanning line side. Therefore, a display panel that realizes system-on-panel can be manufactured.

  FIGS. 21 and 22 are based on the premise that the scanning line side driving circuit is integrally formed on the substrate by using the TFT in which the semiconductor layer is formed of SAS according to the sixth embodiment. In the case where a TFT having a semiconductor layer formed of AS is used, a driver IC may be mounted on both the scanning line side driving circuit and the signal line side driving circuit.

  In that case, it is preferable that the specifications of the driver ICs used on the scanning line side and the signal line side are different. For example, although a transistor constituting the driver IC on the scanning line side is required to have a withstand voltage of about 30 V, the driving frequency is 100 kHz or less, and a relatively high speed operation is not required. Therefore, it is preferable to set the channel length (L) of the transistors forming the driver on the scanning line side to be sufficiently large. On the other hand, it is sufficient for the transistor of the driver IC on the signal line side to have a withstand voltage of about 12V, but the drive frequency is about 65 MHz at 3V, and high speed operation is required. Therefore, it is preferable to set the channel length and the like of the transistors constituting the driver on the micron rule.

  As described above, the driver circuit can be mounted on the display panel.

(Twelfth embodiment)
Next, a mode in which a driver circuit for driving is mounted on a display panel manufactured according to the third to fifth embodiments will be described with reference to FIGS.

  60A and 60B show a configuration in which the driver IC is mounted by COG, and shows a case corresponding to the case of the display panel shown in FIG. FIG. 60A shows a structure in which a driver IC 3106 is mounted on a TFT substrate 3200 using an anisotropic conductive material. A pixel portion 3101 and a signal line side input terminal 3104 (the same applies to a scanning line input terminal) are provided over the TFT substrate 3200. The counter substrate 4229 is bonded to the TFT substrate 3200 with a sealant 4226, and a liquid crystal layer 4230 is formed therebetween.

  An FPC 3812 is bonded to the signal line side input terminal 3104 with an anisotropic conductive material. The anisotropic conductive material is composed of resin 3815 and conductive particles 3814 having a diameter of several tens to several hundreds μm whose surface is plated with Au or the like, and wiring formed on the signal line side input terminal 3104 and the FPC 3812 by the conductive particles 3814. 3813 is electrically connected. The driver IC 3106 is also electrically connected to the TFT substrate 3200 with an anisotropic conductive material and electrically connected to the input / output terminal 3809 and the signal line side input terminal 3104 provided in the driver IC 3106 by the conductive particles 3810 mixed in the resin 3811. Connected to.

  In addition, as shown in FIG. 60B, the driver IC 3106 may be fixed to the TFT substrate 3200 with an adhesive 3816, and the input / output terminals of the driver IC may be connected to the lead line or the connection wiring by the Au wire 3817. . Then, sealing is performed with a sealing resin 3818. Note that the method for mounting the driver IC is not particularly limited, and a known COG method, wire bonding method, or TAB method can be used.

  By setting the thickness of the driver IC to the same thickness as that of the counter substrate, the height between the two becomes substantially the same, which contributes to a reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

  As described above, a driver circuit can be incorporated in the display panel.

(Thirteenth embodiment)
A structure of a pixel of the display panel described in this embodiment will be described with reference to equivalent circuit diagrams shown in FIGS.

  In the pixel shown in FIG. 23A, a signal line 410 and power supply lines 411 to 413 are arranged in the column direction, and a scanning line 414 is arranged in the row direction. The pixel further includes a switching TFT 401, a driving TFT 403, a current control TFT 404, a capacitor element 402, and a light emitting element 405.

  The pixel shown in FIG. 23C is the same as the pixel shown in FIG. 23A except that the gate electrode of the driving TFT 403 is connected to the power supply line 413 arranged in the row direction. It is a configuration. That is, both pixels shown in FIGS. 23A and 23C show the same equivalent circuit diagram. However, when the power supply line 413 is arranged in the column direction (FIG. 23A) and when the power supply line 413 is arranged in the row direction (FIG. 23C), each power supply line has a different layer of conductivity. Formed with body layers. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 403 is connected, and FIGS. 23A and 23C are shown separately to show that layers for manufacturing these are different.

As a feature of the pixel shown in FIGS. 23A and 23C, a driving TFT 403 and a current control TFT 404 are connected in series within the pixel, and the channel length L ₃ , channel width W ₃ , and current control of the driving TFT 403 are as follows. The channel length L ₄ and the channel width W ₄ of the TFT 404 for use are set so as to satisfy L ₃ / W ₃ : L ₄ / W ₄ = 5 to 6000: 1. As an example of satisfying 5 to 6000: 1, there is a case where L ₃ is 500 μm, W ₃ is 3 μm, L ₄ is 3 μm, and W ₄ is 100 μm.

  Note that the driving TFT 403 operates in a saturation region and controls the current value flowing through the light emitting element 405, and the current control TFT 404 operates in a linear region and controls the supply of current to the light emitting element 405. . Both TFTs preferably have the same conductivity type in terms of manufacturing process. The driving TFT 403 may be a depletion type TFT as well as an enhancement type. In the present invention having the above structure, since the current control TFT 404 operates in a linear region, a slight change in VGS of the current control TFT 404 does not affect the current value of the light emitting element 405. That is, the current value of the light emitting element 405 is determined by the driving TFT 403 operating in the saturation region. The present invention having the above structure can provide a display device in which luminance unevenness of a light emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In the pixels shown in FIGS. 23A to 23D, the switching TFT 401 controls input of a video signal to the pixel. When the switching TFT 401 is turned on and a video signal is input into the pixel. The video signal is held in the capacitor 402. Note that FIGS. 23A and 23C illustrate a structure in which the capacitor 402 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 402 is not necessarily provided explicitly.

  The light-emitting element 405 has a structure in which an electroluminescent layer is sandwiched between two electrodes, and a potential difference is generated between the pixel electrode and the counter electrode (between the anode and the cathode) so that a forward bias voltage is applied. Is provided. The electroluminescent layer is composed of a wide variety of materials such as organic materials and inorganic materials. The luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from a singlet excited state to a ground state, and a triplet excited state. And light emission (phosphorescence) when returning to the ground state.

  The pixel shown in FIG. 23B has the same pixel structure as that shown in FIG. 23A except that a TFT 406 and a scanning line 413 are added. Similarly, the pixel illustrated in FIG. 23D has the same pixel structure as that illustrated in FIG. 23C except that a TFT 406 and a scanning line 415 are added.

  The TFT 406 is controlled to be turned on or off by a newly arranged scanning line 415. When the TFT 406 is turned on, the charge held in the capacitor 402 is discharged and the TFT 406 is turned off. That is, a state in which no current flows through the light emitting element 405 can be created by the arrangement of the TFT 406. Accordingly, the configurations in FIGS. 23B and 23D improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

  In the pixel shown in FIG. 23E, a signal line 450, power supply lines 451 and 452 are arranged in the column direction, and a scanning line 453 is arranged in the row direction. In addition, the pixel includes a switching TFT 441, a driving TFT 443, a capacitor element 442, and a light emitting element 444. The pixel illustrated in FIG. 23F has the same pixel structure as that illustrated in FIG. 23E except that a TFT 445 and a scanning line 454 are added. Note that the duty ratio can also be improved in the structure of FIG.

(Fourteenth embodiment)
One mode in which protective diodes are provided in the scanning line side input terminal portion and the signal line side input terminal portion will be described with reference to FIG. In FIG. 17, the pixel 102 is provided with TFTs 501 and 502. This TFT has the same configuration as that of the first embodiment.

  Protection diodes 561 and 562 are provided in the signal line side input terminal portion. This protective diode is manufactured in the same process as the TFT 501 or 502, and is operated as a diode by connecting a gate and one of a drain and a source. An equivalent circuit diagram of the top view shown in FIG. 17 is shown in FIG.

  The protection diode 561 includes a gate electrode layer 550, a semiconductor layer 551, a channel protection insulating layer 552, and a wiring layer 553. The protective diode 562 has a similar structure. The common potential lines 554 and 555 connected to the protection diode are formed in the same layer as the gate electrode layer. Therefore, in order to be electrically connected to the wiring layer 553, a contact hole needs to be formed in the gate insulating layer.

  The contact hole for the gate insulating layer may be etched by forming a mask layer by a droplet discharge method. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  The signal wiring layer 250 is formed of the same layer as the source and drain wiring layer 225 in the TFT 501 and has a structure in which the signal wiring layer 250 and the source or drain side of the source and drain wiring layer 225 are connected.

  The input terminal portion on the scanning line side has the same configuration. Thus, according to the present invention, the protection diode provided in the input stage can be formed simultaneously. Note that the position at which the protective diode is inserted is not limited to this embodiment mode, and can be provided between the driver circuit and the pixel.

(Fifteenth embodiment)
29 and 30 show an example of an EL display module using the TFT substrate 200 manufactured by a droplet discharge method. In both drawings, a pixel portion 101 composed of pixels 102 is formed on a TFT substrate 200.

  In FIG. 29, outside the pixel portion 101 and between the drive circuit 703 and the pixels 102 (a) to 102 (c), a TFT similar to that formed in the pixel, or the gate and source or drain of the TFT. A protection circuit portion 701 is provided which is connected to one of the two and operates in the same manner as a diode. As the driver circuit 703, a driver IC formed of a single crystal semiconductor, a stick driver IC formed of a polycrystalline semiconductor film over a glass substrate, a driver circuit formed of SAS, or the like is applied.

  The TFT substrate 200 in FIG. 29 is fixed to the sealing substrate 241 through a spacer 710 formed on the insulator layer 248 by a droplet discharge method. The spacer 710 is preferably provided in order to keep the distance between the two substrates constant even when the substrate is thin and the area of the pixel portion is increased. A space between the TFT substrate 200 and the sealing substrate 241 on the light emitting element 239 may be filled with a light-transmitting resin material to be solidified, or dehydrated nitrogen or inert gas may be used. It may be filled.

  FIG. 29 shows a case where the light-emitting element 239 has a top emission type structure, in which light is emitted in the direction of the arrow shown in the drawing. Multi-color display can be performed by changing the emission colors of the pixels 102a to 102c as red, green, and blue, respectively. At this time, by forming the colored layers 709a, 709b, and 709c corresponding to the respective colors on the sealing substrate 241 side, the color purity of the emitted light can be increased. The pixels 102a, 102b, and 102c may be combined with the colored layers 709a, 709b, and 709c as white light emitting elements.

  The external circuit 705 is connected to the scanning line or signal line connection terminal provided at one end of the TFT substrate 200 by the wiring substrate 704. Further, a heat pipe 706 and a heat radiating plate 707 may be provided in contact with or in proximity to the TFT substrate 200 to enhance the heat radiating effect.

  Although the top emission EL module is shown in FIG. 29, the bottom emission structure as shown in FIG. 30 may be changed by changing the configuration of the light emitting element and the arrangement of the external circuit board.

  FIG. 30 shows an example in which a sealing structure is formed by attaching a resin film 708 to the TFT substrate 200 on the side where the pixel portion is formed using a sealing material 240 or an adhesive resin 702. A gas barrier film for preventing the permeation of water vapor may be provided on the surface of the resin film 708. FIG. 30 shows a bottom emission structure in which light from the light emitting element is emitted through the substrate. However, a top emission structure can be obtained by making the resin film 708 and the adhesive resin 702 light-transmitting. . In any case, the film sealing structure can further reduce the thickness and weight.

(Sixteenth embodiment)
A television receiver can be completed by the display module manufactured according to the fifteenth embodiment or the display panels manufactured according to the eleventh and twelfth embodiments. FIG. 31 is a block diagram showing a main configuration of a television receiver. In the display panel, only the pixel portion 101 is formed as shown in FIG. 1, and the scanning line side driver circuit 903 and the signal line side driver circuit 902 are mounted by the TAB method, and as shown in FIG. As a structure, the pixel portion 101 and the periphery thereof the scanning line side driver circuit 903 and the signal line side driver circuit 902 are mounted by the COG method, and TFTs are formed by SAS as shown in FIG. And the scanning line side driving circuit 903 are integrally formed on the substrate, and the signal line side driving circuit 902 is separately mounted as a driver IC.

  As other external circuit configurations, on the input side of the video signal, among the signals received by the tuner 904, the video signal amplification circuit 905 that amplifies the video signal and the signal output from the signal are red, green, and blue colors And a control circuit 907 for converting the video signal into the input specification of the driver IC. The control circuit 907 outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit 908 may be provided on the signal line side so that an input digital signal is divided into m pieces and supplied.

  Of the signals received by the tuner 904, the audio signal is sent to the audio signal amplifier circuit 909, and the output is supplied to the speaker 913 via the audio signal processing circuit 910. The control circuit 911 receives control information on the receiving station (reception frequency) and volume from the input unit 912 and sends a signal to the tuner 904 and the audio signal processing circuit 910.

  By incorporating such an external circuit, an EL module as described in FIGS. 29 and 30 can be incorporated in a housing 920 as shown in FIG. 32 to complete a television receiver. A display screen 921 is formed by the EL display module, and other accessories such as a speaker 922 and an operation switch 924 are provided. As described above, a television receiver can be completed according to the present invention.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

(Seventeenth embodiment)
As a seventeenth embodiment, a top gate type TFT will be described with reference to FIGS. 64 and 36. FIG.

  Similar to the seventh embodiment, the structure shown in FIG.

  Next, as illustrated in FIG. 36B, a gate insulating layer 131 is formed so as to cover the semiconductor layer 130 and the pixel electrode 142, and a semiconductor layer 132 is formed over the gate insulating layer 131, whereby a TFT is manufactured. .

  FIG. 64 is a cross-sectional view of a liquid crystal display panel manufactured according to this embodiment. In FIG. 64, unlike FIG. 36B, the gate insulating layer is formed in front of the semiconductor layer and the pixel electrode. Here, the gate insulating layer 3210 is formed by a plasma CVD method or a sputtering method. As a particularly preferable embodiment, a three-layered structure including an insulator layer made of silicon nitride, an insulator layer made of silicon oxide, and an insulator layer made of silicon nitride is formed as the gate insulating layer 3210. Next, a through-hole 3242 is formed in the gate insulating layer 3210, and a part of the source and drain wiring 3275 is exposed, and then electrically connected to the source and drain wiring layer 3275 through the n-type semiconductor layer. Then, the pixel electrode layer 3229 is formed by selectively discharging a composition containing a conductive material. As shown in FIG. 36B, if the pixel electrode layer is formed before the gate insulating layer is formed, it is not necessary to expose the source and drain wirings.

  A gate electrode layer 3279 is formed by a droplet discharge method. As a conductive material for forming this layer, a composition mainly composed of metal particles such as Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum) is used. Can do.

  A sealant 3231 is formed, and the counter substrate 3234 on which the substrate 3100, the conductor layer 3233 functioning as a counter electrode, and the insulator layer 3232 functioning as an alignment film are formed is attached to the sealant 3231. After that, a liquid crystal layer 3350 is formed between the substrate 3100 and the counter substrate 3234. Next, a region where the connection terminal 3236 is pasted is exposed by etching under atmospheric pressure or near atmospheric pressure. After the connection terminal 3236 is pasted, a liquid crystal display panel having a display function can be manufactured (FIG. 64). reference.).

(Eighteenth embodiment)
As an eighteenth embodiment, a top-gate TFT will be described with reference to FIGS. 64 and 37 to 40.

  As shown in FIG. 37A, a base layer 201 is formed over a substrate 100 by a method such as a sputtering method or an evaporation method. A photosensitive resin 206 is discharged or applied on the base layer 201. In the case of coating, a spin coater or a slit coater may be used. As the photosensitive resin 206, a material negative photosensitive resin or positive photosensitive resin sensitive to ultraviolet light to infrared light is used. In the present embodiment, a negative photosensitive resin is used.

  Next, the photosensitive resin 206 is irradiated with a laser beam 208 using a laser beam direct writing apparatus 207, and a pattern is drawn while moving the substrate or the laser (see FIG. 37B).

  As a result, as shown in FIG. 38A, a resist mask 133 is formed in the region irradiated with the laser beam. Here, since the negative type is used as the photosensitive resin, the region irradiated with the laser beam becomes the resist mask.

  Next, the resist mask 133 is subjected to a treatment such as fluorine plasma so that the resist mask 133 itself has a liquid repellent effect (see FIG. 38B).

  Next, a composition containing a conductive material is selectively discharged so as to sandwich the liquid repellent surface 134, and source and drain wiring layers 135 to 138 are formed by a droplet discharge method (FIG. 39A). reference.). At this time, the distance 230 between the source and drain wirings can be finely controlled in a self-aligning manner by the liquid repellent effect of the resist mask 133. Subsequently, the base layer 201 is insulated. At this time, the resist mask 133 may or may not be removed.

  The subsequent steps are the same as those in the seventeenth embodiment.

(Nineteenth embodiment)
One mode in which protective diodes are provided in the scanning line side input terminal portion and the signal line side input terminal portion will be described with reference to FIG. In FIG. 62, the pixel 3102 is provided with a TFT 3260. This TFT has the same configuration as that of the third embodiment.

  Protection diodes 3261 and 3262 are provided at the signal line side input terminal portion. This protection diode is manufactured in the same process as the TFT 3260, and is operated as a diode by connecting a gate and one of a drain and a source. An equivalent circuit diagram of the top view shown in FIG. 62 is shown in FIG.

  The protection diode 3261 includes a gate electrode layer 3250, a semiconductor layer 3251, a channel protection insulating layer 3252, and a wiring layer 3253. The protective diode 3262 has a similar structure. Common potential lines 3254 and 3255 connected to the protection diodes 3261 and 3262 are formed of the same layer as the gate electrode layer. Therefore, in order to be electrically connected to the wiring layer 3253, a contact hole needs to be formed in the gate insulating layer.

  The contact hole for the gate insulating layer may be etched by forming a mask layer by a droplet discharge method. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  The protection diode 3261 or 3262 is formed in the same layer as the source and drain wiring layers 3225 and 3226 in the TFT 3260, and has a structure in which the signal wiring layer 3256 connected thereto is connected to the source or drain side.

  The input terminal portion on the scanning signal line side has the same configuration. Thus, according to the present invention, the protection diodes 3261 and 3262 provided in the input stage can be formed simultaneously. Note that the position at which the protection diodes 3261 and 3262 are inserted is not limited to this embodiment mode, and the protection diodes 3261 and 3262 may be provided between the driver circuit and the pixel.

(20th embodiment)
A television receiver can be completed with the display panel manufactured according to the twelfth embodiment. FIG. 31 is a block diagram showing a main configuration of a television receiver. The main configuration of the television receiver is the same as that in the sixteenth embodiment.

  FIG. 61 shows an example of a display module, in which a TFT substrate 4200 and a counter substrate 4229 are fixed by a sealant 4231, and a display region in which a pixel portion 4101 and a liquid crystal layer 4230 are provided is formed therebetween. The colored layer 4250 is necessary for color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. Polarizing plates 4251 and 4252 are provided outside the TFT substrate 4200 and the counter substrate 4229. A protective layer 4280 is provided over the polarizing plate 4251. The light source is composed of a cold cathode tube 4258 and a light guide plate 4259. The circuit board 4257 is connected to the TFT substrate 4200 by a flexible wiring board 4256, and external circuits such as a control circuit and a power supply circuit are incorporated.

  FIG. 32 shows a state in which the display module is assembled in the housing 920 to complete the television receiver. A display screen 921 is formed by the display module, and other accessories such as a speaker 922 and an operation switch 924 are provided. As described above, a television receiver can be completed according to the present invention.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

FIG. 11 is a top view illustrating a structure of a display panel of the present invention. FIG. 11 is a top view illustrating a structure of a display panel of the present invention. FIG. 11 is a top view illustrating a structure of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 10 is a top view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 10 is a top view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 10 is a top view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 10 is a top view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a top view illustrating a display panel of the present invention. FIG. 18 is an equivalent circuit diagram of the display panel described in FIG. 17. It is a figure explaining the form of the light emitting element applicable in this invention. It is a figure explaining the form of the light emitting element applicable in this invention. It is a figure explaining the mounting method of the drive circuit of the display panel of this invention. It is a figure explaining the mounting method of the drive circuit of the display panel of this invention. FIG. 11 is a circuit diagram illustrating a structure of a pixel that can be applied to an EL display panel of the present invention. FIG. 10 is a diagram illustrating a circuit configuration in a case where a scanning line side driving circuit is formed using TFTs in the display panel of the present invention. FIG. 11 is a diagram illustrating a circuit configuration in the case where a scanning line side driving circuit is formed using TFTs in the display panel of the present invention (pulse output circuit). FIG. 11 is a diagram illustrating a circuit configuration when a scanning line side driving circuit is formed using TFTs in an EL display panel of the present invention (buffer circuit). It is a figure explaining the structure of the droplet discharge apparatus which can be applied to this invention. FIG. 11 is a cross-sectional view illustrating an EL display panel of the present invention. It is sectional drawing explaining the structural example of the EL display module of this invention. It is sectional drawing explaining the structural example of the EL display module of this invention. It is a block diagram which shows the main structures of the television receiver of this invention. It is a figure explaining the structure of the television receiver completed by this invention. It is a figure explaining the structure of the laser beam direct writing apparatus which can be applied to this invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of an EL display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. FIG. 11 is a cross-sectional view illustrating a manufacturing process of a display panel of the present invention. It is sectional drawing explaining the manufacturing process of the liquid crystal display panel of this invention. It is a top view illustrating a manufacturing process of a liquid crystal display panel of the present invention. It is a top view illustrating a manufacturing process of a liquid crystal display panel of the present invention. It is a top view illustrating a manufacturing process of a liquid crystal display panel of the present invention. It is a top view illustrating a manufacturing process of a liquid crystal display panel of the present invention. It is a figure explaining the mounting method (COG system) of the drive circuit of the display panel of this invention. It is a figure explaining the structure of the display module of this invention. FIG. 11 is a top view illustrating a display panel of the present invention. FIG. 27 is an equivalent circuit diagram of the display panel described in FIG. 26. FIG. 11 is a cross-sectional view illustrating a display panel of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Electrode 16 EL layer 17 Electrode 31 Electrode layer 32 Electrode layer 33 Electrode layer 34 Electrode layer 35 Electrode layer 41 Hole injection layer 41 Hole transport layer 42 Light emitting layer 43 Electron injection layer 100 Substrate 101 Pixel portion 102 Pixel 102a Pixel 103 Scanning Line side input terminal 104 Signal line side input terminal 107 Scanning line side drive circuit 120 Liquid repellent surface 121 Liquid repellent surface 122 Drain wiring layer 126 Semiconductor layer 130 Semiconductor layer 133 Gate electrode layer 133 Resist mask 134 Gate electrode layer 134 The liquid repellent surface 135 Drain wiring layer 139 Semiconductor layer 140 Negative photosensitive resin 141 Resist mask

Claims (12)

Forming a film using a photosensitive material on the substrate, irradiating the film with a first laser beam and developing the film to form a film pattern;
After modifying the film pattern surface to be liquid repellant, a conductive material is discharged to the outer edge of the liquid repellant film pattern surface by a droplet discharge method to form a source electrode and a drain electrode,
A method for manufacturing a display device, comprising forming a semiconductor layer, a gate insulating film, and a gate electrode over the source electrode and the drain electrode. A first film is formed using a solution that forms a liquid-repellent region on the substrate, and a part of the first film is irradiated with a first laser beam to form a liquid-repellent region. Forming a second film having the property and lyophilicity,
After forming a source electrode and a drain electrode by discharging a conductive material to the lyophilic region of the second film by a droplet discharge method, a semiconductor layer, a gate insulating film, and a gate electrode are formed on the source electrode and the drain electrode. A method for manufacturing a display device, comprising: forming a display device. A first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. The first film pattern and the photosensitive material A mask pattern is formed by irradiating and developing a first laser beam in a region where the laser beam overlaps, and then etching the first film pattern using the mask pattern as a mask to form a gate electrode having a desired shape. ,
After forming a first insulating film over the gate electrode and forming a liquid-repellent region on the first insulating film, the light-transmitting property is applied to a part of the liquid-repellent region. A portion of the region having liquid repellency is modified to be lyophilic by irradiating a second laser beam transmitted through a substrate having a source, and a source electrode and a drain electrode are formed on the region having lyophilicity. A method for manufacturing a display device, comprising forming a semiconductor layer over the source electrode and the drain electrode. A first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. The first film pattern and the photosensitive material A mask pattern is formed by irradiating and developing a first laser beam in a region where the laser beam overlaps, and then etching the first film pattern using the mask pattern as a mask to form a gate electrode having a desired shape. ,
An insulating film is formed over the gate electrode, a semiconductor layer is formed over the insulating film, a region having liquid repellency is formed on the surface of the insulating film and the semiconductor layer, and then the liquid repellency is provided. A part of the region is irradiated with a second laser beam that has passed through the light-transmitting substrate to modify a part of the region having liquid repellency to be lyophilic, thereby having the lyophilic property. A method for manufacturing a display device, comprising: forming a source electrode and a drain electrode over a region; and etching the part of the semiconductor layer using the source electrode and the drain electrode as a mask to form a source region and a drain region . A first film pattern is formed on a light-transmitting substrate by a droplet discharge method, and a photosensitive material is discharged or applied onto the first film pattern. The first film pattern and the photosensitive material A mask pattern is formed by irradiating and developing a first laser beam in a region where the laser beam overlaps, and then etching the first film pattern using the mask pattern as a mask to form a gate electrode having a desired shape. ,
Forming a first insulating film on the gate electrode; forming a first semiconductor layer on the first insulating film; forming a second insulating film on the first semiconductor layer; A second semiconductor layer is formed on the first semiconductor layer and the second insulating film, and a region having liquid repellency is formed on the surface of the first insulating film and the second semiconductor layer, and then the liquid repellent property is formed. A part of the region having liquidity is irradiated with a second laser beam transmitted through the light-transmitting substrate to modify a part of the region having liquid repellency to be lyophilic. A display comprising: forming a source electrode and a drain electrode over a region having liquidity; and etching the second semiconductor layer using the source electrode and the drain electrode as a mask to form the source region and the drain region. Device fabrication method.  6. The method for manufacturing a display device according to claim 1, wherein the first laser beam has a wavelength of ultraviolet light or infrared light.  7. The method for manufacturing a display device according to claim 3, wherein the second laser beam has a wavelength of ultraviolet light or infrared light.   The method for manufacturing a display device according to claim 1, wherein the photosensitive material is a negative photosensitive resin.  8. The method for manufacturing a display device according to claim 1, wherein the photosensitive material is a positive photosensitive resin.  The method for manufacturing a display device according to claim 1, wherein the display device is a liquid crystal display device.  10. The method for manufacturing a display device according to claim 1, wherein the display device is a light-emitting device. A television having a display device formed by the method for manufacturing a display device according to any one of claims 1 to 11.

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