JP2005237052A - Step-up/down current regulator and step-up/down voltage regulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a step-up/down current regulator which can operate in either case of boosting and voltage drop. <P>SOLUTION: This step-up/down current regulator comprises a switching element SW1, a switching element SW2, a switching element SW3, a switching element SW4, a magnetic element L, a current detecting means RS1, which detects the current of the switching element SW1 or the switching element SW3, a current detecting means RS2 which detects the current of the switching element SW2 or the switching element SW4, a comparator CP1 which compares the output of the current detecting means RS1 with an upper current command, a comparator CP2 which compares the output of the current detecting means RS2 with a lower limit current command, and a control circuit which switches off the switching element SW1 and the switching element SW3, severally, on the basis of the output of the comparator CP1, and switches on the switching element SW1 and the switching element SW3, severally, on the basis of the output of the comparator CP2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a buck-boost type current regulator and a buck-boost voltage regulator used in a DC / DC converter or the like, and more specifically, a buck-boost type that determines a load current corresponding to a current command value and performs step-up and step-down with a single circuit. The present invention relates to a current regulator and a buck-boost voltage regulator.

  A conventional step-up / step-down current regulator is formed, for example, in a step-up type circuit (not shown). The step-up / step-down current regulator generates a predetermined load current from the input voltage by turning on / off the switching element in the step-up circuit. The step-up / step-down current regulator generates a load current based on the current command value.

  On the other hand, the conventional switching power supply (buck-boost chopper) has a complicated control circuit (see, for example, Patent Document 1).

Japanese Patent No. 3198215

  However, the conventional step-up / step-down current regulator formed in the step-up circuit has a problem that it cannot step down. For this reason, the conventional step-up / step-down current regulator has problems that it is unsuitable for applications in which the difference between the input voltage and the output voltage is positive or negative (applications) and applications in which the difference between the input voltage and the output voltage is small.

  Moreover, the switching power supply device of Patent Document 1 has a problem that the number of parts is large.

  An object of the present invention is to solve the above-described problems, and to provide a buck-boost current regulator that can operate in both cases of step-up and step-down.

  Another object of the present invention is to provide a low-cost, simple buck-boost current regulator and buck-boost voltage regulator with a small number of components.

The present invention which achieves such an object is as follows.
(1) In a buck-boost current regulator that generates a predetermined load current from an input voltage by turning on and off the switching element, a first switching element that connects the input voltage to one end, a common potential connected to one end, and a A second switching element connected to the other end of the first switching element and complementarily turned on and off with the first switching element, a third switching element connecting the common potential to one end, and the load current applied to one end Connected to the other end, the other end of the third switching element is connected to the other end, a fourth switching element that is complementarily turned on and off with the third switching element, and the first switching element and the second at one end A connection point with the switching element is connected, and a connection point between the third switching element and the fourth switching element is connected to the other end. A first current detecting means for detecting a current of the first switching element or the third switching element; a second current detecting means for detecting a current of the second switching element or the fourth switching element; A first comparator that compares the output of the first current detection means and the upper limit current command value; a second comparator that compares the output of the second current detection means and the lower limit current command value; and an output of the first comparator. And a control circuit that turns off each of the first switching element and the third switching element based on the output of the second comparator and turns on the first switching element and the third switching element based on the output of the second comparator. Buck-boost current regulator.

(2) In a buck-boost current regulator that generates a predetermined load current from an input voltage by turning on and off the switching element, a first switching element connected to the input voltage at one end, a common potential connected to one end, and the other end A second switching element connected to the other end of the first switching element and complementarily turned on and off with the first switching element, a third switching element connecting the common potential to one end, and the load current applied to one end Connected to the other end, the other end of the third switching element is connected to the other end, a fourth switching element that is complementarily turned on and off with the third switching element, and the first switching element and the second at one end A connection point with the switching element is connected, and a connection point between the third switching element and the fourth switching element is connected to the other end. An electric current element, current detection means for detecting the current of the magnetic element, a comparator for comparing the output of the current detection means with a current command value, a drive signal for the first switching element or the third switching as a trigger input A timer for generating a trigger output having a predetermined delay by connecting an element driving signal; an output of the comparator connected to a set input; and the trigger output connected to a reset input; And a flip-flop that generates a drive signal for the third switching element.

(3) In a buck-boost voltage regulator that generates a predetermined output voltage from an input voltage by turning on and off the switching element, a first switching element that connects the input voltage to one end, a common potential connected to one end, and a second end The other end of the first switching element is connected, a second switching element that is complementarily turned on / off with the first switching element, a third switching element that connects the common potential to one end, and the output voltage to one end The other end of the third switching element is connected to the other end, a fourth switching element that is complementarily turned on / off with the third switching element, and the connection between the first switching element and the second switching element at one end A magnetic element connecting a point and connecting a connection point of the third switching element and the fourth switching element to the other end; A first current detecting means for detecting a current of one switching element or the third switching element; a second current detecting means for detecting a current of the second switching element or the fourth switching element; and the first current detecting means. Based on the output of the first comparator, the first comparator that compares the output of the second current detector with the lower limit current command value, the first comparator that compares the output of the second current detector and the lower limit current command value And a control circuit for turning off each of the first switching element and the third switching element based on an output of a second comparator, a smoothing capacitor for smoothing the output voltage, An error amplifier that amplifies a difference between an output voltage and a reference voltage and outputs the upper limit current command value; Buck-boost voltage regulator, characterized.

(4) In a buck-boost voltage regulator that generates a predetermined output voltage from an input voltage by turning on and off the switching element, a first switching element connected to the input voltage at one end, a common potential connected to one end, and the other end The other end of the first switching element is connected, a second switching element that is complementarily turned on / off with the first switching element, a third switching element that connects the common potential to one end, and the output voltage to one end The other end of the third switching element is connected to the other end, a fourth switching element that is complementarily turned on / off with the third switching element, and the connection between the first switching element and the second switching element at one end A magnetic element connecting a point and connecting a connection point of the third switching element and the fourth switching element to the other end; Current detection means for detecting the current of the gas element, a comparator for comparing the output of the current detection means and a current command value, and a drive signal for the first switching element or a drive signal for the third switching element as a trigger input. And a timer for generating a trigger output having a predetermined delay, an output of the comparator connected to a set input, the trigger output connected to a reset input, a drive signal of the first switching element and the third switching A flip-flop for generating a drive signal for the element; a smoothing capacitor for smoothing the output voltage; and an error amplifier for amplifying a difference between the output voltage and a reference voltage and outputting the current command value. A buck-boost voltage regulator.

(5) An AND gate that connects the drive signal of the first switching element and the output of the second comparator to the input, an output of the first comparator to the set input, and an output of the AND gate to the reset input And a step-up / step-down current regulator according to (1) or a step-up / step-down type according to (3), further comprising a flip-flop that generates a drive signal for the first switching element and a drive signal for the third switching element. Voltage regulator.

(6) The buck-boost current regulator or the buck-boost voltage regulator according to any one of (1) to (5), comprising the second switching element and the fourth switching element formed of a diode.

The present invention has the following effects.
According to the present invention, it is possible to provide a step-up / step-down current regulator operable in both cases of step-up and step-down.

  Further, according to the present invention, it is possible to provide a buck-boost current regulator and a buck-boost voltage regulator suitable for applications in which the difference between the input voltage and the output voltage is positive or negative.

  Furthermore, according to the present invention, it is possible to provide a buck-boost current regulator and a buck-boost voltage regulator suitable for applications where the difference between the input voltage and the output voltage is small.

  In addition, according to the present invention, it is possible to provide a buck-boost current regulator and a buck-boost voltage regulator that have high-speed and suitable response characteristics.

  Furthermore, according to the present invention, it is possible to provide a small, low-cost, simple and suitable buck-boost current regulator and buck-boost voltage regulator.

  Hereinafter, the present invention will be described in detail with reference to FIG. FIG. 1 is a block diagram showing an embodiment of the present invention. 1 is characterized by a first switching element SW1, a second switching element SW2, a third switching element SW3, a fourth switching element SW4, a magnetic element L, a resistor RS1, and a resistor RS2. And a first comparator CP1, a second comparator CP2, an AND gate G1, and a flip-flop F / F.

  In the figure, one end (source) of the first switching element SW1 is connected to the positive electrode of the input voltage Vin. Further, the negative electrode of the input voltage Vin is connected to the common potential GND.

  Also, one end (source) of the second switching element SW2 is connected to the common potential GND via the resistor RS2, and the other end (drain) of the second switching element SW2 is connected to the other end (drain) of the first switching element SW1. ). Furthermore, the control terminal (gate) of the first switching element SW1 is connected to the control terminal (gate) of the second switching element SW2.

  Furthermore, one end (source) of the third switching element SW3 is connected to the common potential GND via the resistor R1.

  Also, one end (source) of the fourth switching element SW4 is connected to the load Load, and the other end (drain) of the fourth switching element SW4 is connected to the other end (drain) of the third switching element SW3. Furthermore, one end of the load Load is connected to the common potential GND. The load current Iout and the output voltage Vout are applied to the other end of the load Load.

  Furthermore, one end of the inductor L, which is a magnetic element, is connected to a connection point between the other end (drain) of the first switching element SW1 and the other end (drain) of the second switching element SW2, and the other end of the inductor L is The other end (drain) of the third switching element SW3 and the other end (drain) of the fourth switching element SW4 are connected.

  The non-inverting input of the first comparator CP1 is connected to a connection point between one end (source) of the third switching element SW3 and the resistor RS1. Furthermore, the inverting input of the first comparator CP1 is connected to the upper limit current command value V1.

  Further, the non-inverting input of the second comparator CP2 is connected to a connection point between one end (source) of the second switching element SW2 and the resistor RS2. Furthermore, the inverting input of the second comparator CP2 is connected to the lower limit current command value V2.

  The input of the AND gate G1 is connected to the control terminal (gate) of the first switching element SW1, the control terminal (gate) of the second switching element SW2, and the non-inverted output Q of the second comparator CP2.

  Further, the set input S of the flip-flop F / F is connected to the output of the first comparator CP1. The reset input R of the flip-flop F / F is connected to the output of the AND gate G1. Further, the non-inverted output Q of the flip-flop F / F is connected to the control terminal (gate) of the first switching element SW1 and the control terminal (gate) of the second switching element SW2. Further, the inverted output XQ of the flip-flop F / F is connected to the control terminal (gate) of the third switching element SW3 and the control terminal (gate) of the fourth switching element SW4. The flip-flop F / F generates a drive signal VG1 for the first switching element SW1 and the second switching element SW2, and a drive signal VG2 for the third switching element SW3 and the fourth switching element SW4.

  The first switching element SW1 and the fourth switching element SW4 are each formed by a p-channel MOSFET (p-channel insulated gate field effect transistor). Furthermore, the second switching element SW2 and the third switching element SW3 are each formed by an n-channel MOSFET (n-channel insulated gate field effect transistor).

  Further, the resistor RS1 serving as the first current detection means is disposed between the common potential GND and one end (source) of the third switching element SW3. In addition, the resistor RS2 as the second current detection unit is disposed between the common potential GND and one end (source) of the second switching element SW2.

  The operation of the embodiment of FIG. 1 will be described with reference to FIG. FIG. 2 is an operation waveform of each part in the embodiment of FIG.

FIG. 2A shows the voltage VD2 at the connection point between the other end (drain) of the third switching element SW3, the other end (drain) of the fourth switching element SW4, and the other end of the inductor L.
FIG. 2B shows a voltage VD1 at a connection point between the other end (drain) of the first switching element SW1, the other end (drain) of the second switching element SW2, and one end of the inductor L.

FIG. 2C shows a voltage VS1 at a connection point between one end (source) of the third switching element SW3, the resistor RS1, and the non-inverting input of the first comparator CP1, that is, a voltage VS1 generated in the resistor RS1.
FIG. 2D shows a voltage VS2 at a connection point between one end (source) of the second switching element SW2, the resistor RS2, and the non-inverting input of the first comparator CP2, that is, a voltage VS2 generated in the resistor RS2.

FIG. 2E shows the current iL of the inductor L.
FIG. 2F shows the load current Iout.

  In the operation state of the embodiment of FIG. 1, the period t1 and the period t2 are alternately repeated with a period T.

  First, the period t1 will be described. At this time, the non-inverted output Q of the flip-flop F / F is low, the inverted output XQ of the flip-flop F / F is high, the first switching element SW1 is on, the second switching element SW2 is off, and the third switching element SW3 Is turned on, and the fourth switching element SW4 is turned off. Further, the other end of the inductor L becomes the common potential GND.

  The input current Iin flows through the input voltage Vin, the first switching element SW1, the inductor L, the third switching element SW3, and the resistor RS1. Furthermore, the inductor L is excited by applying the input voltage Vin.

  Further, the output of the AND gate G1 becomes low, and the reset input R of the flip-flop F / F becomes low. That is, the AND gate G1 stabilizes the operation of the flip-flop F / F by setting the reset input R of the flip-flop F / F to low during the period t1.

  Further, the voltage VS1 is proportional to the current of the first switching element SW1, the current of the inductor L, and the current of the third switching element SW3. Further, the voltage VS1 increases in a ramp shape.

  When the voltage VS1 becomes the upper limit current command value V1, the output of the first comparator CP1 goes from low to high, the set input S of the flip-flop F / F goes high, and the non-inverted output Q of the flip-flop F / F goes low. Changes from high to low, and the inverted output XQ of the flip-flop F / F changes from high to low. In addition, the period t1 ends and transitions to the period t2.

  Next, the period t2 will be described. At this time, the non-inverted output Q of the flip-flop F / F is high, the inverted output XQ of the flip-flop F / F is low, the first switching element SW1 is off, the second switching element SW2 is on, and the third switching element SW3 Is turned off, and the fourth switching element SW4 is turned on. Further, one end of the inductor L becomes the common potential GND.

  Then, the load current Iout flows through the inductor L, the fourth switching element SW4, the load Load (output voltage Vout), the resistor RS2, and the second switching element SW2. The inductor L is reset when the output voltage Vout is applied.

  Further, the voltage VS2 is proportional to the current of the second switching element SW2, the current of the inductor L, and the current of the fourth switching element SW4. Further, the voltage VS2 rises in a ramp shape.

  When the voltage VS2 becomes the lower limit current command value V2, the output of the second comparator CP2 goes from low to high, the output of the AND gate G1 goes high, the reset input R of the flip-flop F / F goes high, and the flip-flop F The non-inverted output Q of / F changes from high to low, and the inverted output XQ of the flip-flop F / F changes from low to high. In addition, the period t2 ends and transitions to a period corresponding to the period t1.

  That is, the control circuit including the AND gate G1 and the flip-flop F / F turns off the first switching element SW1 and the third switching element SW3 based on the output of the first comparator CP1, and based on the output of the second comparator CP2. The first switching element SW1 and the third switching element SW3 are turned on.

  The first switching element SW1 and the second switching element SW2 are turned on and off in a complementary manner. The third switching element SW3 and the fourth switching element SW4 are turned on and off in a complementary manner.

As a result, the current iL has a waveform having a peak value ip1 and a peak value ip2. When the resistance value of the resistor RS1 is RS1 and the resistance value of the resistor RS2 is RS2, the following expressions (1) and (2) are satisfied.
ip1 = V1 / RS1 (1)
ip2 = V2 / RS2 (2)

Further, the ripple ΔiL of the current iL satisfies the formula (3).
ΔiL = ip1−ip2 (3)

Further, the average value Io of the load current Iout satisfies the formula (4).
Io = 1/2 · ip1 ² / ΔiL · Vin / (Vin + Vout) (4)

  Therefore, when the upper limit current command value V1 and the lower limit current command value V2 are predetermined values, the peak value ip1 is a predetermined value that satisfies the equation (1), and the peak value ip2 is a predetermined value that satisfies the equation (2). Thus, the ripple ΔiL of the current iL becomes a predetermined value that satisfies the expression (3), and the average value Io of the load current becomes a predetermined value that satisfies the expression (4).

  That is, the embodiment of FIG. 1 generates an average value Io of the load current based on the upper limit current command value V1 and the lower limit current command value V2, and acts as a current regulator.

  In addition, the other end of the inductor L becomes the common potential GND when the inductor L is excited, the one end of the inductor L becomes the common potential GND when the inductor L is reset, and the voltage generated in the inductor L changes positively and negatively.

  For this reason, if the value of the input voltage Vin and the value of the output voltage Vout are respectively positive, the load current Iout is positive. That is, the embodiment of FIG. 1 is a step-up / step-down operation, and can be operated in both cases of step-up and step-down.

  Thus, a predetermined load current Iout is generated from the input voltage Vin by turning on and off the switching elements SW1, SW2, SW3, and SW4.

  Furthermore, since the embodiment of FIG. 1 has a smaller number of parts compared to Patent Document 1, it is small, low cost, and simple.

  Further, since the embodiment of FIG. 1 is peak current control, it has a favorable response characteristic at high speed. Furthermore, the embodiment of FIG. 1 essentially suppresses overcurrent of the switching elements SW1, SW2, SW3, SW4.

  The current of the inductor L in the embodiment of FIG. 1 is continuous, and the embodiment of FIG. 1 operates in a so-called inductor current continuous mode. And the inductor current continuous mode provides a favorable response.

  FIG. 3 is a block diagram showing another embodiment of the present invention. Elements that are the same as those in the embodiment of FIG.

  3 is characterized by the first switching element SW1, the diode D2 as the second switching element, the third switching element SW3, the diode D4 as the fourth switching element, the magnetic element L, and the resistor RS1. The comparator CP1, the timer TM, and the flip-flop F / F are provided.

  In the figure, the trigger input TE of the timer TM is connected to the control terminal (gate) of the first switching element SW1 and the non-inverted output Q of the flip-flop F / F. The trigger output TO of the timer TM is connected to the reset input R of the flip-flop F / F. Further, the timer TM is connected to the output voltage Vout.

The operation of the embodiment of FIG. 3 will be described.
In the operation state of the embodiment of FIG. 3, similarly to the operation state of the embodiment of FIG. 1, a period corresponding to the period t1 and a period corresponding to the period t2 are alternately repeated with a period T.

  First, the period corresponding to the period t1 of the embodiment of FIG. 3 is the same as the period t1 of the embodiment of FIG.

  Next, during the period corresponding to the period t2 in the embodiment of FIG. 3, the non-inverted output Q of the flip-flop F / F is high and the flip-flop F / F is the same as the period t2 of the embodiment in FIG. The inverted output XQ is low, the first switching element SW1 is off, the diode D2 is on, the third switching element SW3 is off, and the diode D4 is on. Furthermore, one end of the inductor L becomes the common potential GND.

  Further, the trigger input TE becomes high. Then, after a predetermined period (period t2) after the trigger input TE becomes high, the trigger output TO changes from low to high. Further, the reset input R of the flip-flop F / F becomes high, the non-inverted output Q of the flip-flop F / F changes from high to low, and the inverted output XQ of the flip-flop F / F changes from low to high. . In addition, the period t2 ends and transitions to a period corresponding to the period t1.

  Thus, the embodiment of FIG. 3 generates the average value Io of the load current based on the upper limit current command value V1 (current command value), and acts as a current regulator, similarly to the embodiment of FIG. In addition, the embodiment of FIG. 3 is a step-up / step-down operation, and can be operated in both cases of step-up and step-down. Furthermore, since the embodiment of FIG. 3 has a small number of parts, it is small, low cost, and simple.

In particular, in the embodiment of FIG. 3, when the time tbd from when the trigger input TE becomes high to when the trigger output TO changes from low to high satisfies Expression (5), in the embodiment of FIG. The operation waveform of each part is the same as in FIG. However, the inductance of the inductor L is L.
tbd = L · ΔiL / Vout (5)

  That is, when the trigger output TO of the timer TM has a delay (time tbd) based on the output voltage Vout of Equation (5), the operation of the embodiment of FIG. 3 is the same as the operation of the embodiment of FIG. Further, the time tbd decreases as the output voltage Vout increases.

  In the example of FIG. 3, the current of the inductor L may be discontinuous in the diode D2 and the diode D4 in the period corresponding to the period t2. That is, the embodiment of FIG. 3 can be operated in a so-called inductor current discontinuous mode. The inductor current discontinuous mode provides favorable burst operation characteristics at light load and no load. A detailed description of the inductor current discontinuous mode is omitted because it is a trivial matter.

  FIG. 4 is a block diagram showing another embodiment of the present invention. Elements identical to those of the embodiment of FIG. 1 and the embodiment of FIG.

  The feature of the invention of FIG. 4 is that a smoothing capacitor Co and an error amplifier EA are provided. 3 is a part of the voltage regulator of the embodiment of FIG.

  In FIG. 4, the smoothing capacitor Co is connected in parallel to the output voltage Vout. Furthermore, the series circuit of the resistor R1 and the resistor R2 is connected in parallel to the output voltage Vout.

  Further, the non-inverting input of the error amplifier EA is connected to the reference voltage Vref. The inverting input of the error amplifier EA is connected to the connection point between the resistor R1 and the resistor R2. Further, the output of the error amplifier EA is connected to the inverting input (upper limit current command value V1) of the first comparator CP1.

The operation of the embodiment of FIG. 4 will be described.
When the voltage Vout is larger than a predetermined voltage, the voltage Vout · R2 / (R1 + R2) of the inverting input of the error amplifier EA becomes larger than the reference voltage Vref, the output of the error amplifier EA decreases, and the upper limit current command value V1 Decreases, the inverting input of the first comparator CP1 decreases, the voltage VS1 decreases, the current iL decreases, that is, the ON period (period t1) of the first switching element SW1 and the third switching element SW3 is small. Thus, the output voltage Vout decreases.

  Further, when the voltage Vout is smaller than a predetermined voltage, the voltage Vout · R2 / (R1 + R2) at the inverting input of the error amplifier EA becomes smaller than the reference voltage Vref, the output of the error amplifier EA increases, and the upper limit current command The value V1 rises, the inverting input of the first comparator CP1 rises, the voltage VS1 rises, and the current iL rises, that is, the first switching element SW1 and the third switching element SW3 are on (period t1). Increases and the output voltage Vout increases.

  That is, the error amplifier EA amplifies the difference between the output voltage Vout and the reference voltage Vref and outputs the upper limit current command value V1. Further, the smoothing capacitor Co smoothes the output voltage Vout.

  Thus, the embodiment of FIG. 4 generates a predetermined output voltage Vout from the input voltage Vin by turning on and off the switching elements SW1 and SW3. Further, the embodiment of FIG. 4 is a step-up / step-down operation similar to the embodiment of FIG. 1 and the embodiment of FIG. 3, and can be operated in both cases of step-up and step-down. The embodiment of FIG. 4 is small, low cost, and simple, similar to the embodiment of FIG. 1 and the embodiment of FIG.

  Further, since the embodiment of FIG. 4 is the peak current control, similarly to the embodiment of FIG. 1 and the embodiment of FIG. 3, it has a favorable response characteristic at high speed. In the embodiment of FIG. 4, the response time is short, and the fluctuation of the output voltage Vout accompanying the fluctuation of the load Load is small.

  Furthermore, the embodiment of FIG. 4 essentially suppresses the overcurrent of the switching elements SW1, SW2, SW3, SW4 and essentially suppresses the inrush current of the smoothing capacitor Co.

  4 includes the smoothing capacitor Co, the error amplifier EA, the resistor R1, and the resistor R2 in the embodiment of FIG. 3, but separately from this, the embodiment of FIG. 1 may include a smoothing capacitor Co, an error amplifier EA, and a resistor R1 and a resistor R2 (not shown). The same action and effect are obtained.

  Furthermore, in the above-described example, the resistor RS1 is arranged between the common potential GND and one end (source) of the third switching element SW3. Separately, the resistor RS1 is connected to the input voltage Vin and the first voltage. Even if it is arranged between one end (source) of the switching element SW1, the same operation and effect can be obtained.

  In the above example, the current detecting means is formed by the external resistor RS1 and the resistor RS2. However, separately from this, the current detecting means may be formed by the on-resistance inside the switching element. The effects and effects of can be obtained.

  Furthermore, in the above-described example, the switching element is formed of a MOSFET. However, the same operation and effect can be obtained even if the switching element is formed of a semiconductor element other than the MOSFET. .

  As described above, the present invention is not limited to the above-described embodiments, and includes many changes and modifications without departing from the essence thereof.

It is a block diagram which shows one Example of this invention. It is an operation | movement waveform of each part in the Example of FIG. It is a block diagram which shows the other Example of this invention. It is a block diagram which shows the other Example of this invention.

Explanation of symbols

SW1 First switching element SW2 Second switching element SW3 Third switching element SW4 Fourth switching element D2 Diode (second switching element)
D4 diode (fourth switching element)
L Inductor (magnetic element)
RS1 resistance (first current detection means)
RS2 resistance (second current detection means)
CP1 1st comparator CP2 2nd comparator G1 AND gate F / F flip-flop TM timer Load Load Vin input voltage Vout Output voltage Iout Load current GND Common potential

Claims (6)

In the buck-boost current regulator that generates a predetermined load current from the input voltage by turning on and off the switching element,
A first switching element for connecting the input voltage to one end;
A common potential connected to one end, a second switching element connected to the other end of the first switching element, and a second switching element that is complementarily turned on and off with the first switching element;
A third switching element for connecting the common potential to one end;
A load to which the load current is applied is connected to one end, the other end of the third switching element is connected to the other end, and a fourth switching element that is complementarily turned on and off with the third switching element;
A magnetic element connecting one end of the connection point of the first switching element and the second switching element and connecting the other end of the connection point of the third switching element and the fourth switching element;
First current detection means for detecting a current of the first switching element or the third switching element;
Second current detection means for detecting a current of the second switching element or the fourth switching element;
A first comparator for comparing the output of the first current detection means and an upper limit current command value;
A second comparator for comparing the output of the second current detection means and a lower limit current command value;
A control circuit that turns off the first switching element and the third switching element based on the output of the first comparator, and that turns on the first switching element and the third switching element, respectively, based on the output of the second comparator; A step-up / step-down current regulator comprising: In the buck-boost current regulator that generates a predetermined load current from the input voltage by turning on and off the switching element,
A first switching element connected to the input voltage at one end;
A common potential connected to one end, a second switching element connected to the other end of the first switching element, and a second switching element that is complementarily turned on and off with the first switching element;
A third switching element for connecting the common potential to one end;
A load to which the load current is applied is connected to one end, the other end of the third switching element is connected to the other end, and a fourth switching element that is complementarily turned on and off with the third switching element;
A magnetic element connecting one end of the connection point of the first switching element and the second switching element and connecting the other end of the connection point of the third switching element and the fourth switching element;
Current detecting means for detecting a current of the magnetic element;
A comparator for comparing the output of the current detection means and a current command value;
A timer for connecting a driving signal of the first switching element or a driving signal of the third switching element to a trigger input and generating a trigger output having a predetermined delay;
A flip-flop for connecting the output of the comparator to a set input, connecting the trigger output to a reset input, and generating a drive signal for the first switching element and a drive signal for the third switching element; A buck-boost current regulator. In a buck-boost voltage regulator that generates a predetermined output voltage from an input voltage by turning on and off the switching element,
A first switching element for connecting the input voltage to one end;
A common potential connected to one end, a second switching element connected to the other end of the first switching element, and a second switching element that is complementarily turned on and off with the first switching element;
A third switching element for connecting the common potential to one end;
A fourth switching element connected at one end to the output voltage, connected at the other end to the other end of the third switching element, and complementarily turned on and off with the third switching element;
A magnetic element connecting one end of the connection point of the first switching element and the second switching element and connecting the other end of the connection point of the third switching element and the fourth switching element;
First current detection means for detecting a current of the first switching element or the third switching element;
Second current detection means for detecting a current of the second switching element or the fourth switching element;
A first comparator for comparing the output of the first current detection means and an upper limit current command value;
A second comparator for comparing the output of the second current detection means and a lower limit current command value;
A control circuit that turns off the first switching element and the third switching element based on the output of the first comparator, and that turns on the first switching element and the third switching element, respectively, based on the output of the second comparator; ,
A smoothing capacitor for smoothing the output voltage;
A buck-boost voltage regulator comprising: an error amplifier that amplifies a difference between the output voltage and a reference voltage and outputs the upper limit current command value. In a buck-boost voltage regulator that generates a predetermined output voltage from an input voltage by turning on and off the switching element,
A first switching element connected to the input voltage at one end;
A common potential connected to one end, a second switching element connected to the other end of the first switching element, and a second switching element that is complementarily turned on and off with the first switching element;
A third switching element for connecting the common potential to one end;
A fourth switching element connected at one end to the output voltage, connected at the other end to the other end of the third switching element, and complementarily turned on and off with the third switching element;
A magnetic element connecting one end of the connection point of the first switching element and the second switching element and connecting the other end of the connection point of the third switching element and the fourth switching element;
Current detecting means for detecting a current of the magnetic element;
A comparator for comparing the output of the current detection means and a current command value;
A timer for connecting a driving signal of the first switching element or a driving signal of the third switching element to a trigger input and generating a trigger output having a predetermined delay;
A flip-flop for connecting the output of the comparator to a set input, connecting the trigger output to a reset input, and generating a drive signal for the first switching element and a drive signal for the third switching element;
A smoothing capacitor for smoothing the output voltage;
A buck-boost voltage regulator comprising: an error amplifier that amplifies a difference between the output voltage and a reference voltage and outputs the current command value. An AND gate connecting the drive signal of the first switching element and the output of the second comparator to an input;
A flip-flop for connecting the output of the first comparator to a set input, connecting the output of the AND gate to a reset input, and generating a drive signal for the first switching element and a drive signal for the third switching element; The step-up / step-down voltage regulator according to claim 1, or the step-up / step-down voltage regulator according to claim 3. 6. The buck-boost current regulator or the buck-boost voltage regulator according to claim 1, further comprising the second switching element and the fourth switching element formed by a diode.

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