JP2005229760A - Inverter controller and inverter controlling method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stably and accurately implement an A/D conversion of a motor current of each phase for one period of a triangular waveform carrier. <P>SOLUTION: The triangular waveform carriers Cu, Cv, Cw corresponding to each phase are generated so as to have a predetermined phase difference between each other. A PWM signal for driving a switching element is generated by comparing the triangular waveform carriers Cu, Cv, Cw with an instruction voltage value of each phase. Interrupt signals INT2U, INT2V, INT2W are generated at the timing of bottoms of the triangular waveform carriers Cu, Cv, Cw. The A/D conversion of the motor current of each phase detected by shunts ST1-ST3, is initiated on the basis of the timing of each interrupt signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an inverter control device and an inverter control method used for PWM (Pulse Width Modulation) control of a three-phase AC motor.

  FIG. 8 shows a control device for a general three-phase AC motor by PWM control. In the figure, B is a battery, and power is supplied from the battery B to the motor M via the contactor Z and the inverter circuit 100. The motor M is, for example, a three-phase induction motor (induction motor) mounted on a forklift. The contactor Z is composed of contacts of an electromagnetic contactor. In the figure, C is a capacitor connected between the power supply lines, and ST is a shunt for detecting the current flowing through the motor M. The shunt ST is composed of a resistor. PG is a pulse generator for detecting the number of rotations of the motor M, and is composed of a known rotary encoder provided on the rotation shaft of the motor M.

  The inverter circuit 100 is a circuit for driving the motor M by converting the direct current power source of the battery B into an alternating current power source. The U phase, the U phase, the V phase, the V phase, the W phase, This is a known circuit composed of six semiconductor switching elements Q1 to Q6 under the phase. As the semiconductor switching element, an element capable of high-speed switching operation such as a MOS type FET (field effect transistor) or IGBT (insulated gate bipolar transistor) is used, and a diode is connected in parallel to each element. The PWM signal from the control unit 101 is input to the gates of the semiconductor switching elements Q1 to Q6. With this PWM signal, each of the semiconductor switching elements Q1 to Q6 performs an opening / closing operation with a predetermined on time and off time. As a result, the output of the inverter circuit 100 is taken out as a three-phase alternating current, and a U-phase voltage, a V-phase voltage, A W-phase voltage is supplied to the motor M.

  The control unit 101 includes a CPU, a memory, an A / D converter, a carrier generation circuit, a PWM circuit, and the like. For example, an instruction value such as a motor speed based on a lever operation of a forklift, a pulse output from the pulse generator PG, a current value detected by the shunt ST, a voltage value of the battery B, and the like are input to the control unit 101. The control unit 101 generates a PWM signal necessary for controlling the motor M based on these input values and outputs the PWM signal to the inverter circuit 100. A motor control device using PWM control as described above is described in, for example, Patent Document 1 described later.

  FIG. 9 is a diagram illustrating a configuration of a PWM signal generation unit provided in the control unit 101. Reference numeral 200 denotes a carrier generating unit that generates the carrier Ca, 207 denotes a comparator that compares the carrier Ca and the value of the U-phase command voltage, 208 denotes a comparator that compares the value of the carrier Ca and the value of the V-phase command voltage, and 209 denotes a carrier. A comparator 210 that compares Ca and the value of the W-phase command voltage is a PWM circuit that generates a PWM signal based on the outputs of the comparators 207 to 209. Pulses applied from the PWM circuit 210 to the gates of the switching elements Q1 to Q6 on the U phase, the U phase, the V phase, the V phase, the W phase, and the W phase in the inverter circuit 100 of FIG. Output as a PWM signal.

  FIG. 10 is a diagram for explaining the principle of generating a PWM signal. As shown in the figure, the carrier Ca is a triangular wave having a constant frequency, and the command voltage value of each phase and the amplitude of the carrier Ca are compared by the comparators 207 to 209. The outputs of the comparators 207 to 209 are “H” in the section where the amplitude of the carrier Ca is equal to or greater than the command voltage value, and the outputs of the comparators 207 to 209 are displayed in the section where the amplitude of the carrier Ca is less than the command voltage value. Becomes “L”. Therefore, the comparators 207 to 209 obtain a signal whose pulse width changes according to the change of the command voltage value. This signal is input to the PWM circuit 210. The PWM circuit 210, based on the outputs of the comparators 207 to 209, has six types of PWM signals for driving the switching elements Q1 to Q6 above and below each phase as shown in FIG. Is generated. As can be seen from FIG. 10, in the interval where the amplitude of the carrier Ca is equal to or greater than the command voltage value of each phase, the upper switching element of each phase is turned on and the lower switching element is turned off. On the other hand, in a section where the amplitude of the carrier Ca is less than the command voltage value, the lower switching element of each phase is turned on and the upper switching element is turned off.

  Here, if the timing when one of the pair of upper and lower switching elements in each phase is turned on and the timing when the other is turned off at the same time, the upper and lower switching elements may form a short circuit, causing a large current to flow and the elements to be destroyed. There is. Therefore, in practice, the PWM circuit 210 performs a process of giving a certain time difference (dead time) between one on timing and the other off timing of the pair of upper and lower switching elements.

  However, in the method of generating a PWM signal using the single carrier Ca as described above, when the motor voltage is around 0 V, that is, when the pulse duty ratio of the PWM signal of each phase is around 50:50, As shown in FIG. 11, the sections of the dead time Td of each phase all overlap at the same position. In this section, the inverter circuit 100 becomes inoperative and the motor voltage that should be output is not output. Problems arise.

  Therefore, in order to solve this problem, as shown in FIG. 12, an independent carrier is used for each phase, the phase between the carriers is varied by 120 °, and the command voltage value of each phase is changed to the corresponding phase. A method of obtaining a PWM signal by comparing with a carrier is proposed in Patent Document 2 described later. In this case, as shown in FIG. 14, carrier generation units 201 to 203 are provided for each of the U phase, the V phase, and the W phase to generate the U phase carrier Cu, the V phase carrier Cv, and the W phase carrier Cw. Let According to this, as shown in FIG. 13, even if the pulse duty ratio of the PWM signal of each phase is around 50:50, the interval of the dead time Td of each phase according to the carrier phase shift Therefore, even when the motor voltage is around 0V, the inverter circuit 100 can operate to obtain a predetermined voltage.

JP 2003-164190 A (paragraphs 0019 to 0020, FIG. 1) Japanese Patent Laying-Open No. 2002-27763 (paragraphs 0050 to 0065, FIG. 13)

  FIG. 8 shows a one-shunt inverter control device that detects a current flowing through the motor M by using one shunt ST. In such an inverter control device, since feedback control is performed on the motor M based on the motor current detected by the shunt ST, the current of each phase detected by the shunt ST is A / D converted with high accuracy. However, it is required for controlling the motor M with high accuracy. For this purpose, it is necessary to stably detect the current of each phase and perform the A / D conversion process in one period of the triangular wave carrier. In the case of the single shunt method, since the motor current of each phase is detected in a time-sharing manner with one shunt, it is necessary to appropriately select the A / D conversion timing for the motor current of each phase. . Here, considering the case where an interrupt signal is generated at each rising edge of the PWM signal from which each switching element is turned on, the motor current A / D conversion is started at the timing of this interrupt signal. When the triangular wave carrier is used, the timing of the interrupt signal approaches between each phase, and the processing time of A / D conversion is shortened. For this reason, for example, there is a possibility that A / D conversion may be performed in an unstable state where the switching element is not completely turned on, and the accuracy of the motor current value after A / D conversion is reduced. is there.

  On the other hand, when a multiphase triangular wave carrier is used, the interval between the interrupt signals can be increased because the phases of the carriers are shifted. As a result, there is a margin in the A / D conversion processing time compared to the case of a single triangular wave carrier, but the interval of each interrupt signal in one cycle section of the carrier is not constant, and the command voltage value of each phase Fluctuates with time. Therefore, the time that can be spent for the A / D conversion processing of each phase motor current is also indefinite, and sufficient time for A / D conversion is not guaranteed uniformly for the motor currents of all phases. . For this reason, the motor current value that is A / D converted in a section where the interval of the interrupt signal is short is low in reliability, and when the feedback control of the motor is performed using this, the accuracy of the motor control is lowered. There is. The above Patent Documents 1 and 2 do not disclose the above problems and solving means.

  Therefore, an object of the present invention is to enable stable A / D conversion of motor current of each phase in one period section of a triangular wave carrier.

  In the inverter control device according to the present invention, a series body of a pair of switching elements corresponding to each phase of a multiphase AC motor is provided in parallel, and the motor is driven from a connection point between the switching elements in each series body. An inverter circuit from which each phase voltage is taken out, a current detection means that is connected in series to each of the series bodies and detects the current flowing through the motor for each phase, and a PWM signal based on the command value of each phase And a control unit that outputs and controls the on / off operation of each switching element of the inverter circuit, wherein the control unit determines the motor current for each phase detected by each of the current detection means as A A / D converter that performs A / D conversion, a control unit that controls the operation of the A / D converter, and a triangular wave carrier corresponding to each phase is provided with a predetermined phase difference between the phases. Comprising a carrier generating portion for generating, based on a comparison between a command value of the triangular wave carrier and each phase of each phase outputted from the carrier generating region, and a signal generating means for generating a PWM signal for each switching element. The carrier generating unit generates an interrupt signal for the control means at the timing of the peak or valley of the triangular wave carrier of each phase, and the control means sends an A / D converter to the A / D converter based on each interrupt signal. On the other hand, A / D conversion of the motor current of the phase corresponding to the interrupt signal is started.

  In the present invention, current detection means is provided for each phase, and the motor current of each phase is detected independently by each current detection means. In addition, a multiphase triangular wave carrier having a phase shift is used as a carrier, and an interrupt signal is generated at the timing of the peak or valley of each phase carrier. Then, at the timing of this interrupt signal, A / D conversion of the motor current of the phase corresponding to each interrupt signal is started. For this reason, if the frequency of the triangular wave carrier is kept constant, each interrupt signal is generated at a constant time interval determined by the carrier period, and as a result, the A / D conversion processing of each phase is always performed at a fixed timing. It will be. Therefore, it is possible to ensure a relatively long time for A / D conversion in accordance with the carrier cycle. In addition, the timing of the peak or valley of the carrier is not the timing when the switching element of each phase is turned on from off, but is the timing when a predetermined time has elapsed since the element was turned on. The motor currents of the respective phases detected in (1) are in a stable state. Accordingly, the A / D converted motor current value is highly reliable, and as a result, the motor can be controlled with high accuracy. Furthermore, since A / D conversion requires a certain time, if the interval between interrupt signals is short, it cannot be handled by only one A / D converter, and a plurality of A / D converters are required. Since the interval between interrupt signals can be increased, it is possible to cope with only one A / D converter.

  In the embodiment of the present invention, the PWM signal is composed of an ON interval signal having a variable time width for maintaining the switching element in the ON state and an OFF interval signal having a variable time width for maintaining the switching element in the OFF state, The generation unit generates an interrupt signal at substantially the intermediate timing of the time width of the ON section signal that maintains one switching element in the serial body of each phase in the ON state. At this intermediate timing, the motor current of the phase corresponding to each interrupt signal flowing through the current detection means is in the most stable state, so that the reliability of the A / D converted motor current value is higher. Become.

  In the embodiment of the present invention, a time width of an on-section signal that maintains one switching element in the series body of each phase in an on state is obtained, and when this time width is equal to or larger than a certain value, the time width is generated within the time. The value of the motor current A / D converted based on the interrupt signal is validated, and when the time width is less than a certain value, A / D conversion is performed based on the interrupt signal generated within the time Invalidated motor current value. If the time for which the switching element is kept on is too short, the data value obtained by the A / D conversion during that time has low reliability. Therefore, the reliability of data can be improved by making the A / D conversion value valid only when the time width is equal to or greater than a certain value. When the motor current value is invalidated, the data obtained by A / D conversion is discarded.

  In the embodiment of the present invention, a time width of an on-section signal that maintains one switching element in the series body of each phase in an on state is obtained, and when this time width is equal to or larger than a certain value, the time width is generated within the time. The A / D converter is caused to perform A / D conversion based on an interrupt signal, and when the time width is less than a certain value, A / D conversion within the time is prohibited. In this case, it is not necessary to perform useless A / D conversion by obtaining the time width in advance by calculation or the like prior to A / D conversion.

  In the embodiment of the present invention, one of the triangular wave carriers is set as a reference triangular wave carrier, and A / D conversion is performed on the motor currents of all phases detected by each of the current detection means in one period section of the reference triangular wave carrier. Causes the device to perform A / D conversion. Thereby, data can be collected for any phase current, and the detection accuracy of the motor current can be further improved.

  In the embodiment of the present invention, the motor is a three-phase AC motor, and the control means uses one of the triangular wave carriers as a reference triangular wave carrier, and each of the current detection means detects in one period section of the reference triangular wave carrier. The A / D converter is caused to perform A / D conversion for at least two phases of motor currents. In one carrier period, the PWM signal may not be output at all for a certain phase due to the temporal change of the command value. In this case, A / D conversion of the motor current of the phase becomes impossible. However, in the present invention, since a triangular wave carrier having a phase shift is used, at least two phases in one period section of the reference triangular wave carrier are used. Obtaining motor current is guaranteed. If two-phase motor current values can be detected, the other one-phase motor current values can be automatically obtained by summing them. In this case, a value obtained by reversing the sign of the total value of the two-phase current subjected to A / D conversion is set as the remaining one-phase motor current value.

  In the embodiment of the present invention, the motor current detected by the current detection unit and the detection output from at least one other detection unit different from the current detection unit are input to the A / D converter, and the control is performed. The means causes the A / D converter to start A / D conversion of the motor current based on the interrupt signal generated at one timing of the peak or valley of the triangular wave carrier of each phase, and at the other timing. Based on the generated interrupt signal, the A / D converter starts A / D conversion of another detection output. According to this, it is possible to perform A / D conversion of the motor current and A / D conversion of the detection output other than the motor current by using the timing of both the peak and valley of the triangular wave carrier. As the detection output other than the motor current, for example, the voltage of the battery B can be considered.

  In the embodiment of the present invention, a carrier generation unit is provided for each phase, and each carrier generation unit includes a counting unit, first and second detection units, and a command unit. The counting means counts the clock, and adds or subtracts the count value to output a triangular wave carrier. The first detecting means detects that the count value of the counting means has reached a predetermined upper limit value, and generates a first interrupt signal corresponding to the peak portion of the triangular wave carrier when the upper limit value is reached. To do. The second detecting means detects that the count value of the counting means has reached a predetermined lower limit value, and generates a second interrupt signal corresponding to the valley of the triangular wave carrier when the lower limit value is reached. To do. The command means gives a subtraction instruction for performing a cumulative subtraction to the counting means based on the detection output of the first detection means, and an addition for performing a cumulative addition to the counting means based on the detection output of the second detection means. Give a directive. Then, the counting means for one phase outputs a triangular wave carrier having a predetermined phase difference with respect to the triangular wave carrier output from the counting means for the other phase. By using such a carrier generator, it is possible to easily obtain a multi-phase triangular wave carrier having an accurate waveform and phase difference corresponding to the count value by simply performing digital addition / subtraction with an up / down counter or the like. In addition, it is possible to easily generate an interrupt signal at the peak or valley of the triangular wave carrier.

  The inverter control method according to the present invention is a control method in the above-described inverter device, and generates triangular wave carriers corresponding to each phase with a predetermined phase difference between the phases, and the triangular wave carriers and the respective phases are generated. The PWM signal is generated based on the comparison with the command value of each, and an interrupt signal is generated at the timing of the peak or valley of each triangular wave carrier. Based on these interrupt signals, the current detection means A / D conversion of the motor current of the phase corresponding to the detected interrupt signal is started. In this way, interrupt signals are generated at the peaks or valleys of the multiphase triangular wave carrier, and A / D conversion of the motor current is started based on these interrupt signals. Can be made relatively long according to the carrier cycle, and the A / D conversion can be performed in a stable state of the motor current of each phase, so that the accuracy of the A / D conversion is improved and the motor can be controlled with high accuracy. It becomes possible.

  According to the present invention, an interrupt signal for A / D conversion is always generated at a constant timing, and the A / D conversion time can be ensured relatively long. Since A / D conversion can be performed in a stable state, the accuracy of A / D conversion is improved and high-precision motor control can be performed. In addition, since the interval between the interrupt signals can be increased, it is possible to cope with only one A / D converter.

  FIG. 1 shows an example of an inverter control device according to the present invention. B is a battery, and power is supplied from the battery B to the motor M via the contactor Z and the inverter circuit 100. The motor M is, for example, a three-phase induction motor (induction motor) mounted on a forklift. The contactor Z is composed of contacts of an electromagnetic contactor. C is a capacitor connected between the power supply lines, and ST1 to ST3 are shunts for detecting the current flowing through the motor M for each phase (U phase, V phase, W phase). The shunts ST1 to ST3 are composed of resistors and correspond to current detection means in the present invention. PG is a pulse generator for detecting the number of rotations of the motor M, and is composed of a known rotary encoder provided on the rotation shaft of the motor M.

  The inverter circuit 100 is a circuit for driving the motor M by converting the direct current power source of the battery B into an alternating current power source. The U phase, the U phase, the V phase, the V phase, the W phase, This is a known circuit composed of six semiconductor switching elements Q1 to Q6 under the phase. A shunt ST1 is connected in series to the series body of switching elements Q1, Q2 corresponding to the U phase, and a shunt ST2 is connected in series to the series body of switching elements Q3, Q4 corresponding to the V phase. A shunt ST3 is connected in series to a series body of switching elements Q5 and Q6 corresponding to the W phase, and each of these series circuits is connected in parallel between the power supply lines. And each phase voltage for driving the motor M is each taken out from the connection point of the switching elements in each series body. As the semiconductor switching elements Q1 to Q6, for example, elements capable of high-speed switching operation such as MOS type FET (field effect transistor) and IGBT (insulated gate bipolar transistor) are used, and diodes are connected in parallel to each element. Is done. The PWM signal from the control unit 101 is input to the gates of the semiconductor switching elements Q1 to Q6. With this PWM signal, each of the semiconductor switching elements Q1 to Q6 performs an opening / closing operation with a predetermined on time and off time. As a result, the output of the inverter circuit 100 is taken out as a three-phase alternating current, and the U phase as shown in FIG. A voltage, a V-phase voltage, and a W-phase voltage are supplied to the motor M. Further, each phase current flowing through the motor M has a phase shifted by a predetermined amount with respect to each phase voltage in FIG.

  The control unit 101 includes an A / D converter 102, a CPU 103, a memory 104, a clock generator 105, a carrier generation unit 106, a comparator 107, a PWM circuit 108, and an interrupt controller 109. The CPU 103 corresponds to control means in the present invention, and the comparator 107 and the PWM circuit 108 correspond to signal generation means in the present invention.

  The CPU 103 receives, for example, an instruction value such as a motor speed based on a lever operation of a forklift, a pulse output from the pulse generator PG, a current value detected by each of the shunts ST1 to ST3, a voltage value of the battery B, and the like. The The current values of the shunts ST1 to ST3 and the voltage value of the battery B are converted into digital values by the A / D converter 102 and then input to the CPU 103. The CPU 103 executes processing necessary for controlling the motor M based on these input values. The memory 104 is composed of a RAM and a ROM, and the CPU 103 reads various information necessary for processing from the memory 104 and writes information to the memory 104.

  The clock generator 105 generates a clock having a predetermined frequency by the built-in oscillation circuit and outputs it to the carrier generator 106. The clock generator 105 does not receive a signal from the CPU 103 and starts operating as soon as power is turned on. The carrier generation unit 106 generates a triangular wave carrier for each phase based on counting the clocks input from the clock generator 105. The carrier generation unit 106 includes three carrier generation units, a U-phase carrier generation unit 10, a V-phase carrier generation unit 20, and a W-phase carrier generation unit 30 shown in FIG. The comparator 107 compares the command voltage of each phase given from the CPU 103 with the triangular wave carrier of each phase from the carrier generation unit 106, and outputs the comparison result as a pulse. The comparator 107 includes three comparators 16, 26 and 36 for each phase shown in FIG.

  Based on the output from the comparator 107, the PWM circuit 108 outputs six types of pulses having on / off intervals corresponding to changes in the command voltage value of each phase as PWM signals for each switching element. This PWM signal is applied to the gates of the switching elements Q1 to Q6 on the U phase, the U phase, the V phase, the V phase, the W phase, and the W phase in the inverter circuit 100. The switching elements Q <b> 1 to Q <b> 6 are turned on / off by the PWM signal, whereby the U-phase, V-phase, and W-phase voltages are output from the inverter circuit 100 and applied to the motor M.

  The carrier generation unit 106 generates an interrupt signal at the peak and valley timings of the triangular wave carrier of each phase and sends it to the interrupt controller 109. The interrupt controller 109 receives an interrupt signal from the carrier generation unit 106 and interrupts the CPU 103. When the CPU 103 receives this interrupt, the A / D converter 102 performs A / D conversion. Is given. As a result, the A / D converter 102, as will be described later, at the timing of the trough interrupt signal, the A / D of the motor current of the phase corresponding to the interrupt signal detected by any of the shunts ST1 to ST3. D conversion is started, and A / D conversion of the voltage of the battery B is started at the timing of the interrupt signal at the peak portion.

  FIG. 2 is a detailed configuration diagram of the carrier generation unit 106 and the comparator 107 of FIG. As described above, the carrier generation unit 106 includes the U-phase carrier generation unit 10, the V-phase carrier generation unit 20, and the W-phase carrier generation unit 30. The U-phase carrier generation unit 10 generates a U-phase carrier Cu that is a reference triangular wave carrier. The V-phase carrier generator 20 generates a V-phase carrier Cv that is 120 ° out of phase with the U-phase carrier Cu. The W-phase carrier generation unit 30 generates a W-phase carrier Cw that is further shifted by 120 ° from the V-phase carrier Cv. A method of generating carriers of each phase will be described in detail later.

  The comparator 107 includes comparators 16, 26 and 36 provided for each phase. The comparator 16 compares the value of the U-phase command voltage sent from the CPU 103 with the amplitude of the U-phase carrier Cu, and the “H” signal in a section where the amplitude of the U-phase carrier Cu is equal to or greater than the U-phase command voltage value. And an “L” signal is output in a section where the amplitude of the U-phase carrier Cu is less than the U-phase command voltage value. The comparator 26 compares the value of the V-phase command voltage sent from the CPU 103 with the amplitude of the V-phase carrier Cv, and the “H” signal in the section where the amplitude of the V-phase carrier Cv is equal to or greater than the V-phase command voltage value. And an “L” signal is output in a section where the amplitude of the V-phase carrier Cv is less than the V-phase command voltage value. The comparator 36 compares the value of the W-phase command voltage sent from the CPU 103 with the amplitude of the W-phase carrier Cw, and the “H” signal in the interval where the amplitude of the W-phase carrier Cw is equal to or greater than the W-phase command voltage value. And an “L” signal is output in a section where the amplitude of the W-phase carrier Cw is less than the W-phase command voltage value.

  In the U-phase carrier generation unit 10, reference numeral 12 denotes an up / down counter which receives a clock output from the clock generator 105 in FIG. 1 and a count start signal and count initial value signal sent from the CPU 103. . The up / down counter 12 starts counting a clock when a count start signal is given from the CPU 103, and increments (adds 1 every time a clock is input) or subtracts (every clock is input). 1 is subtracted to output a U-phase carrier Cu which is a triangular wave carrier. The up / down counter 12 is set with an initial count value, and this initial value is set by a count initial value signal from the CPU 103. A comparator 13 compares the count value of the up / down counter 12 with a predetermined upper limit value, detects that the count value has reached the upper limit value, and outputs a detection signal. 14 is also a comparator, which compares the count value of the up / down counter 12 with a predetermined lower limit value, detects that the count value has reached the lower limit value, and outputs a detection signal. A flip-flop 15 outputs an “L” signal to the up / down counter 12 by the output from the comparator 13, and outputs an “H” signal to the up / down counter 12 by the output from the comparator 14. To do. When the “H” signal is input from the flip-flop 15, the up / down counter 12 cumulatively adds the clock count value, and when the “L” signal is input, the up / down counter 12 cumulatively subtracts the clock count value. Therefore, the “H” signal from the flip-flop 15 is an addition command for performing cumulative addition, and the “L” signal is a subtraction command for performing cumulative subtraction. An initial command value signal is given to the flip-flop 15 from the CPU 103. Whether the initial state of the flip-flop 15 is “H” or “L” is set by the initial command value signal.

  In the V-phase carrier generation unit 20, reference numeral 22 denotes an up / down counter which receives a clock output from the clock generator 105 in FIG. 1 and a count start signal and count initial value signal sent from the CPU 103. . The up / down counter 22 starts counting the clock when a count start signal is given from the CPU 103, and outputs a V-phase carrier Cv that is a triangular wave carrier by cumulative addition or subtraction of the count value. The up / down counter 22 is set with an initial count value, and this initial value is set by a count initial value signal from the CPU 103. A comparator 23 compares the count value of the up / down counter 22 with a predetermined upper limit value, detects that the count value has reached the upper limit value, and outputs a detection signal. Reference numeral 24 also denotes a comparator, which compares the count value of the up / down counter 22 with a predetermined lower limit value, detects that the count value has reached the lower limit value, and outputs a detection signal. A flip-flop 25 outputs an “L” signal to the up / down counter 22 by the output from the comparator 23, and outputs an “H” signal to the up / down counter 22 by the output from the comparator 24. To do. When the “H” signal is input from the flip-flop 25, the up / down counter 22 cumulatively adds the clock count value, and when the “L” signal is input, the up / down counter 22 cumulatively subtracts the clock count value. Therefore, the “H” signal from the flip-flop 25 is an addition command for performing cumulative addition, and the “L” signal is a subtraction command for performing cumulative subtraction. An initial command value signal is given from the CPU 103 to the flip-flop 25. Whether the initial state of the flip-flop 25 is “H” or “L” is set by the initial command value signal.

  In the W-phase carrier generator 30, reference numeral 32 denotes an up / down counter which receives a clock output from the clock generator 105 in FIG. 1 and a count start signal and count initial value signal sent from the CPU 103. . The up / down counter 32 starts counting the clock when a count start signal is given from the CPU 103, and outputs a W-phase carrier Cw that is a triangular wave carrier by cumulative addition or subtraction of the count value. The up / down counter 32 is set with an initial count value, and this initial value is set by a count initial value signal from the CPU 103. A comparator 33 compares the count value of the up / down counter 32 with a predetermined upper limit value, detects that the count value has reached the upper limit value, and outputs a detection signal. Reference numeral 34 denotes a comparator which compares the count value of the up / down counter 32 with a predetermined lower limit value, detects that the count value has reached the lower limit value, and outputs a detection signal. A flip-flop 35 outputs an “L” signal to the up / down counter 32 by an output from the comparator 33, and outputs an “H” signal to the up / down counter 32 by an output from the comparator 34. To do. When the “H” signal is input from the flip-flop 35, the up / down counter 32 cumulatively adds the clock count value, and when the “L” signal is input, the up / down counter 32 cumulatively subtracts the clock count value. Therefore, the “H” signal from the flip-flop 35 is an addition command for performing cumulative addition, and the “L” signal is a subtraction command for performing cumulative subtraction. The flip-flop 35 is given an initial command value signal from the CPU 103. Whether the initial state of the flip-flop 35 is “H” or “L” is set by the initial command value signal.

  The up / down counters 12, 22, and 32 of each phase are simultaneously supplied with the above-described count start signal, and each up / down counter performs a count operation simultaneously from the initial value by inputting the count start signal. To start. Further, the detection outputs of the comparators 13, 23, and 33 of each phase, that is, the signals that have detected that the count value has reached the upper limit value are applied to the flip-flops 15, 25, and 35 at the same time as described above. Output signals INT1U, INT1V, and INT1W. As will be described later, these interrupt signals become peak interrupt signals at the peak portions of the triangular wave carriers of each phase. Further, the detection outputs of the comparators 14, 24, 34 of each phase, that is, the signals that have detected that the count value has reached the lower limit value are applied to the flip-flops 15, 25, 35 as described above, and at the same time, Are output as embedded signals INT2U, INT2V, and INT2W. As will be described later, these interrupt signals become valley interrupt signals at the valleys of the triangular wave carriers of each phase.

  In the above carrier generation device, the clock generator 105 corresponds to the clock generation means in the present invention, the up / down counters 12, 22, and 32 correspond to the counting means in the present invention, and the comparators 13, 23, and 33 correspond to the present invention. The comparators 14, 24 and 34 correspond to the second detection means in the present invention, and the flip-flops 15, 25 and 35 correspond to the command means in the present invention.

  Next, the principle of generating a triangular wave carrier for each phase will be described with reference to FIGS. In FIG. 2, when a count start signal is input from the CPU 103 to the up / down counter 12 of the U-phase carrier generation unit 10, the up / down counter 12 starts counting the clock from the clock generator 105. Here, as described above, an initial value is set in the up / down counter 12, and this initial value is set to zero. Therefore, the up / down counter 12 starts counting from zero. Further, the output of the flip-flop 15 that commands the addition / subtraction to the up / down counter 12 is set to “H” in the initial state. Therefore, when the up / down counter 12 starts counting, the count value is cumulatively added. As a result, the output of the up / down counter 12 increases from 0 as the lower limit value (initial value) toward the upper limit value T as shown by an arrow a1 as shown in FIG. When the count value reaches the upper limit value T, the comparator 13 detects this and provides a detection output to the flip-flop 15. The flip-flop 15 is inverted by this signal and outputs “L”. Therefore, the operation of the up / down counter 12 changes from cumulative addition to cumulative subtraction, and its output decreases with time from the upper limit value T toward the lower limit value 0 as shown by the arrow b1, as shown in FIG. Go. When the count value reaches the lower limit value 0, the comparator 14 detects this and gives a detection output to the flip-flop 15. The flip-flop 15 is inverted by this signal and outputs “H”. Accordingly, the operation of the up / down counter 12 is changed to cumulative addition again, and its output increases from the lower limit value 0 toward the upper limit value T as indicated by an arrow c1. By repeating such cumulative addition and subtraction operations, the up / down counter 12 outputs a triangular wave U-phase carrier Cu as shown in FIG. In this embodiment, this U-phase carrier Cu is a reference triangular wave carrier.

  The count start signal from the CPU 103 is also given to the up / down counter 22 of the V-phase carrier generator 20 at the same time. The up / down counter 22 starts counting the clock from the clock generator 105 when the count start signal is input. Here, as described above, an initial value is set in the up / down counter 22, and this initial value is set to a non-zero value α. Therefore, the up / down counter 22 starts counting from α. The output of the flip-flop 25 that commands the up / down counter 22 to perform cumulative addition and subtraction is set to “L” in the initial state. Therefore, when the up / down counter 22 starts counting, the count value is cumulatively subtracted. As a result, as shown in FIG. 3B, the output of the up / down counter 22 decreases from the initial value α toward the lower limit value 0 with time as indicated by an arrow a2. When the count value reaches the lower limit value 0, the comparator 24 detects this and provides a detection output to the flip-flop 25. The flip-flop 25 is inverted by this signal and outputs “H”. Therefore, the operation of the up / down counter 22 changes from cumulative subtraction to cumulative addition, and its output increases with time from the lower limit value 0 toward the upper limit value T as shown by an arrow b2 as shown in FIG. Go. When the count value reaches the upper limit value T, the comparator 23 detects this and provides a detection output to the flip-flop 25. The flip-flop 25 is inverted by this signal and outputs “L”. Therefore, the operation of the up / down counter 22 is changed to cumulative subtraction again, and its output decreases from the upper limit value T toward the lower limit value 0 as shown by an arrow c2. By repeating such cumulative subtraction and cumulative addition operations, the up / down counter 22 outputs a triangular wave V-phase carrier Cv as shown in FIG.

  The count start signal from the CPU 103 is also given to the up / down counter 32 of the W-phase carrier generating unit 30 at the same time. The up / down counter 32 starts counting the clock from the clock generator 105 when the count start signal is input. Here, as described above, an initial value is set in the up / down counter 32, and this initial value is set to a non-zero value β. Therefore, the up / down counter 32 starts counting from β. Here, the value of β is equal to the value of α. Further, the output of the flip-flop 35 that commands the addition / subtraction to the up / down counter 32 is set to “H” in the initial state. Accordingly, when the up / down counter 32 starts counting, the count value is cumulatively added. As a result, the output of the up / down counter 32 increases with time from the initial value β toward the upper limit T as indicated by an arrow a3, as shown in FIG. When the count value reaches the upper limit value T, the comparator 33 detects this and gives a detection output to the flip-flop 35. The flip-flop 35 is inverted by this signal and outputs “L”. Therefore, the operation of the up / down counter 32 changes from cumulative addition to cumulative subtraction, and its output decreases with time from the upper limit value T toward the lower limit value 0 as shown by an arrow b3 as shown in FIG. Go. When the count value reaches the lower limit value 0, the comparator 34 detects this and provides a detection output to the flip-flop 35. The flip-flop 35 is inverted by this signal and outputs “H”. Accordingly, the operation of the up / down counter 32 is changed to cumulative addition again, and its output increases from the lower limit value 0 toward the upper limit value T as indicated by an arrow c3. By repeating such cumulative addition and subtraction operations, the up / down counter 32 outputs a triangular wave W-phase carrier Cw as shown in FIG.

  In FIG. 3, the V-phase carrier Cv has a phase difference of 120 ° in the phase delay direction with respect to the U-phase carrier Cu which is the reference triangular wave carrier. Further, the W-phase carrier Cw has a phase difference of 120 ° in the phase delay direction with respect to the V-phase carrier Cv. Therefore, the W-phase carrier Cw has a phase difference of 240 ° in the phase delay direction with respect to the U-phase carrier Cu which is the reference triangular wave carrier. That is, the U-phase carrier Cu, the V-phase carrier Cv, and the W-phase carrier Cw are triangular waves that are out of phase by 120 °. FIG. 3D is a diagram in which carriers Cu, Cv, and Cw of each phase are overlaid.

FIG. 4 shows how to set the initial value of the up / down counter and the initial command value of the flip-flop when a predetermined phase difference (phase difference in the phase delay direction) is given to the reference triangular wave carrier. It is a table showing an example. In this table, it is assumed that the upper limit value of the up / down counter of each phase is the same value (T), and the lower limit value is also the same value (0). Further, the relationship between the phase difference, the ratio between the initial value and the upper limit value, and the initial command value when the initial value of the reference triangular wave carrier is 0 and the initial command value is “H” is shown. When the phase difference is between 0 ° and 180 °, the ratio m between the initial value and the upper limit value of the up / down counter is
m = phase difference / 180 °
Is required. When the phase difference is between 180 ° and 360 °, the ratio n between the initial value and the upper limit value of the up / down counter is
n = 2− [phase difference / 180 °]
Is required.

  When the three-phase triangular wave carriers are generated at equal intervals (120 °) as in the case of FIG. 3, the reference U-phase carrier Cu has a phase difference of 0 °. Set the initial value to 0. The initial command value of the flip-flop at this time is “H” (addition command). For the V-phase carrier Cv having a phase difference of 120 ° with respect to the U-phase carrier Cu, the initial value α may be set to 2/3 of the upper limit value T from FIG. The initial command value of the flip-flop at this time is “L” (subtraction command). For the W-phase carrier Cw having a phase difference of 240 ° with respect to the U-phase carrier Cu, the initial value β may be set to 2/3 of the upper limit value T from FIG. The initial command value of the flip-flop at this time is “H” (addition command).

In summary, the conditions for generating the reference U-phase carrier Cu, the V-phase carrier Cv delayed by 120 ° phase, and the W-phase carrier Cw delayed by 240 ° phase are as follows: It becomes like this.
(1) U-phase carrier Cu (reference triangular wave carrier)
Initial value of up / down counter = 0
Initial command value of flip-flop = “H”
(2) V-phase carrier Cv
Initial value of up / down counter α = 2T / 3
Initial command value of flip-flop = “L”
(3) W-phase carrier Cw
Initial value of up / down counter β = 2T / 3
Initial command value of flip-flop = “H”

  By using the carrier generator as described above, even if complex waveform processing is not required, the triangular wave carrier has an accurate waveform and phase difference corresponding to the count value by simply performing digital addition / subtraction using an up / down counter. Can be obtained. Moreover, the phase difference of the carriers Cu, Cv, Cw output from the up / down counters 12, 22, 32 can be arbitrarily set by appropriately selecting the initial value of each phase. As a result, a triangular wave carrier whose phase is shifted by 120 ° necessary for PWM control of the three-phase motor can be obtained easily and with high accuracy. Furthermore, it is possible to easily generate interrupt signals at the peaks and valleys of the carriers Cu, Cv, and Cw.

  In the above, a three-phase carrier generator that generates U-phase, V-phase, and W-phase carriers has been described as an example. However, in the present invention, the number of phases is not limited to only three. As many carrier generators as possible are provided, and the initial value of each up / down counter and the initial command value of the flip-flop can be set to any number of phases such as 2-phase, 4-phase, 5-phase, and 6-phase. It is possible to generate a corresponding carrier. As can be seen from FIG. 4, in the present invention, the carrier can have an arbitrary phase difference by selecting the initial value of the up / down counter. In the above examples, the phase differences are equally spaced, but the carrier phase differences may be unequal.

  Furthermore, in the above embodiment, the reference triangular wave carrier (U-phase carrier Cu) is generated from the valley (lower limit), but the reference triangular wave carrier may be generated from the peak (upper limit). In this case, the initial value of the reference triangular wave carrier is T (upper limit value), the initial command value is “L”, and the phase is shifted by 180 ° compared to the carrier generated from the valley. Therefore, when setting the other phase using FIG. 4, the contents may be read based on the phase difference of 180 °. For example, when the phase difference with respect to the reference triangular wave carrier is 90 ° (over 0 ° and 180 ° or less), the initial value T / 2 and the initial command value “when the phase difference is 270 ° (= 180 ° + 90 °)” It may be set to “H”. When the phase difference is 270 ° (over 180 ° and 360 ° or less), the initial value T / 2 and the initial command value “L” when the phase difference is 90 ° (= 180 ° + 270 ° -360 °). ".

  The triangular wave carriers Cu, Cv, Cw thus generated by the up / down counters 12, 22, 32 are supplied to the comparators 16, 26, 36, respectively. The comparator 16 compares the U-phase command voltage with the U-phase carrier Cu, the comparator 26 compares the V-phase command voltage with the V-phase carrier Cv, and the comparator 36 compares the W-phase command voltage with the W-phase carrier Cw. Compared with The outputs of the comparators 16, 26 and 36 are respectively input to the PWM circuit 108. The PWM circuit 108 is based on the comparison result between the carrier and the command voltage in the comparators 16, 26 and 36, and six types of PWM signals corresponding to the switching elements Q1 to Q6 in the manner described with reference to FIGS. 10 and 12. Is generated.

  FIG. 5 shows the peak interrupt signals INT1U, INT1V, INT1W output from the comparators 13, 23, 33 in FIG. 2, and the valley interrupt signals INT2U, INT2V, INT2W output from the comparators 14, 24, It is a time chart which showed generating timing. The switching elements Q1, Q3, Q5 on each phase are turned on in the sections where the amplitudes of the carriers Cu, Cv, Cw are equal to or larger than the command voltage values of the U phase, V phase, and W phase, respectively, and the carriers Cu, Cv, Cw The relationship in which the switching elements Q2, Q4, and Q6 under each phase are turned on in the sections where the amplitudes are less than the command voltages of the U phase, V phase, and W phase is the same as in the case of FIG. Each phase command voltage actually changes with time as shown in FIG. 12, but since the change of the command voltage is small when a section of several cycles of the carrier is captured, in FIG. The command voltage is drawn as a constant value.

  As shown in FIG. 5, the crest interrupt signal INT1U is generated at the timing of the crest (upper limit) of the U-phase carrier Cu, and the crest interrupt signal INT1V is generated at the timing of the crest of the V-phase carrier Cv. The peak interrupt signal INT1W is generated at the peak timing of the W-phase carrier Cw. The valley interrupt signal INT2U is generated at the timing of the valley (lower limit) of the U-phase carrier Cu, and the valley interrupt signal INT2V is generated at the timing of the valley of the V-phase carrier Cv. INT2W occurs at the timing of the valley of the W-phase carrier Cw.

  The interrupt signals INT1U to INT2W are given from the carrier generation unit 106 of FIG. 1 to the interrupt controller 109, and the interrupt controller 109 interrupts the CPU 103 at the timing of each interrupt signal. When the CPU 103 is interrupted at the timing of the valley interrupt signals INT2U, INT2V, and INT2W, the CPU 103 gives an A / D conversion command of the motor current to the A / D converter 102, and the A / D converter 102 In response to this command, A / D conversion of the motor current detected by the shunts ST1 to ST3 is started. Further, the CPU 103 gives an A / D conversion command of the battery voltage to the A / D converter 102 when an interrupt is generated at the timing of the peak interrupt signals INT1U, INT1V, INT1W, and the A / D converter In response to this command, the battery 102 starts A / D conversion of the voltage of the battery B.

  First, details of the A / D conversion of the motor current will be described. FIG. 5 shows the relationship between the interrupt signal and the shunt current (currents of the motor phases flowing in the shunts ST1 to ST3). A U-phase current of the motor M flows through the shunt ST1, a V-phase current flows through the shunt ST2, and a W-phase current flows through the shunt ST3. A thick arrow represents a period during which a current of each phase flows. The six types of PWM signals corresponding to the upper and lower switching elements of each phase have an ON interval signal having a variable time width for maintaining the switching element in the ON state and a variable time width for maintaining the switching element in the OFF state, respectively. And an off-section signal. The on-section signal is a signal in a section in which the PWM signal is in the “H” state (rising state), and the off-section signal is a signal in a section in which the PWM signal is in the “L” state (falling state).

  In FIG. 5, timing a is a timing at which the V-phase carrier Cv becomes a valley, and at this time, a valley interrupt signal INT2V is output from the comparator 24 (FIG. 2). When an interrupt is issued from the interrupt controller 109 to the CPU 103 based on this interrupt signal, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 starts A / D conversion of the motor current from this point. To start. As can be seen from FIG. 5, at the timing a, the PWM signals under the U phase, under the V phase, and over the W phase are in the “H” state, so in the inverter circuit 100, the switching elements Q2, Q4, Q5 are turned on. A current path indicated by a thick line at 6A is formed. The arrow indicates the direction of current. As a result, a U-phase current flows through shunt ST1, and a V-phase current flows through shunt ST2. Then, the A / D converter 102 performs A / D conversion on the V-phase current of the shunt ST2 (for the U-phase current, A / D conversion has already been performed at an earlier time point). ing). This A / D conversion process of the V-phase current is performed until the timing (b) when the U-phase carrier Cu reaches the peak.

  Next, timing b in FIG. 5 is timing when the W-phase carrier Cw becomes a trough, and at this time, a trough interrupt signal INT2W is output from the comparator 34 (FIG. 2). When an interrupt is issued from the interrupt controller 109 to the CPU 103 based on this interrupt signal, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 starts A / D conversion of the motor current from this point. To start. As can be seen from FIG. 5, at timing b, the PWM signals under the U phase, the V phase, and the W phase are in the “H” state, so in the inverter circuit 100, the switching elements Q2, Q3, and Q6 are turned on. A current path indicated by a thick line in 6B is formed. The arrow indicates the direction of current. As a result, a U-phase current flows through shunt ST1, and a W-phase current flows through shunt ST3. Then, A / D converter 102 performs A / D conversion on the W-phase current of shunt ST3 (A / D conversion is performed on U-phase current at a later timing c). This A / D conversion processing of the W-phase current is performed until the switching element Q6 is turned off (the time when the PWM signal under the W-phase falls).

  Next, timing c in FIG. 5 is timing when the U-phase carrier Cu becomes a valley, and at this time, the valley interrupt signal INT2U is output from the comparator 14 (FIG. 2). When an interrupt is issued from the interrupt controller 109 to the CPU 103 based on this interrupt signal, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 starts A / D conversion of the motor current from this point. To start. As can be seen from FIG. 5, at timing c, the PWM signals under the U phase, the V phase, and the W phase are in the “H” state, so that in the inverter circuit 100, the switching elements Q2, Q3, and Q5 are turned on. A current path indicated by a thick line at 6C is formed. The arrow indicates the direction of current. As a result, a U-phase current flows through the shunt ST1, and the A / D converter 102 performs A / D conversion on the U-phase current. This A / D conversion process is performed until the timing (d) when the W-phase carrier Cw reaches the peak.

  In the embodiment described above, the shunts ST1 to ST3 are provided for each phase, and the motor current of each phase is detected independently by each shunt. In addition, multi-phase triangular wave carriers Cu, Cv, and Cw whose phases are shifted by 120 ° are used as carriers, a valley interrupt signal is generated at the valley of each carrier, and the CPU 103 is interrupted at the timing of each valley interrupt signal. To perform A / D conversion of the motor current. The A / D converter 102 starts A / D conversion for the motor current of the phase corresponding to the interrupt signal at the timing of each valley interrupt signal. That is, at the timing of the U-phase valley interrupt signal INT2U, A / D conversion is performed on the U-phase current detected by the shunt ST1, and at the timing of the V-phase valley interrupt signal INT2V, the V-phase current detected by the shunt ST2 is detected. A / D conversion is performed, and at the timing of the W-phase valley interrupt signal INT2W, A / D conversion of the W-phase current detected by the shunt ST3 is performed.

  As a result, if the frequency of the triangular wave carrier is kept constant, the valley interrupt signals INT2U, INT2V, and INT2W are generated at a constant time interval determined by the carrier cycle, whereby the A / D conversion processing of each phase is performed. It is always performed at a fixed timing. Therefore, it is possible to ensure a relatively long time for A / D conversion in accordance with the carrier period. Further, the timing of the valley of each carrier is not the timing at which the switching elements Q1 to Q6 of each phase are turned on from off, but is the timing at which a predetermined time has elapsed since the elements are turned on. The motor current of each phase detected in ~ ST3 is in a stable state. Therefore, the A / D converted motor current value is highly reliable. Since the motor current value is used for feedback control of the motor M, the motor M can be controlled with high accuracy by increasing the accuracy of the motor current.

  Further, as can be seen from FIG. 5, the valley interrupt signal INT2U is generated at an intermediate timing c of the time width of the ON section signal (hatched line x) that maintains the switching element Q2 (under the U phase) in the ON state. The valley interrupt signal INT2V is generated at an intermediate timing a of the time width of the ON section signal (hatched line y) that maintains the switching element Q4 (under the V phase) in the ON state, and the valley interrupt signal INT2W It occurs at the intermediate timing b of the time width of the ON section signal (hatched line z) that maintains Q6 (below the W phase) in the ON state. At these intermediate timings, the PWM signals (under the U phase, under the V phase, and under the W phase) that drive the switching elements Q2, Q4, and Q6 are neither rising nor falling and are in a stable “H” state. . Therefore, at the timing of each valley interrupt signal, the motor current of the phase corresponding to each interrupt signal flowing through the shunts ST1 to ST3 is in the most stable state, and thus the A / D converted motor current value The reliability will be higher. Further, even when an element that has a low operating speed and requires a certain amount of time to be completely turned on is used as a switching element, A / D conversion can be performed without any problem.

  Next, A / D conversion of battery voltage will be described. In FIG. 5, the timing (A) is the timing at which the W-phase carrier Cw becomes a peak, and at this time, the peak interrupt signal INT1W is output from the comparator 33 (FIG. 2). Based on this interrupt signal, when an interrupt is issued from the interrupt controller 109 to the CPU 103, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 starts the voltage of the battery B (hereinafter referred to as the following). A / D conversion of “battery voltage” is started. This A / D conversion process is performed until timing a when the V-phase carrier Cv reaches the valley. When the timing a is reached, the above-described A / D conversion of the V-phase current is performed.

  Next, the timing (b) in FIG. 5 is the timing at which the U-phase carrier Cu reaches a peak, and at this time, the peak interrupt signal INT1U is output from the comparator 13 (FIG. 2). When an interrupt is issued from the interrupt controller 109 to the CPU 103 based on this interrupt signal, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 again starts the A / D of the battery voltage from this point. Start conversion. This A / D conversion process is performed until timing b when the W-phase carrier Cw reaches the valley. When the timing b is reached, the above-described A / D conversion of the W-phase current is performed.

  Next, the timing (c) in FIG. 5 is the timing at which the V-phase carrier Cv reaches a peak, and at this time, the peak interrupt signal INT1V is output from the comparator 23 (FIG. 2). When an interrupt is issued from the interrupt controller 109 to the CPU 103 based on this interrupt signal, a command is sent from the CPU 103 to the A / D converter 102, and the A / D converter 102 again starts the A / D of the battery voltage from this point. Start conversion. This A / D conversion process is performed until timing c when the U-phase carrier Cu reaches the valley. When the timing c is reached, the above-described A / D conversion of the U-phase current is performed.

  As described above, A / D conversion of the motor current is started based on the valley interrupt signal generated at the timing of the valley of each triangular wave carrier, and the peak interrupt signal generated at the timing of the peak of each triangular wave carrier By starting the A / D conversion of the battery voltage based on the above, it is possible to perform the A / D conversion of the motor current and the battery voltage by using the timing of both the peak and valley of the triangular wave carrier. . The CPU 103 performs feedback control of the motor M using the A / D converted motor current and battery voltage values. Also, since A / D conversion requires a certain time, if the interval between interrupt signals is short, a single A / D converter cannot be used and a plurality of A / D converters are required. In the embodiment, since the interval between the interrupt signals can be increased, it is possible to cope with only one A / D converter 102. Furthermore, since the phase difference between the triangular wave carriers is changed by changing the initial values of the up / down counters 12, 22, and 32 (FIG. 2), the timing of the peaks and valleys of the triangular wave carriers can be freely set according to the initial values. Can be set and interrupted at any time and at any time interval.

  In FIG. 5, since the motor currents of all phases detected by each of the shunts ST1 to ST3 are A / D converted in one cycle section of the carrier Cu (reference triangular wave carrier), data is collected for any phase current. However, since the command voltage value of each phase changes with time, it is possible that no PWM signal is output for a certain phase in one period of the carrier. In this case, A / D conversion of the motor current of that phase becomes impossible. However, when the triangular wave carrier having a phase shift as described above is used, it is ensured that a motor current for at least two phases is obtained in one period of the carrier. If two-phase (for example, U phase and V phase) motor current values can be detected, the motor current values for the other one phase (for example, W phase) can be automatically obtained by summing them. In this case, a value obtained by reversing the sign of the total value of the two-phase current subjected to A / D conversion is set as the remaining one-phase current value.

  By the way, in the A / D conversion described above, the CPU 103 determines the time widths of the on-section signals x, y, and z that maintain the lower switching elements Q2, Q4, and Q6 of each phase in the on state (from the rising edge to the falling edge of the signal). When the time width is equal to or greater than a certain value, the value of the motor current that is A / D converted based on the valley interrupt signals INT2U, INT2V, and INT2W generated within the time is valid. When the time width is less than a certain value, the value of the motor current subjected to A / D conversion based on the interrupt signals INT2U, INT2V, INT2W generated during the time is invalidated. This time width can be obtained by calculation based on the triangular wave carriers Cu, Cv, Cw and each phase command value. Alternatively, the time from when the switching element is turned on until it is turned off may be monitored by a timer. If the switching elements Q2, Q4, and Q6 are kept on for too short time, the data value obtained by the A / D conversion during that period is not reliable, and the data in this section is discarded as invalid. . Thus, the reliability of data can be improved by making the A / D conversion value valid only when the ON time of the switching element is equal to or greater than a certain value. In addition, when each time width of the on-section signals x, y, and z is known in advance by the above calculation, A / D conversion is performed when the time width is equal to or greater than a certain value, and is less than the certain value. Sometimes A / D conversion may be prohibited. In the case of prohibiting A / D conversion, naturally, data collection in the section is not performed. As a result, wasteful A / D conversion of invalid data can be avoided. Therefore, it is preferable to perform the A / D conversion after determining the validity / invalidity first, rather than determining the validity / invalidity of the data after performing the A / D conversion first. Note that the above-described constant value that is a valid / invalid determination criterion and a determination criterion for whether or not (prohibited) A / D conversion is required for the A / D conversion processing in the A / D converter 102. Set to a value greater than the minimum time.

  The present invention can employ various embodiments other than those described above. For example, in FIG. 1, since the shunts ST1 to ST3 are provided on the side of the switching elements Q2, Q4, and Q6 below each phase when viewed from the connection point between the switching elements, the shunts of the triangular wave carriers in which these elements are in the ON state. A / D conversion of the motor current is performed in the valley, but the shunts ST1 to ST3 are provided on the switching elements Q1, Q3, and Q5 side on each phase as viewed from the connection points of the switching elements, and these elements are turned on. You may make it perform A / D conversion of a motor current in the peak part of the triangular wave carrier in a state. In this case, A / D conversion of the battery voltage is performed at the valley of the triangular wave carrier.

  In the above-described embodiment, the peak interrupt signal is generated every time at the peak of the triangular wave carrier to perform the A / D conversion of the battery voltage. However, the peak is generated once every several cycles of the triangular wave carrier. An interrupt signal may be generated to perform A / D conversion of the battery voltage.

  Furthermore, in the said embodiment, although the command value compared with a carrier was a voltage value, a command value may be an electric current value.

It is a block diagram of the inverter control apparatus which concerns on this invention. It is a detailed block diagram of a carrier generation part and a comparator. It is a figure explaining the principle which produces | generates the triangular wave carrier of each phase. It is a table explaining the setting of the initial value of an up / down counter. It is a time chart which showed the generation timing of an interrupt signal. It is a figure explaining the current pathway of an inverter circuit. It is a figure explaining the current pathway of an inverter circuit. It is a figure explaining the current pathway of an inverter circuit. It is a wave form diagram of the voltage taken out from an inverter circuit. It is a figure which shows the control apparatus of a general 3 phase alternating current motor. It is the figure which showed the structure of the PWM signal generation part. It is a figure explaining the principle which produces | generates a PWM signal. It is a figure explaining the overlap of a dead time area. It is a wave form diagram at the time of using the carrier independent for each phase. It is a figure explaining the shift | offset | difference of a dead time area. It is a figure which shows the structure of a carrier generation part.

Explanation of symbols

10 U-phase carrier generator 12 Up / down counter 13, 14 Comparator 15 Flip-flop 16 Comparator 20 V-phase carrier generator 22 Up-down counter 23, 24 Comparator 25 Flip-flop 26 Comparator 30 W-phase carrier generator 32 Up Down counter 33, 34 Comparator 35 Flip-flop 36 Comparator 103 CPU
104 memory 105 clock generator 106 carrier generator 107 comparator 108 PWM circuit 109 interrupt controller Cu U phase carrier Cv V phase carrier Cw W phase carrier Q1 to Q6 switching element ST1 to ST3 shunt INT1U to INT2W interrupt signal x, y , Z ON section signal

Claims (9)

An inverter in which a series body of a pair of switching elements corresponding to each phase of a multiphase AC motor is provided in parallel, and each phase voltage for driving the motor is extracted from a connection point between the switching elements in each series body A current detecting means connected in series to each of the circuit and each of the series bodies and detecting a current flowing through the motor for each phase; and a PWM signal based on a command value of each phase to output the inverter circuit An inverter control device including a control unit that controls the on / off operation of each switching element,
The control unit includes an A / D converter that performs A / D conversion on a motor current for each phase detected by each of the current detection units, a control unit that controls the operation of the A / D converter, Based on a carrier generation unit that generates a triangular wave carrier corresponding to a phase with a predetermined phase difference between the phases, and a comparison between the triangular wave carrier of each phase output from the carrier generation unit and the command value of each phase And a signal generation means for generating a PWM signal for each of the switching elements,
The carrier generation unit generates an interrupt signal for the control means at the timing of the peak or valley of the triangular wave carrier of each phase,
The control means causes the A / D converter to start A / D conversion of a motor current of a phase corresponding to the interrupt signal based on each interrupt signal. . The PWM signal is composed of an ON interval signal having a variable time width for maintaining the switching element in an ON state and an OFF interval signal having a variable time width for maintaining the switching element in an OFF state.
The said carrier generation part produces | generates the said interruption signal in the substantially intermediate | middle timing of the time width of the said ON section signal which maintains one switching element in the serial body of each said phase in an ON state. The inverter control device according to 1. The PWM signal is composed of an ON interval signal having a variable time width for maintaining the switching element in an ON state and an OFF interval signal having a variable time width for maintaining the switching element in an OFF state.
The control means obtains a time width of the on-section signal that maintains one switching element in the serial body of each phase in an on state, and is generated within the time when the time width is equal to or greater than a certain value. When the value of the motor current A / D converted based on the interrupt signal is validated and the time width is less than a certain value, A based on the interrupt signal generated within the time 3. The inverter control device according to claim 1, wherein the value of the motor current subjected to / D conversion is invalidated. The PWM signal is composed of an ON interval signal having a variable time width for maintaining the switching element in an ON state and an OFF interval signal having a variable time width for maintaining the switching element in an OFF state.
The control means obtains a time width of the on-section signal that maintains one switching element in the serial body of each phase in an on state, and is generated within the time when the time width is equal to or greater than a certain value. The A / D converter is caused to perform A / D conversion based on the interrupt signal, and when the time width is less than a certain value, A / D conversion within the time is prohibited. The inverter control device according to claim 1 or 2.   The control means uses one of the triangular wave carriers as a reference triangular wave carrier, and the A / D for the motor currents of all phases detected by the current detecting means in one period section of the reference triangular wave carrier. The inverter control device according to any one of claims 1 to 4, wherein the converter performs A / D conversion. The motor is a three-phase AC motor;
The control means uses one of the triangular wave carriers as a reference triangular wave carrier, and at least two phases of motor currents detected by each of the current detecting means in one cycle section of the reference triangular wave carrier. 6. The inverter control device according to claim 1, wherein the A / D converter is caused to perform A / D conversion. The A / D converter receives a motor current detected by the current detection means and a detection output from at least one other detection means different from the current detection means,
The control means causes the A / D converter to start A / D conversion of the motor current based on an interrupt signal generated at one timing of a peak portion or a valley portion of the triangular wave carrier of each phase. 7. The method according to claim 1, wherein the A / D converter is caused to start A / D conversion of the other detection output based on an interrupt signal generated at the other timing. The inverter control device described in 1. The carrier generator is provided for each phase, and each carrier generator is
Counting means for counting clocks, and adding or subtracting the count value to output a triangular wave carrier;
First detecting means for detecting that the count value of the counting means has reached a predetermined upper limit value and generating a first interrupt signal corresponding to the peak portion of the triangular wave carrier when the upper limit value is reached. When,
Second detecting means for detecting that the count value of the counting means has reached a predetermined lower limit value and generating a second interrupt signal corresponding to the valley of the triangular wave carrier when the lower limit value is reached. When,
To give a subtraction instruction for performing the cumulative subtraction to the counting means based on the detection output of the first detection means, and to perform the cumulative addition to the counting means based on the detection output of the second detection means Command means for giving an addition command of
The phase counting means for one phase outputs a triangular wave carrier having a predetermined phase difference with respect to the triangular wave carrier output from the counting means for the other phase. The inverter control device described in 1. An inverter in which a series body of a pair of switching elements corresponding to each phase of a multiphase AC motor is provided in parallel, and each phase voltage for driving the motor is extracted from a connection point between the switching elements in each series body A current detecting means connected in series to each of the circuit and each of the series bodies and detecting a current flowing through the motor for each phase; and a PWM signal based on a command value of each phase to output the inverter circuit And a control method for controlling an on / off operation of each switching element.
A triangular wave carrier corresponding to each phase is generated with a predetermined phase difference between each phase,
The PWM signal is generated based on comparing the triangular wave carrier and the command value of each phase,
Generate an interrupt signal at the timing of the peak or valley of each triangular wave carrier,
An inverter control method characterized by starting A / D conversion of a motor current of a phase corresponding to the interrupt signal detected by the current detection means based on these interrupt signals.

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