JP2007110811A - Inverter apparatus and control method for the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inverter apparatus for detecting an output current and extending an output voltage, and its control method. <P>SOLUTION: The inverter apparatus is provided with a power converter (1) including three switching arms each having a series circuit comprising two semiconductor switches and a current detecting resistor and connected to a DC power supply in parallel, a current detector (11) for generating a current signal, a current controller (12) for generating a voltage instruction from a current instruction and the current signal, a pulse width modulator (13), a gate drive circuit (18), a carrier generator (14), a DC power supply voltage detector (15) for detecting a voltage from the DC power supply and generating a power supply voltage signal, a modulation rate calculator (16) for dividing a peak value in the voltage instruction by the power supply voltage signal and creating a modulation rate, and a frequency switch (17) for switching a carrier from a first frequency to a second frequency lower than the first frequency when the modulation rate exceeds a predetermined value. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention expands the output voltage range in which an output current can be detected in an inverter device having a power converter in which two semiconductor switches and a switching arm in which current detection resistors are connected in series are connected in parallel with three sets of DC power supplies. Relates to the device.

  For current detection of a conventional inverter device, a current detector is inserted into the N bus of a DC power supply as in Patent Document 1 to detect a phase current that can be detected according to the phase of the output voltage. In a region where the output frequency is difficult to detect, there is one that increases the carrier frequency and expands the detectable range. FIG. 12 is a block diagram of the motor control device disclosed in Patent Document 1. In FIG. In FIG. 12, the voltage of the DC power supply 101 is converted into a pulse width modulated (PWM) AC voltage and supplied to the U-phase, V-phase, and W-phase stator windings of the synchronous motor 103. An inverter circuit 102 that rotates, a control circuit 104 that performs control processing of the synchronous motor 103 according to a speed command signal, a driver 105 that drives the inverter circuit 102 according to a signal from the control circuit 104, and an inverter from the DC power source 101 And a resistor 106 for detecting a direct current I DC flowing through the circuit 102. The control circuit 104 is a one-chip microcomputer or a hybrid IC using the same. Further, as shown in FIG. 12, the inverter circuit 102 is an inverter in which three pairs of two semiconductor switching element pairs connected in series are respectively connected between the positive terminal and the negative terminal of a DC power source, The upper arm side is U +, V +, W +, and the lower arm side on the negative terminal side is U −, V−, W −. A power MOSFET or IGBT is used as the semiconductor switching element of the inverter circuit. The control circuit 104 comprises a DC current detection circuit together with the resistor 106, an amplifier 107 that amplifies the DC current detection voltage generated in the resistor 106, and the output voltage of the amplifier 107 is converted into an AD start time determination unit. AD conversion unit 108 including an AD conversion unit that samples and converts an analog value into a digital value according to the AD conversion start time output from 111, zero current information and a motor based on the AD conversion value based on energization mode information Selector 109 that outputs the current information separately, energization mode information, AD activation time interval Tw output from AD activation interval setting unit 112, and AD sampling set by AD conversion sampling time setting unit 113 AD start time determination unit 111 for determining AD conversion start time from time, energization mode information, zero current information, and motor current information Motor current reproduction unit 114 that reproduces the motor current and outputs the motor current reproduction value based on the three-phase motor current estimation value, and 3φ / that converts the motor current reproduction value into the d-axis q-axis current. dq coordinate conversion unit 116, filter 121 that inputs d-axis q-axis current and outputs an average value, and inputs the average value of d-axis current and q-axis current and outputs a three-phase motor current estimate dq / The 3φ reverse conversion unit 115, the d-axis q-axis current, the motor constant, the command speed, the d-axis current command, and the q-axis current command are applied to the motor so that the d-axis q-axis current matches the respective commands. A motor applied voltage generator 117 for generating the q-axis motor applied voltage information, and a coordinate inverse transform for converting the coordinates from the d-axis q-axis motor applied voltage information to output the three-phase motor applied voltage information and the carrier cycle data. A carrier cycle determination unit 118; PWM signal generation timer information unit 119 for outputting timer information for generating a PWM signal from phase motor applied voltage information and carrier cycle data, determination of AD conversion start time, and energization mode information necessary for motor current reproduction, This includes a PWM signal generation unit 122 that converts PWM signal generation timer information into a PWM signal for the driver 105.

For current detection of a conventional inverter device, a resistor for current detection is inserted in the DC power supply side portion of the lower arm semiconductor switching element of the inverter as in Patent Document 2, and current is detected from the potential difference of this resistor. There is something to detect. Patent Document 2 detects an analog current following a current even in a state where a lower arm semiconductor switching element is off in a three-phase inverter main circuit, and includes a three-phase analog current detection circuit 206. Is an inverter output current detection method in which the output current during operation is converted into a three-phase analog voltage by the three-phase analog current detection circuit 206 to detect the output current of the inverter. According to the electrical angle of the output voltage command of the inverter, two phases with a short off time of the lower arm semiconductor switching element drive signal are sequentially selected from the main circuit of the three-phase inverter, and the analog corresponding to the selected two phases The output current of the inverter is detected by digitally converting the voltage. FIG. 13 shows a time chart of the current flowing through the current detection resistor.
JP 2004-64903 A (pages 12-13, FIG. 1 and FIG. 12) Japanese Patent Laid-Open No. 10-54852 (page 4-5, FIG. 6)

  In Patent Document 1, since a resistor for current detection is inserted into a DC power supply, only one phase of the three-phase output can be detected at the same time, and when the phase voltage is large, the current detectable region is expanded. Therefore, the carrier frequency is increased.

  In Patent Document 2, normally, it is possible to simultaneously detect currents for two phases at the same time, but when the modulation rate increases, the time during which the lower arm is turned on for two phases is shortened. As shown in FIG. 13, the time width of the negative current (plus current as the output of the inverter) is shortened. Thus, there is a problem that current cannot be detected when the modulation rate is large, and that the modulation rate is limited to be smaller as the carrier frequency is higher.

  The present invention has been made in view of such problems, and an object thereof is to provide an inverter device capable of detecting an output current and expanding an output voltage, and a control method thereof.

In order to solve the above problem, the present invention is as follows.
According to the first aspect of the present invention, there is provided a power converter in which three sets of switching arms in which two semiconductor switches and a current detection resistor are connected in series are connected in parallel with a DC power supply, and a current signal from a voltage drop of the current detection resistor. A current detector that generates a current command and a current controller that generates a voltage command from the current signal, a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier, and the pulse width A DC power supply voltage for detecting a voltage of the DC power supply and generating a power supply voltage signal in an inverter device comprising a gate drive circuit that generates a gate drive signal of the semiconductor switch from a modulation signal and a carrier generator that generates the carrier A detector, a modulation factor calculator for dividing the peak value of the voltage command by the power supply voltage signal to obtain a modulation factor, and a carrier when the modulation factor exceeds a predetermined value. Than the first frequency A from the first frequency and is characterized in that and a frequency switching unit for switching to the second frequency of the low frequency.
According to a second aspect of the present invention, there is provided a power converter in which three sets of switching arms in which two semiconductor switches and a current detection resistor are connected in series are connected in parallel with a DC power supply, and a current signal from a voltage drop of the current detection resistor. A current detector that generates a current command and a current controller that generates a voltage command from the current signal, a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier, and the pulse width In an inverter device including a gate drive circuit that generates a gate drive signal of the semiconductor switch from a modulation signal and a carrier generator that generates the carrier, the carrier is moved from a first frequency when the voltage command becomes a predetermined value or more. A frequency switch that switches to a second frequency that is lower than the first frequency is provided.
According to a third aspect of the present invention, in the inverter device according to the first or second aspect, the carrier is a triangular wave or a sawtooth wave.
According to a fourth aspect of the present invention, in the inverter device according to the first or second aspect, the switching from the first frequency to the second frequency is continuously performed. .
According to a fifth aspect of the present invention, there is provided a power converter in which three sets of switching arms in which two semiconductor switches and a current detection resistor are connected in series are connected in parallel with a DC power supply, and a current signal from a voltage drop of the current detection resistor. A current detector that generates a current command and a current controller that generates a voltage command from the current signal, a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier, and the pulse width In a control method of an inverter device including a gate drive circuit that generates a gate drive signal of the semiconductor switch from a modulation signal and a carrier generator that generates the carrier, a voltage of the DC power supply is detected and a power supply voltage signal is generated A step of calculating a modulation factor by dividing the voltage command by the power supply voltage signal, and a first cycle when the modulation factor is less than a predetermined value. The number, but when more than a predetermined value, characterized in that it comprises the steps of: switching the carrier to the second frequency of the lower frequency than the first frequency.
According to a sixth aspect of the present invention, there is provided a power converter in which three switching arms each having two semiconductor switches and a current detection resistor connected in series are connected in parallel with a DC power supply, and a current signal from a voltage drop of the current detection resistor. A current detector that generates a current command and a current controller that generates a voltage command from the current signal, a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier, and the pulse width In a control method of an inverter device including a gate drive circuit that generates a gate drive signal of the semiconductor switch from a modulation signal and a carrier generator that generates the carrier, when the voltage command is less than a predetermined value, And switching to a second frequency that is lower than the first frequency when the frequency is equal to or greater than the predetermined value. It is intended.

  According to the present invention, it is possible to provide an inverter device capable of detecting an output current and expanding an output voltage, and a control method thereof.

  Specific embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a main circuit configuration of an inverter apparatus for carrying out the method of the present invention. The power converter 1 is a semiconductor switch on / off signal (PU, NU, PV, NV, PW,...) Supplied by an inverter device shown in FIG. NW) is used to turn on / off the semiconductor switches (Q1 to Q6) and output a voltage having a predetermined frequency and amplitude. In the power converter 1, the diodes D1 to D6 are current return diodes. A U-phase current detection resistor 4, a V-phase current detection resistor 5, and a W-phase current detection resistor 6 are provided on the N power supply side of the semiconductor power conversion elements Q2, Q4, and Q6, respectively. The smoothing capacitor 2 provided in the DC power supply of the power converter 1 is for smoothing the DC power supply voltage. The DC voltage supplied to the power converter 1 is generally provided by rectifying an AC commercial power supply with a diode bridge. The voltage output from the power converter 1 is supplied to the load 3. The current INU flowing through the U-phase current detection resistor RNU is obtained by measuring the voltage VRNU at both ends of the U-phase current detection resistor RNU and calculating INU = VRU / RNU. The same applies to the V phase and the W phase. Since the current flowing through the load 3 is expressed as an algebraic sum, there is a relationship of IU + IV + IW = 0. Therefore, if any two-phase current can be detected, all three-phase currents can be known.

  FIG. 2 is a time chart for explaining the principle of current detection by a resistor inserted on the N power source side of the lower semiconductor element. The simulation is performed based on the circuit of FIG. 1, and the carrier waveform at that time, the U-phase voltage command VU, the ON / OFF signal NU of the U-phase lower arm semiconductor power conversion element Q2, the U-phase current detection resistor RNU This shows the current INU flowing through the. The period in which the VU command is below the carrier waveform is the part where the lower semiconductor power conversion element is turned on. As shown in FIG. 2, the INU can be detected during the period when the lower arm is on. The U-phase output current IU at this time becomes IU = −INU when the direction of the arrow shown in FIG. 1 is positive (+). The same applies to the V and W phases.

  FIG. 3 shows U-phase, V-phase, and W-phase voltage command waveforms in a voltage command having a certain frequency and amplitude. In the voltage command, in order to make the output voltage as large as possible, the dozens of third harmonics are included with respect to the fundamental wave. Under this condition, the lower semiconductor power conversion element of any two phases is always on in any phase, and current detection for two phases is possible.

  FIG. 4 shows a case where the voltage command is larger than that in FIG. In the portion indicated by a broken line in FIG. 4, the two-phase upper arm is turned on, and only one lower arm is turned on. That is, a state where only the output current for one phase can be detected has occurred. Even with the same voltage command, when the DC power supply voltage drops, it is necessary to increase the level of the voltage compared with the triangular wave (that is, increase the modulation factor) in order to make the actual output voltage as commanded. Because there are similar problems. Here, for convenience, the ratio of the peak value of the output voltage to the DC power supply voltage, or the ratio between the voltage command and the power supply voltage signal is defined as the modulation factor.

  FIG. 5 shows the time required for current detection, which is indispensable in an actual apparatus, added to FIG. Thus, the voltage command level actually allowed for the time required for current detection is limited to a level lower than the apex of the triangular wave. Further, since the rate of change of the triangular wave increases as the carrier frequency increases, the allowable voltage level decreases as the carrier frequency increases, and the usable output voltage is limited.

  FIG. 6 illustrates the principle of a method for solving this problem. When the output voltage command becomes large or when the modulation rate becomes large, the inclination of the triangular wave is gently reduced, that is, the carrier frequency is lowered. As shown in FIG. 6, the period during which the voltage command is below the carrier waveform becomes longer, and current detection can be made possible.

  FIG. 7 is a block diagram illustrating the configuration of a control unit that supplies a drive signal to the gates of the semiconductor switches Q1 to Q6 of the power converter 1 of FIG. 1, showing the inverter device of the first embodiment of the present invention. 7, 11 is a current detector for converting a voltage signal generated by the current detection resistor of FIG. 1 into a current signal, 12 is a current controller, 13 is a pulse width modulator, 14 is a carrier generator, and 15 is a DC power supply. DC power supply voltage detector for converting a voltage into a voltage signal, 16 is a modulation factor calculator for calculating a modulation factor by dividing the amplitude of the voltage command signal by the power supply voltage, and 17 is a first frequency for normal operation of the frequency of the carrier generator. It is a frequency switcher which switches from a frequency to the 2nd frequency with a low frequency.

  Next, the operation will be described. In the embodiment, the carrier is a triangular wave, and the DC power supply voltage detector 15 generates a power supply voltage detection signal obtained by converting the DC power supply voltage VDC into a unit for calculation. The current detector 11 converts the voltage signal into a unit for calculation and generates a current signal. The current controller 12 subtracts the current command from the current signal and performs a PID control process on the current error to generate a voltage command. The pulse width modulator 12 compares the voltage command with the carrier and generates a pulse width modulation signal. The gate drive circuit 18 insulates and amplifies the pulse width modulation signal to generate a gate drive signal. The gate drive signal PU drives the gate of the U-phase plus-side semiconductor switch Q1, and NU drives the gate of the U-phase minus-side semiconductor switch Q4. Similarly, PV and NV drive the gates of Q3 and Q6, respectively, and PW and NW drive the gates of Q5 and Q2, respectively. Since the output voltage to the load 3 is determined by the pulse width depending on the ON / OFF time of the semiconductor switch and the height of the pulse, that is, the magnitude of the DC power supply voltage, the pulse width is adjusted using the DC power supply voltage signal.

  FIG. 8 is a block diagram showing the configuration of the inverter device according to the second embodiment of the present invention. The frequency switch validates the switching signal from the first frequency to the second frequency when the voltage command becomes a predetermined value or more.

  There is also a method of using a sawtooth wave in addition to the triangular wave as the carrier waveform created by the carrier generator 14 of FIGS.

FIG. 9 shows a waveform when the carrier of the inverter device is switched from the first frequency to the second frequency having a low frequency, and the waveform of the triangular wave is continuous. Usually, a triangular wave carrier is generated by an up / down counter and a clock signal. The minimum value and maximum value of the up / down counter are set, and the clock is counted up from the minimum value to the maximum value, and is counted down from the maximum value to the minimum value. Switching from the first frequency to the second frequency can obtain a continuous triangular wave by switching the clock frequency.
Assuming that the current detection process is started at the same time when current detection is enabled, that is, at the same time as the lower arm is turned ON, the second frequency f2 is a sample hold time of the current flowing through the current detection resistor or an AD converter, etc. The following equation is set according to the reading time Trd, the voltage command level Vrlvl of the carrier frequency switching condition, and the voltage Vtp at the apex of the triangular wave of the carrier.
f2 <(1/2) · (Vtp−Vrlvl) / (Vtp · Trd)
If the modulation rate is represented by m and m = Vrlvl / Vtp, the second frequency is set to the following equation or less.
f2 <(1/2). (1-m) / Trd
In addition, when the current start process is started from the top of the triangular wave of the carrier waveform, the current detectable period is half of the above,
f2 <(1/4). (1-m) / Trd
It becomes.

  FIG. 10 is a flowchart showing a method for controlling the inverter device of the present invention. FIG. 10 shows the processing after calculating the modulation rate. When the modulation rate is less than the predetermined value, the carrier is operated at the first frequency of the normal frequency (STEP 102). A process of switching to a second frequency lower than the first frequency and operating (STEP 102) is performed. The normal first frequency in STEP 102 is an arbitrary frequency set by the user, and the second frequency lower than the normal first frequency in STEP 103 is determined in consideration of the time required for the current detection time, etc. FIG. The frequency is set so that the current can be detected as shown in FIG. If the modulation rate is less than a predetermined value, the operation is switched to the normal first frequency. In actual processing, a minute value is added to or subtracted from a predetermined value to add hysteresis, thereby preventing chattering operation.

  FIG. 11 is a flowchart showing a method for controlling the inverter device of the present invention. In general, since the DC power supply voltage is determined in advance according to the use conditions, the modulation rate is not used to switch the carrier frequency, but the voltage command is used, and the carrier is set to the first frequency based on the voltage command. To the second frequency (STEP 201). The carrier frequency setting of STEP 202 and STEP 203 is the same as STEP 102 and STEP 103 of FIG. 10, and hysteresis is provided at a predetermined value.

  According to the present invention, the current can be detected and the output voltage can be expanded, and application to industrial machines and consumer equipment can be expected.

The block diagram which shows the main circuit structure of the inverter apparatus which applies the method of the prior art and this invention Time chart explaining the current detection principle of an inverter device to which the method of the prior art and the present invention is applied Voltage command waveform (1) for explaining the problems of the prior art Voltage command waveform (2) for explaining the problems of the prior art Waveforms to explain the problems of the prior art Waveforms for explaining the principle of the present invention The block diagram which shows the structure of the inverter apparatus of this invention The block diagram which shows the structure of the inverter apparatus of this invention Time chart showing triangular wave waveform and change of carrier frequency at switching The flowchart which shows the control method of this invention The flowchart which shows the control method of this invention Block diagram showing the configuration of a conventional example Time chart showing modulation rate and current waveform

Explanation of symbols

1 Power converter
2 Smoothing capacitor 3 Load 4 U-phase current detection resistor
5 V-phase current detection resistor 6 W-phase current detection resistor 11 Current detector 12 Current controller 13 Pulse width modulator 14 Carrier generator 15 DC power supply voltage detector 16 Modulation rate calculator 17 Frequency switch 18 Gate drive circuit

Claims (6)

A power converter in which two sets of semiconductor switches and a current detection resistor connected in series are connected in parallel with three sets of DC power supplies, a current detector that generates a current signal from a voltage drop of the current detection resistor, a current A current controller that generates a voltage command from the command and the current signal; a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier; and a gate drive of the semiconductor switch from the pulse width modulation signal In an inverter device comprising a gate drive circuit that generates a signal and a carrier generator that generates the carrier,
A DC power supply voltage detector for detecting a voltage of the DC power supply and generating a power supply voltage signal;
A modulation factor calculator that divides the peak value of the voltage command by the power supply voltage signal to obtain a modulation factor;
A frequency switcher for switching a carrier from a first frequency to a second frequency lower than the first frequency when the modulation rate is equal to or higher than a predetermined value;
An inverter device comprising: A power converter in which two sets of semiconductor switches and a current detection resistor connected in series are connected in parallel with three sets of DC power supplies, a current detector that generates a current signal from a voltage drop of the current detection resistor, a current A current controller that generates a voltage command from the command and the current signal; a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier; and a gate drive of the semiconductor switch from the pulse width modulation signal In an inverter device comprising a gate drive circuit that generates a signal and a carrier generator that generates the carrier,
An inverter device comprising: a frequency switcher that switches the carrier from a first frequency to a second frequency that is lower than the first frequency when the voltage command becomes a predetermined value or more.   The inverter device according to claim 1, wherein the carrier is a triangular wave or a sawtooth wave.   The inverter device according to claim 1, wherein switching from the first frequency to the second frequency is performed continuously. A power converter in which two sets of semiconductor switches and a current detection resistor connected in series are connected in parallel with three sets of DC power supplies, a current detector that generates a current signal from a voltage drop of the current detection resistor, a current A current controller that generates a voltage command from the command and the current signal; a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier; and a gate drive of the semiconductor switch from the pulse width modulation signal In a control method of an inverter device comprising a gate drive circuit for generating a signal and a carrier generator for generating the carrier,
Detecting a voltage of the DC power supply and generating a power supply voltage signal;
Dividing the voltage command by the power supply voltage signal to calculate a modulation factor;
Switching the carrier to a first frequency when the modulation factor is less than a predetermined value, and switching to a second frequency that is lower than the first frequency when the modulation rate is greater than or equal to a predetermined value;
An inverter device control method comprising: A power converter in which two sets of semiconductor switches and a current detection resistor connected in series are connected in parallel with three sets of DC power supplies, a current detector that generates a current signal from a voltage drop of the current detection resistor, a current A current controller that generates a voltage command from the command and the current signal; a pulse width modulator that generates a pulse width modulation signal by comparing the voltage command with a carrier; and a gate drive of the semiconductor switch from the pulse width modulation signal In a control method of an inverter device comprising a gate drive circuit for generating a signal and a carrier generator for generating the carrier,
Switching the carrier to a first frequency when the voltage command is less than a predetermined value, and switching to a second frequency that is lower than the first frequency when the voltage command is greater than or equal to the predetermined value;
An inverter device control method comprising:

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