JP2005217365A5 - - Google Patents
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- Publication number
- JP2005217365A5 JP2005217365A5 JP2004025581A JP2004025581A JP2005217365A5 JP 2005217365 A5 JP2005217365 A5 JP 2005217365A5 JP 2004025581 A JP2004025581 A JP 2004025581A JP 2004025581 A JP2004025581 A JP 2004025581A JP 2005217365 A5 JP2005217365 A5 JP 2005217365A5
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- JP
- Japan
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004025581A JP4439935B2 (ja) | 2004-02-02 | 2004-02-02 | 半導体装置の製造方法 |
US10/942,828 US7238592B2 (en) | 2004-02-02 | 2004-09-17 | Method of manufacturing a semiconductor device having an alignment mark |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004025581A JP4439935B2 (ja) | 2004-02-02 | 2004-02-02 | 半導体装置の製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2005217365A JP2005217365A (ja) | 2005-08-11 |
JP2005217365A5 true JP2005217365A5 (ja) | 2006-10-05 |
JP4439935B2 JP4439935B2 (ja) | 2010-03-24 |
Family
ID=34805805
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004025581A Expired - Fee Related JP4439935B2 (ja) | 2004-02-02 | 2004-02-02 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7238592B2 (ja) |
JP (1) | JP4439935B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007053255A (ja) * | 2005-08-18 | 2007-03-01 | Oki Electric Ind Co Ltd | アライメントマークの形成方法 |
KR100630768B1 (ko) | 2005-09-26 | 2006-10-04 | 삼성전자주식회사 | 캡핑층을 구비한 얼라인먼트 키 형성방법 및 이를 이용한반도체 장치의 제조방법 |
US9000525B2 (en) | 2010-05-19 | 2015-04-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for alignment marks |
US9165889B2 (en) * | 2013-06-28 | 2015-10-20 | Infineon Technologies Ag | Alignment mark definer |
CN106783803B (zh) * | 2016-11-30 | 2019-01-25 | 武汉新芯集成电路制造有限公司 | 一种减少光刻标记图形损失的方法和半导体结构 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62128118A (ja) | 1985-11-29 | 1987-06-10 | Nec Corp | 半導体装置 |
JP2660405B2 (ja) | 1987-06-10 | 1997-10-08 | 三菱電機株式会社 | マスクアライメント方法 |
JP3174786B2 (ja) * | 1991-05-31 | 2001-06-11 | 富士通株式会社 | 半導体装置の製造方法 |
US6307273B1 (en) * | 1996-06-07 | 2001-10-23 | Vanguard International Semiconductor Corporation | High contrast, low noise alignment mark for laser trimming of redundant memory arrays |
JP3447231B2 (ja) | 1998-11-20 | 2003-09-16 | セイコーインスツルメンツ株式会社 | 半導体集積回路の製造方法 |
JP2001307999A (ja) | 2000-04-27 | 2001-11-02 | Oki Electric Ind Co Ltd | アライメントマークの構造およびその製造方法 |
JP3665275B2 (ja) | 2001-05-28 | 2005-06-29 | 沖電気工業株式会社 | 位置合わせマークの形成方法 |
JP2003100861A (ja) * | 2001-09-20 | 2003-04-04 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2003332270A (ja) * | 2002-05-15 | 2003-11-21 | Renesas Technology Corp | 半導体装置およびその製造方法 |
-
2004
- 2004-02-02 JP JP2004025581A patent/JP4439935B2/ja not_active Expired - Fee Related
- 2004-09-17 US US10/942,828 patent/US7238592B2/en not_active Expired - Fee Related
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