JP2005215277A - Liquid crystal display and its manufacturing method - Google Patents

Liquid crystal display and its manufacturing method Download PDF

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JP2005215277A
JP2005215277A JP2004021290A JP2004021290A JP2005215277A JP 2005215277 A JP2005215277 A JP 2005215277A JP 2004021290 A JP2004021290 A JP 2004021290A JP 2004021290 A JP2004021290 A JP 2004021290A JP 2005215277 A JP2005215277 A JP 2005215277A
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electrode
layer
liquid crystal
transparent
transparent insulating
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Kiyohiro Kawasaki
清弘 川崎
Kokukin Yo
楊克勤
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Quanta Display Japan Inc
Quanta Display Inc
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Quanta Display Japan Inc
Quanta Display Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of increasing a manufacturing cost, being unable to avoid the increase in the number of manufacturing processes, by generating a forming process of a reflection electrode in a translucent liquid crystal display. <P>SOLUTION: The liquid crystal display comprises forming of a photosensitive resin pattern, in which the film thickness on a reflection electrode forming region is larger than the film thickness on a transparent electrode forming region by half-tone exposure technology, after laminating a transparent conductive layer (and a buffer layer) and a reflection metal layer; reducing the film thickness of the photosensitive resin pattern, after forming the reflection electrode of a size adding the transparent electrode and the reflection electrode by using the photosensitive resin pattern; and treating formation of the transparent electrode and the reflection electrode with a single photomask, by removing the reflecting metal (and a buffer layer) on the transparent electrode and forming the transparent electrode, and avoiding increase of photographic corrosion processes. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明はカラー画像表示機能を有する液晶表示装置、とりわけ半透過型の液晶表示装置に関するものである。 The present invention relates to a liquid crystal display device having a color image display function, and more particularly to a transflective liquid crystal display device.

近年の微細加工技術、液晶材料技術および高密度実装技術等の進歩により、5〜50cm対角の液晶表示装置でテレビジョン画像や各種の画像表示機器が商用ベースで大量に提供されている。また、液晶パネルを構成する2枚のガラス基板の一方にRGBの着色層を形成しておくことによりカラー表示も容易に実現している。特にスイッチング素子を絵素毎に内蔵させた、いわゆるアクティブ型の液晶パネルではクロストークも少なく、応答速度も早く高いコントラスト比を有する画像が保証されている。 With recent advances in microfabrication technology, liquid crystal material technology, high-density packaging technology, and the like, television images and various image display devices are provided in large quantities on a commercial basis in 5 to 50 cm diagonal liquid crystal display devices. Further, color display is easily realized by forming an RGB colored layer on one of the two glass substrates constituting the liquid crystal panel. In particular, so-called active liquid crystal panels in which switching elements are built in for each picture element have little crosstalk, fast response speed, and an image having a high contrast ratio.

これらの液晶表示装置(液晶パネル)は走査線としては200〜1200本、信号線としては300〜1600本程度のマトリクス編成が一般的であるが、最近は表示容量の増大に対応すべく大画面化と高精細化とが同時に進行している。  These liquid crystal display devices (liquid crystal panels) generally have a matrix organization of 200 to 1200 scanning lines and 300 to 1600 signal lines, but recently, a large screen is required to cope with an increase in display capacity. And high definition are progressing simultaneously.

図7は液晶パネルへの実装状態を示し、液晶パネル1を構成する一方の透明性絶縁基板、例えばガラス基板2上に形成された走査線の電極端子群5に駆動信号を供給する半導体集積回路チップ3を導電性の接着剤を用いて接続するCOG(Chip−On−Glass)方式や、例えばポリイミド系樹脂薄膜をベースとし、金または半田メッキされた銅箔の端子を有するTCPフィルム4を信号線の電極端子群6に導電性媒体を含む適当な接着剤で圧接して固定するTCP(Tape−Carrier−Package)方式などの実装手段によって電気信号が画像表示部に供給される。ここでは便宜上二つの実装方式を同時に図示しているが実際には何れかの方式が適宜選択される。 FIG. 7 shows a state of mounting on a liquid crystal panel, and a semiconductor integrated circuit that supplies a drive signal to an electrode terminal group 5 of a scanning line formed on one transparent insulating substrate, for example, a glass substrate 2, constituting the liquid crystal panel 1. A COG (Chip-On-Glass) system in which the chip 3 is connected using a conductive adhesive, or a TCP film 4 having terminals of gold or solder-plated copper foil based on, for example, a polyimide resin thin film as a signal An electrical signal is supplied to the image display unit by a mounting means such as a TCP (Tape-Carrier-Package) method in which the electrode terminal group 6 of the wire is fixed by being pressed with an appropriate adhesive containing a conductive medium. Here, for convenience, two mounting methods are shown at the same time, but in actuality, either method is appropriately selected.

液晶パネル1のほぼ中央部に位置する画像表示部内の画素と走査線及び信号線の電極端子5,6との間を接続する配線路が7、8で、必ずしも電極端子群5,6と同一の導電材で構成される必要はない。9は全ての液晶セルに共通する透明導電性の対向電極を対向面上に有するもう1枚の透明性絶縁基板である対向ガラス基板又はカラーフィルタである。 Wiring paths 7 and 8 connect the pixels in the image display unit located almost at the center of the liquid crystal panel 1 to the electrode terminals 5 and 6 of the scanning lines and signal lines, and are not necessarily the same as the electrode terminal groups 5 and 6. It is not necessary to be made of a conductive material. Reference numeral 9 denotes a counter glass substrate or color filter which is another transparent insulating substrate having a transparent conductive counter electrode common to all liquid crystal cells on the counter surface.

図8はスイッチング素子として絶縁ゲート型トランジスタ10を絵素毎に配置したアクティブ型液晶表示装置の等価回路図を示し、11(図7では7)は走査線、12(図7では8)は信号線、13は液晶セルであって、液晶セル13は電気的には容量素子として扱われる。実線で描かれた素子類は液晶パネルを構成する一方のガラス基板2上に形成され、点線で描かれた全ての液晶セル13に共通な対向電極14はもう一方のガラス基板9の対向する主面上に形成されている。絶縁ゲート型トランジスタ10のOFF抵抗あるいは液晶セル13の抵抗が低い場合や表示画像の階調性を重視する場合には、負荷としての液晶セル13の時定数を大きくするための補助の蓄積容量15を液晶セル13に並列に加える等の回路的工夫が加味される。なお16は蓄積容量15の共通母線となる蓄積容量線である。   FIG. 8 shows an equivalent circuit diagram of an active liquid crystal display device in which insulated gate transistors 10 are arranged for each picture element as a switching element, 11 (7 in FIG. 7) is a scanning line, and 12 (8 in FIG. 7) is a signal. A line 13 is a liquid crystal cell, and the liquid crystal cell 13 is electrically treated as a capacitive element. The elements drawn with solid lines are formed on one glass substrate 2 constituting the liquid crystal panel, and the counter electrode 14 common to all liquid crystal cells 13 drawn with dotted lines is the main electrode facing the other glass substrate 9. It is formed on the surface. When the OFF resistance of the insulated gate transistor 10 or the resistance of the liquid crystal cell 13 is low, or when importance is attached to the gradation of the display image, an auxiliary storage capacitor 15 for increasing the time constant of the liquid crystal cell 13 as a load. Is added to the liquid crystal cell 13 in parallel. Reference numeral 16 denotes a storage capacitor line serving as a common bus for the storage capacitor 15.

図9は液晶表示装置の画像表示部の要部断面図を示し、液晶パネル1を構成する2枚のガラス基板2,9は樹脂性のファイバ、ビーズあるいはカラーフィルタ9上に形成された柱状スペーサ等のスペーサ材(図示せず)によって数μm程度の所定の距離を隔てて形成され、その間隙(ギャップ)はガラス基板9の周縁部において有機性樹脂よりなるシール材と封口材(何れも図示せず)とで封止された閉空間になっており、この閉空間に液晶17が充填されている。   FIG. 9 is a cross-sectional view of the main part of the image display unit of the liquid crystal display device, and the two glass substrates 2 and 9 constituting the liquid crystal panel 1 are columnar spacers formed on resinous fibers, beads or color filters 9. Are formed at a predetermined distance of about several μm by a spacer material (not shown) such as a sealing material made of an organic resin and a sealing material (both shown in the figure) at the peripheral edge of the glass substrate 9. The liquid crystal 17 is filled in this closed space.

カラー表示を実現する場合には、ガラス基板9の閉空間側に着色層18と称する染料または顔料のいずれか一方もしくは両方を含む厚さ1〜2μm程度の有機薄膜が被着されて色表示機能が与えられるので、その場合にはガラス基板9は別名カラーフィルタ(Color Filter 略語はCF)と呼称される。そして液晶材料17の性質によってはガラス基板9の上面またはガラス基板2の下面の何れかもしくは両面上に偏光板19が貼付され、液晶パネル1は電気光学素子として機能する。現在、市販されている大部分の液晶パネルでは液晶材料にTN(ツイスト・ネマチック)系の物を用いており、偏光板19は通常2枚必要である。図示はしないが、透過型液晶パネルでは光源として裏面光源が配置され、下方より白色光が照射される。   In the case of realizing color display, an organic thin film having a thickness of about 1 to 2 μm containing either or both of a dye and a pigment called a colored layer 18 is deposited on the closed space side of the glass substrate 9 to provide a color display function. In this case, the glass substrate 9 is also called a color filter (color filter abbreviation is CF). Depending on the properties of the liquid crystal material 17, a polarizing plate 19 is attached to either or both of the upper surface of the glass substrate 9 and the lower surface of the glass substrate 2, and the liquid crystal panel 1 functions as an electro-optical element. Currently, most liquid crystal panels on the market use a TN (twisted nematic) type liquid crystal material, and two polarizing plates 19 are usually required. Although not shown, in the transmissive liquid crystal panel, a back light source is disposed as a light source, and white light is irradiated from below.

液晶17に接して2枚のガラス基板2,9上に形成された例えば厚さ0.1μm程度のポリイミド系樹脂薄膜20は液晶分子を決められた方向に配向させるための配向膜である。21は絶縁ゲート型トランジスタ10のドレインと透明導電性の絵素電極22とを接続するドレイン電極(配線)であり、信号線(ソース線)12と同時に形成されることが多い。信号線12とドレイン電極21との間に位置するのは半導体層23であり詳細は後述する。カラーフィルタ9上で隣り合った着色層18の境界に形成された厚さ0.1μm程度のCr薄膜層24は半導体層23と走査線11及び信号線12に外部光が入射するのを防止するための光遮蔽部材で、いわゆるブラックマトリクス(Black Matrix 略語はBM)として定着化した技術である。 The polyimide resin thin film 20 having a thickness of, for example, about 0.1 μm formed on the two glass substrates 2 and 9 in contact with the liquid crystal 17 is an alignment film for aligning liquid crystal molecules in a predetermined direction. Reference numeral 21 denotes a drain electrode (wiring) that connects the drain of the insulated gate transistor 10 and the transparent conductive pixel electrode 22, and is often formed simultaneously with the signal line (source line) 12. The semiconductor layer 23 is located between the signal line 12 and the drain electrode 21 and will be described in detail later. The Cr thin film layer 24 having a thickness of about 0.1 μm formed at the boundary between the adjacent colored layers 18 on the color filter 9 prevents external light from entering the semiconductor layer 23, the scanning line 11, and the signal line 12. It is a technology that is fixed as a so-called black matrix (Black Matrix abbreviation is BM).

ここでスイッチング素子として絶縁ゲート型トランジスタの構造と製造方法に関して説明する。現在絶縁ゲート型トランジスタには2種類のものが多用されており、そのうちの一つのエッチストップ型と呼称されるものを従来例として紹介する。図10は従来の液晶パネルを構成するアクティブ基板(表示装置用半導体装置)の単位絵素の平面図であり、図10(e)のA−A’、B−B’およびC−C’線上の断面図を図11に示し、その製造工程を以下に簡単に説明する。 Here, a structure and a manufacturing method of an insulated gate transistor as a switching element will be described. At present, two types of insulated gate transistors are widely used, and one of them called etch stop type is introduced as a conventional example. FIG. 10 is a plan view of unit picture elements of an active substrate (semiconductor device for display device) that constitutes a conventional liquid crystal panel, on the lines AA ′, BB ′, and CC ′ of FIG. FIG. 11 shows a cross-sectional view of this, and the manufacturing process will be briefly described below.

先ず図10(a)と図11(a)に示したように耐熱性と耐薬品性と透明性が高い絶縁性基板として厚さ0.5〜1.1mm程度のガラス基板2、例えばコーニング社製の商品名1737の一主面上にSPT(スパッタ)等の真空製膜装置を用いて膜厚0.1〜0.3μm程度の第1の金属層を被着し、微細加工技術によりゲート電極11Aも兼ねる走査線11と蓄積容量線16を選択的に形成する。走査線の材質は耐熱性と耐薬品性と耐弗酸性と導電性とを総合的に勘案して選択するが一般的にはCr,Ta,MoW合金等の耐熱性の高い金属または合金が使用される。 First, as shown in FIG. 10 (a) and FIG. 11 (a), a glass substrate 2 having a thickness of about 0.5 to 1.1 mm as an insulating substrate having high heat resistance, chemical resistance and transparency, for example, Corning A first metal layer having a film thickness of about 0.1 to 0.3 μm is deposited on one main surface of a product name 1737 manufactured by using a vacuum film forming apparatus such as SPT (sputtering), and gates are formed by a fine processing technique. The scanning lines 11 and the storage capacitor lines 16 that also serve as the electrodes 11A are selectively formed. The scanning line material is selected by comprehensively considering heat resistance, chemical resistance, hydrofluoric acid resistance, and conductivity, but generally a metal or alloy having high heat resistance such as Cr, Ta, MoW alloy is used. Is done.

液晶パネルの大画面化や高精細化に対応して走査線の抵抗値を下げるためには走査線の材料としてAL(アルミニウム)を用いるのが合理的であるが、ALは単体では耐熱性が低いので上記した耐熱金属であるCr,Ta,Moまたはそれらのシリサイドと積層化する、あるいはALの表面に陽極酸化で酸化層(Al2O3)を付加することも現在では一般的な技術である。すなわち走査線11は1層以上の金属層で構成される。   It is reasonable to use AL (aluminum) as the scanning line material to reduce the resistance value of the scanning line in response to the increase in the screen size and resolution of the liquid crystal panel. Since it is low, it is a common technique to stack with Cr, Ta, Mo or their silicides as mentioned above, or to add an oxide layer (Al 2 O 3) by anodic oxidation on the surface of AL. That is, the scanning line 11 is composed of one or more metal layers.

次にガラス基板2の全面にPCVD(プラズマ・シーブイディ)装置を用いてゲート絶縁層となる第1のSiNx(シリコン窒化)層30、不純物をほとんど含まず絶縁ゲート型トランジスタのチャネルとなる第1の非晶質シリコン(a−Si)層31、及びチャネルを保護する絶縁層となる第2のSiNx層32と3種類の薄膜層を例えば、0.3−0.05−0.1μm程度の膜厚で順次被着し、図10(b)と図11(b)に示したように微細加工技術によりゲート電極11A上の第2のSiNx層をゲート電極11Aよりも幅細く選択的に残して保護絶縁層(エッチストップ層またはチャネル保護層)32Dとし、第1の非晶質シリコン層31を露出する。 Next, a first SiNx (silicon nitride) layer 30 serving as a gate insulating layer is formed on the entire surface of the glass substrate 2 by using a PCVD (plasma sieve fluid) apparatus, and a first serving as a channel of an insulated gate transistor containing almost no impurities. An amorphous silicon (a-Si) layer 31, a second SiNx layer 32 serving as an insulating layer for protecting the channel, and three kinds of thin film layers, for example, a film of about 0.3-0.05-0.1 μm 10B and 11B, the second SiNx layer on the gate electrode 11A is selectively left narrower than the gate electrode 11A by a fine processing technique as shown in FIGS. 10B and 11B. A protective insulating layer (etch stop layer or channel protective layer) 32D is used, and the first amorphous silicon layer 31 is exposed.

続いて同じくPCVD装置を用いて全面に不純物として例えば燐を含む第2の非晶質シリコン層33を例えば0.05μm程度の膜厚で被着した後、図10(c)と図11(c)に示したようにSPT等の真空製膜装置を用いて膜厚0.1μm程度の耐熱金属層として例えばTi,Cr,Mo等の薄膜層34と、低抵抗配線層として膜厚0.3μm程度のAL薄膜層35と、さらに膜厚0.1μm程度の中間導電層として例えばTi薄膜層36を順次被着し、微細加工技術によりソース・ドレイン配線材であるこれら3種の薄膜層34A,35A及び36Aの積層よりなる絶縁ゲート型トランジスタのドレイン電極21とソース電極も兼ねる信号線12を選択的に形成する。この選択的パターン形成は、ソース・ドレイン配線の形成に用いられる感光性樹脂パターンをマスクとしてTi薄膜層36、AL薄膜層35、Ti薄膜層34を順次食刻した後、ソース・ドレイン電極12,21間の第2の非晶質シリコン層33を除去して保護絶縁層32Dを露出するとともに、その他の領域では第1の非晶質シリコン層31をも除去してゲート絶縁層30を露出することによってなされる。このようにチャネルの保護層である第2のSiNx層32Dが存在して第2の非晶質シリコン層33の食刻が自動的に終了することからこの製法はエッチストップと呼称される。 Subsequently, a second amorphous silicon layer 33 containing, for example, phosphorus as an impurity is deposited on the entire surface using a PCVD apparatus in a thickness of about 0.05 μm, for example, and then FIG. 10C and FIG. ) Using a vacuum film forming apparatus such as SPT, as a heat-resistant metal layer having a film thickness of about 0.1 μm, for example, a thin film layer 34 of Ti, Cr, Mo, etc., and a film thickness of 0.3 μm as a low-resistance wiring layer. For example, a Ti thin film layer 36 is sequentially deposited as an intermediate thin film layer having a thickness of about 0.1 μm, and these three kinds of thin film layers 34A, which are source / drain wiring materials, are formed by a fine processing technique. The signal line 12 which also serves as the drain electrode 21 and the source electrode of the insulated gate transistor formed by stacking 35A and 36A is selectively formed. In this selective pattern formation, the Ti thin film layer 36, the AL thin film layer 35, and the Ti thin film layer 34 are sequentially etched using the photosensitive resin pattern used for forming the source / drain wiring as a mask, and then the source / drain electrodes 12, The second amorphous silicon layer 33 between 21 is removed to expose the protective insulating layer 32D, and in other regions, the first amorphous silicon layer 31 is also removed to expose the gate insulating layer 30. Is made by Since the second SiNx layer 32D serving as the channel protective layer exists in this manner and the etching of the second amorphous silicon layer 33 is automatically terminated, this manufacturing method is called an etch stop.

絶縁ゲート型トランジスタがオフセット構造とならぬようソース・ドレイン電極12,21は保護絶縁層32Dと一部(数μm)平面的に重なって形成される。この重なりは寄生容量として電気的に作用するので小さいほど良いが、露光機の合わせ精度とフォトマスクの精度とガラス基板の膨張係数及び露光時のガラス基板温度で決定され、実用的な数値は精々2μm程度である。   The source / drain electrodes 12 and 21 are partially overlapped with the protective insulating layer 32D (several μm) in plan so that the insulated gate transistor does not have an offset structure. Since this overlap is electrically acting as a parasitic capacitance, the smaller the better, the better. However, it is determined by the alignment accuracy of the exposure machine, the accuracy of the photomask, the expansion coefficient of the glass substrate, and the glass substrate temperature at the time of exposure. It is about 2 μm.

さらに上記感光性樹脂パターンを除去した後、ガラス基板2の全面に透明性の絶縁層としてゲート絶縁層と同様にPCVD装置を用いて0.3μm程度の膜厚のSiNx層を被着してパシベーション絶縁層37とし、図10(d)と図11(d)に示したようにパシベーション絶縁層37とし、ドレイン電極21上と、画像表示部外の領域で走査線11と信号線12の電極端子が形成される領域にそれぞれ開口部62,63,64を形成し、開口部63内のパシベーション絶縁層37とゲート絶縁層30を除去して開口部63内に走査線の一部を露出するとともに、開口部62,64内のパシベーション絶縁層37を除去してドレイン電極21の一部と信号線の一部を露出する。走査線11と同様に蓄積容量線16(を平行に束ねた電極パターン)上には開口部65を形成して蓄積容量線16の一部を露出する。 Further, after removing the photosensitive resin pattern, a SiNx layer having a thickness of about 0.3 μm is deposited on the entire surface of the glass substrate 2 as a transparent insulating layer using a PCVD apparatus in the same manner as the gate insulating layer. As shown in FIGS. 10 (d) and 11 (d), the insulating layer 37 is used as the passivation insulating layer 37, and the electrode terminals of the scanning line 11 and the signal line 12 on the drain electrode 21 and in the region outside the image display portion. Openings 62, 63, and 64 are formed in the regions where the gate electrode is formed, and the passivation insulating layer 37 and the gate insulating layer 30 in the opening 63 are removed to expose a part of the scanning line in the opening 63. Then, the passivation insulating layer 37 in the openings 62 and 64 is removed to expose part of the drain electrode 21 and part of the signal line. Similar to the scanning line 11, an opening 65 is formed on the storage capacitor line 16 (electrode pattern in which the storage capacitor lines are bundled in parallel) to expose a part of the storage capacitor line 16.

最後にSPT等の真空製膜装置を用いて膜厚0.1〜0.2μm程度の透明導電層として例えばITO(Indium−Tin−Oxide)あるいはIZO(Indium−Zinc−Oxide)を被着し、図10(e)と図11(e)に示したように微細加工技術により開口部62を含んでパシベーション絶縁層37上に絵素電極22を選択的に形成してアクティブ基板2として完成する。開口部63内の露出している走査線11の一部を電極端子5とし、開口部64内の露出している信号線12の一部を電極端子6としても良く、図示したように開口部63,64を含んでパシベーション絶縁層37上にITOよりなる電極端子5A,6Aを選択的に形成しても良いが、通常は電極端子5A,6A間を接続する透明導電性の短絡線40も同時に形成される。その理由は、図示はしないが電極端子5A,6Aと短絡線40との間を細長いストライプ状に形成することにより高抵抗化して静電気対策用の高抵抗とすることが出来るからである。同様に番号は付与しないが開口部65を含んで蓄積容量線16への電極端子が形成される。 Finally, for example, ITO (Indium-Tin-Oxide) or IZO (Indium-Zinc-Oxide) is applied as a transparent conductive layer having a film thickness of about 0.1 to 0.2 μm using a vacuum film forming apparatus such as SPT. As shown in FIG. 10E and FIG. 11E, the pixel electrode 22 is selectively formed on the passivation insulating layer 37 including the opening 62 by a microfabrication technique to complete the active substrate 2. A part of the exposed scanning line 11 in the opening 63 may be used as the electrode terminal 5 and a part of the exposed signal line 12 in the opening 64 may be used as the electrode terminal 6. As shown in FIG. The electrode terminals 5A and 6A made of ITO may be selectively formed on the passivation insulating layer 37 including 63 and 64, but normally the transparent conductive short-circuit line 40 connecting the electrode terminals 5A and 6A is also provided. Formed simultaneously. The reason is that although not shown, the resistance between the electrode terminals 5A and 6A and the short-circuit line 40 can be increased in resistance by increasing the resistance by forming an elongated stripe. Similarly, although no number is given, an electrode terminal to the storage capacitor line 16 is formed including the opening 65.

信号線12の配線抵抗が問題とならない場合にはALよりなる低抵抗配線層35は必ずしも必要ではなく、その場合にはCr,Ta,MoW等の耐熱金属材料を選択すればソース・ドレイン配線12,21を単層化して簡素化することが可能である。このようにソース・ドレイン配線は耐熱金属層を用いて第2の非晶質シリコン層と電気的な接続を確保することが重要であり、絶縁ゲート型トランジスタの耐熱性については先行例である特開平7−74368号公報に詳細が記載されている。なお、図10(c)において蓄積容量線16とドレイン電極21とがゲート絶縁層30を介して平面的に重なっている領域50(右下がり斜線部)が蓄積容量15を形成しているがここではその詳細な説明は省略する。
特開平7−74368号公報
When the wiring resistance of the signal line 12 does not become a problem, the low resistance wiring layer 35 made of AL is not necessarily required. In that case, if a heat-resistant metal material such as Cr, Ta, or MoW is selected, the source / drain wiring 12 is formed. , 21 can be simplified by forming a single layer. As described above, it is important to ensure electrical connection between the source / drain wiring and the second amorphous silicon layer by using a refractory metal layer, and the heat resistance of the insulated gate transistor is a precedent example. Details are described in Japanese Utility Model Publication No. 7-74368. In FIG. 10C, the storage capacitor 15 is formed by a region 50 (shaded portion in the lower right) where the storage capacitor line 16 and the drain electrode 21 are planarly overlapped via the gate insulating layer 30. Then, the detailed description is abbreviate | omitted.
JP-A-7-74368

以上述べた5枚マスク・プロセスは詳細な経緯は省略するが、半導体層の島化工程の合理化とコンタクト形成工程が削減された結果得られたもので、当初は7〜8枚程度必要であったフォトマスクもドライエッチ技術の導入により、現時点では5枚に減少してプロセスコストの削減に大きく寄与している。液晶表示装置の生産コストを下げるためにはアクティブ基板の作製工程ではプロセスコストを、またパネル組立工程とモジュール実装工程では部材コストを下げることが有効であることは周知の開発目標である。 Although the detailed process of the five-mask process described above is omitted, it was obtained as a result of rationalizing the island formation process of the semiconductor layer and reducing the contact formation process, and originally required about 7 to 8 sheets. Photomasks have been reduced to 5 at the present time by the introduction of dry etching technology, which has greatly contributed to the reduction of process costs. In order to reduce the production cost of the liquid crystal display device, it is a well-known development target that it is effective to reduce the process cost in the manufacturing process of the active substrate and the member cost in the panel assembly process and the module mounting process.

ここ数年の携帯電話の急激な普及により当初は相手先の電話番号を表示するだけの機能で、当然白黒表示のセグメント型で事が足りた液晶表示パネルもカラー化、高精細化、動画対応とその機能と性能は飛躍的に進化している。携帯電話においては電池の寿命の課題もあり、使用する環境は明るい所と制約はあるものの裏面光源による電力消費が無い反射型の液晶表示パネルの要望は根強いものがある。液晶表示パネルを反射型として機能させるためには当然反射電極が必要であり、透過型と反射型の二つの機能を有する半透過型の液晶パネルについて以下にその製法について簡単に説明する。ただし、ここでは絶縁ゲート型トランジスタについてはチャネルエッチ型のものを採用して説明する。 Due to the rapid spread of mobile phones over the past few years, the LCD display panel was originally a function that only displayed the phone number of the other party, and of course it was sufficient for the segment type of black and white display. And its functions and performance have evolved dramatically. In mobile phones, there is a problem of battery life, and there is a strong demand for a reflective liquid crystal display panel that does not consume power by a back light source, although there are restrictions on the usage environment. In order to make the liquid crystal display panel function as a reflective type, a reflective electrode is naturally necessary, and a manufacturing method of a transflective liquid crystal panel having two functions of a transmissive type and a reflective type will be briefly described below. However, here, an insulated gate transistor will be described as a channel etch type.

先ず5枚マスク・プロセスと同様にガラス基板2の一主面上にSPT等の真空製膜装置を用いて膜厚0.1〜0.3μm程度の第1の金属層を被着し、図12(a)と図13(a)に示したように微細加工技術によりゲート電極11Aも兼ねる走査線11と蓄積容量線16を選択的に形成する。 First, as in the five-mask process, a first metal layer having a thickness of about 0.1 to 0.3 μm is deposited on one main surface of the glass substrate 2 using a vacuum film forming apparatus such as SPT. As shown in FIGS. 12A and 13A, the scanning lines 11 and the storage capacitor lines 16 that also serve as the gate electrodes 11A are selectively formed by a fine processing technique.

次にガラス基板2の全面にPCVD装置を用いてゲート絶縁層となるSiNx層30、不純物をほとんど含まず絶縁ゲート型トランジスタのチャネルとなる第1の非晶質シリコン層31、及び不純物を含み絶縁ゲート型トランジスタのソース・ドレインとなる第2の非晶質シリコン層33と3種類の薄膜層を例えば0.3−0.2−0.05μm程度の膜厚で順次被着する。 Next, a SiNx layer 30 that becomes a gate insulating layer, a first amorphous silicon layer 31 that hardly contains impurities and becomes a channel of an insulated gate transistor, and an insulating material that contains impurities by using a PCVD apparatus over the entire surface of the glass substrate 2. The second amorphous silicon layer 33 and the three kinds of thin film layers, which serve as the source / drain of the gate type transistor, are sequentially deposited with a film thickness of, for example, about 0.3-0.2-0.05 μm.

続いて図12(b)と図13(b)に示したように微細加工技術によりゲート電極11A上に第2の非晶質シリコン層33Aと第1の非晶質シリコン層31Aとの積層よりなる島状の半導体層を形成してゲート絶縁層30を露出する。 Subsequently, as shown in FIGS. 12B and 13B, the second amorphous silicon layer 33A and the first amorphous silicon layer 31A are stacked on the gate electrode 11A by a fine processing technique. An island-shaped semiconductor layer is formed to expose the gate insulating layer 30.

そしてSPT等の真空製膜装置を用いて膜厚0.1μm程度の耐熱金属層として例えばTi薄膜層34と、膜厚0.3μm程度の低抵抗配線層としてAL薄膜層35と、さらに膜厚0.1μm程度の中間導電層として例えばTi薄膜層36を、すなわちソース・ドレイン配線材を順次被着し、そしてこれら3層の薄膜よりなるソース・ドレイン配線材と第2の非晶質シリコン層33Aと第1の非晶質シリコン層31Aを微細加工技術により感光性樹脂パターンを用いて順次食刻してゲート絶縁層30を露出し、図12(c)と図13(c)に示したようにゲート電極11Aと一部重なるように34A,35A及び36Aの積層よりなる絶縁ゲート型トランジスタのドレイン電極21と、ソース電極も兼ねる信号線12を選択的に形成する。ソース・ドレイン配線12,21の形成に当り感光性樹脂パターンをマスクとして、Ti薄膜層34AL、薄膜層35及びTi薄膜層36の食刻に引き続いてソース・ドレイン配線12,21間(チャネル形成領域)の第2の非晶質シリコン層33A及び第1の非晶質シリコン層31Aを順次食刻し、第1の非晶質シリコン層31Aは0.05〜0.1μm程度残して食刻する。ソース・ドレイン配線12,21が金属層をエッチングした後に第1の非晶質シリコン層31Aを0.05〜0.1μm程度残して食刻することによりなされるので、このような製法で得られる絶縁ゲート型トランジスタはチャネル・エッチと呼称されている。なおソース・ドレイン配線12,21の構成としては抵抗値の制約が緩いのであれば簡素化してTa,Cr,MoW等の単層とすることも可能である。 Then, using a vacuum film forming apparatus such as SPT, for example, a Ti thin film layer 34 as a heat-resistant metal layer having a thickness of about 0.1 μm, an AL thin film layer 35 as a low resistance wiring layer having a thickness of about 0.3 μm, and a film thickness For example, a Ti thin film layer 36, that is, a source / drain wiring material is sequentially deposited as an intermediate conductive layer of about 0.1 μm, and the source / drain wiring material and the second amorphous silicon layer comprising these three layers of thin film 33A and the first amorphous silicon layer 31A are sequentially etched using a photosensitive resin pattern by a microfabrication technique to expose the gate insulating layer 30, as shown in FIGS. 12C and 13C. Thus, the drain electrode 21 of the insulated gate transistor formed by stacking 34A, 35A and 36A and the signal line 12 which also serves as the source electrode are selectively formed so as to partially overlap the gate electrode 11A. The source / drain wirings 12 and 21 are formed using the photosensitive resin pattern as a mask, followed by etching of the Ti thin film layer 34AL, the thin film layer 35, and the Ti thin film layer 36 (between the source / drain wirings 12 and 21 (channel forming region)). The second amorphous silicon layer 33A and the first amorphous silicon layer 31A are sequentially etched, and the first amorphous silicon layer 31A is etched leaving about 0.05 to 0.1 μm. . Since the source / drain wirings 12 and 21 are etched by etching the metal layer and then leaving the first amorphous silicon layer 31A by about 0.05 to 0.1 μm, it can be obtained by such a manufacturing method. Insulated gate transistors are called channel etches. The configuration of the source / drain wirings 12 and 21 can be simplified to a single layer of Ta, Cr, MoW or the like if the resistance value is loosely restricted.

ソース・ドレイン配線12,21の形成後、ガラス基板2の全面に透明性の絶縁層として0.3μm程度の膜厚の第2のSiNx層を被着してパシベーション絶縁層37とし、さらに透明性の絶縁層として3μm程度の膜厚の透明性と耐熱性の高い感光性アクリル樹脂を塗布して凹凸層39とし、図12(d)と図13(d)に示したようにフォトマスクを用いた選択的紫外線照射によりドレイン電極21上、走査線の一部5上及び信号線の一部6上に夫々開口部62,63及び64を形成して現像処理の後、凹凸層39を熱硬化する。そして開口部62,64内のパシベーション絶縁層37を除去するとともに開口部63内ではパシベーション絶縁層37に加えてゲート絶縁層30をも除去して開口部62,63及び64内に夫々ドレイン電極21の一部、走査線の一部5及び信号線の一部6を露出する。同様に蓄積容量線16上には開口部65を形成して蓄積容量線16の一部を露出する。 After the source / drain wirings 12 and 21 are formed, a second SiNx layer having a thickness of about 0.3 μm is deposited on the entire surface of the glass substrate 2 as a transparent insulating layer to form a passivation insulating layer 37, and further transparent As the insulating layer, a transparent acrylic resin having a film thickness of about 3 μm and high heat resistance is applied to form an uneven layer 39, and a photomask is used as shown in FIGS. 12 (d) and 13 (d). The openings 62, 63 and 64 are formed on the drain electrode 21, on the scanning line part 5 and on the signal line part 6 by selective ultraviolet irradiation, and after the development processing, the uneven layer 39 is thermally cured. To do. Then, the passivation insulating layer 37 in the openings 62 and 64 is removed, and in addition to the passivation insulating layer 37 in the opening 63, the gate insulating layer 30 is also removed, and the drain electrode 21 is placed in the openings 62, 63 and 64, respectively. , A scanning line part 5 and a signal line part 6 are exposed. Similarly, an opening 65 is formed on the storage capacitor line 16 to expose a part of the storage capacitor line 16.

凹凸層39は文字通りその表面に高さ1μm以下の凹凸を有しているので、凹凸層39上に形成された金属電極は散乱電極として機能させることが可能である。図12(d)ではその凹凸に対応したパターンの一つを70として均一に分布させて記載している。パターン70の大きさは通常数μmで、また固定パターンによる光干渉が生じないようにパターン70の中心位置はランダムに分布させるのが一般的である。感光性アクリル樹脂39の表面に波長の短い紫外線を照射して表面層の硬化を強めて熱硬化時に表面層で凹凸を形成する、同じく強アルカリ液に浸透させて表面層を柔らかくして熱硬化時に表面層で凹凸を形成する、あるいは感光性アクリル樹脂39を2層で形成して一方の感光性アクリル樹脂に流動性を持たせて熱硬化である程度丸みを帯びさせてから流動性の無い感光性アクリル樹脂を積層させて凹凸を形成する等の技術が先行例に開示されているが、本発明の目的は凹凸を形成する技術ではないのでここではその詳細は省略する。 Since the concavo-convex layer 39 literally has concavo-convex portions with a height of 1 μm or less on its surface, the metal electrode formed on the concavo-convex layer 39 can function as a scattering electrode. In FIG. 12D, one of the patterns corresponding to the unevenness is shown as 70 uniformly distributed. The size of the pattern 70 is usually several μm, and the center position of the pattern 70 is generally randomly distributed so that optical interference due to the fixed pattern does not occur. Irradiating the surface of the photosensitive acrylic resin 39 with ultraviolet rays having a short wavelength to strengthen the surface layer and form irregularities on the surface layer during thermal curing. Similarly, the surface layer is infiltrated with a strong alkaline solution to soften the surface layer and heat cure. Occasionally unevenness is formed in the surface layer, or photosensitive acrylic resin 39 is formed in two layers, one of the photosensitive acrylic resins is made fluid and is rounded to some extent by thermosetting, and then the non-fluid photosensitive A technique such as laminating a functional acrylic resin to form irregularities has been disclosed in the preceding examples, but the object of the present invention is not a technique for forming irregularities, and therefore details thereof are omitted here.

このようにチャネルエッチ型の絶縁ゲート型トランジスタでは通常SiNxよりなるパシベーション絶縁層37をアクティブ基板2上に被着した後、アクリル樹脂による凹凸層39の形成が必要であるが、エッチストップ型の絶縁ゲート型トランジスタはチャネル上に保護絶縁層32Dを有するのでアクティブ基板2のパシベーション層にアクリル樹脂を形成しても絶縁ゲート型トランジスタの電気的な特性が変動することは無い。 As described above, in the channel-etch type insulated gate transistor, it is necessary to form the concavo-convex layer 39 with acrylic resin after depositing the passivation insulating layer 37 made of SiNx on the active substrate 2. Since the gate type transistor has the protective insulating layer 32D on the channel, even if an acrylic resin is formed on the passivation layer of the active substrate 2, the electrical characteristics of the insulated gate type transistor do not change.

凹凸層39の形成後、ガラス基板2の全面にSPT等の真空製膜装置を用いて膜厚0.1〜0.2μm程度の透明導電層91として例えばITOを被着し、図12(e)と図13(e)に示したように微細加工技術により開口部62を含んで接続電極22Aと、透過電極としての絵素電極22と、開口部63を含んで走査線の電極端子5Aと、開口部64を含んで信号線の電極端子6Aを形成する。透過電極と反射電極の配置によって接続電極22Aは絵素電極22の一部として連続して形成される。接続電極22Aは必ずしも必要ではないが、ドレイン電極21の一部がこれ以降の製造工程で損傷を受けてコンタクト不良等が生じないように後続の反射電極との間に介在させると良い。 After the formation of the concavo-convex layer 39, for example, ITO is deposited on the entire surface of the glass substrate 2 as a transparent conductive layer 91 having a film thickness of about 0.1 to 0.2 μm using a vacuum film forming apparatus such as SPT. ) And FIG. 13 (e), the connection electrode 22A including the opening 62, the pixel electrode 22 as the transmissive electrode, and the electrode terminal 5A of the scanning line including the opening 63 are formed by the fine processing technique. The electrode terminal 6A of the signal line is formed including the opening 64. The connection electrode 22 </ b> A is continuously formed as a part of the pixel electrode 22 by arranging the transmission electrode and the reflection electrode. Although the connection electrode 22A is not always necessary, it is preferable to interpose the connection electrode 22A with the subsequent reflective electrode so that a part of the drain electrode 21 is damaged in the subsequent manufacturing process and does not cause contact failure.

最後にSPT等の真空製膜装置を用いて膜厚0.1μm程度の緩衝層92として例えばMoと膜厚0.1〜0.2μm程度の反射率の高い金属層93として例えばアルミニウムを被着し、図12(f)と図13(f)に示したように透明導電性の絵素電極22と一部重なるように緩衝層92(41)とアルミニウム層93(41)との積層よりなる反射電極41を形成して半透過型液晶表示装置のアクティブ基板2として完成する。緩衝層92(41)はアルミニウムとITOとが直接接触することでアルカリ性の現像液とレジスト 剥離液においてITOが還元されてアルミニウムもろとも剥離してしまう電池効果を回避するために必要であるが、アルカリ液中での化学的な電位を下げるために数%のNdを含むアルミニウム合金AL(Nd)では緩衝層92(41)は不要となる。 Finally, using a vacuum film-forming apparatus such as SPT, for example, Mo is deposited as a buffer layer 92 having a thickness of about 0.1 μm and, for example, aluminum is deposited as a metal layer 93 having a high reflectance of about 0.1 to 0.2 μm. 12 (f) and 13 (f), the buffer layer 92 (41) and the aluminum layer 93 (41) are laminated so as to partially overlap the transparent conductive pixel electrode 22. The reflective electrode 41 is formed to complete the active substrate 2 of the transflective liquid crystal display device. The buffer layer 92 (41) is necessary in order to avoid the battery effect that ITO is reduced in the alkaline developer and resist stripping solution by the direct contact between aluminum and ITO, and peels off the aluminum. In order to lower the chemical potential in the alkaline solution, the aluminum alloy AL (Nd) containing several percent of Nd does not require the buffer layer 92 (41).

なお図12(c)において蓄積容量線16とドレイン電極21とがゲート絶縁層30を介して平面的に重なっている領域50(右下がり斜線部)が蓄積容量15を形成しているが、前段の走査線11と走査線11上に形成された蓄積電極とがゲート絶縁層30を含む絶縁層を介して平面的に重なることで蓄積容量15を形成することも可能である。この場合はドレイン電極21に接続された透過電極22または反射電極41と蓄積電極との接続も必要であるがここでは詳細な説明は省略する。 In FIG. 12C, the storage capacitor 15 is formed by a region 50 (shaded portion to the right) where the storage capacitor line 16 and the drain electrode 21 overlap in plan via the gate insulating layer 30. It is also possible to form the storage capacitor 15 by planarly overlapping the scanning line 11 and the storage electrode formed on the scanning line 11 with an insulating layer including the gate insulating layer 30 interposed therebetween. In this case, connection between the transmissive electrode 22 or the reflective electrode 41 connected to the drain electrode 21 and the storage electrode is also necessary, but detailed description thereof is omitted here.

このように半透過型液晶表示装置においは透過型液晶表示装置に反射電極の形成が追加されるのでフォトマスク数が5枚から6枚に増加し、その製造コストは必然的に上昇する。製造コストの上昇を抑えるためには大量生産によるコストダウンだけでなく、製造工程数を短くすることも重要である。   As described above, in the transflective liquid crystal display device, since the formation of the reflective electrode is added to the transmissive liquid crystal display device, the number of photomasks increases from 5 to 6, and the manufacturing cost inevitably increases. In order to suppress an increase in manufacturing costs, it is important not only to reduce costs by mass production, but also to shorten the number of manufacturing processes.

本発明はかかる現状に鑑みなされたもので、半導体層の島化工程とソース・ドレイン配線形成工程を1枚のフォトマスクを用いて処理するために開発されたハーフトーン露光技術と同じ手法で反射電極と透過電極を1枚のフォトマスクを用いて処理する製造工程の削減を実現するものである。 The present invention has been made in view of such a situation, and the reflection is performed in the same manner as the halftone exposure technique developed for processing the island formation process of the semiconductor layer and the source / drain wiring formation process using a single photomask. It is possible to reduce the number of manufacturing processes in which the electrode and the transmissive electrode are processed using a single photomask.

本発明においては従来のように透過電極と反射電極を異なったフォトマスクを用いて別々の工程で作製するのではなく、透明導電層と反射金属層を積層した後、ハーフトーン露光技術により反射電極形成領域上の膜厚が透過電極形成領域上の膜厚よりも厚い感光性樹脂パターンを形成し、前記感光性樹脂パターンを用いて透過電極と反射電極を合わせた大きさの反射電極を形成した後に前記感光性樹脂パターンの膜厚を減じ、透過電極上の反射金属層を除去することで透過電極を形成している。 In the present invention, the transparent electrode and the reflective electrode are not manufactured in different steps using different photomasks as in the prior art, but after the transparent conductive layer and the reflective metal layer are laminated, the reflective electrode is formed by a halftone exposure technique. A photosensitive resin pattern having a film thickness on the formation region thicker than that on the transmission electrode formation region was formed, and a reflection electrode having a size combining the transmission electrode and the reflection electrode was formed using the photosensitive resin pattern. Later, the thickness of the photosensitive resin pattern is reduced and the reflective metal layer on the transmissive electrode is removed to form the transmissive electrode.

請求項1に記載の液晶表示装置は、一主面上に少なくとも絶縁ゲート型トランジスタと、前記絶縁ゲート型トランジスタのゲート電極も兼ねる走査線とソース配線も兼ねる信号線と、ドレイン配線に接続された絵素電極とを有する単位絵素が二次元のマトリクスに配列された第1の透明性絶縁基板と、前記第1の透明性絶縁基板と対向する第2の透明性絶縁基板またはカラーフィルタとの間に液晶を充填してなる液晶表示装置において、
第1の透明性絶縁基板の一主面上に絶縁ゲート型トランジスタと走査線と信号線が形成され、
少なくともドレイン電極上に開口部を有し、一部の領域でその表面に凹凸を有する透明絶縁層が前記第1の透明性絶縁基板上に形成され、
前記凹凸領域上では1層以上の反射金属層と透明導電層との積層よりなる反射電極と、その他の領域では前記開口部を含んで前記透明導電層と連続した透明導電性の透過電極が形成されていることを特徴とする。
The liquid crystal display device according to claim 1 is connected to at least an insulated gate transistor, a scanning line also serving as a gate electrode of the insulated gate transistor, a signal line also serving as a source wiring, and a drain wiring on one main surface. A first transparent insulating substrate in which unit pixel elements each having a pixel electrode are arranged in a two-dimensional matrix; and a second transparent insulating substrate or a color filter facing the first transparent insulating substrate. In a liquid crystal display device in which liquid crystal is filled in between,
An insulated gate transistor, a scanning line, and a signal line are formed on one main surface of the first transparent insulating substrate,
A transparent insulating layer having an opening on at least the drain electrode and having irregularities on the surface thereof in a part of the region is formed on the first transparent insulating substrate,
A reflective electrode composed of a laminate of one or more reflective metal layers and a transparent conductive layer is formed on the uneven region, and a transparent conductive transmissive electrode continuous with the transparent conductive layer including the opening is formed in other regions. It is characterized by being.

この構成により透明導電層と反射金属層との積層よりなる絵素電極と透明導電層のみからなる絵素電極が得られ、夫々反射電極及び透過電極として機能する。しかも反射電極は凹凸を有する透明絶縁層上に形成されて散乱特性が付与されている。 With this configuration, a pixel electrode composed of a laminate of a transparent conductive layer and a reflective metal layer and a pixel electrode composed only of the transparent conductive layer are obtained, and function as a reflective electrode and a transmissive electrode, respectively. In addition, the reflective electrode is formed on the transparent insulating layer having irregularities and is given scattering characteristics.

請求項2は請求項1に記載の液晶表示装置の製造方法であって、
第1の透明性絶縁基板の一主面上に絶縁ゲート型トランジスタと走査線と信号線を形成する工程と、
少なくともドレイン電極上に開口部を有し、一部の領域でその表面に凹凸を有する透明絶縁層を前記第1の透明性絶縁基板上に形成する工程と、
透明導電層と1層以上の金属層を被着後、前記開口部を含んで前記凹凸領域の反射電極と凹凸領域外の透明導電性の透過電極に対応し、前記反射電極上の膜厚が前記透過電極上の膜厚よりも厚い感光性樹脂パターンを形成する工程と、
前記感光性樹脂パターンをマスクとして前記金属層を選択的に除去して前記透明導電層を露出する工程と、
前記感光性樹脂パターンの膜厚を減じて前記透過電極形成領域の金属層を露出し、前記膜厚を減ぜられた感光性樹脂パターンと前記透過電極形成領域の金属層をマスクとして前記透明導電層を選択的に除去して前記透明絶縁層を露出する工程と、
前記膜厚を減ぜられた感光性樹脂パターンをマスクとして前記透過電極形成領域の金属層を除去して透明導電性の透過電極を露出する工程を有することを特徴とする。
Claim 2 is a method of manufacturing a liquid crystal display device according to claim 1,
Forming an insulated gate transistor, a scanning line, and a signal line on one main surface of the first transparent insulating substrate;
Forming a transparent insulating layer on the first transparent insulating substrate having an opening on at least the drain electrode and having irregularities on the surface in a part of the region;
After depositing the transparent conductive layer and one or more metal layers, the film thickness on the reflective electrode corresponds to the reflective electrode in the uneven region and the transparent conductive transparent electrode outside the uneven region including the opening. Forming a photosensitive resin pattern thicker than the film thickness on the transmissive electrode;
Selectively removing the metal layer using the photosensitive resin pattern as a mask to expose the transparent conductive layer;
The thickness of the photosensitive resin pattern is reduced to expose the metal layer in the transmissive electrode formation region, and the transparent conductive material is masked using the reduced thickness of the photosensitive resin pattern and the metal layer in the transmissive electrode formation region. Selectively removing the layer to expose the transparent insulating layer;
The method includes the step of exposing the transparent conductive transparent electrode by removing the metal layer in the transparent electrode forming region using the photosensitive resin pattern having a reduced thickness as a mask.

この構成により1枚のフォトマスクを用いて反射電極と透過電極を処理することが可能となる。またハーフトーン露光技術により得られた異なった膜厚を有する感光性樹脂パターンの膜厚を減少せしめる工程において、有機性樹脂よりなりその表面に凹凸を有する透明絶縁層は透明導電層で被覆されているので透明絶縁層が膜減りすることは回避され、アクティブ基板上に不要な段差が生じて配向処理の障害となることも無く、また反射電極もその所定の断面形状を維持することができる。 With this configuration, the reflective electrode and the transmissive electrode can be processed using one photomask. In the process of reducing the film thickness of the photosensitive resin pattern having different film thickness obtained by the halftone exposure technique, the transparent insulating layer made of an organic resin and having irregularities on the surface thereof is covered with the transparent conductive layer. Therefore, the reduction of the thickness of the transparent insulating layer is avoided, an unnecessary step is not generated on the active substrate, and the alignment process is not obstructed, and the reflective electrode can maintain its predetermined cross-sectional shape.

以上述べたように本発明は半透過型の液晶表示装置の作製に当たり、透明導電層と(緩衝層と)反射金属層を積層した後、ハーフトーン露光技術により反射電極形成領域上の膜厚が透過電極形成領域上の膜厚よりも厚い感光性樹脂パターンを形成し、前記感光性樹脂パターンを用いて透過電極と反射電極を合わせた大きさの反射電極を形成した後に前記感光性樹脂パターンの膜厚を減じ、透過電極上の反射金属層を除去することで透過電極を形成する合理化技術を核とし、この構成に基づいてさまざまなアクティブ基板を提案している。したがって従来の製造方法と比較すると写真食刻工程数の低減が可能となり低コスト化に大きく寄与する。 As described above, in the production of the transflective liquid crystal display device, the transparent conductive layer and the buffer metal layer are laminated, and then the film thickness on the reflective electrode formation region is increased by the halftone exposure technique. A photosensitive resin pattern thicker than the film thickness on the transmissive electrode formation region is formed, and after forming a reflective electrode having a size in which the transmissive electrode and the reflective electrode are combined using the photosensitive resin pattern, the photosensitive resin pattern Various active substrates have been proposed based on this structure, with the rationalization technique of forming the transmissive electrode by reducing the film thickness and removing the reflective metal layer on the transmissive electrode. Therefore, compared with the conventional manufacturing method, the number of photolithography steps can be reduced, which greatly contributes to cost reduction.

また透過電極と反射電極が同時に形成されるのでこれらの電極間のマスク合わせ精度は0となり、わずかではあるが画素電極を大きくすることができるので開口率も向上して明るい表示画像が得られる。しかもこれらの工程のパターン精度は高くないので歩留や品質に大きな影響を与えない事も生産管理を容易なものとしてくれる。 Further, since the transmissive electrode and the reflective electrode are formed at the same time, the mask alignment accuracy between these electrodes becomes 0, and although the pixel electrode can be enlarged slightly, the aperture ratio is improved and a bright display image is obtained. Moreover, since the pattern accuracy of these processes is not high, production management is also facilitated by not greatly affecting the yield and quality.

本発明の要件は上記の説明からも明らかなように半透過型の液晶表示装置の作製に当たり、透明導電層と(緩衝層と)反射金属層を積層した後、ハーフトーン露光技術により反射電極形成領域上の膜厚が透過電極形成領域上の膜厚よりも厚い感光性樹脂パターンを形成し、前記感光性樹脂パターンを用いて透過電極と反射電極を合わせた大きさの反射電極を形成した後に前記感光性樹脂パターンの膜厚を減じ、透過電極上の反射金属層を除去して透過電極を形成することで透過電極と反射電極の形成を1枚のフォトマスクで処理することを可能ならしめた点にあり、それ以外の構成に関しては走査線、信号線、絵素電極、ゲート絶縁層等の材質や膜厚等が異なった液晶表示装置あるいはその製造方法の差異も本発明の範疇に属することは自明であり、また絶縁ゲート型トランジスタの半導体層も非晶質シリコンに限定されるものでないことも明らかである。 As is apparent from the above description, the requirement of the present invention is that when a transflective liquid crystal display device is produced, a transparent conductive layer and a buffer metal layer are laminated, and then a reflective electrode is formed by a halftone exposure technique. After forming a photosensitive resin pattern in which the film thickness on the region is thicker than the film thickness on the transmissive electrode formation region, and forming a reflective electrode having a size that combines the transmissive electrode and the reflective electrode using the photosensitive resin pattern By forming the transmissive electrode by reducing the film thickness of the photosensitive resin pattern and removing the reflective metal layer on the transmissive electrode, it is possible to process the formation of the transmissive electrode and the reflective electrode with a single photomask. With respect to other configurations, liquid crystal display devices having different materials and film thicknesses such as scanning lines, signal lines, picture element electrodes, and gate insulating layers, and differences in manufacturing methods thereof also belong to the category of the present invention. It's obvious There also is apparent that not but also the semiconductor layer of the insulated gate transistor is limited to amorphous silicon.

本発明の実施例を図1〜図6に基づいて説明する。図1に本発明の実施例1に係る表示装置用半導体装置(アクティブ基板)の平面図を示し、図2に図1(h)のA−A’線上とB−B’線上及びC−C’線上の製造工程の断面図を示す。同様に液晶表示装置の一部を設計変更した参考例1は図3と図4、同じく参考例2は図5と図6とで夫々アクティブ基板の平面図と断面図を示す。なお従来例と同一の部位については同一の符号を付して詳細な説明は省略する。本発明では絶縁ゲート型トランジスタの構造や蓄積容量の形態は任意であり、反射電極に散乱性を与えるための凹凸層を有する透明樹脂層を形成した後の製造工程に発明性が存在する。そこで実施例1ではチャネルエッチ型の5枚マスク・プロセスを採用して詳細な説明を行うが、エッチストップ型の5枚・プロセスさらには合理化されたチャネルエッチ型の4枚マスク・プロセスを採用しても何ら支障は無い。 An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a plan view of a display device semiconductor device (active substrate) according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view along the lines AA ′, BB ′ and CC in FIG. 'A cross-sectional view of the manufacturing process on the line is shown. Similarly, FIG. 3 and FIG. 4 show the reference example 1 in which a part of the liquid crystal display device is redesigned, and FIG. 5 and FIG. 6 show the reference example 2 and FIG. 5 and FIG. In addition, about the site | part same as a prior art example, the same code | symbol is attached | subjected and detailed description is abbreviate | omitted. In the present invention, the structure of the insulated gate transistor and the form of the storage capacitor are arbitrary, and the inventive step exists after the formation of the transparent resin layer having the concavo-convex layer for imparting scattering properties to the reflective electrode. Therefore, in the first embodiment, a detailed description will be given by adopting a channel etch type five-mask process, but an etch stop type five-mask process and a streamlined channel etch type four-mask process are adopted. There is no problem.

実施例1では図1(d)と図2(d)に示したようにドレイン電極21上、走査線の一部5上及び信号線の一部6上に夫々開口部62,63及び64を有する凹凸層39を形成し、これらの電極の一部を露出するまでは従来例と同一の製造工程を進行する。 In the first embodiment, as shown in FIGS. 1D and 2D, openings 62, 63 and 64 are formed on the drain electrode 21, on the scanning line part 5 and on the signal line part 6, respectively. The same manufacturing process as that of the conventional example is performed until the uneven layer 39 is formed and a part of these electrodes is exposed.

続いてSPT等の真空製膜装置を用いて膜厚0.1〜0.2μm程度の透明導電層91として例えばITOと、膜厚0.1μm程度の緩衝層92として例えばMoと、さらに膜厚0.1〜0.2μm程度の高反射金属層93として例えばアルミニウムを被着した後、ハーフトーン露光技術を用いて反射電極形成領域に対応した81A(41)の膜厚が例えば3μmと、透過電極形成領域に対応した81B(22)及び電極端子形成領域に対応した81B(5A)及び81B(6A)の膜厚の1.5μmよりも厚い感光性樹脂パターン81A,81Bを形成する。 Subsequently, using a vacuum film forming apparatus such as SPT, for example, ITO as the transparent conductive layer 91 having a thickness of about 0.1 to 0.2 μm, Mo for example as the buffer layer 92 having a thickness of about 0.1 μm, and further the thickness. After depositing, for example, aluminum as the highly reflective metal layer 93 of about 0.1 to 0.2 μm, the film thickness of 81 A (41) corresponding to the reflective electrode formation region is 3 μm, for example, using a halftone exposure technique. Photosensitive resin patterns 81A and 81B thicker than 1.5 μm in thickness of 81B (22) corresponding to the electrode formation region and 81B (5A) and 81B (6A) corresponding to the electrode terminal formation region are formed.

このような感光性樹脂パターン81A,81Bは、液晶表示装置用基板の作製には通常ポジ型の感光性樹脂を用いるので、反射電極形成領域81Aが黒、すなわちCr薄膜が形成されており、透過電極形成領域及び電極端子形成領域81Bは灰色、たとえば幅0.5〜1.5μm程度のラインアンドスペースのCrパターンが形成されており、その他の領域は白、すなわちCr薄膜が除去されているようなフォトマスクを用いれば良い。灰色領域は露光機の解像力が不足しているためにラインアンドスペースが解像されることはなく、ランプ光源からのフオトマスク照射光を半分程度透過させることが可能であるので、ポジ型感光性樹脂の残膜特性に応じて図2(e)に示したような断面形状を有する感光性樹脂パターン81A,81Bを得ることができる。灰色領域では紫外線の透過光量をある程度確保すれば良いのであるからラインアンドスペースに限らず、膜厚の薄いCrその他の薄膜が形成されて光吸収機能が付与されていても良く、ハーフトーン用のフォトマスクは必要とされるパターン精度や透過光量に応じて今後逐次開発が進むものと思われる。 Since the photosensitive resin patterns 81A and 81B usually use a positive type photosensitive resin for the production of the substrate for the liquid crystal display device, the reflective electrode formation region 81A is black, that is, a Cr thin film is formed, and the transmission film is transmitted. The electrode formation region and the electrode terminal formation region 81B are gray, for example, a line and space Cr pattern having a width of about 0.5 to 1.5 μm is formed, and the other regions are white, that is, the Cr thin film is removed. A suitable photomask may be used. In the gray area, the line-and-space is not resolved because the resolving power of the exposure machine is insufficient, and it is possible to transmit about half of the photomask irradiation light from the lamp light source. According to the remaining film characteristics, photosensitive resin patterns 81A and 81B having a cross-sectional shape as shown in FIG. 2E can be obtained. In the gray region, it is only necessary to secure a certain amount of transmitted UV light. Therefore, not only the line and space, but also a thin film of Cr or other thin film may be formed to provide a light absorption function. Photomasks are expected to be developed in the future depending on the required pattern accuracy and the amount of transmitted light.

そして図1(e)と図2(e)に示したように感光性樹脂パターン81A,81Bをマスクとして高反射金属層93と緩衝層92を順次もしくは同時に食刻して透明導電層91を露出する。具体的には燐酸に数%以下の硝酸を添加した薬液処理では同時食刻が可能である。 Then, as shown in FIGS. 1E and 2E, the transparent conductive layer 91 is exposed by etching the highly reflective metal layer 93 and the buffer layer 92 sequentially or simultaneously using the photosensitive resin patterns 81A and 81B as a mask. To do. Specifically, simultaneous etching is possible with a chemical treatment in which several percent or less nitric acid is added to phosphoric acid.

引き続き酸素プラズマ処理により感光性樹脂パターン81A,81Bの膜厚を1.5μm減少せしめると感光性樹脂パターン81Bが消滅して透過電極及び電極端子に対応した高反射金属層93(22),93(5A),93(6A)が露出するとともに反射電極形成領域に膜減りした感光性樹脂パターン81C(41)をそのまま残すことができる。この酸素プラズマ処理時に透明導電層91が有機絶縁層よりなる凹凸層39を膜減りから保護している事を理解されたい。そこで図1(f)と図2(f)に示したように感光性樹脂パターン81C(41)と高反射金属層93(22),93(5A),93(6A)をマスクとして透明導電層91を選択的に除去して凹凸層39を露出する。 Subsequently, when the film thickness of the photosensitive resin patterns 81A and 81B is reduced by 1.5 μm by the oxygen plasma treatment, the photosensitive resin pattern 81B disappears and the highly reflective metal layers 93 (22) and 93 (93) corresponding to the transmission electrodes and the electrode terminals are removed. 5A) and 93 (6A) are exposed, and the photosensitive resin pattern 81C (41) reduced in thickness in the reflective electrode formation region can be left as it is. It should be understood that the transparent conductive layer 91 protects the uneven layer 39 made of the organic insulating layer from film loss during the oxygen plasma treatment. Therefore, as shown in FIG. 1 (f) and FIG. 2 (f), the transparent conductive layer 81C (41) and the highly reflective metal layers 93 (22), 93 (5A), and 93 (6A) are used as a mask. The uneven layer 39 is exposed by selectively removing 91.

さらに図1(g)と図2(g)に示したように感光性樹脂パターン81C(41)をマスクとして露出している透過電極上の高反射金属層93(22)と電極端子上の高反射金属層93(5A),93(6A)を除去するとともに緩衝層92(22),92(5A),92(6A)も除去して夫々透過電極22と電極端子5A,6Aを露出する。 Further, as shown in FIGS. 1 (g) and 2 (g), the highly reflective metal layer 93 (22) on the transmissive electrode exposed using the photosensitive resin pattern 81C (41) as a mask and the high on the electrode terminal are provided. The reflective metal layers 93 (5A) and 93 (6A) are removed, and the buffer layers 92 (22), 92 (5A) and 92 (6A) are also removed to expose the transmissive electrode 22 and the electrode terminals 5A and 6A, respectively.

最後に図1(h)と図2(h)に示したようにレジスト剥離液を用いて感光性樹脂パターン81C(41)除去し、緩衝層92(41)と高反射金属層93(41)との積層よりなる反射電極41を露出してアクティブ基板2としての製造工程を終える。このレジスト剥離工程ではアクティブ基板2上に有機性樹脂よりなる凹凸層39が露出しているので酸素プラズマを用いてはならない。従来例でも説明したように高反射金属層93にアルミニウム合金AL(Nd)を選択した場合には緩衝層92の導入は不要である。このようにして得られたアクティブ基板2とカラーフィルタとを貼り合わせて液晶パネル化し、本発明の実施例1が完了する。なお、図1(h)では省略したが従来例のように透明導電性の走査線の電極端子5A及び信号線12の電極端子6Aとアクティブ基板2の外周部に配置された短絡線40とを接続する透明導電層パターンはその形状を細長い線状とすることで静電気対策における高抵抗配線とすることが可能である。 Finally, as shown in FIGS. 1 (h) and 2 (h), the photosensitive resin pattern 81C (41) is removed using a resist stripping solution, and the buffer layer 92 (41) and the highly reflective metal layer 93 (41) are removed. The manufacturing process as the active substrate 2 is completed by exposing the reflective electrode 41 formed of the laminate. In this resist stripping process, since the uneven layer 39 made of an organic resin is exposed on the active substrate 2, oxygen plasma should not be used. As described in the conventional example, when the aluminum alloy AL (Nd) is selected for the highly reflective metal layer 93, the introduction of the buffer layer 92 is unnecessary. The active substrate 2 and the color filter thus obtained are bonded to form a liquid crystal panel, and Example 1 of the present invention is completed. Although not shown in FIG. 1H, the electrode terminal 5A of the transparent conductive scanning line and the electrode terminal 6A of the signal line 12 and the short-circuit line 40 arranged on the outer periphery of the active substrate 2 are provided as in the conventional example. The transparent conductive layer pattern to be connected can be a high-resistance wiring for countermeasures against static electricity by making the shape of the transparent conductive layer pattern into an elongated line.

実施例1ではこのように走査線の電極端子と信号線の電極端子がともに透明導電層であるデバイス構成上の制約が生ずるが、その制約を解除するデバイス・プロセスも可能であり、それを参考例1として説明する。ただし製造工程は変わらないので最終的なアクティブ基板の平面図と断面図の記載のみに止める。
[参考例1]
In the first embodiment, there is a restriction on the device configuration in which both the electrode terminal of the scanning line and the electrode terminal of the signal line are transparent conductive layers as described above. However, a device process that removes the restriction is also possible. This will be described as Example 1. However, since the manufacturing process is not changed, only the plan view and the sectional view of the final active substrate are described.
[Reference Example 1]

参考例1では図1(e)と図2(e)に示したハーフトーン露光技術を用いた感光性樹脂パターンの形成にあたり、電極端子形成領域の膜厚も反射電極形成領域と同様に厚くすることによって金属性の電極端子が得られる。すなわちパターン設計の変更によって電極端子の構成を変更することが可能である。この結果、電極端子は反射電極と同一の構成となり図3(h)と図4(h)に示したように透明導電層91(5A),91(6A)と緩衝層92(5A),92(6A)と高反射金属層93(5A),93(6A)との積層よりなる電極端子が得られ、アクティブ基板2上には走査線の電極端子5として高反射金属層93(5A)と、信号線の電極端子6として高反射金属層93(6A)が露出する。 In Reference Example 1, in forming the photosensitive resin pattern using the halftone exposure technique shown in FIGS. 1E and 2E, the film thickness of the electrode terminal formation region is also increased in the same manner as the reflection electrode formation region. Thus, a metallic electrode terminal can be obtained. That is, it is possible to change the configuration of the electrode terminals by changing the pattern design. As a result, the electrode terminal has the same configuration as that of the reflective electrode, and as shown in FIGS. 3 (h) and 4 (h), the transparent conductive layers 91 (5A) and 91 (6A) and the buffer layers 92 (5A) and 92 (6A) and highly reflective metal layers 93 (5A) and 93 (6A) are obtained as electrode terminals, and on the active substrate 2, as the electrode terminals 5 of the scanning lines, the highly reflective metal layers 93 (5A) and The highly reflective metal layer 93 (6A) is exposed as the electrode terminal 6 of the signal line.

図示はしないが参考例1ではアクティブ基板2の外周部に短絡線40を形成するには短絡線形成領域の感光性樹脂パターンの膜厚を透過電極形成領域と同様に薄くすることによってなされる。 Although not shown, in Reference Example 1, in order to form the short-circuit line 40 on the outer peripheral portion of the active substrate 2, the film thickness of the photosensitive resin pattern in the short-circuit line formation region is reduced as in the transmissive electrode formation region.

反射型液晶表示装置においては反射電極からの反射光が観察者に届くことによって表示装置として機能する。したがって同一の液晶セル厚を有する液晶セル内を通過して生じる光学的な経路差は透過型液晶表示装置のほぼ2倍となり、半透過型液晶表示装置において最大の明るさ(反射率と透過率)が得られるΔnd値が異なってしまう。それを回避するために従来例と実施例1では凹凸層39に開口部38を形成し、開口部内のパシベーション絶縁層とゲート絶縁層を除去して透過領域の液晶セル厚を大きくしている。凹凸層39の膜厚を3μm程度に形成することは容易で、この結果反射部と透過部の液晶セル厚をほぼ2倍にできる(マルチギャップ)。この事項は光学設計の範疇である。
[参考例2]
A reflective liquid crystal display device functions as a display device when reflected light from a reflective electrode reaches an observer. Therefore, the optical path difference generated through the liquid crystal cell having the same liquid crystal cell thickness is almost twice that of the transmissive liquid crystal display device, and the maximum brightness (reflectance and transmittance) in the transflective liquid crystal display device. The Δnd value from which () is obtained is different. In order to avoid this, in the conventional example and the first embodiment, an opening 38 is formed in the concavo-convex layer 39, and the passivation insulating layer and the gate insulating layer in the opening are removed to increase the thickness of the liquid crystal cell in the transmission region. It is easy to form the concavo-convex layer 39 to a thickness of about 3 μm, and as a result, the liquid crystal cell thicknesses of the reflective portion and the transmissive portion can be almost doubled (multi gap). This matter is in the category of optical design.
[Reference Example 2]

しかしながら透過電極22が深い開口部38の底部に位置するため、ラビング布を用いた配向処理で開口部38の周囲に非配向が生じ易く、カラーフィルタ側でのBMによる光シールドが必要となり、開口率もその分下がってしまう。 However, since the transmissive electrode 22 is located at the bottom of the deep opening 38, non-orientation is likely to occur around the opening 38 due to the alignment treatment using a rubbing cloth, and a light shield by BM on the color filter side is required. The rate will drop accordingly.

反射特性を重視した光学設計も可能であり、その場合には反射部と透過部では同一の液晶セル厚で良いので開口部38は不要となって図5(h)と図6(h)に示したように凹凸層39の平坦な領域上に透過電極22が形成され、反射電極41とほぼ同じ高さに位置させることが可能である(シングルギャップ)。 Optical design that emphasizes reflection characteristics is also possible, and in this case, the same liquid crystal cell thickness may be used for the reflective portion and the transmissive portion, so that the opening 38 is not required, and FIGS. 5 (h) and 6 (h) show. As shown, the transmissive electrode 22 is formed on a flat region of the concavo-convex layer 39 and can be positioned at substantially the same height as the reflective electrode 41 (single gap).

シングルギャップでは非配向が原理的に発生しにくいので、透過電極22と反射電極41の内周囲をカラーフィルタ側でのBMで光シールドする必要が無い分マルチギャップよりは開口率が向上し、透過特性の不十分さを補足することができる。   Since non-alignment is unlikely to occur in principle with a single gap, the aperture ratio is improved over the multi-gap because the inner periphery of the transmissive electrode 22 and the reflective electrode 41 does not need to be light shielded with BM on the color filter side. The lack of properties can be supplemented.

液晶セル厚はアクティブ基板2上の透過電極22及び反射電極41とカラーフィルタ9上に形成された対向電極14との距離で決まる物理量であり、したがってカラーフィルタ9上の着色層18の膜厚を変えることでΔnd値を変えることも可能であり、今後はカラーフィルタの製造コストは上昇するが光学設計の自由度が増すので半透過型液晶表表示装置の光学特性向上に向けて様々な光学設計技術と部材技術が展開されると思われる。   The liquid crystal cell thickness is a physical quantity determined by the distance between the transmissive electrode 22 and the reflective electrode 41 on the active substrate 2 and the counter electrode 14 formed on the color filter 9, and therefore the thickness of the colored layer 18 on the color filter 9 is determined. It is also possible to change the Δnd value by changing the color filter, but since the manufacturing cost of the color filter will increase in the future, the degree of freedom in optical design will increase, so various optical designs will be aimed at improving the optical characteristics of the transflective liquid crystal display device Technology and material technology will be developed.

本発明の実施例1にかかるアクティブ基板の平面図Plan view of an active substrate according to Embodiment 1 of the present invention. 本発明の実施例1にかかるアクティブ基板の製造工程断面図Manufacturing process sectional drawing of the active substrate concerning Example 1 of this invention 本発明の参考例1にかかるアクティブ基板の平面図The top view of the active substrate concerning the reference example 1 of this invention 本発明の参考例1にかかるアクティブ基板の断面図Sectional drawing of the active substrate concerning the reference example 1 of this invention 本発明の参考例2にかかるアクティブ基板の平面図The top view of the active substrate concerning the reference example 2 of this invention 本発明の参考例2にかかるアクティブ基板の断面図Sectional drawing of the active substrate concerning the reference example 2 of this invention 液晶パネルの実装状態を示す斜視図The perspective view which shows the mounting state of a liquid crystal panel 液晶パネルの等価回路図Equivalent circuit diagram of LCD panel 従来の液晶パネルの断面図Sectional view of a conventional LCD panel 従来のアクティブ基板の平面図Plan view of a conventional active substrate 従来のアクティブ基板の製造工程断面図Cross-sectional view of conventional active substrate manufacturing process 半透過型液晶表示装置向けのアクティブ基板の平面図Plan view of active substrate for transflective LCD 半透過型液晶表示装置向けのアクティブ基板の製造工程断面図Cross-sectional view of manufacturing process of active substrate for transflective LCD

符号の説明Explanation of symbols

1:液晶パネル
2:アクティブ基板(ガラス基板)
3:半導体集積回路チップ
4:TCPフィルム
5:金属性の走査線の一部または電極端子
5A:透明導電性の走査線の電極端子
6:金属性の信号線の一部または電極端子
6A:透明導電性の信号線の電極端子
9:カラーフィルタ(対向するガラス基板)
10:絶縁ゲート型トランジスタ
11:走査線
11A:ゲート配線、ゲート電極
12:信号線(ソース配線、ソース電極)
14:(カラーフィルタ上の)対向電極
16:蓄積容量線
17:液晶
19:偏光板
20:配向膜
21:ドレイン電極(ドレイン配線、ドレイン電極)
22:透明導電性の絵素電極、透過電極
30:ゲート絶縁層
31:不純物を含まない(第1の)非晶質シリコン層
32D:保護絶縁層(エッチストップ層、チャネル保護層)
33:不純物を含む(第2の)非晶質シリコン層
34:耐熱金属層
35:低抵抗金属層(AL)
36:中間導電層
37:パシベーション絶縁層
38:凹凸層に形成された透過領域形成のための開口部
39:(感光性アクリル樹脂よりなる)凹凸層
41:(高反射性の金属)反射電極
50,52:蓄積容量形成領域
62:(ドレイン電極上の)開口部
63:(走査線上または走査線の電極端子上の)開口部
64:(信号線上または信号線の電極端子上の)開口部
65:(対向電極上の)開口部
72:蓄積電極
81A ,81B:(ハーフトーン露光で形成された)感光性樹脂パターン
91:透明導電層
92:緩衝層
93:(高反射性の)金属層
1: Liquid crystal panel 2: Active substrate (glass substrate)
3: Semiconductor integrated circuit chip 4: TCP film 5: Part of metallic scanning line or electrode terminal 5A: Electrode terminal of transparent conductive scanning line 6: Part of metallic signal line or electrode terminal 6A: Transparent Electrode terminal of conductive signal line 9: Color filter (opposing glass substrate)
10: Insulated gate transistor 11: Scanning line 11A: Gate wiring, gate electrode 12: Signal line (source wiring, source electrode)
14: Counter electrode (on color filter) 16: Storage capacitor line 17: Liquid crystal
19: Polarizing plate 20: Alignment film 21: Drain electrode (drain wiring, drain electrode)
22: Transparent conductive pixel electrode, transmissive electrode 30: Gate insulating layer 31: Impurity-free (first) amorphous silicon layer 32D: Protective insulating layer (etch stop layer, channel protective layer)
33: Impurity containing (second) amorphous silicon layer 34: Refractory metal layer 35: Low resistance metal layer (AL)
36: Intermediate conductive layer 37: Passivation insulating layer 38: Opening portion for forming a transmission region formed in the concavo-convex layer 39: Concavity and convexity layer (made of photosensitive acrylic resin) 41: (Highly reflective metal) Reflective electrode 50 52: Storage capacitor formation region 62: Opening (on the drain electrode) 63: Opening (on the scanning line or on the electrode terminal of the scanning line) 64: Opening (on the signal line or on the electrode terminal of the signal line) 65 : Opening (on counter electrode) 72: Storage electrode 81A, 81B: Photosensitive resin pattern (formed by halftone exposure) 91: Transparent conductive layer 92: Buffer layer 93: (Highly reflective) metal layer

Claims (2)

一主面上に少なくとも絶縁ゲート型トランジスタと、前記絶縁ゲート型トランジスタのゲート電極も兼ねる走査線とソース配線も兼ねる信号線と、ドレイン配線に接続された絵素電極とを有する単位絵素が二次元のマトリクスに配列された第1の透明性絶縁基板と、前記第1の透明性絶縁基板と対向する第2の透明性絶縁基板またはカラーフィルタとの間に液晶を充填してなる液晶表示装置において、
第1の透明性絶縁基板の一主面上に絶縁ゲート型トランジスタと走査線と信号線が形成され、
少なくともドレイン電極上に開口部を有し、一部の領域でその表面に凹凸を有する透明絶縁層が前記第1の透明性絶縁基板上に形成され、
前記凹凸領域上では1層以上の反射金属層と透明導電層との積層よりなる反射電極と、その他の領域では前記開口部を含んで前記透明導電層と連続した透明導電性の透過電極が形成されていることを特徴とする液晶表示装置。
Two unit picture elements each having at least an insulated gate transistor, a scanning line also serving as a gate electrode of the insulated gate transistor, a signal line also serving as a source wiring, and a picture element electrode connected to the drain wiring on one main surface. A liquid crystal display device in which a liquid crystal is filled between a first transparent insulating substrate arranged in a three-dimensional matrix and a second transparent insulating substrate or a color filter facing the first transparent insulating substrate. In
An insulated gate transistor, a scanning line, and a signal line are formed on one main surface of the first transparent insulating substrate,
A transparent insulating layer having an opening on at least the drain electrode and having irregularities on the surface thereof in a part of the region is formed on the first transparent insulating substrate,
A reflective electrode composed of a laminate of one or more reflective metal layers and a transparent conductive layer is formed on the uneven region, and a transparent conductive transmissive electrode continuous with the transparent conductive layer including the opening is formed in other regions. A liquid crystal display device.
一主面上に少なくとも絶縁ゲート型トランジスタと、前記絶縁ゲート型トランジスタのゲート電極も兼ねる走査線とソース配線も兼ねる信号線と、ドレイン配線に接続された絵素電極とを有する単位絵素が二次元のマトリクスに配列された第1の透明性絶縁基板と、前記第1の透明性絶縁基板と対向する第2の透明性絶縁基板またはカラーフィルタとの間に液晶を充填してなる液晶表示装置において、少なくとも、
第1の透明性絶縁基板の一主面上に絶縁ゲート型トランジスタと走査線と信号線を形成する工程と、
少なくともドレイン電極上に開口部を有し、一部の領域でその表面に凹凸を有する透明絶縁層を前記第1の透明性絶縁基板上に形成する工程と、
透明導電層と1層以上の金属層を被着後、前記開口部を含んで前記凹凸領域の反射電極と凹凸領域外の透明導電性の透過電極に対応し、前記反射電極上の膜厚が前記透過電極上の膜厚よりも厚い感光性樹脂パターンを形成する工程と、
前記感光性樹脂パターンをマスクとして前記金属層を選択的に除去して前記透明導電層を露出する工程と、
前記感光性樹脂パターンの膜厚を減じて前記透過電極形成領域の金属層を露出し、前記膜厚を減ぜられた感光性樹脂パターンと前記透過電極形成領域の金属層をマスクとして前記透明導電層を選択的に除去して前記透明絶縁層を露出する工程と、
前記膜厚を減ぜられた感光性樹脂パターンをマスクとして前記透過電極形成領域の金属層を除去して透明導電性の透過電極を露出する工程を有する液晶表示装置の製造方法。


Two unit picture elements each having at least an insulated gate transistor, a scanning line also serving as a gate electrode of the insulated gate transistor, a signal line also serving as a source wiring, and a picture element electrode connected to the drain wiring on one main surface. A liquid crystal display device in which a liquid crystal is filled between a first transparent insulating substrate arranged in a three-dimensional matrix and a second transparent insulating substrate or a color filter facing the first transparent insulating substrate. At least,
Forming an insulated gate transistor, a scanning line, and a signal line on one main surface of the first transparent insulating substrate;
Forming a transparent insulating layer on the first transparent insulating substrate having an opening on at least the drain electrode and having irregularities on the surface in a part of the region;
After depositing the transparent conductive layer and one or more metal layers, the film thickness on the reflective electrode corresponds to the reflective electrode in the uneven region and the transparent conductive transparent electrode outside the uneven region including the opening. Forming a photosensitive resin pattern thicker than the film thickness on the transmissive electrode;
Selectively removing the metal layer using the photosensitive resin pattern as a mask to expose the transparent conductive layer;
The thickness of the photosensitive resin pattern is reduced to expose the metal layer in the transmissive electrode formation region, and the transparent conductive material is masked using the reduced thickness of the photosensitive resin pattern and the metal layer in the transmissive electrode formation region. Selectively removing the layer to expose the transparent insulating layer;
A method for manufacturing a liquid crystal display device, comprising: removing a metal layer in the transmissive electrode formation region using the photosensitive resin pattern having a reduced film thickness as a mask to expose the transparent conductive transmissive electrode.


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