JP2005209844A - Wiring board - Google Patents

Wiring board Download PDF

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JP2005209844A
JP2005209844A JP2004014174A JP2004014174A JP2005209844A JP 2005209844 A JP2005209844 A JP 2005209844A JP 2004014174 A JP2004014174 A JP 2004014174A JP 2004014174 A JP2004014174 A JP 2004014174A JP 2005209844 A JP2005209844 A JP 2005209844A
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solder
connection pads
layer
resist layer
solder resist
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Osamu Akashi
理 明石
Tatsuumi Sakamoto
達海 坂元
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Kyocera Corp
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board with a capacitor element in which reliability of electric insulation is enhanced at a connection pad for the capacitor element by protecting a solder resist layer against cracking due to action of thermal stress, incident to solder connection of the connection pad and the capacitor element, on the opening of the solder resist layer. <P>SOLUTION: On the surface of an insulating substrate 1 for mounting a semiconductor element, a solder resist layer 10 having a plurality of connection pads 5a and 5b composed of a conductor layer being connected electrically with the electrodes of a capacitor element 8 through a solder 9, and a rectangular opening 10c for exposing the plurality of connection pads 5a and 5b is formed. The solder resist layer 10 is provided, at each corner part in the opening 10c, with a part not forming the conductor layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、半導体素子等の電子部品を搭載するために用いられる配線基板に関する。   The present invention relates to a wiring board used for mounting electronic components such as semiconductor elements.

従来、半導体集積回路素子等の半導体素子を搭載するために用いられる配線基板は、例えばガラス−エポキシ板等から成る絶縁層やエポキシ樹脂等から成る絶縁層が複数層積層された絶縁基板の内部および表面に銅箔や銅めっき膜等の導体層から成る配線導体が配設されている。配線導体には半導体素子に接地電位を供給するための接地用の配線導体と、電源電位を供給するための電源用の配線導体と、半導体素子との間で信号の入出力を行なうための信号用の配線導体とがある。また、絶縁基板の上面中央部には半導体素子の電極が半田バンプを介して電気的に接続される接地用や電源用、信号用の第1の接続パッドが複数形成されているとともに、絶縁基板の下面外周部には外部電気回路基板の配線導体に半田ボールを介して電気的に接続される外部接続用の第2の接続パッドが形成されており、これらの第1の接続パッドおよび第2の接続パッドはそれぞれ対応する配線導体に電気的に接続されている。   Conventionally, a wiring board used for mounting a semiconductor element such as a semiconductor integrated circuit element includes an insulating substrate in which a plurality of insulating layers made of, for example, a glass-epoxy plate or an insulating layer made of an epoxy resin are stacked and A wiring conductor made of a conductor layer such as a copper foil or a copper plating film is disposed on the surface. The wiring conductor includes a ground wiring conductor for supplying a ground potential to the semiconductor element, a power supply wiring conductor for supplying a power supply potential, and a signal for inputting and outputting signals between the semiconductor elements. And wiring conductors. In addition, a plurality of first connection pads for grounding, power supply, and signal for electrically connecting the electrodes of the semiconductor element via solder bumps are formed at the center of the upper surface of the insulating substrate. A second connection pad for external connection, which is electrically connected to a wiring conductor of the external electric circuit board via a solder ball, is formed on the outer periphery of the lower surface of the first and second connection pads. The connection pads are electrically connected to the corresponding wiring conductors.

さらに、近時の高集積化および高速化した半導体素子を搭載する配線基板においては、例えば絶縁基板の下面中央部に接地用の配線導体や電源用の配線導体に電気的に接続されたコンデンサ素子接続用の複数対の第3の接続パッドが形成されており、これらの第3の接続パッドにはセラミックチップコンデンサ等のコンデンサ素子が接地用の配線導体と電源用の配線導体との間に電気的に接続されるようにして半田を介して接続されている。このコンデンサ素子は、接地用の配線導体と電源用の配線導体との間に電気的に接続されることにより接地電位や電源電位の変動を抑制して半導体素子の誤動作を防止するためのデカップリングコンデンサとして機能する。   Furthermore, in a wiring board on which a recent highly integrated and high-speed semiconductor element is mounted, for example, a capacitor element electrically connected to a grounding conductor or a power supply conductor in the center of the lower surface of the insulating substrate A plurality of pairs of third connection pads for connection are formed, and capacitor elements such as ceramic chip capacitors are electrically connected between the ground wiring conductor and the power supply wiring conductor on these third connection pads. It is connected via solder so as to be connected. This capacitor element is decoupled to prevent malfunction of the semiconductor element by suppressing the fluctuation of the ground potential and the power supply potential by being electrically connected between the wiring conductor for grounding and the wiring conductor for power supply. Functions as a capacitor.

またさらに、絶縁基板の上下面には、第1の接続パッドや第2の接続パッドおよび第3の接続パッドの中央部をそれぞれ露出させる開口部を有する熱硬化性樹脂から成るソルダーレジスト層が形成されている。絶縁基板の上下面にこのようなソルダーレジスト層を形成することにより各接続パッドの電気的な絶縁が良好に保たれるとともに、これらの接続パッドの絶縁基板への接合が強固なものとなっている。   Furthermore, a solder resist layer made of a thermosetting resin is formed on the upper and lower surfaces of the insulating substrate. The solder resist layers have openings that expose the central portions of the first connection pad, the second connection pad, and the third connection pad. Has been. By forming such solder resist layers on the upper and lower surfaces of the insulating substrate, the electrical insulation of each connection pad can be maintained well, and the bonding of these connection pads to the insulating substrate becomes strong. Yes.

なお、このような配線基板においては、第1の接続パッドには半導体素子との電気的な接続を容易なものとするために半田バンプが予め溶着されている。   In such a wiring board, solder bumps are previously welded to the first connection pads in order to facilitate electrical connection with the semiconductor element.

そして、半導体素子を第1の接続パッドに溶着させた半田バンプ上にその電極が当接するように載置するとともに、第1の接続パッドに溶着させた半田バンプを加熱溶融させることによって半導体素子が配線基板上に搭載されるとともに半導体素子の電極が第1の接続パッドに半田バンプを介して電気的に接続される。   Then, the semiconductor element is placed on the solder bump welded to the first connection pad so that the electrode abuts, and the semiconductor bump is heated and melted by heating and melting the solder bump welded to the first connection pad. The electrode of the semiconductor element is mounted on the wiring substrate and electrically connected to the first connection pad via the solder bump.

また、第2の接続パッド上に半田ボールを載置するとともに半田ボールを加熱溶融させることによって、第2の接続パッド上に半田ボールが溶着され、この半田ボールを外部電気回路基板の配線導体上に接触させた状態で加熱溶融させることによって、配線基板が半田ボールを介して外部電気回路基板上に実装されるとともに、配線基板に搭載された半導体素子が外部電気回路基板に電気的に接続されることとなる。
特開2002−204046号公報 特開平9−153673号公報
Further, by placing the solder ball on the second connection pad and heating and melting the solder ball, the solder ball is welded on the second connection pad, and this solder ball is placed on the wiring conductor of the external electric circuit board. The wiring board is mounted on the external electric circuit board via the solder balls and the semiconductor element mounted on the wiring board is electrically connected to the external electric circuit board. The Rukoto.
JP 2002-204046 A JP-A-9-153673

ところで、このような従来のコンデンサ素子付きの配線基板においては、コンデンサ素子接続用の接続パッドの中央部を露出させるソルダーレジスト層の開口部は四角形状であった。しかしながら、コンデンサ素子接続用の接続パッドを露出させるソルダーレジスト層の開口部が四角形状である場合、コンデンサ素子が接続された配線基板に半導体素子が作動時に発生する熱や外部環境の温度変化に伴う熱が繰り返し加えられると、コンデンサ素子をコンデンサ素子接続用の接続パッドに接続している半田による熱応力がソルダーレジスト層の開口部の角部に大きく集中して作用し、その結果、ソルダーレジスト層の開口部の角部を起点としてソルダーレジスト層にクラックが発生してしまい、コンデンサ素子接続用の接続パッドの電気的な絶縁信頼性が大きく低下してしまうという問題を有していた。   By the way, in such a conventional wiring board with a capacitor element, the opening of the solder resist layer that exposes the central part of the connection pad for connecting the capacitor element has a rectangular shape. However, when the opening of the solder resist layer that exposes the connection pad for connecting the capacitor element has a square shape, the heat generated during operation of the semiconductor element on the wiring board to which the capacitor element is connected and the temperature change in the external environment When heat is repeatedly applied, the thermal stress due to the solder connecting the capacitor element to the connection pad for connecting the capacitor element acts heavily on the corners of the opening of the solder resist layer, and as a result, the solder resist layer Cracks are generated in the solder resist layer starting from the corners of the openings, and the electrical insulation reliability of the connection pads for connecting the capacitor elements is greatly reduced.

本発明は、かかる従来の問題に鑑み案出されたものであり、その目的は、コンデンサ素子接続用の接続パッドとコンデンサ素子とを接続する半田による熱応力がソルダーレジスト層の開口部の角部に大きく作用することによってソルダーレジスト層にクラックが発生することがなく、コンデンサ素子接続用の接続パッドにおける電気的な絶縁信頼性の高いコンデンサ素子付きの配線基板を提供することにある。   The present invention has been devised in view of such conventional problems, and its purpose is to prevent the thermal stress caused by the solder connecting the capacitor element connection pads and the capacitor elements from being formed at the corners of the openings of the solder resist layer. It is an object of the present invention to provide a wiring board with a capacitor element having a high electrical insulation reliability in a connection pad for connecting a capacitor element without causing a crack in a solder resist layer due to a large effect on the solder resist layer.

本発明の配線基板は、半導体素子が搭載される絶縁基板の表面に、コンデンサ素子の電極が半田を介して電気的に接続される導体層から成る複数の接続パッドおよび該複数の接続パッドの中央部をそれぞれ露出させる四角形状の開口部を有するソルダーレジスト層が形成されており、前記接続パッドは、前記開口部の各角部に位置する部位に前記導体層の非形成部が設けられていることを特徴とするものである。   A wiring board according to the present invention includes a plurality of connection pads formed of a conductor layer in which electrodes of a capacitor element are electrically connected via solder on the surface of an insulating substrate on which a semiconductor element is mounted, and the center of the plurality of connection pads A solder resist layer having a quadrangular opening that exposes each portion is formed, and the connection pad is provided with a portion where the conductor layer is not formed at a position located at each corner of the opening. It is characterized by this.

本発明の配線基板は、コンデンサ素子の電極が半田を介して電気的に接続される導体層から成る複数の接続パッドの中央部をそれぞれ露出させるソルダーレジスト層の開口部の角部に位置する部位に導体層の非形成部が設けられてすることから、ソルダーレジスト層の開口部内に露出したコンデンサ素子接続用の接続パッドにコンデンサ素子を半田を介して接続すると、開口部の角部の非導体部には半田が濡れないので、半田による熱応力がソルダーレジスト層の開口部の角部に加えられることはない。したがって、ソルダーレジスト層に開口部の角部を起点とするクラックが発生することはなく、コンデンサ素子接続用の接続パッドにおける電気的な接続信頼性に優れるコンデンサ素子付きの配線基板を提供することができる。   The wiring board of the present invention is a portion located at the corner of the opening of the solder resist layer that exposes the center of each of the plurality of connection pads made of a conductor layer to which the electrode of the capacitor element is electrically connected via solder. Since the conductor layer non-forming portion is provided on the solder resist layer, when the capacitor element is connected to the capacitor element connecting connection pad exposed in the opening of the solder resist layer via solder, the non-conductor at the corner of the opening is formed. Since the solder does not get wet on the portion, thermal stress due to the solder is not applied to the corner of the opening of the solder resist layer. Accordingly, it is possible to provide a wiring board with a capacitor element that is excellent in electrical connection reliability in a connection pad for connecting a capacitor element, without causing cracks in the solder resist layer from starting at the corners of the opening. it can.

次に、本発明の配線基板を添付の図面に基づき説明する。図1は、本発明の配線基板を実施するための最良の形態の一例を示す断面図であり、図中、1は絶縁層1aおよび絶縁層1bから成る絶縁基板、2a,2b,2cはそれぞれ接地用,電源用,信号用の第1の接続パッド、3a,3b,3cはそれぞれ接地用,電源用,信号用の第2の接続パッド、4a,4b,4cはそれぞれ接地用,電源用,信号用の配線導体、5a,5bは第3の接続パッド、6は半田バンプ、7は半田層、8はコンデンサ素子、9は半田、10はソルダーレジスト層である。   Next, the wiring board of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of the best mode for carrying out the wiring board of the present invention. In the figure, 1 is an insulating substrate composed of an insulating layer 1a and an insulating layer 1b, and 2a, 2b and 2c are respectively Ground, power, and signal first connection pads, 3a, 3b, and 3c are ground, power, and signal second connection pads, 4a, 4b, and 4c are ground, power, and Signal wiring conductors, 5a and 5b are third connection pads, 6 is a solder bump, 7 is a solder layer, 8 is a capacitor element, 9 is solder, and 10 is a solder resist layer.

なお、本例では、ガラス織物に熱硬化性樹脂を含浸させて成る絶縁層1aの上下面に熱硬化性樹脂から成る絶縁層1bを2層ずつ積層して絶縁基板1を形成しており、最表層の絶縁層1b上にソルダーレジスト層10が形成されている。また、絶縁基板1の上面中央部にはそれぞれ半導体素子の電極が半田バンプ6を介して電気的に接続される接地用,電源用,信号用の第1の接続パッド2a,2b,2cが形成されているとともに絶縁基板1の下面外周部にはそれぞれ外部電気回路基板に半田ボール11を介して電気的に接続される接地用,電源用,信号用の第2の接続パッド3a,3b,3cが形成されており、絶縁基板1の上面から下面にかけてはそれぞれ対応する第1の接続パッド2a,2b,2cと第2の接続パッド3a,3b,3cとを互いに電気的に接続する接地用,電源用,信号用の配線導体4a,4b,4cが配設されている。また、絶縁基板1の下面の中央部には接地用の配線導体4a,電源用の配線導体4bに電気的に接続された第3の接続パッド5a,5bが形成されている。そして、第1の接続パッド2a,2b,2cには半田バンプ6が溶着されており、第2の接続パッド3a,3b,3cには半田層7が溶着されている。さらに、第3の接続パッド5a,5bにはコンデンサ素子8が半田9を介して接続されている。   In this example, the insulating substrate 1 is formed by laminating two insulating layers 1b made of thermosetting resin on the upper and lower surfaces of the insulating layer 1a made by impregnating glass fabric with thermosetting resin, A solder resist layer 10 is formed on the outermost insulating layer 1b. In addition, first connection pads 2a, 2b, and 2c for grounding, power supply, and signal are formed at the center of the upper surface of the insulating substrate 1 so that the electrodes of the semiconductor elements are electrically connected via the solder bumps 6, respectively. In addition, on the outer peripheral portion of the lower surface of the insulating substrate 1, second connection pads 3a, 3b, 3c for grounding, power supply, and signal that are electrically connected to an external electric circuit board via solder balls 11, respectively. For the grounding to electrically connect the corresponding first connection pads 2a, 2b, 2c and the second connection pads 3a, 3b, 3c to each other from the upper surface to the lower surface of the insulating substrate 1, respectively. Power supply and signal wiring conductors 4a, 4b, and 4c are provided. In addition, third connection pads 5a and 5b electrically connected to the ground wiring conductor 4a and the power supply wiring conductor 4b are formed at the center of the lower surface of the insulating substrate 1. Solder bumps 6 are welded to the first connection pads 2a, 2b, 2c, and solder layers 7 are welded to the second connection pads 3a, 3b, 3c. Further, the capacitor element 8 is connected to the third connection pads 5 a and 5 b through the solder 9.

絶縁層1aは、本例の配線基板の芯体となる部材であり、例えばガラス繊維束を縦横に織り込んだガラス織物にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させて成り、厚みが0.3〜1.5mm程度であり、その上面から下面にかけて直径が0.1〜1mm程度の複数の貫通孔12を有している。そして、その上下面および各貫通孔12の内面には導体層から成る配線導体4a,4b,4cの一部が被着されており、上下面の配線導体4a,4b,4cが貫通孔12を介して電気的に接続されている。   The insulating layer 1a is a member that becomes the core of the wiring board of this example, and is formed by impregnating a glass fabric in which glass fiber bundles are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin, The thickness is about 0.3 to 1.5 mm, and a plurality of through holes 12 having a diameter of about 0.1 to 1 mm are provided from the upper surface to the lower surface. A part of the wiring conductors 4a, 4b, 4c made of a conductor layer is deposited on the upper and lower surfaces and the inner surfaces of the respective through holes 12, and the upper and lower wiring conductors 4a, 4b, 4c pass through the through holes 12. Is electrically connected.

このような絶縁層1aは、ガラス織物に未硬化の熱硬化性樹脂を含浸させた絶縁シートを熱硬化させた後、これに上面から下面にかけてドリル加工を施すことにより製作される。なお、絶縁層1a上下面の配線導体4a,4b,4cは、絶縁層1a用の絶縁シートの上下全面に厚みが3〜50μm程度の銅箔を貼着しておくとともにこの銅箔をシートの硬化後にエッチング加工することにより所定のパターンに形成される。また、貫通孔12内面の配線導体4a,4b,4cは、絶縁層1aに貫通孔12を設けた後に、この貫通孔12内面に無電解めっき法および電解めっき法により厚みが3〜50μm程度の銅めっき膜を析出させることにより形成される。   Such an insulating layer 1a is manufactured by thermally curing an insulating sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling the insulating sheet from the upper surface to the lower surface. The wiring conductors 4a, 4b, and 4c on the upper and lower surfaces of the insulating layer 1a have a copper foil having a thickness of about 3 to 50 μm adhered to the entire upper and lower surfaces of the insulating sheet for the insulating layer 1a. It is formed into a predetermined pattern by etching after curing. Further, the wiring conductors 4a, 4b, 4c on the inner surface of the through hole 12 have a thickness of about 3 to 50 μm by electroless plating and electrolytic plating on the inner surface of the through hole 12 after the through hole 12 is provided in the insulating layer 1a. It is formed by depositing a copper plating film.

さらに、絶縁層1aは、その貫通孔12の内部にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂から成る樹脂柱13が充填されている。樹脂柱13は、貫通孔12を塞ぐことにより貫通孔12の直上および直下に配線導体4a,4b,4cおよび各絶縁層1bを形成可能とするためのものであり、未硬化のペースト状の熱硬化性樹脂を貫通孔12内にスクリーン印刷法により充填し、それを熱硬化させた後、その上下面を略平坦に研磨することにより形成される。そして、この樹脂柱13を含む絶縁層1aの上下面に絶縁層1bがそれぞれ2層ずつ積層されている。   Furthermore, the insulating layer 1a is filled with a resin column 13 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin in the through hole 12 thereof. The resin pillar 13 is for making it possible to form the wiring conductors 4a, 4b, 4c and the respective insulating layers 1b directly above and below the through-hole 12 by closing the through-hole 12, and is an uncured paste-like heat A curable resin is filled in the through-holes 12 by screen printing, thermally cured, and then the upper and lower surfaces thereof are polished to be substantially flat. Two insulating layers 1b are laminated on the upper and lower surfaces of the insulating layer 1a including the resin pillars 13, respectively.

絶縁層1aの上下面に積層された各絶縁層1bは、それぞれの厚みが20〜60μm程度であり、各層の上面から下面にかけて直径が30〜100μm程度の複数の貫通孔14を有している。これらの各絶縁層1bは、配線導体4a,4b,4cを高密度に配線するための絶縁間隔を提供するためのものである。そして、上層の配線導体4a,4b,4cと下層の配線導体4a,4b,4cとを貫通孔14を介して電気的に接続することにより高密度配線が立体的に形成可能となっている。このような各絶縁層1bは、厚みが20〜60μm程度の未硬化の熱硬化性樹脂の絶縁フィルムを絶縁層1aの上下面に貼着し、これを熱硬化させるとともにレーザ加工により貫通孔14を穿孔し、さらにその上に同様にして次の絶縁層1bを順次積み重ねることによって形成される。なお、各絶縁層1bの表面および貫通孔14内に被着された配線導体4a,4b,4cは、各絶縁層1bを形成する毎に各絶縁層1bの表面および貫通孔14内に5〜50μm程度の厚みの銅めっき膜を公知のセミアディティブ法やサブトラクティブ法等のパターン形成法により所定のパターンに被着させることによって形成される。   Each insulating layer 1b laminated on the upper and lower surfaces of the insulating layer 1a has a thickness of about 20 to 60 μm, and has a plurality of through holes 14 having a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. . Each of these insulating layers 1b is for providing an insulating interval for wiring the wiring conductors 4a, 4b, 4c with high density. A high density wiring can be formed in three dimensions by electrically connecting the upper wiring conductors 4a, 4b, 4c and the lower wiring conductors 4a, 4b, 4c through the through holes 14. Each of the insulating layers 1b has an uncured thermosetting resin insulating film having a thickness of about 20 to 60 μm attached to the upper and lower surfaces of the insulating layer 1a. And the next insulating layer 1b is sequentially stacked thereon in the same manner. Note that the wiring conductors 4a, 4b, 4c deposited on the surface of each insulating layer 1b and in the through-holes 14 are formed on the surface of each insulating layer 1b and in the through-holes 14 every time each insulating layer 1b is formed. It is formed by depositing a copper plating film having a thickness of about 50 μm in a predetermined pattern by a known pattern forming method such as a semi-additive method or a subtractive method.

また、絶縁基板1の上面に形成された第1の接続パッド2a,2b,2cならびに絶縁基板1の下面に形成された第2の接続パッド3a,3b,3cおよび第3の接続パッド5a,5bは、厚みが3〜50μm程度の銅めっき膜から成る導体層により形成されており、それぞれ対応する配線導体4a,4b,4cに電気的に接続されている。そして、第1の接続パッド2a,2b,2cは半導体素子を接続するための端子として、第2の接続パッド3a,3b,3cは外部電気回路に接続するための端子として、第3の接続パッド5a,5bはコンデンサ素子8を接続するための端子としてそれぞれ機能する。このような第1の接続パッド2a,2b,2cおよび第2の接続パッド3a,3b,3c,第3の接続パッド5a,5bは、絶縁層1bの表面に公知のセミアディティブ法やサブトラクティブ法により銅めっき膜を所定のパターンに被着させることにより形成される。なお、第1の接続パッド2a,2b,2cには半田バンプ6が溶着されており、第2の接続パッド3a,3b,3cには半田層7が溶着されている。また、第3の接続パッド5a,5bにはコンデンサ素子8が半田9を介して接続されている。   Further, the first connection pads 2a, 2b, 2c formed on the upper surface of the insulating substrate 1, and the second connection pads 3a, 3b, 3c and the third connection pads 5a, 5b formed on the lower surface of the insulating substrate 1. Is formed by a conductor layer made of a copper plating film having a thickness of about 3 to 50 μm, and is electrically connected to the corresponding wiring conductors 4a, 4b and 4c, respectively. The first connection pads 2a, 2b, 2c serve as terminals for connecting semiconductor elements, and the second connection pads 3a, 3b, 3c serve as terminals for connecting to an external electric circuit. 5a and 5b function as terminals for connecting the capacitor element 8, respectively. The first connection pads 2a, 2b, 2c, the second connection pads 3a, 3b, 3c, and the third connection pads 5a, 5b are formed on the surface of the insulating layer 1b by a known semi-additive method or subtractive method. Is formed by depositing a copper plating film in a predetermined pattern. A solder bump 6 is welded to the first connection pads 2a, 2b, 2c, and a solder layer 7 is welded to the second connection pads 3a, 3b, 3c. The capacitor element 8 is connected to the third connection pads 5 a and 5 b via the solder 9.

また、絶縁基板1の上面から下面にかけて配設された接地用,電源用,信号用の各配線導体4a,4b,4cは、それぞれ半導体素子の各電極を外部電気回路に電気的に接続するための導電路として機能し、接地用および電源用の配線導体4a,4bであれば、広面積の導体パターンを含んでおり、信号用の配線導体4cであれば、細い帯状の導体パターンを含んでいる。そして、接地用および電源用の配線導体4a,4bは、半導体素子に接地電位や電源電位を供給するための導体として機能するとともに信号用の配線導体4cを電磁的に遮蔽するシールドとしても機能し、信号用の配線導体4cは、半導体素子に信号の出し入れを行なうための導体として機能する。また、例えは接地用の配線導体4aや電源用の配線導体4bと信号用の配線導体4cとが絶縁層1bを挟んで対向することにより信号用の配線導体4cに所定の特性インピーダンスが付与される。   The grounding, power supply, and signal wiring conductors 4a, 4b, and 4c disposed from the upper surface to the lower surface of the insulating substrate 1 are used to electrically connect each electrode of the semiconductor element to an external electric circuit. The wiring conductors 4a and 4b for grounding and power supply include a wide area conductor pattern, and the wiring conductor 4c for signal includes a thin strip-shaped conductor pattern. Yes. The grounding and power supply wiring conductors 4a and 4b function as conductors for supplying a ground potential and a power supply potential to the semiconductor elements, and also function as shields for electromagnetically shielding the signal wiring conductor 4c. The signal wiring conductor 4c functions as a conductor for taking signals into and out of the semiconductor element. For example, the signal wiring conductor 4c is given a predetermined characteristic impedance when the wiring conductor 4a for grounding or the wiring conductor 4b for power supply and the signal wiring conductor 4c face each other with the insulating layer 1b interposed therebetween. The

第1の接続パッド2a,2b,2cの表面に溶着された半田バンプ6は、例えば鉛−錫合金から成り、第1の接続パッド2a,2b,2cと半導体素子とを接続するための接続部材として機能する。そして、半導体素子の電極を半田バンプ6に接触させた状態で半田バンプ6を溶融させることにより第1の接続パッド2a,2b,2cと半導体素子の電極とが半田バンプ6を介して電気的に接続されることとなる。このように半田バンプ6を第1の接続パッド2a,2b,2cに予め溶着させておくことにより第1の接続パッド2a,2b,2cへの半導体素子の接続の作業性が極めて良好なものとなる。   The solder bump 6 welded to the surface of the first connection pads 2a, 2b, 2c is made of, for example, a lead-tin alloy, and a connection member for connecting the first connection pads 2a, 2b, 2c and the semiconductor element. Function as. Then, by melting the solder bump 6 in a state where the electrode of the semiconductor element is in contact with the solder bump 6, the first connection pads 2 a, 2 b, 2 c and the electrode of the semiconductor element are electrically connected via the solder bump 6. Will be connected. As described above, by soldering the solder bump 6 to the first connection pads 2a, 2b, and 2c in advance, the workability of connecting the semiconductor element to the first connection pads 2a, 2b, and 2c is extremely good. Become.

また、第2の接続パッド3a,3b,3cに溶着された半田層7は、第2の接続パッド3a,3b,3cの酸化を防止するとともに第2の接続パッド3a,3b,3cに半田ボール11を接合させる際にその接合を容易かつ強固とするための下地金属として機能し、半田バンプ6よりも融点の高い錫−銀−銅合金から成る。そして、半田ボール11を半田層7に接触させた状態で半田ボール11を加熱溶融させることにより、半田ボール11が第2の接続パッド3a,3b,3cに接合される。このとき、本発明の配線基板によれば、第2の接続パッド3a,3b,3cに半田層7が溶着されていることから、第2の接続パッド3a,3b,3cに半田ボール11を接合させる際に半田層7により第2の接続パッド3a,3b,3cの酸化が有効に防止され、その結果、第2の接続パッド3a,3b,3cと半田ボール11とが強固に接合される。したがって、配線基板を外部電気回路基板に実装した後に、半導体素子が作動時に発生する熱や外部環境の温度変化に伴う熱が長期間にわたり繰り返し加えられたとしても、半田ボール11が第2の接続パッド3a,3b,3cから外れることはなく、配線基板に搭載された半導体素子と外部電気回路との電気的な接続を良好に保つことができる。   The solder layer 7 welded to the second connection pads 3a, 3b, 3c prevents oxidation of the second connection pads 3a, 3b, 3c and solder balls to the second connection pads 3a, 3b, 3c. 11 is made of a tin-silver-copper alloy having a melting point higher than that of the solder bump 6, which functions as a base metal for making the bonding easy and strong when bonding. Then, the solder ball 11 is bonded to the second connection pads 3a, 3b, 3c by heating and melting the solder ball 11 in a state where the solder ball 11 is in contact with the solder layer 7. At this time, according to the wiring board of the present invention, since the solder layer 7 is welded to the second connection pads 3a, 3b, 3c, the solder balls 11 are joined to the second connection pads 3a, 3b, 3c. In this case, the solder layer 7 effectively prevents the second connection pads 3a, 3b, 3c from being oxidized, and as a result, the second connection pads 3a, 3b, 3c and the solder balls 11 are firmly bonded. Therefore, even after the wiring board is mounted on the external electric circuit board, even if heat generated during operation of the semiconductor element or heat accompanying temperature change of the external environment is repeatedly applied over a long period of time, the solder ball 11 is connected to the second connection. The pads 3a, 3b and 3c are not detached from each other, and the electrical connection between the semiconductor element mounted on the wiring board and the external electric circuit can be kept good.

また、第3の接続パッド5a,5bに半田9を介して接続されたコンデンサ素子8は、一般的にはセラミックチップコンデンサであり、その両端に一対の電極を有している。このコンデンサ素子8は、いわゆるデカップリングコンデンサとして機能し、一方の電極が接地用の第3の接続パッド5aに接続されており、他方の電極が電源用の第3の接続パッド5bに接続されている。そして、第3の接続パッド5a,5bを介して接地用の配線導体4aや電源用の配線導体4bに電荷を供給することによって接地および電源電位の変動を抑えることが可能となっている。なお、コンデンサ素子8を第3の接続パッド5a,5bに接続している半田9は半田層7と同一組成の半田から成り、半田バンプ6よりも融点が高い。このようにコンデンサ素子8を第3の接続パッド5a,5bに接続している半田9の融点が半田バンプ6の融点よりも高いことから、半導体素子を第1の接続パッド2a,2b,2cに半田バンプ6を介して接続する際に、半田バンプ6の融点以上でかつ半田9の融点未満の温度に加熱して半田バンプ6のみを溶融させることによりコンデンサ素子8を第3の接続パッド5a,5bにしっかりと固定した状態で半導体素子を接続することが可能となる。   The capacitor element 8 connected to the third connection pads 5a and 5b via the solder 9 is generally a ceramic chip capacitor and has a pair of electrodes at both ends thereof. The capacitor element 8 functions as a so-called decoupling capacitor, one electrode is connected to the third connection pad 5a for grounding, and the other electrode is connected to the third connection pad 5b for power supply. Yes. Then, by supplying electric charges to the ground wiring conductor 4a and the power supply wiring conductor 4b via the third connection pads 5a and 5b, it is possible to suppress fluctuations in the ground and the power supply potential. The solder 9 connecting the capacitor element 8 to the third connection pads 5 a and 5 b is made of solder having the same composition as the solder layer 7 and has a melting point higher than that of the solder bump 6. Thus, since the melting point of the solder 9 connecting the capacitor element 8 to the third connection pads 5a and 5b is higher than the melting point of the solder bump 6, the semiconductor element is connected to the first connection pads 2a, 2b and 2c. When connecting via the solder bump 6, the capacitor element 8 is heated to a temperature not lower than the melting point of the solder bump 6 and lower than the melting point of the solder 9 to melt only the solder bump 6, thereby connecting the capacitor element 8 to the third connection pads 5 a, The semiconductor element can be connected in a state of being firmly fixed to 5b.

また、最表層の絶縁層1bの上に積層されたソルダーレジスト層10は、例えばアクリル変性エポキシ樹脂等の熱硬化性樹脂にシリカやタルク等のフィラーを含有させて成り、上面側のソルダーレジスト層10であれば、第1の接続パッド2a,2b,2cの中央部を露出させる開口部10aを有しているとともに半田バンプ6よりも薄い厚みである。また、下面側のソルダーレジスト層10であれば、第2の接続パッド3a,3b,3cの中央部を露出させる開口部10bおよび第3の接続パッド5a,5bの中央部をそれぞれ露出させる開口部10cを有しているとともに半田層7の厚みよりも厚く、半田9の厚みと略同じ厚みである。   Also, the solder resist layer 10 laminated on the outermost insulating layer 1b is formed by adding a filler such as silica or talc to a thermosetting resin such as an acrylic-modified epoxy resin, and a solder resist layer on the upper surface side. If it is 10, it has an opening 10a that exposes the central part of the first connection pads 2a, 2b, 2c, and is thinner than the solder bump 6. Further, in the case of the solder resist layer 10 on the lower surface side, the opening 10b exposing the central part of the second connection pads 3a, 3b, 3c and the opening exposing the central part of the third connection pads 5a, 5b, respectively. 10 c and thicker than the solder layer 7 and substantially the same thickness as the solder 9.

これらのソルダーレジスト層10は、第1の接続パッド2a,2b,2c同士や第2の接続パッド3a,3b,3c同士および第3の接続パッド5a,5b同士の電気的な絶縁信頼性を高めるとともに、第1の接続パッド2a,2b,2cや第2の接続パッド3a,3b,3cおよび第3の接続パッド5a,5bの絶縁層1bへの接合強度を大きなものとする作用をなす。   These solder resist layers 10 enhance the electrical insulation reliability between the first connection pads 2a, 2b, 2c, between the second connection pads 3a, 3b, 3c and between the third connection pads 5a, 5b. In addition, the bonding strength of the first connection pads 2a, 2b, 2c, the second connection pads 3a, 3b, 3c and the third connection pads 5a, 5b to the insulating layer 1b is increased.

なお、ソルダーレジスト層10の厚みが半田バンプ6よりも低い厚みであることにより、半導体素子を第1の接続パッド2a,2b,2cに半田バンプ6を介して電気的に接続する際に、半導体素子の電極と半田バンプ6とが良好に接触することができるので、半田バンプ6を介した半導体素子と第1の接続パッド2a,2b,2cとの電気的な接続が容易となる。   Since the solder resist layer 10 has a thickness lower than that of the solder bump 6, the semiconductor element is electrically connected to the first connection pads 2 a, 2 b, 2 c via the solder bump 6. Since the electrode of the element and the solder bump 6 can be satisfactorily contacted, the electrical connection between the semiconductor element and the first connection pads 2a, 2b, 2c via the solder bump 6 is facilitated.

また、半田層7の厚みがソルダーレジスト層10の厚みよりも薄いことにより、半田層7上にソルダーレジスト層10の開口部10bによる窪みが形成されるので、第2の接続パッド3a,3b,3c上に半田ボール11を接合させる際に半田ボール11がソルダーレジスト層10の開口部10b内の窪みに良好に位置決めされて、半田ボール11と第2の接続パッド3a,3b,3cとの接合が容易となる。   Further, since the solder layer 7 is thinner than the solder resist layer 10, depressions due to the openings 10 b of the solder resist layer 10 are formed on the solder layer 7, so that the second connection pads 3 a, 3 b, When the solder ball 11 is bonded onto the 3c, the solder ball 11 is well positioned in the recess in the opening 10b of the solder resist layer 10, and the solder ball 11 and the second connection pads 3a, 3b, 3c are bonded. Becomes easy.

このようなソルダーレジスト層10は、その厚みが10〜50μm程度であり、感光性を有するソルダーレジスト層10用の未硬化樹脂ペーストをロールコーター法やスクリーン印刷法を採用して最表層の絶縁層1b上に塗布し、これを乾燥させた後、露光および現像処理を行なって第1の接続パッド2a,2b,2cや第2の接続パッド3a,3b,3cおよび第3の接続パッド5a,5bの中央部を露出させる開口部10a,10b,10cを形成した後、これを熱硬化させることによって形成される。あるいは、ソルダーレジスト層10用の未硬化の樹脂フィルムを最表層の絶縁層1b上に貼着した後、これを熱硬化させ、しかる後、第1の接続パッド2a,2b,2cや第2の接続パッド3a,3b,3cおよび第3の接続パッド5a,5bに対応する位置にレーザ光を照射し、硬化した樹脂フィルムを部分的に除去することによって第1の接続パッド2a,2b,2cや第2の接続パッド3a,3b,3cおよび第3の接続パッド5a,5bを露出させる開口部10a,10b,10cを有するように形成される。   Such a solder resist layer 10 has a thickness of about 10 to 50 μm, and an uncured resin paste for the solder resist layer 10 having photosensitivity adopts a roll coater method or a screen printing method as an outermost insulating layer. After coating on 1b and drying it, exposure and development processes are performed to provide first connection pads 2a, 2b, 2c, second connection pads 3a, 3b, 3c and third connection pads 5a, 5b. The openings 10a, 10b, and 10c that expose the central part of the film are formed, and then are thermally cured. Alternatively, after an uncured resin film for the solder resist layer 10 is stuck on the outermost insulating layer 1b, it is thermally cured, and then the first connection pads 2a, 2b, 2c and the second The positions corresponding to the connection pads 3a, 3b, 3c and the third connection pads 5a, 5b are irradiated with laser light, and the cured resin film is partially removed to remove the first connection pads 2a, 2b, 2c, The second connection pads 3a, 3b and 3c and the third connection pads 5a and 5b are formed to have openings 10a, 10b and 10c.

さらに、本発明の配線基板においては、図2に示すように、第3の接続パッド5a,5bは、ソルダーレジスト層10の開口部10cの各角部に位置する部位に導体層の非形成部Aが設けられており、この導体層の非形成部Aの少なくとも一部が開口部10c内に露出している。このように、第3の接続パッド5a,5bは、ソルダーレジスト層10の開口部10cの各角部に位置する部位に導体層の非形成部Aが設けられていることから、第3の接続パッド5a,5bとコンデンサ素子8とを接続する半田9が開口部10cの角部に位置する部位に設けられた導体層の非形成部Aには濡れないので、開口部10cの角部においては半田9とソルダーレジスト層10とが接触せずに、その結果、半田9による熱応力がソルダーレジスト層10の開口部10cの角部に加えられることはない。したがって、ソルダーレジスト層10に開口部10cの角部を起点とするクラックが発生することはなく、第3の接続パッド5a,5bにおける電気的な接続信頼性に優れるコンデンサ素子付きの配線基板を提供することができる。   Furthermore, in the wiring board of the present invention, as shown in FIG. 2, the third connection pads 5a and 5b are portions where the conductor layer is not formed at the corners of the opening 10c of the solder resist layer 10. A is provided, and at least a part of the non-formed portion A of the conductor layer is exposed in the opening 10c. Thus, since the third connection pads 5a and 5b are provided with the non-formed portion A of the conductor layer at the position located at each corner of the opening 10c of the solder resist layer 10, the third connection pads 5a and 5b Since the solder 9 connecting the pads 5a, 5b and the capacitor element 8 does not get wet with the non-formed portion A of the conductor layer provided at the portion located at the corner of the opening 10c, the corner of the opening 10c The solder 9 and the solder resist layer 10 do not come into contact with each other, and as a result, the thermal stress due to the solder 9 is not applied to the corner of the opening 10 c of the solder resist layer 10. Therefore, there is provided a wiring board with a capacitor element that is excellent in electrical connection reliability in the third connection pads 5a and 5b without causing cracks at the corners of the opening 10c in the solder resist layer 10. can do.

なお、導体層の非形成部Aは、その一部が開口部10c内に露出し、残部がソルダーレジスト層10で覆われていることが好ましい。導体層の非形成部Aの一部が開口部10c内に露出し、残部がソルダーレジスト層10で覆われている場合、開口部10cの角部には導体層が露出しないので開口部10cの角部において半田9がソルダーレジスト層9に接触することを極めて有効に防止することができる。他方、導体層の非形成部Aの全部が開口部10c内に露出している場合、開口部10cの角部に導体層が露出するので、その導体層を伝って半田が開口部10cの角部に回り込んでしまい、その結果、半田9による熱応力がソルダーレジスト層10の開口部10cの角部に加えられ、ソルダーレジスト層10にクラックが発生してしまう危険がある。   In addition, it is preferable that a part of the non-formed portion A of the conductor layer is exposed in the opening 10c and the remaining part is covered with the solder resist layer 10. When a part of the non-formed portion A of the conductor layer is exposed in the opening 10c and the remaining part is covered with the solder resist layer 10, the conductor layer is not exposed at the corners of the opening 10c. It can prevent very effectively that the solder 9 contacts the soldering resist layer 9 in a corner | angular part. On the other hand, when the entire conductor layer non-formed portion A is exposed in the opening 10c, the conductor layer is exposed at the corner of the opening 10c, so that the solder passes through the conductor layer and the corner of the opening 10c. As a result, the thermal stress due to the solder 9 is applied to the corners of the opening 10c of the solder resist layer 10, and there is a risk that the solder resist layer 10 may crack.

なお、本発明は上述の実施の形態例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば上述の実施の形態例では、導体層の非形成部Aは三角形状であったが図3に示すように、導体層の非形成部Aは図3に示すように開口部10cの角部に沿ったL字形状であってもよい。このように導体層の非形成部Aを開口部10cの角部に沿ったL字形状とすることにより、半田9の接合面積を広いものとして接続パッド5a,5bとコンデンサ素子8とを半田9を介して強固に接続することができる。非形成部Aは、さらに別の形状であってもよいことは言うまでもない。   Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described embodiment, the non-formed portion A of the conductor layer has a triangular shape. However, as shown in FIG. 3, the non-formed portion A of the conductor layer has a corner portion of the opening 10c as shown in FIG. It may be L-shaped along. Thus, by forming the non-formed portion A of the conductor layer in an L shape along the corner of the opening 10c, the connection pads 5a, 5b and the capacitor element 8 are connected to the solder 9 with a wide bonding area of the solder 9. It is possible to connect firmly through. It goes without saying that the non-forming portion A may have another shape.

本発明の配線基板を実施するための最良の形態例を示す断面図である。It is sectional drawing which shows the example of the best form for implementing the wiring board of this invention. 本発明の配線基板の要部平面図である。It is a principal part top view of the wiring board of this invention. 本発明の配線基板の別の実施の形態例における要部平面図である。It is a principal part top view in another example of embodiment of the wiring board of this invention.

符号の説明Explanation of symbols

1:絶縁基板
5a,5b:コンデンサ素子8の電極が接続される接続パッド
8:コンデンサ素子
9:半田
10:ソルダーレジスト層
10c:開口部
A:導体層の非形成部
1: Insulating substrates 5a, 5b: Connection pads 8 to which the electrodes of the capacitor element 8 are connected: Capacitor element 9: Solder 10: Solder resist layer 10c: Opening A: Non-formed portion of the conductor layer

Claims (1)

半導体素子が搭載される絶縁基板の表面に、コンデンサ素子の電極が半田を介して電気的に接続される導体層から成る複数の接続パッドおよび該複数の接続パッドの中央部をそれぞれ露出させる四角形状の開口部を有するソルダーレジスト層が形成されており、前記接続パッドは、前記開口部の各角部に位置する部位に前記導体層の非形成部が設けられていることを特徴とする配線基板。 A rectangular shape in which a plurality of connection pads made of a conductor layer to which electrodes of capacitor elements are electrically connected via solder are exposed on the surface of an insulating substrate on which a semiconductor element is mounted, and central portions of the plurality of connection pads are exposed. The wiring board is characterized in that a solder resist layer having a plurality of openings is formed, and the connection pad is provided with a portion where the conductor layer is not formed in a portion located at each corner of the opening. .
JP2004014174A 2004-01-22 2004-01-22 Wiring board Pending JP2005209844A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220192018A1 (en) * 2020-12-15 2022-06-16 Ibiden Co., Ltd. Wiring substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220192018A1 (en) * 2020-12-15 2022-06-16 Ibiden Co., Ltd. Wiring substrate

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