JP2005209715A - Inspection method, and method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique for detecting a critical defect quickly by executing an efficient inspection to each group of patterns on a substrate. <P>SOLUTION: Visual examination for detecting the defects of a pattern formed on a substrate, such as a semiconductor substrate (wafer), a photomask, and a liquid crystal display plate, and foreign matters adhering on the substrate are made; a group of patterns is recognized according to the pattern density of a pattern formed on the substrate; and visual examination is made by varying an inspection ratio for each group of patterns (step S71). For inspection result, total defect display (step S74) or defect display (step S75) is made for each group of patterns. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an inspection method and a method for manufacturing a semiconductor device, and in particular, an appearance inspection for detecting a defect of a pattern formed on a substrate such as a semiconductor substrate (wafer), a photomask, a liquid crystal display panel, or a foreign matter attached to the substrate. It is related to technology effective when applied to.

  For example, as a technique examined by the present inventor, the following techniques can be considered in the appearance inspection of a semiconductor substrate or the like.

  In the conventional appearance inspection, all the product chips formed on the semiconductor substrate are inspected under the same inspection conditions. In addition, there are inspection methods for setting an inspection condition in which a specific pattern group is an inspection region and for specifying an inspection region by specifying a ratio with respect to the entire inspection region.

In addition, as a method for detecting a pattern defect of a chip in which regions having different pattern densities are mixed, there is a technique described in Patent Document 1, for example.
JP-A-8-320294

  By the way, as a result of examination of the appearance inspection technique as described above by the present inventors, the following has been clarified.

  For example, in the above inspection method, all pattern groups in the product chip are visually inspected under the same inspection conditions. For this reason, a pattern with little product influence (foreign matter, yield, characteristics, etc.) and a pattern with product influence are inspected under the same conditions, and the inspection time becomes longer.

  In addition, when trying to limit the inspection area, since the ratio is specified for each chip or the entire inspection area, the chip or pattern to be inspected may not be inspected originally. .

  Therefore, an object of the present invention is to provide a technique capable of efficiently inspecting each pattern group on a substrate and detecting a fatal defect in a short time.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, the inspection method according to the present invention is to perform an appearance inspection to detect a defect of a pattern formed on a substrate such as a semiconductor substrate (wafer), a photomask, a liquid crystal display panel, or a foreign matter attached on the substrate, The pattern group is recognized by the pattern density, and the appearance inspection is performed by changing the inspection ratio for each pattern group.

  Further, when performing an appearance inspection, the inspection ratio is increased for a pattern group having a high pattern density or a pattern group having a yield influence, and the inspection ratio is lowered for a pattern group having a low pattern density or a pattern group having no yield influence.

  Further, when recognizing the pattern group, the substrate surface is irradiated with light, and the contrast difference of the reflected light from the substrate surface is measured. Or the contrast difference of the secondary electron image obtained by irradiating the substrate surface with an electron beam is measured.

  Further, when performing an appearance inspection, the inspection sensitivity is changed for each pattern group.

  The semiconductor device manufacturing method according to the present invention utilizes the above-described inspection method.

  The inspection ratio refers to the area ratio for actually inspecting the inspection area, corresponding to the scan interval at the time of inspection, when the inspection ratio is high, the scan interval is narrow, and when the inspection ratio is low, the scan interval Becomes wider. When the inspection ratio is 0%, the target inspection area is not substantially inspected.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) An efficient inspection can be performed on each pattern group, and a fatal defect can be detected in a short time.

  (2) A defect having a yield effect can be detected efficiently. As a result, the yield of non-defective products is improved, so that early detection and improvement of problems and actions for countermeasures can be taken quickly.

  (3) Since the inspection is completed in a short time, the cycle time is improved and more products can be inspected.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  FIG. 1 is a diagram showing a configuration of a semiconductor device (chip) to be inspected in an inspection method and a semiconductor device manufacturing method according to an embodiment of the present invention. FIG. 2 is a flowchart showing a procedure for creating an inspection recipe. 3 is a schematic configuration diagram illustrating an apparatus for recognizing a pattern group, FIG. 4 is a diagram illustrating an in-chip pattern scanning method when recognizing the pattern group, and FIG. 5 is a diagram illustrating a state in which the pattern group in the chip is arbitrarily set. 6 is a flowchart showing details of the inspection ratio setting in FIG. 2, and FIG. 7 is a flowchart showing the inspection procedure.

  An inspection method according to an embodiment of the present invention is an inspection method for performing an appearance inspection to detect, for example, a defect in a pattern formed on a semiconductor substrate (wafer) or a foreign substance attached on the semiconductor substrate. In the manufacturing process. In addition, the semiconductor device manufacturing method according to the present embodiment uses the inspection method, and includes pattern formation processes such as film formation, resist coating, exposure, development, etching, and resist removal, inspection processes, and impurities. This is performed by repeating a plurality of steps such as an introduction step and a diffusion step.

  First, referring to FIG. 1, an example of a configuration in a product chip of a semiconductor device to be inspected in the present embodiment will be described. The semiconductor device of the present embodiment is a product chip 11 such as a system LSI, for example, a dummy pattern group 12 with a low pattern density (pattern is sparse), and a memory pattern group with a high pattern density (pattern is dense). 13 and 14 and several types of pattern groups such as peripheral circuit pattern groups 15 and 16 having a medium pattern density, and a plurality of product chips 11 are formed on one semiconductor substrate (wafer).

  Next, referring to FIG. 3 to FIG. 5, an inspection recipe creation procedure in the inspection method and semiconductor device manufacturing method of the present embodiment will be described with reference to FIG. 3. The recipe is a processing program or processing data for each apparatus related to a process sequence and control parameters for each processing apparatus in order to control wafer processing. The inspection recipe is created by the following procedure. First, in step S21, an inspection area is set. For example, the entire chip is set as the inspection area.

  Next, whether automatic / manual is determined in step S22, and in the case of automatic, in-chip patterns are scanned by the optical system in step S23 to recognize a pattern group. In the case of manual operation, an arbitrary pattern is set as a pattern group in step S24.

  The configuration of the pattern group recognition apparatus and the pattern group recognition method will be described with reference to FIG. As shown in FIG. 3A, the pattern group recognition apparatus according to the present embodiment is composed of a light source 31, a half mirror 32, an image sensor 33, and the like as shown in FIG. A pattern group in the formed product chip 11 is recognized. As a pattern group recognition method, the light 35 emitted from the light source 31 is reflected by the half mirror 32, the surface of the product chip 11 is irradiated with the light 35, and the reflected light 36 from the chip surface is captured by the image sensor 33. The area is determined by detecting the contrast difference of the reflected light 36 from the chip surface. For detecting the contrast of the chip surface, another optical system that is not used for actual inspection (appearance inspection) is used. In this optical system, low magnification, large pixels, and low magnification are sufficient, and the inside of the chip is scanned at high speed as indicated by arrows in FIG. 4 to measure the contrast difference on the chip surface. Reference numeral 42 denotes a scan progress image. Further, (b) an electron beam is composed of an electron gun 37, a detector 40, a video converter 41, an image sensor 33, etc. as shown in FIG. A pattern group in the product chip 11 is recognized. As a pattern group recognition method, electrons 38 irradiated from the electron gun 37 hit the surface of the product chip 11, secondary electrons 39 obtained therefrom are detected by a detector 40, and converted into an electronic image by a video converter 41. The image sensor 33 recognizes the contrast difference and determines the area. In order to increase the speed of pattern recognition, to prevent electrostatic breakdown of the product, and to prevent charge-up, the applied voltage of electrons is low, and the scanning area for one scan is widened. As a method for measuring the pattern group, there is a method based on automatic scanning as shown in FIG. This is a method of automatically measuring and recognizing the density of the pattern area of the pattern group. Also, as shown in FIG. 5, the arbitrary pattern 51 can be manually set on the user side.

  After automatic recognition and manual setting of the pattern groups, inspection conditions are set for each pattern group. As the inspection condition setting, first, in step S25, inspection sensitivity is set. At this time, the inspection sensitivity may be changed for each pattern group. In step S26, the inspection ratio is set and the inspection recipe is completed.

  Details of the inspection ratio setting (step S26) will be described with reference to FIG. First, in step S61, a pattern group is recognized, a pattern density is calculated in step S62, and an inspection ratio is set for each pattern group in step S63. The inspection ratio can be automatically set for the pattern density (%) and manually set manually. In step S64, automatic / manual determination is made, and in the case of automatic setting, in step S65, a percentage is designated for the pattern density. That is, the inspection ratio is increased for a pattern group having a high pattern density, and the inspection ratio is decreased for a pattern group having a low pattern density. In the case of manual arbitrary setting, in step S66, a percentage is arbitrarily specified for each pattern group. For example, the inspection ratio is increased for a pattern group having a yield influence, and the inspection ratio is lowered for a pattern group having no yield influence. In step S67, the inspection ratio is determined.

  After the above inspection recipe is completed, an appearance inspection is performed. The procedure of appearance inspection will be described with reference to FIG. After the inspection conditions are set by the inspection recipe in the figure, the inspection is started. On the inspection device side, in step S71, the inspection is performed with changing the inspection ratio for each pattern group. After the inspection is completed, the inspection result is displayed in step S72. The inspection result display includes total defect display and pattern group-specific defect display. In step S73, the total defect / pattern group is determined, the total number of defects is displayed in the case of total defects (step S74), and the number of defects for each pattern group is displayed in the case of pattern groups (step S75).

  It should be noted that not only the inspection ratio but also other inspection conditions may be changed for each pattern group. For example, the defect to be detected may differ depending on the pattern group, such as a short system or an open system. By changing the inspection conditions such as inspection sensitivity for each pattern group, it becomes possible to detect more fatal defects. Further, by setting the inspection ratio to 0%, it is possible to set an inspection-unnecessary pattern group and further reduce the inspection time.

  Therefore, according to the inspection method and semiconductor device manufacturing method of the present embodiment, the pattern group is recognized based on the pattern density (pattern density), and the inspection ratio is automatically set or set for each pattern group. By arbitrarily setting the inspection ratio according to the presence or absence of the influence of yield, it is possible to efficiently inspect each pattern group and detect a fatal defect in a short period of time. In other words, the inspection area is determined based on the pattern density information, instead of uniformly omitting the inspection target, so that the inspection setting is more suitable for the product.

  Further, it becomes possible to efficiently detect defects that have an influence on yield. As a result, the yield of non-defective products is improved, and problems can be quickly detected and improved, and actions can be taken quickly. Further, since the inspection is completed in a short time, the cycle time is shortened, and more products can be inspected.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, although the semiconductor substrate (wafer) has been described in the above embodiment, the present invention is not limited to this, and the present invention can also be applied to a substrate such as a photomask or a liquid crystal display panel.

  As described above, the invention disclosed in the present application can be applied to a production line for industrial products such as semiconductor devices, and is particularly effective for visual inspection of a substrate such as a system LSI in which various pattern groups are mixed. Is big.

It is a figure which shows the structure of the semiconductor device made into test | inspection in the test | inspection method and semiconductor device manufacturing method which are one embodiment of this invention. 5 is a flowchart showing a procedure for creating an inspection recipe in the inspection method and the semiconductor device manufacturing method according to an embodiment of the present invention. (A) (b) is a schematic block diagram which shows the apparatus which recognizes a pattern group in the inspection method which is one embodiment of this invention, and the manufacturing method of a semiconductor device, (a) is based on an optical system, (B) shows an electron beam. It is a figure which shows the pattern scanning method in a chip | tip at the time of recognizing a pattern group in the inspection method which is one embodiment of this invention, and the manufacturing method of a semiconductor device. It is a figure which shows a mode that the pattern group in a chip | tip was set arbitrarily in the test | inspection method and manufacturing method of a semiconductor device which are one embodiment of this invention. It is a flowchart which shows the detail of the test | inspection ratio setting of FIG. 5 is a flowchart showing an inspection procedure in an inspection method and a semiconductor device manufacturing method according to an embodiment of the present invention.

Explanation of symbols

11 Product chip 12 Dummy pattern group 13, 14 Memory pattern group 15, 16 Peripheral circuit pattern group 31 Light source 32 Half mirror 33 Image sensor 34 Wafer 35 Light 36 Reflected light 37 Electron gun 38 Electron 39 Secondary electron 40 Detector 41 Video conversion 42 Scanning progress image 51 Arbitrary pattern

Claims (5)

An inspection method for performing an appearance inspection to detect a defect in a pattern formed on a substrate or a foreign substance attached on the substrate,
Recognizing a pattern group by pattern density;
And a step of performing the appearance inspection by changing an inspection ratio for each pattern group. The inspection method according to claim 1,
In the visual inspection step, the pattern group having a high pattern density or the pattern group having a yield effect is increased for the pattern group having a low pattern density or the pattern group having no yield effect. Is an inspection method characterized by lowering the inspection ratio. The inspection method according to claim 1 or 2,
The step of recognizing the pattern group is a method of irradiating the substrate surface with light and measuring a contrast difference of reflected light from the substrate surface,
An inspection method selected from methods for measuring a contrast difference of a secondary electron image obtained by irradiating an electron beam onto the substrate surface. In the inspection method according to any one of claims 1 to 3,
In the visual inspection step, the inspection sensitivity is further changed for each pattern group.   A method for manufacturing a semiconductor device, wherein the inspection method according to claim 1 is used.

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