JP2005191139A - Multiple-pattern wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multiple-pattern wiring board which allows easy and effective attachment of the plating layer of a different thickness and type to interconnection conductors in wiring board regions. <P>SOLUTION: In the multiple-pattern wiring board 1, the plurality of wiring board regions 2 are arranged lengthwise and crosswise on an insulation substrate, and patterns 4 and 5 for conduction of plating for attaching the plating layer to the wiring conductors 6a-6c formed in the wiring board regions 2 by electrolytic plating method are also formed on the insulation substrate. The wiring conductors 6a-6c include first wiring conductors 6a and 6b and second wiring conductors 6c. The patterns 4 and 5 for conduction of plating include first patterns 4 for conduction of plating which are connected to all the first wiring conductors 6a and 6b formed in each wiring board region 2, and n pieces of second patterns 5 (n is an integer of 2 or above) for conduction of plating which are connected to all the second wiring conductors 6c in each group of wiring board regions 2 divided into n groups. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a multi-cavity wiring board formed by arranging a large number of wiring board regions each serving as a wiring board for mounting electronic components such as semiconductor elements and crystal resonators in a large-area mother board. It is.

  Conventionally, wiring boards for mounting electronic components such as semiconductor elements and crystal resonators have a high melting point metal powder such as tungsten or molybdenum on the surface of an insulating base made of an electrically insulating material such as an aluminum oxide sintered body. It is formed by disposing a wiring conductor made of metallization.

  And while mounting an electronic component on a wiring board, each electrode of this electronic component is electrically connected to a wiring conductor through electrical connection means such as solder or bonding wire, and then, on this wiring board. A lid made of metal or ceramics or a potting resin is joined so as to cover the electronic component, whereby the electronic component is hermetically sealed, and an electronic device as a product is manufactured.

  By the way, such a wiring board has become extremely small with a size of about several mm square in accordance with the recent demand for miniaturization of electronic devices.

  Therefore, in order to facilitate the handling of such a small-sized wiring board and to efficiently manufacture the wiring board and an electronic device using the wiring board, a so-called multi-cavity wiring board is used. Made in form.

  Such a multi-piece wiring board is formed by arranging a large number of wiring board regions each having wiring conductors in a single large-area mother board vertically and horizontally, and in which electronic components are arranged in each wiring board region. After mounting and sealing, the mother board is divided into each wiring board region, so that a large number of electronic devices can be obtained simultaneously and collectively.

  In addition, the wiring conductor formed in each wiring board region of the multi-cavity wiring board prevents the wiring conductor from being oxidatively corroded and has good electrical connectivity between the wiring conductor and each electrode of the electronic component. Therefore, a plating metal layer made of nickel, gold, or the like is applied to the exposed surface by, for example, an electrolytic plating method.

  Here, an example of such a multi-piece wiring board is shown in a plan view in FIG. As shown in FIG. 4, in the multi-piece wiring board, for example, a large number of wiring board regions 12, each of which becomes a wiring board, are integrally formed vertically and horizontally at the center of a rectangular mother board 11. A margin area 13 is formed on the outer periphery of the wiring board so as to surround the wiring board areas 12 arranged in the vertical and horizontal directions.

  For example, wiring conductors 15 a and 15 b are formed in each wiring board region 12. The wiring conductors 15 a and the wiring conductors 15 b of each wiring board region 12 are arranged in a plurality of columns, and are electrically connected to each column via the plating conduction pattern 14. The plating conduction pattern 14 is led out on two opposing sides of the mother board 11, and terminal portions 14a are formed on the two sides of the mother board 11, and the terminal parts 14a are connected to a power source for plating, thereby plating. A voltage for electrolytic plating is applied to all the wiring conductors 15a and 15b in each column via the conductive pattern 14.

  In this multi-cavity wiring board, all the wiring conductors are obtained by immersing the mother board 11 in an electrolytic plating bath for nickel plating or gold plating and connecting the plating conduction pattern 14 to a power source for plating. A plated metal layer by electrolytic plating is deposited on 15a and 15b.

Each wiring board can be obtained by dividing the multi-piece wiring board into each wiring board region 12. As a method for dividing each wiring board region 12, each wiring board region is formed by a method in which a dividing groove is formed for each wiring board region 12 of a multi-piece wiring board and divided along this, or by a slicing method or the like. There is a method of cutting every 12 or the like, and by these methods, individual wiring boards can be obtained.
JP 2000-165003 A

  However, in the conventional multi-cavity wiring board, since all the wiring conductors 15a and 15b formed on one mother board are all electrically connected to one plating conduction pattern 14, electrolytic plating is performed. When the plating layer is applied to the wiring conductors 15a and 15b by the method, only the same thickness and the same type of plating layer can be applied to all the portions where the plating layer is applied. For this reason, when the thickness of the plating layer to be applied to the wiring conductors 15a and 15b is different, or when different types of plating layers are to be applied, the wiring conductors 15a and 15b are masked with a film or the like. In addition, there is a need to prevent the plating layer from being deposited on the wiring conductors 15a and 15b, which is very troublesome. Also, if the wiring board is very small, or has an uneven surface on the surface of the wiring board, such as a wiring board having a recess on the upper surface, it is difficult to perform masking etc. accurately and quickly. It had the problem of being.

  The present invention has been completed in view of the above-described conventional problems, and an object of the present invention is to easily and efficiently deposit plating layers of different thicknesses and types deposited on the wiring conductor of the wiring board. An object of the present invention is to provide a multi-piece wiring board capable of achieving the above.

  In the multi-cavity wiring board of the present invention, a plurality of wiring board regions are arranged vertically and horizontally on an insulating base, and a plating layer is deposited on the wiring conductor formed in the wiring board region by electrolytic plating. In this case, the wiring conductor has a first wiring conductor and a second wiring conductor, and the plating conduction pattern is the wiring wiring. First plating conduction patterns connected to all first wiring conductors formed in the substrate region, respectively, and each group of the wiring substrate regions divided into n groups (n is an integer of 2 or more) And n second plating conduction patterns connected to all of the second wiring conductors therein.

  In the multi-cavity wiring board of the present invention, it is preferable that the first wiring conductor and the second wiring conductor have different plated conductor layers on the surfaces thereof.

  In the multi-cavity wiring board of the present invention, the wiring conductor has a first wiring conductor and a second wiring conductor, and the plating conduction pattern is formed on each of the first wiring conductors formed in the wiring board region. Connected to all the second wiring conductors in each group of the wiring board region divided into the first plating conduction pattern connected to the wiring conductors and n (n is an integer of 2 or more) groups Since it comprises n second plating conduction patterns, a voltage can be separately applied to the first plating conduction pattern and the second plating conduction pattern, so that masking or the like can be performed without masking. A plating layer of different thickness and type is applied to each of the first wiring conductor connected to the first plating conduction pattern and the second wiring conductor connected to the second plating conduction pattern by electrolytic plating. , It can be easily and satisfactorily deposited.

  In addition, the first plating conduction pattern is connected to all the wiring board regions and formed in a lump so that the terminal portions are reduced and connected to the first plating conduction pattern in all the wiring board regions. In addition, the plating layer can be easily applied to the first wiring conductor.

  Furthermore, even if the first wiring conductor connected to the first plating conduction pattern and the second wiring conductor connected to the second plating conduction pattern are short-circuited, the second plating conduction pattern Are divided into n groups, and in one group, when the first wiring conductor is plated, the plating layer is covered on both the first wiring conductor and the second wiring conductor. However, since the insulation between the first wiring conductor and the second wiring conductor is maintained in the remaining groups, the plating layer for the first wiring conductor is covered on the second wiring conductor. Without being attached, it is possible to effectively prevent the entire multi-chip wiring board from being defective due to one short circuit failure. Therefore, even if the first wiring conductor connected to the first plating conduction pattern and the second wiring conductor connected to the second plating conduction pattern are formed very close to each other, it is defective. Since the number can be suppressed and the yield can be improved, a smaller wiring board can be formed with a high yield.

  In the multi-cavity wiring board of the present invention, the first wiring conductor and the second wiring conductor have different plating conductor layers formed on the surfaces, so that, for example, the function as an electrically conductive material and the light reflection surface As a function, it is possible to easily produce a wiring conductor coated with a plating layer suitable for each of several functions in one wiring board area, and to produce a wiring board with excellent functions. Can be provided well.

  The multi-piece wiring board of the present invention will be described in detail below. In this example, an example in which the wiring board is a light emitting element storage package will be described. In this light emitting element storage package, a recess for storing the light emitting element is formed on the top surface, and a wiring conductor for electrically connecting the electrode of the light emitting element is formed on the bottom surface of the recess. A wiring conductor is formed on the side surface as a reflecting surface for reflecting light emitted from the light emitting element over the entire circumference.

  FIG. 1 shows a multi-chip wiring board of the present invention in which such a light emitting element storage package is formed as a wiring board region. FIG. 1A is a plan view of the multi-piece wiring board of the present invention. FIG. 1B is a cross-sectional view showing the surface on which the first plating conduction pattern is formed in the multi-cavity wiring board shown in FIG. 1A, and FIG. It is sectional drawing which shows the surface in which the pattern for conduction | electrical_connection was formed. Moreover, FIG.1 (d) is a top view after depositing the plating layer on the 1st and 2nd wiring conductor of the multi-cavity wiring board of this invention. Further, FIG. 2 is a cross-sectional view taken along the line A-A ′ of the multi-cavity wiring board of FIG. In these drawings, 1 is a multi-piece wiring board, 2 is a wiring board area, 3 is a disposal margin area, 4 is a first plating conduction pattern, 5 is a second plating conduction pattern, and 6a and 6b are first plating patterns. Reference numeral 1c denotes a first wiring conductor, and 6c denotes a second wiring conductor.

  A multi-piece wiring board (hereinafter also referred to as a mother board) 1 according to the present invention has a plurality of wiring board regions 2 arranged vertically and horizontally on an insulating base and wiring conductors 6a to 6 formed in the wiring board region 2. Plating conduction patterns 4 and 5 for depositing a plating layer on the electrode 6c by electrolytic plating are formed, and the wiring conductors 6a to 6c are connected to the first wiring conductors 6a and 6b and the second wiring conductor 6c. The plating conduction patterns 4 and 5 include the first plating conduction patterns 4 connected to all the first wiring conductors 6a and 6b formed in the wiring board region 2, respectively, and n ( n is an integer greater than or equal to 2) and includes n second plating conduction patterns 5 connected to all the second wiring conductors 6c in each group of the wiring board region 2 divided into groups. .

  As a result, a voltage can be separately applied to the first plating conduction pattern 4 and the second plating conduction pattern 5, so that the first plating conduction pattern 4 is connected without masking or the like. Easily and satisfactorily applying plating layers of different thicknesses and types to the first wiring conductors 6a and 6b and the second wiring conductor 6c connected to the second plating conduction pattern 5 by electrolytic plating. Can be deposited.

  In addition, the first plating conduction pattern 4 is connected to all the wiring board regions 2 and formed in a lump so that the terminal portions 4 ′ are reduced and the first plating conduction patterns in all the wiring board regions 2 are formed. A plating layer can be easily applied to the first wiring conductors 6 a and 6 b connected to the common pattern 4.

  Further, even if the first wiring conductors 6a and 6b connected to the first plating conduction pattern 4 and the second wiring conductor 6c connected to the second plating conduction pattern 5 are short-circuited, Since the two plating conduction patterns 5 are divided into n groups, the first wiring conductors 6a and 6b are formed when plating is formed on the first wiring conductors 6a and 6b in one group. The plating layer is applied to both the second and second wiring conductors 6c, but the insulation between the first wiring conductors 6a and 6b and the second wiring conductor 6c is maintained in the remaining groups. The plating layer for the first wiring conductors 6a and 6b is not deposited on the second wiring conductor 6c, and it is possible to effectively prevent the entire wiring board 1 from being defective due to one short circuit failure. can do. Therefore, it is assumed that the first wiring conductors 6a and 6b connected to the first plating conduction pattern 4 and the second wiring conductor 6c connected to the second plating conduction pattern 5 are very close to each other. Even if it is formed, the number of defects can be suppressed and the yield can be improved, so that a smaller wiring board can be formed with a high yield.

  Further, in the multi-cavity wiring board 1 of the present invention, the first wiring conductors 6a and 6b and the second wiring conductor 6c are preferably formed with different plating conductor layers on the surfaces thereof. As a result, for example, the wiring conductors 6a to 6c coated with plating layers suitable for each of a plurality of functions, such as a function as an electric conductive material and a function as a light reflecting surface, are formed in one wiring board region 2. Thus, a wiring board excellent in each function can be provided with high productivity.

  The mother substrate 1 of the present invention is made of ceramics, resin, or the like, and when made of ceramics, an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon nitride sintered body, silicon carbide. This is a rectangular flat plate made of an electrically insulating material such as a sintered material and glass ceramics. A large number of wiring board regions 2 are integrally formed vertically and horizontally at the center, and a square frame is formed at the outer periphery. A shaped margin area 3 is formed.

  When such a mother substrate 1 is made of, for example, an aluminum oxide sintered body, a suitable organic binder and solvent are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, calcium oxide, magnesium oxide and the like. This is formed into a sheet by using a conventionally known doctor blade method to obtain a plurality of ceramic green sheets, and thereafter, these ceramic green sheets are appropriately punched and moved up and down. A plurality of layers are laminated, and finally, this laminated body is manufactured by firing at a temperature of about 1600 ° C. in a reducing atmosphere.

Wiring conductors 6a to 6c are deposited on each wiring board region 2 formed in the central portion of the mother board 1, and the wiring conductors 6a to 6c are made of tungsten (W), molybdenum (Mo), copper ( A recess formed of a metal such as Cu) or silver (Ag) and connected to each electrode of an electronic component (not shown) mounted on the wiring board via an electrical connection means such as a solder bump or formed on the wiring board. In FIG. 1, in the mother board 1, the first plating conduction pattern 4 is a wiring conductor in all the wiring board regions 2. The second plating conduction pattern 5 is divided into a plurality of groups (four groups in FIG. 1), and is connected to the first and second plating conduction patterns 5a to 5d. Formed as The

  The first plating conduction pattern 4 and the second plating conduction patterns 5a to 5d are predetermined so as to be connected to the wiring conductors 6a to 6c by W paste or the like, for example, on a ceramic green sheet to be the mother board 1. This pattern is printed and applied, and fired together with the ceramic green sheet laminate to be the mother substrate 1, thereby being deposited on a predetermined position of the mother substrate 1.

  As shown in FIG. 2, the first wiring conductors 6 a and 6 b are formed on the bottom surface of the concave portion on the upper surface of the wiring board region 2. The light emitting element is accommodated on the bottom surface of the concave portion, and the electrodes of the light emitting element are the first. Are electrically connected to the wiring conductors 6a and 6b. Further, as shown in FIG. 2, the second wiring conductor 6c is formed on the inner surface of the recess over the entire circumference, and is for reflecting the light of the light emitting element accommodated in the recess.

  Then, the mother substrate 1 is immersed in the electrolytic plating bath, and the terminal portions 4 ′ of the first plating conduction pattern 4 and the terminal portions 5a ′ to 5d ′ of the second plating conduction patterns 5a to 5d are respectively plated. By connecting to the power source, the first plating layer 7 and the second plating layer 8 are deposited on the exposed surfaces of the first and second wiring conductors 6a to 6c. For example, if a gold plating layer is applied to the exposed surface of the first wiring conductors 6a and 6b and a silver plating layer is applied to the exposed surface of the second wiring conductor 6c, first, the mother board is used. 1 is immersed in the electrolytic gold plating bath, and the terminal portion 4 'of the first plating conduction pattern 4 is connected to the power source for plating, and the first plating layer is formed on the exposed surface of the first wiring conductors 6a and 6b. 7 is applied, and then the mother board 1 is immersed in an electrolytic silver plating bath and the terminal portions 5a ′ to 5d ′ of the second plating conduction pattern 5 are connected to the power source for plating. The silver plating layer that is the second plating layer 8 can be deposited on the exposed surface of the second wiring conductor 6c.

  The silver plating layer and the gold plating layer are examples, and may be other different plating layers or plating layers of the same material having different thicknesses.

  In addition, when a short circuit occurs between the first wiring conductors 6a and 6b and the second wiring conductor 6c in one of the wiring board regions 2, the first wiring conductors 6a and 6b are connected to the first wiring conductors 6a and 6b. When the plating layer 7 is deposited, the second plating conduction pattern 5 is connected to one group (for example, a group connected to the second plating conduction pattern 5d) among the plurality of groups into which the second plating conduction pattern 5 is divided. The first plating layer 7 is also deposited on the second wiring conductors 6c included in the group, and all the wiring board regions 2 of this group are defective. However, the wiring board region 2 of the other group (the group connected to the second plating conduction patterns 5a to 5c) is not defective, and the second plating conductor 8 is covered with the second wiring conductor 6c. At the time of deposition, the plating power source is connected to the connection portions 5a ′ to 5c ′ other than the connection portion 5d ′ connected to the second plating conduction pattern 5d of the defective group, thereby providing the second plating lead. The second plating layer 8 can be satisfactorily applied to the wiring board region 2 connected to the common patterns 5a to 5c.

  When the same plating layer is to be applied to the exposed surfaces of the first and second wiring conductors 6a to 6c, the mother substrate 1 is immersed in an electrolytic plating bath and the first plating conduction pattern is used. The first and second wiring conductors 6a to 6c are exposed by connecting the four terminal portions 4 'and the terminal portions 5a' to 5d 'of the second plating conduction patterns 5a to 5d to a plating power source. A plating layer can be applied to the substrate. For example, in the case of having two or more plating layers, the inner plating layer has the same thickness and type, and the outer plating layer has a different thickness and type. Moreover, it can use also for the plating layer from which the number of layers of a single layer and several layers differs. As a result, portions of the first and second wiring conductors 6a to 6c in the multi-piece wiring board 1 that are electrically connected to the first plating conduction pattern 4 and the second plating conduction pattern 5 are obtained. The plating layer can be satisfactorily applied to the portions electrically connected to each other.

  The divided second plating conduction patterns 5a to 5d are preferably formed by being divided into the same number of wiring board regions 2, respectively, to reduce the difference in wiring length between the second plating conductive patterns 5a to 5d. Variation in the second plating layer 8 deposited on the second wiring conductor 6c for each group deposited by the plating conduction patterns 5a to 5d can be reduced.

  In addition, since the formation of the terminal part 5 'and the connection to the electrode part become complicated as the number increases, the number of groups to be divided is preferably about 2 to 8.

  Further, in one divided group, the wiring board region 2 directly connected to the connection portions 5a ′ to 5d ′ via the second plating conduction patterns 5a to 5d includes the other connection portions 5a ′ to 5d. Compared to the wiring substrate region 2 that is not directly connected to ', it is preferable that the wiring substrate region 2 is connected to more adjacent wiring substrate regions 2 by the second plating conduction patterns 5a to 5d. Thereby, a voltage is easily applied to the second wiring conductor 6c of the wiring board region 2 directly connected to the connection portions 5a ′ to 5d ′ via the second plating conduction patterns 5a to 5d, and the plating thickness is increased. Can be effectively prevented by distributing the voltage, and the plating thickness can be made uniform in all the wiring board regions 2 in one divided group.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, in FIG. 1, all the wiring board regions 2 are connected and formed, but as shown in the plan view of the multi-piece wiring board 1 in FIG. You may divide into groups.

(A) is a top view which shows an example of embodiment of the multi-cavity wiring board of this invention, (b) is the surface in which the pattern for the 1st plating conduction in the multi-cavity wiring board of (a) was formed. FIG. 4C is a cross-sectional view showing a surface on which the second plating conduction pattern is formed in the multi-cavity wiring board of FIG. 5A, and FIG. 4D is a cross-sectional view of the multi-cavity wiring board of FIG. It is a top view after depositing the plating layer on the 1st and 2nd wiring conductor. It is sectional drawing of the direction orthogonal to the multi-cavity wiring board in the A-A 'line of the multi-cavity wiring board of Fig.1 (a). (A) is a top view which shows the other example of embodiment of the multi-cavity wiring board of this invention, (b) has formed the 1st pattern for plating conduction in the multi-cavity wiring board of (a). FIG. 4C is a cross-sectional view showing the surface, FIG. 4C is a cross-sectional view showing the surface on which the second plating conduction pattern is formed in the multi-cavity wiring board of FIG. 5A, and FIG. It is a top view after depositing the plating layer on the first and second wiring conductors. It is a top view of the conventional multi-piece wiring board.

Explanation of symbols

1 ... Multi-piece wiring board (mother board)
2 ... Wiring board region 3 ... Discard allowance region 4 ... 1st plating conduction pattern 5 ... 2nd plating conduction pattern 6a, 6b ... 1st wiring conductor 6c ... 2nd wiring conductor 7 ... 1st plating layer 8 ... 2nd plating layer

Claims (2)

A plurality of wiring board regions are arranged vertically and horizontally on the insulating base, and a plating conduction pattern for depositing a plating layer on the wiring conductor formed in the wiring board region by electrolytic plating is formed. The wiring board is a multi-cavity wiring board, wherein the wiring conductor has a first wiring conductor and a second wiring conductor, and the plating conduction pattern is formed on all the wiring boards formed in the wiring board region. All of the second wiring conductors in each group of the wiring board region divided into n (n is an integer of 2 or more) groups; and a first plating conduction pattern connected to one wiring conductor. And a plurality of second plating conductive patterns connected to each other. 3. The multi-cavity wiring board according to claim 2, wherein the first wiring conductor and the second wiring conductor have different plating conductor layers formed on the surfaces thereof.

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