JP2005183606A - Wiring board - Google Patents

Wiring board Download PDF

Info

Publication number
JP2005183606A
JP2005183606A JP2003421145A JP2003421145A JP2005183606A JP 2005183606 A JP2005183606 A JP 2005183606A JP 2003421145 A JP2003421145 A JP 2003421145A JP 2003421145 A JP2003421145 A JP 2003421145A JP 2005183606 A JP2005183606 A JP 2005183606A
Authority
JP
Japan
Prior art keywords
resin
conductor layer
layer
core substrate
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003421145A
Other languages
Japanese (ja)
Other versions
JP4423023B2 (en
Inventor
Osamu Akashi
理 明石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2003421145A priority Critical patent/JP4423023B2/en
Publication of JP2005183606A publication Critical patent/JP2005183606A/en
Application granted granted Critical
Publication of JP4423023B2 publication Critical patent/JP4423023B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board exhibiting excellent reliability in heat resistance wherein the resin layer at a build-up part is not stripped from a core substrate even if the wiring board is heated up to high temperatures of 250-260°C. <P>SOLUTION: Occupation area ratio of an opening 4A to a conductor layer 4P for ground or power supply of a core substrate 1 is set lower than the occupation area ratio of an opening 8A to a conductor layer 8P for ground or power supply of a built-up part 2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、半導体素子等の電子部品を搭載するために用いられる配線基板に関する。   The present invention relates to a wiring board used for mounting electronic components such as semiconductor elements.

従来、半導体素子等の電子部品を搭載するために用いられる配線基板として、例えばガラス繊維基材にエポキシ樹脂等の熱硬化性樹脂が含浸されて成る樹脂基板の上下面に銅箔から成る導体層が積層されたコア基板と、このコア基板の上下面にエポキシ樹脂等の熱硬化性樹脂から成る樹脂層と銅めっきから成る導体層とが交互に複数層積層されて形成されたビルドアップ部とを具備するビルドアップ多層配線基板が用いられている。   Conventionally, as a wiring board used for mounting electronic components such as semiconductor elements, for example, a conductor layer made of copper foil on the upper and lower surfaces of a resin substrate in which a glass fiber base material is impregnated with a thermosetting resin such as an epoxy resin And a build-up portion formed by alternately laminating a plurality of resin layers made of a thermosetting resin such as an epoxy resin and a conductor layer made of copper plating on the upper and lower surfaces of the core substrate. A build-up multilayer wiring board comprising:

このようなビルドアップ多層配線基板においては、ビルドアップ部の導体層のいくつかに細い帯状の信号用の配線導体が複数形成されている。また、コア基板の導体層およびビルドアップ部の導体層のいくつかには、信号用の配線導体に対する電磁シールドや特性インピーダンスの調整のために、接地用または電源用の広面積の導体層が信号用の配線導体に対向するように形成されている。なお、接地用や電源用の広面積の導体層は、コア基板を構成する樹脂基板やビルドアップ部を構成する樹脂層から発生するガスを外部に効率良く排出するとともにコア基板の樹脂基板とビルドアップ部の樹脂層との接合やビルドアップ部の樹脂層同士の接合を強固なものとするために、20μm〜200μm程度の開口径を有する開口部が多数形成された格子状の導体層を含んでいる。   In such a build-up multilayer wiring board, a plurality of thin strip-like signal wiring conductors are formed on some of the conductor layers of the build-up portion. In addition, the conductor layer of the core substrate and some of the conductor layers of the build-up section have a large-area conductor layer for grounding or power supply as a signal to adjust the electromagnetic shielding and characteristic impedance for the signal wiring conductor. It is formed to face the wiring conductor for use. The large-area conductor layer for grounding and power supply efficiently exhausts the gas generated from the resin substrate that constitutes the core substrate and the resin layer that constitutes the build-up unit to the outside and builds with the resin substrate of the core substrate. In order to strengthen the bonding between the resin layer of the up portion and the resin layers of the build-up portion, a grid-like conductor layer including a large number of openings having an opening diameter of about 20 μm to 200 μm is included. It is out.

また、ビルドアップ部に形成された導体層の一部は配線基板の上面側および下面側に露出しており、上面側に露出した導体層の一部が電子部品の電極に半田を介して電気的に接続される電子部品接続用の接続パッドを形成し、下面側に露出した導体層の一部が外部電気回路基板の配線導体に半田を介して電気的に接続される外部接続用の接続パッドを形成している。   In addition, a part of the conductor layer formed in the buildup part is exposed on the upper surface side and the lower surface side of the wiring board, and a part of the conductor layer exposed on the upper surface side is electrically connected to the electrode of the electronic component via solder. A connection pad for connecting electronic components to be electrically connected, and a part of the conductor layer exposed on the lower surface side is electrically connected to the wiring conductor of the external electric circuit board via solder A pad is formed.

そして、電子部品の電極と電子部品接続用の接続パッドとを半田を介して接合することにより電子部品が実装された電子装置となり、この電子装置の外部接続用の接続パッドを外部電気回路基板の配線導体に半田を介して接合することにより電子部品の電極が外部電気回路に電気的に接続されることとなる。   Then, an electronic device is mounted by joining the electrode of the electronic component and a connection pad for connecting the electronic component via solder, and the connection pad for external connection of the electronic device is connected to the external electric circuit board. By joining to the wiring conductor via solder, the electrodes of the electronic component are electrically connected to the external electric circuit.

なお、このようなビルドアップ多層配線基板においては、コア基板の銅箔から成る導体層は、ガラス繊維基材に未硬化の熱硬化性樹脂が含浸されて成る樹脂基板用の未硬化の樹脂シートの上下面に厚みが5〜50μm程度の銅箔を貼着するとともに、樹脂シート中の熱硬化性樹脂を熱硬化させることにより樹脂基板の上下面に銅箔を積層し、しかる後、その銅箔を所定のパターンにエッチングすることによって形成されており、熱硬化性樹脂が硬化する際の化学的な結合により樹脂基板に強固に接合している。他方、ビルドアップ部の銅めっきから成る導体層は、コア基板上にビルドアップ部用の樹脂層を形成した後、その表面に無電解銅めっきおよび電解銅めっきを施すことにより銅めっき層を形成した後、その銅めっき層を所定のパターンにエッチングすることによって形成されており、化学的な結合が小さいので樹脂層への接合力が弱い。   In such a build-up multilayer wiring board, the conductor layer made of copper foil of the core board is an uncured resin sheet for a resin board in which a glass fiber base material is impregnated with an uncured thermosetting resin. A copper foil having a thickness of about 5 to 50 μm is attached to the upper and lower surfaces of the resin sheet, and the copper foil is laminated on the upper and lower surfaces of the resin substrate by thermosetting the thermosetting resin in the resin sheet. It is formed by etching the foil into a predetermined pattern, and is firmly bonded to the resin substrate by chemical bonding when the thermosetting resin is cured. On the other hand, the conductor layer consisting of copper plating in the build-up part forms a copper plating layer by forming a resin layer for the build-up part on the core substrate and then applying electroless copper plating and electrolytic copper plating to the surface. After that, the copper plating layer is formed by etching into a predetermined pattern, and since the chemical bond is small, the bonding force to the resin layer is weak.

また、このようなビルドアップ多層配線基板においては、コア基板の難燃性を向上させるために、コア基板の熱硬化性樹脂中に水酸化アルミニウム等の熱分解により水分を発生するフィラーが含有されている。
特開平11−135949号公報
Further, in such a build-up multilayer wiring board, in order to improve the flame retardancy of the core substrate, the thermosetting resin of the core substrate contains a filler that generates moisture by thermal decomposition such as aluminum hydroxide. ing.
Japanese Patent Laid-Open No. 11-135949

ところで、近年、環境への配慮から、配線基板の接続パッドと電子部品の電極や外部電気回路基板の配線導体とを接続する半田として鉛を含まない鉛フリー半田が使用されるようになってきている。このような鉛フリー半田は、従来使用されてきた鉛−錫半田よりも融点が高く、そのため、電子部品の電極や外部電気回路基板の配線導体と接続パッドとを接合する半田を溶融させる際に、配線基板を250〜260℃程度の高温に加熱する必要がある。しかしながら、配線基板を250〜260℃程度の高温に加熱すると、コア基板とその上に積層したビルドアップ部の樹脂層との間に剥離が発生してしまうという問題点を誘発した。   By the way, in recent years, lead-free solder which does not contain lead has been used as a solder for connecting a connection pad of a wiring board to an electrode of an electronic component or a wiring conductor of an external electric circuit board in consideration of the environment. Yes. Such a lead-free solder has a higher melting point than the conventionally used lead-tin solder. Therefore, when melting the solder for joining the electrode of an electronic component or the wiring conductor of the external electric circuit board and the connection pad, It is necessary to heat the wiring board to a high temperature of about 250 to 260 ° C. However, when the wiring board is heated to a high temperature of about 250 to 260 ° C., it causes a problem that peeling occurs between the core board and the resin layer of the buildup portion laminated thereon.

そこで、本発明者は鋭意研究の結果、配線基板を250〜260℃に加熱すると、コア基板の熱硬化性樹脂に含有されるフィラーの一部が熱分解されて水分が発生し、その水分がコア基板の接地用または電源用の導体層に多数形成された開口部を介してビルドアップ部に急激かつ多量に抜け出し、その水分がコア基板とその上のビルドアップ部の樹脂層との間にガスとして溜まってコア基板とビルドアップ部の樹脂層とを剥離させることをつきとめた。   Therefore, as a result of earnest research, the present inventors have heated the wiring board to 250 to 260 ° C., and part of the filler contained in the thermosetting resin of the core board is thermally decomposed to generate moisture, and the moisture is Through the openings formed in the conductor layer for grounding or power supply of the core substrate, a large amount of water escapes rapidly to the build-up portion, and the moisture is between the core substrate and the resin layer of the build-up portion above it. It was found that the gas was accumulated as a gas and the core substrate and the resin layer of the build-up part were peeled off.

本発明は、かかる従来の問題点に鑑み案出されたものであり、その目的は、配線基板を250〜260℃程度の高温に加熱したとしても、コア基板とビルドアップ部の樹脂層との間に剥離が発生することのない耐熱信頼性に優れる配線基板を提供することにある。   The present invention has been devised in view of such conventional problems. The purpose of the present invention is to provide the core substrate and the resin layer of the build-up portion even when the wiring substrate is heated to a high temperature of about 250 to 260 ° C. An object of the present invention is to provide a wiring board having excellent heat resistance and reliability without causing any peeling.

本発明の配線基板は、繊維基材に熱硬化性樹脂が含浸されて成る樹脂基板の上下面に銅箔から成る導体層が積層されて成るコア基板と、該コア基板の上下面に樹脂層と銅めっき層から成る導体層とが交互に複数層積層されて形成されたビルドアップ部とを具備し、前記コア基板の前記導体層および前記ビルドアップ部の前記導体層は開口部が多数形成された格子状の接地用または電源用の導体層が含まれている配線基板であって、前記コア基板の前記導体層における前記開口部の占める面積割合が、前記ビルドアップ部の前記導体層における前記開口部の占める面積割合よりも小さいことを特徴とするものである。   The wiring board of the present invention includes a core substrate in which a conductor layer made of copper foil is laminated on the upper and lower surfaces of a resin substrate in which a fiber base material is impregnated with a thermosetting resin, and a resin layer on the upper and lower surfaces of the core substrate. And a buildup portion formed by alternately laminating a plurality of conductor layers made of a copper plating layer, and the conductor layer of the core substrate and the conductor layer of the buildup portion are formed with a large number of openings. A wiring board including a grid-like grounding or power supply conductor layer, wherein an area ratio of the opening in the conductor layer of the core board is equal to that in the conductor layer of the build-up part. It is smaller than the area ratio which the said opening part occupies.

本発明の配線基板は、コア基板の接地用または電源用の導体層おける開口部の占める面積割合が、ビルドアップ部の接地用または電源用の導体層における開口部の占める面積割合よりも小さいことから、接続パッド上に鉛フリー半田を溶融させる際等に配線基板を250〜260℃の温度に加熱した場合にコア基板から水分が発生したとしても、その水分はコア基板の接地用または電源用の導体層に設けられた開口部の面積比率が小さいことから、面積比率の小さい開口部を通してビルドアップ部側に急激かつ多量に抜け出ることはない。したがって、コア基板から発生した水分がコア基板とビルドアップ部との間にガスとして溜まってコア基板とビルドアップ部の樹脂層との間で剥離が発生することはない。なお、コア基板の樹脂基板と導体層とは化学的な結合により強固に接合しているので、樹脂基板から発生した水分がコア基板の接地用または電源用の導体層に形成された開口部を介してビルドアップ部側に急激かつ多量に抜け出せないとしてもコア基板の樹脂基板と導体層との間で剥離が発生するようなことはない。また、コア基板の接地用または電源用の導体層には開口部が形成されているので、この開口部を介してコア基板の樹脂基板とビルドアップ部の樹脂層とが強固に接合される。さらに、ビルドアップ部の接地用または電源用の導体層における開口部の面積割合が大きなことから、コア基板やビルドアップ部から発生するガスをビルドアップ部の接地用または電源用の導体層に設けた面積割合の大きな開口部を介して外部に良好に排出することができる。そのため、ビルドアップ部の樹脂層と接地用または電源用の導体層との間にガスが溜まってビルドアップ部の樹脂層と接地用または電源用の導体層との間に剥離が発生するようなこともない。   In the wiring board of the present invention, the area ratio of the opening in the conductor layer for grounding or power supply of the core substrate is smaller than the area ratio of the opening in the conductor layer for grounding or power supply of the buildup part. Even if moisture is generated from the core substrate when the wiring substrate is heated to a temperature of 250 to 260 ° C. when the lead-free solder is melted on the connection pads, the moisture is used for grounding the core substrate or for power supply Since the area ratio of the opening provided in the conductor layer is small, it does not escape rapidly and in large quantities through the opening having a small area ratio toward the build-up part. Therefore, moisture generated from the core substrate does not accumulate as a gas between the core substrate and the buildup portion, and peeling does not occur between the core substrate and the resin layer of the buildup portion. In addition, since the resin substrate and the conductor layer of the core substrate are firmly bonded to each other by chemical bonding, moisture generated from the resin substrate has an opening formed in the conductor layer for grounding or power supply of the core substrate. Therefore, even if it cannot be rapidly and abundantly pulled out to the build-up part side, peeling does not occur between the resin substrate of the core substrate and the conductor layer. In addition, since an opening is formed in the grounding or power supply conductor layer of the core substrate, the resin substrate of the core substrate and the resin layer of the buildup portion are firmly bonded through the opening. Furthermore, because the area ratio of the opening in the conductor layer for grounding or power supply in the buildup part is large, gas generated from the core board or buildup part is provided in the conductor layer for grounding or power supply in the buildup part. It can be discharged well through the opening having a large area ratio. Therefore, gas may accumulate between the resin layer of the buildup part and the conductor layer for grounding or power supply, and separation may occur between the resin layer of the buildup part and the conductor layer for grounding or power supply. There is nothing.

次に、本発明の配線基板を添付の図面に基づき詳細に説明する。   Next, the wiring board of the present invention will be described in detail with reference to the accompanying drawings.

図1は、本発明の配線基板を実施するための最良の形態例を示す断面図である。図1において1はコア基板、2はビルドアップ部である。コア基板1は、主として樹脂基板3と導体層4と貫通導体5と樹脂柱6とから構成されており、ビルドアップ部2は主として樹脂層7と導体層8とソルダーレジスト層9とから構成されている。そしてコア基板1の上下面にビルドアップ部2が形成されることにより、本発明の配線基板が構成されている。また、図2(a)および図2(b)は、図1に示す配線基板における導体層4と導体層8の一部をそれぞれ示す要部平面図である。   FIG. 1 is a sectional view showing the best mode for carrying out the wiring board of the present invention. In FIG. 1, 1 is a core substrate and 2 is a build-up part. The core substrate 1 is mainly composed of a resin substrate 3, a conductor layer 4, a through conductor 5, and a resin pillar 6, and the buildup portion 2 is mainly composed of a resin layer 7, a conductor layer 8, and a solder resist layer 9. ing. And the buildup part 2 is formed in the upper and lower surfaces of the core board | substrate 1, and the wiring board of this invention is comprised. 2 (a) and 2 (b) are main part plan views showing parts of the conductor layer 4 and the conductor layer 8 in the wiring board shown in FIG.

コア基板1を構成する樹脂基板3は、本発明の配線基板に必要な剛性や強度を与えるための土台となる基板であり、例えばガラス繊維束を縦横に織り込んだガラス繊維基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂が含浸されて成り、その上下面に図2(a)に示すような開口部4Aが多数形成された格子状の接地用や電源用の導体層4Pを含む銅箔から成る導体層4が積層されている。また、樹脂基板3の上面から下面にかけては複数の貫通孔10が形成されているとともに、その貫通孔10の内面には所定の導体層4同士を上下で電気的に接続するための銅めっき層から成る貫通導体5が被着されている。なお、樹脂基板3の熱硬化性樹脂中には、熱分解して水分を発生する水酸化アルミニウム等のフィラーが含有されており、それにより樹脂基板3の難燃性が高められている。   The resin substrate 3 constituting the core substrate 1 is a substrate serving as a base for giving the necessary rigidity and strength to the wiring substrate of the present invention. For example, an epoxy resin or a glass fiber base material in which glass fiber bundles are woven vertically and horizontally is used. A grid-like grounding or power supply conductor layer 4P, which is formed by impregnating a thermosetting resin such as bismaleimide triazine resin and has a large number of openings 4A as shown in FIG. A conductor layer 4 made of copper foil is laminated. A plurality of through holes 10 are formed from the upper surface to the lower surface of the resin substrate 3, and a copper plating layer for electrically connecting predetermined conductor layers 4 to each other on the inner surface of the through holes 10. A through conductor 5 made of is attached. In addition, the thermosetting resin of the resin substrate 3 contains a filler such as aluminum hydroxide that is thermally decomposed to generate moisture, thereby enhancing the flame retardancy of the resin substrate 3.

このような樹脂基板3は、ガラス織物に未硬化の熱硬化性樹脂を含浸させたシートを熱硬化させた後、これに上面から下面にかけてドリル加工を施すことにより製作される。なお、樹脂基板3の上下面に積層された導体層4は、樹脂基板3用のシートの上下全面に厚みが5〜50μm程度の銅箔を貼着しておくとともにこの銅箔をシートの硬化後にエッチング加工することにより接地用や電源用等の所定の導体層4Pを有するように形成される。また、貫通孔10内面の貫通導体5は、樹脂基板3に貫通孔10を設けた後に、この貫通孔10の内面に無電解めっき法および電解めっき法により厚みが5〜50μm程度の銅めっき層を析出させることにより形成される。   Such a resin substrate 3 is manufactured by thermally curing a sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling the sheet from the upper surface to the lower surface. The conductor layer 4 laminated on the upper and lower surfaces of the resin substrate 3 has a copper foil having a thickness of about 5 to 50 μm adhered to the entire upper and lower surfaces of the sheet for the resin substrate 3, and the copper foil is cured on the sheet. It is formed so as to have a predetermined conductor layer 4P for grounding or power supply by etching later. Further, the through conductor 5 on the inner surface of the through hole 10 is provided with a copper plating layer having a thickness of about 5 to 50 μm on the inner surface of the through hole 10 by electroless plating and electrolytic plating after the resin substrate 3 is provided with the through hole 10. It is formed by precipitating.

さらに、樹脂基板3は、その貫通孔10の内部にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂から成る樹脂柱6が充填されている。樹脂柱6は、貫通孔10を塞ぐことにより貫通孔10の直上および直下にもビルドアップ部2を形成可能とするためのものであり、未硬化のペースト状の熱硬化性樹脂を貫通孔10内にスクリーン印刷法により充填し、これを熱硬化させた後、その上下面を略平坦に研磨することにより形成される。そして、この樹脂柱6を含むコア基板1の上下面にビルドアップ部2が積層されている。   Further, the resin substrate 3 is filled with resin columns 6 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin in the through hole 10. The resin pillar 6 is for making it possible to form the build-up portion 2 directly above and below the through hole 10 by closing the through hole 10, and using an uncured paste-like thermosetting resin as the through hole 10. It is formed by filling the inside by a screen printing method, thermally curing it, and then polishing the upper and lower surfaces thereof to be substantially flat. And the buildup part 2 is laminated | stacked on the upper and lower surfaces of the core board | substrate 1 containing this resin pillar 6. FIG.

コア基板1の上下面に積層されたビルドアップ部2は、本発明の配線基板における高密度配線を可能とする部分であり、エポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂にシリカ等のフィラーを含有させて成る薄い樹脂層7と銅めっき層から成る導体層8とが交互に複数積層されているとともに、さらにその上にアクリル変性エポキシ樹脂等の熱硬化性樹脂にシリカやタルク等のフィラーを含有させて成るソルダーレジスト層9を被着させて成る。   The build-up portions 2 stacked on the upper and lower surfaces of the core substrate 1 are portions that enable high-density wiring in the wiring substrate of the present invention, and are made of a thermosetting resin such as epoxy resin or bismaleimide triazine resin with silica or the like. A plurality of thin resin layers 7 containing a filler and a conductor layer 8 made of a copper plating layer are alternately laminated, and a thermosetting resin such as an acrylic-modified epoxy resin is further formed thereon, such as silica or talc. It is formed by depositing a solder resist layer 9 containing a filler.

ビルドアップ部2を構成する樹脂層7は、それぞれの厚みが20〜50μm程度であり、各層の上面から下面にかけて直径が30〜100μm程度の複数のビア孔11を有しており、その表面およびビア孔11内には信号用の配線導体や図2(b)に示すような、開口部8Aが多数形成された格子状の接地用あるいは電源用の導体層8Pを含む銅めっき層から成る導体層8が被着されている。また、最表層の樹脂層7の表面には、電子部品の電極が半田を介して接続される電子部品接続用の接続パッド8aや外部電気回路基板の配線導体に半田を介して接続される外部接続用の接続パッド8bが形成されている。これらの樹脂層7は、銅めっき層から成る導体層8を高密度に配線するための絶縁間隔を提供するためのものであり、樹脂層7を挟んで上下に位置する所定の導体層8同士をビア孔11の内部の導体層8を介して電気的に接続することによりビルドアップ部2における高密度配線が立体的に形成可能となっている。   The resin layer 7 constituting the buildup portion 2 has a plurality of via holes 11 each having a thickness of about 20 to 50 μm and a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. A signal wiring conductor or a conductor made of a copper plating layer including a grid-like grounding or power supply conductor layer 8P in which a large number of openings 8A are formed as shown in FIG. Layer 8 is applied. Further, on the surface of the outermost resin layer 7, an electronic component connection pad 8 a to which an electrode of an electronic component is connected via solder and an external conductor connected to a wiring conductor of an external electric circuit board via solder Connection pads 8b for connection are formed. These resin layers 7 are for providing an insulating interval for wiring the conductor layers 8 made of a copper plating layer at high density, and between the predetermined conductor layers 8 positioned above and below the resin layer 7. Are electrically connected via the conductor layer 8 inside the via hole 11 so that the high-density wiring in the build-up portion 2 can be three-dimensionally formed.

このような樹脂層7は、厚みが20〜50μm程度の未硬化の熱硬化性樹脂フィルムをコア基板1の上下面に貼着し、これを熱硬化させるとともにレーザ加工によりビア孔11を穿孔し、さらにその上に同様にして次の樹脂層7を順次積み重ねることによって形成される。なお、各樹脂層7の表面およびビア孔11内に被着された導体層8は、各樹脂層7を形成する毎に各樹脂層7の表面およびビア孔11内に5〜50μm程度の厚みの銅めっき層を公知のセミアディティブ法やサブトラクティブ法等のパターン形成法により所定のパターンに被着させることによって形成される。   For such a resin layer 7, an uncured thermosetting resin film having a thickness of about 20 to 50 μm is pasted on the upper and lower surfaces of the core substrate 1, and this is thermoset and the via hole 11 is drilled by laser processing. Further, it is formed by successively stacking the next resin layer 7 in the same manner. The surface of each resin layer 7 and the conductor layer 8 deposited in the via hole 11 has a thickness of about 5 to 50 μm on the surface of each resin layer 7 and in the via hole 11 every time the resin layer 7 is formed. This copper plating layer is formed by depositing a predetermined pattern by a known pattern forming method such as a semi-additive method or a subtractive method.

さらに、ソルダーレジスト層9は、表層の導体層8同士の電気的絶縁信頼性を高めるとともに、半田接続パッド8a、8bの樹脂層7への接合強度を大きなものとする作用をなす。   Further, the solder resist layer 9 has an effect of increasing the electrical insulation reliability between the surface conductor layers 8 and increasing the bonding strength of the solder connection pads 8a and 8b to the resin layer 7.

このようなソルダーレジスト層9は、その厚みが10〜50μm程度であり、感光性を有するソルダーレジスト層9用の未硬化樹脂ペーストをロールコーター法やスクリーン印刷法を採用して最表層の導体層8が形成された樹脂層7上に塗布し、これを乾燥させた後、露光および現像処理を行なって接続パッド8a、8bを露出させる開口部を形成した後、これを熱硬化させることによって形成される。あるいは、ソルダーレジスト層9用の未硬化の樹脂フィルムを最上層の導体層8が形成された樹脂層7上に貼着した後、これを熱硬化させ、しかる後、接続パッド8a、8bに対応する位置にレーザ光を照射し、硬化した樹脂フィルムを部分的に除去することによって接続パッド8a、8bを露出させる開口部を有するように形成される。   Such a solder resist layer 9 has a thickness of about 10 to 50 μm, and an uncured resin paste for the solder resist layer 9 having photosensitivity adopts a roll coater method or a screen printing method as the outermost conductive layer. 8 is applied on the resin layer 7 formed and dried, and then exposed and developed to form openings that expose the connection pads 8a and 8b, and then thermally cured. Is done. Alternatively, after an uncured resin film for the solder resist layer 9 is stuck on the resin layer 7 on which the uppermost conductor layer 8 is formed, it is thermally cured, and then corresponds to the connection pads 8a and 8b. By irradiating the position where the laser beam is irradiated and partially removing the hardened resin film, it is formed to have openings that expose the connection pads 8a and 8b.

さらに、接続パッド8a、8bには、錫−銀合金や錫−銀−銅合金等の鉛フリー合金から成る半田12a、12bが溶着されており、それにより接続パッド8a、8bの変色や酸化が防止されるとともに電子部品の各電極と接続パッド8aとの半田を介した接合や接続パッド8bと外部電気回路基板との半田を介した接合が容易なものとなっている。   Furthermore, solder 12a, 12b made of a lead-free alloy such as tin-silver alloy or tin-silver-copper alloy is welded to the connection pads 8a, 8b, thereby causing discoloration or oxidation of the connection pads 8a, 8b. In addition to being prevented, bonding between each electrode of the electronic component and the connection pad 8a via solder and bonding between the connection pad 8b and the external electric circuit board via solder are facilitated.

このように、接続パッド8a、8bに半田12a、12bを溶着させるには、接続パッド8a、8bの上に錫−銀合金や錫−銀−銅合金等の鉛フリー合金から成る半田粉末とフラックスとを含有する半田ペーストを従来周知のスクリーン印刷法を採用して印刷塗布し、それを250〜260℃の温度で加熱して半田粉末を溶融させることにより溶着する方法が採用される。   As described above, in order to weld the solders 12a and 12b to the connection pads 8a and 8b, solder powder and flux made of a lead-free alloy such as a tin-silver alloy or a tin-silver-copper alloy are formed on the connection pads 8a and 8b. A solder paste containing the above is printed and applied by using a conventionally well-known screen printing method, and the solder paste is melted by heating it at a temperature of 250 to 260 ° C.

なお、本発明の配線基板においては、図2(a)に示すように、コア基板1の導体層4に形成された接地用または電源用の導体層4Pは、内側に導体層がない開口部4Aが多数形成された格子状であり、このようにコア基板1の接地用または電源用の導体層4Pは、開口部4Aが多数形成された格子状であることから、この開口部4Aを介してコア基板1から発生するガスをビルドアップ部2側に排出することができるとともにコア基板1の樹脂基板3とビルドアップ部2の樹脂層7とが強固に接合される。   In the wiring board of the present invention, as shown in FIG. 2A, the grounding or power supply conductor layer 4P formed on the conductor layer 4 of the core substrate 1 has an opening having no conductor layer inside. 4A is formed in a lattice shape in which a large number of openings are formed, and thus the grounding or power supply conductor layer 4P of the core substrate 1 has a lattice shape in which a large number of openings 4A are formed. Thus, the gas generated from the core substrate 1 can be discharged to the buildup portion 2 side, and the resin substrate 3 of the core substrate 1 and the resin layer 7 of the buildup portion 2 are firmly bonded.

また、図2(b)に示すように、ビルドアップ部2の導体層8に形成された接地用または電源用の導体層8Pも、内側に導体層がない開口部8Aが多数形成された格子状であり、このようにビルドアップ部2の接地用または電源用の導体層8Pは、開口部8Aが多数形成された格子状であることから、この開口部8Aを介してコア基板1の樹脂基板3やビルドアップ部2の樹脂層7から発生するガスをビルドアップ部2の外部に排出することができるとともにビルドアップ部2の樹脂層7同士が強固に接合される。   Further, as shown in FIG. 2B, the grounding or power supply conductor layer 8P formed in the conductor layer 8 of the build-up portion 2 is also a lattice in which a large number of openings 8A having no conductor layer are formed inside. Since the grounding or power supply conductor layer 8P of the build-up portion 2 has a lattice shape in which a large number of openings 8A are formed in this way, the resin of the core substrate 1 is formed through the openings 8A. Gas generated from the resin layer 7 of the substrate 3 or the buildup unit 2 can be discharged to the outside of the buildup unit 2 and the resin layers 7 of the buildup unit 2 are firmly bonded to each other.

なお、図2(a)、(b)において、4Lおよび8Lは他の層の導体層8にビア孔11を介して電気的に接続するために設けられたランドであり、4C、8Cはランド4Lや8Lと接地用または電源用の導体層4Pや8Pとの電気的な絶縁を保つためのクリアランスである。この例ではそのようなランド4L、8Lおよびクリアランス4C、8Cを有する例を示している。   2A and 2B, 4L and 8L are lands provided for electrical connection to the conductor layer 8 of the other layer through the via holes 11, and 4C and 8C are the lands. It is a clearance for maintaining electrical insulation between 4L and 8L and grounding or power supply conductor layers 4P and 8P. In this example, an example having such lands 4L and 8L and clearances 4C and 8C is shown.

そして、本発明の配線基板においては、図2(a)、(b)に示すように、コア基板1に形成された接地用または電源用の導体層4Pにおける開口部4Aの占める面積割合が、ビルドアップ部2に形成された接地用または電源用の導体層8Pにおける開口部8Aの占める面積割合よりも小さいものとなっている。このように、本発明の配線基板においては、コア基板1の接地用または電源用の導体層4Pにおける開口部4Aの占める面積割合が、ビルドアップ部2の接地用または電源用の導体層8Pにおける開口部8Aの占める面積割合よりも小さいことから、接続パッド8aや8b上に鉛フリー半田12aや12bを溶融させる際等に配線基板を250〜260℃の温度に加熱した場合にコア基板1の樹脂基板3から水分が発生したとしても、その水分はコア基板1の接地用または電源用の導体層4Pに設けられた開口部4Aの面積比率が小さいことから、面積比率の小さい開口部4Aを通してビルドアップ部2側に急激かつ多量に抜け出ることはない。したがって、コア基板1の樹脂基板3から発生した水分がコア基板1とビルドアップ部2との間にガスとして溜まってコア基板1とビルドアップ部2の樹脂層7との間で剥離が発生することはない。なお、コア基板1の樹脂基板3と導体層4とは化学的な結合により強固に接合しているので、樹脂基板3から発生した水分がコア基板1の接地用または電源用の導体層4Pに形成された開口部4Aを介してビルドアップ部2側に急激かつ多量に抜け出せないとしてもコア基板1の樹脂基板3と導体層4との間で剥離が発生するようなことはない。また、コア基板1の接地用または電源用の導体層4Pには開口部4Aが多数形成されているので、この開口部4Aを介してコア基板1の樹脂基板3とビルドアップ部2の樹脂層7とが強固に接合される。さらに、ビルドアップ部2の接地用または電源用の導体層8Pにおける開口部8Aの面積割合が大きなことから、コア基板1やビルドアップ部2から発生するガスを面積割合の大きな開口部8Aを介して外部に良好に排出することができる。そのため、ビルドアップ部2の樹脂層7と接地用または電源用の導体層8Pとの間にガスが溜まってビルドアップ部2の樹脂層7と接地用または電源用の導体層8Pとの間に剥離が発生するようなこともない。   In the wiring board of the present invention, as shown in FIGS. 2A and 2B, the area ratio of the opening 4A in the grounding or power supply conductor layer 4P formed on the core substrate 1 is as follows. The area ratio occupied by the opening 8A in the grounding or power supply conductor layer 8P formed in the buildup portion 2 is smaller. As described above, in the wiring board of the present invention, the area ratio of the opening 4A in the grounding or power supply conductor layer 4P of the core substrate 1 is in the grounding or power supply conductor layer 8P of the buildup part 2. Since the area ratio is smaller than the area occupied by the opening 8A, when the wiring board is heated to a temperature of 250 to 260 ° C. when the lead-free solder 12a or 12b is melted on the connection pads 8a or 8b, the core substrate 1 Even if moisture is generated from the resin substrate 3, the moisture passes through the opening 4A having a small area ratio because the area ratio of the opening 4A provided in the grounding or power supply conductor layer 4P of the core substrate 1 is small. There is no sudden and large-scale exit to the build-up part 2 side. Accordingly, moisture generated from the resin substrate 3 of the core substrate 1 accumulates as a gas between the core substrate 1 and the buildup unit 2, and separation occurs between the core substrate 1 and the resin layer 7 of the buildup unit 2. There is nothing. Since the resin substrate 3 and the conductor layer 4 of the core substrate 1 are firmly bonded by chemical bonding, the moisture generated from the resin substrate 3 is applied to the grounding or power supply conductor layer 4P of the core substrate 1. Even if a large amount cannot be pulled out rapidly and in a large amount toward the build-up portion 2 through the formed opening 4A, no peeling occurs between the resin substrate 3 and the conductor layer 4 of the core substrate 1. Since a large number of openings 4A are formed in the grounding or power supply conductor layer 4P of the core substrate 1, the resin substrate 3 of the core substrate 1 and the resin layer of the build-up portion 2 are formed through the openings 4A. 7 is firmly joined. Further, since the area ratio of the opening 8A in the grounding or power supply conductor layer 8P of the buildup part 2 is large, the gas generated from the core substrate 1 and the buildup part 2 is passed through the opening 8A having a large area ratio. Can be discharged to the outside. Therefore, gas accumulates between the resin layer 7 of the buildup portion 2 and the grounding or power supply conductor layer 8P, and between the resin layer 7 of the buildup portion 2 and the grounding or power supply conductor layer 8P. No peeling occurs.

なお、コア基板1の接地用または電源用の導体層4Pにおける開口部4Aの占める面積割合が、ビルドアップ部2の接地用または電源用の導体層8Pにおける開口部8Aの占める面積割合の80%より大きいと、接続パッド8aや8b上に鉛フリー半田12aや12bを溶融させる際等に配線基板を250〜260℃の温度に加熱した場合に、樹脂基板3から発生した水分が急激かつ多量にビルドアップ部2側に抜け出てコア基板1とビルドアップ部2の樹脂層7との間で剥離が発生したり、あるいはコア基板1の樹脂基板3やビルドアップ部2の樹脂層7から発生するガスを外部に良好に排出できずにビルドアップ部2の樹脂層7と導体層8との間で剥離が発生する危険性が高くなり、逆に10%よりも小さいと、コア基板1の樹脂基板3とビルドアップ部2の絶縁層7とを開口部4Aを介して強固に接合させることが困難となる。したがって、コア基板1の接地用または電源用の導体層4Pにおける開口部4Aの占める面積割合は、ビルドアップ部2の接地用または電源用の導体層8Pにおける開口部8Aの占める面積割合の10〜80%の範囲が好ましい。   The area ratio of the opening 4A in the grounding or power supply conductor layer 4P of the core substrate 1 is 80% of the area ratio of the opening 8A in the grounding or power supply conductor layer 8P of the buildup section 2. If it is larger, when the wiring board is heated to a temperature of 250 to 260 ° C. when the lead-free solder 12a or 12b is melted on the connection pads 8a or 8b, the water generated from the resin substrate 3 is abruptly large. Separation occurs between the core substrate 1 and the resin layer 7 of the buildup unit 2 by slipping out to the buildup unit 2 side, or from the resin substrate 3 of the core substrate 1 or the resin layer 7 of the buildup unit 2. If the gas cannot be discharged to the outside well, there is a high risk of delamination between the resin layer 7 and the conductor layer 8 of the build-up part 2, and conversely if less than 10%, the resin of the core substrate 1 Board 3 It is difficult to firmly bond the insulating layer 7 of the build-up portion 2 through an opening 4A. Therefore, the area ratio of the opening 4A in the grounding or power supply conductor layer 4P of the core substrate 1 is 10 to 10% of the area ratio of the opening 8A in the grounding or power supply conductor layer 8P of the buildup section 2. A range of 80% is preferred.

かくして、本発明の配線基板によれば、電子部品の電極と接続パッド8aとを半田12aを介して接合することにより電子部品が実装された電子装置となり、この電子装置の接続パッド8bを外部電気回路基板の配線導体に半田12bを介して接合することにより電子部品の電極が外部電気回路に電気的に接続されることとなる。   Thus, according to the wiring board of the present invention, the electronic component is mounted on the electronic component by bonding the electrode of the electronic component and the connection pad 8a via the solder 12a. By joining the wiring conductor of the circuit board via the solder 12b, the electrode of the electronic component is electrically connected to the external electric circuit.

なお、本発明は、上述の形態例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能であることはいうまでもない。例えば上述の形態例では、開口部4A、8Aの形状は四角形であったが、開口部4A、8Aの形状は四角形に限らず、三角形や六角形等の四角形以外の多角形や円形、楕円形、長円形であってもよい。また、開口部4Aや8Aの配列も四角配列に限らず、三角配列や他の配列であっても良い。また、開口部4Aと8Aとで開口の大きさや形状を異ならせてもよい。   Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, in the above-described embodiment, the shape of the openings 4A and 8A is a quadrangle, but the shape of the openings 4A and 8A is not limited to a quadrangle, but a polygon other than a quadrangle such as a triangle or a hexagon, a circle, or an ellipse. , May be oval. Further, the arrangement of the openings 4A and 8A is not limited to the square arrangement, and may be a triangular arrangement or another arrangement. Also, the size and shape of the openings may be different between the openings 4A and 8A.

本発明の配線基板を実施するための最良の形態例を示す断面図である。It is sectional drawing which shows the example of the best form for implementing the wiring board of this invention. (a)、(b)は、図1に示す配線基板における導体層の一部を示す要部平面図である。(A), (b) is a principal part top view which shows a part of conductor layer in the wiring board shown in FIG.

符号の説明Explanation of symbols

1:コア基板
2:ビルドアップ部
3:樹脂基板
4:コア基板1の導体層
4P:コア基板1における接地用または電源用の導体層
4A:導体層4Pに形成された開口部
7:樹脂層
8:ビルドアップ部2の導体層
8P:ビルドアップ部2における接地用または電源用の導体層
8A:導体層8Pに形成されたい開口部
1: Core substrate 2: Build-up portion 3: Resin substrate 4: Conductor layer 4P of core substrate 1: Grounding or power supply conductor layer 4A in core substrate 1: Opening 7 formed in conductor layer 4P: Resin layer 8: Conductor layer 8P of build-up part 2: Conductive layer 8A for grounding or power supply in build-up part 2: Opening to be formed in conductor layer 8P

Claims (1)

繊維基材に熱硬化性樹脂が含浸されて成る樹脂基板の上下面に銅箔から成る導体層が積層されて成るコア基板と、該コア基板の上下面に樹脂層と銅めっき層から成る導体層とが交互に複数層積層されて形成されたビルドアップ部とを具備し、前記コア基板の前記導体層および前記ビルドアップ部の前記導体層は開口部が多数形成された格子状の接地用または電源用の導体層が含まれている配線基板であって、前記コア基板の前記導体層における前記開口部の占める面積割合が、前記ビルドアップ部の前記導体層における前記開口部の占める面積割合よりも小さいことを特徴とする配線基板。 A core substrate in which a conductor layer made of copper foil is laminated on the upper and lower surfaces of a resin substrate in which a fiber base material is impregnated with a thermosetting resin, and a conductor made of a resin layer and a copper plating layer on the upper and lower surfaces of the core substrate And a build-up portion formed by alternately laminating a plurality of layers, and the conductor layer of the core substrate and the conductor layer of the build-up portion are for grid-like grounding in which a large number of openings are formed Alternatively, the wiring board includes a power source conductor layer, and the area ratio of the opening in the conductor layer of the core board is the area ratio of the opening in the conductor layer of the build-up part. A wiring board characterized by being smaller than the above.
JP2003421145A 2003-12-18 2003-12-18 Wiring board Expired - Fee Related JP4423023B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003421145A JP4423023B2 (en) 2003-12-18 2003-12-18 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003421145A JP4423023B2 (en) 2003-12-18 2003-12-18 Wiring board

Publications (2)

Publication Number Publication Date
JP2005183606A true JP2005183606A (en) 2005-07-07
JP4423023B2 JP4423023B2 (en) 2010-03-03

Family

ID=34782452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003421145A Expired - Fee Related JP4423023B2 (en) 2003-12-18 2003-12-18 Wiring board

Country Status (1)

Country Link
JP (1) JP4423023B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014112641A (en) * 2012-11-09 2014-06-19 Taiyo Yuden Co Ltd Electronic component built-in substrate
JP2014130974A (en) * 2012-12-29 2014-07-10 Kyocer Slc Technologies Corp Wiring board
JP2016025339A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board
JP2016025337A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board
JP2016025338A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014112641A (en) * 2012-11-09 2014-06-19 Taiyo Yuden Co Ltd Electronic component built-in substrate
JP2014130974A (en) * 2012-12-29 2014-07-10 Kyocer Slc Technologies Corp Wiring board
JP2016025339A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board
JP2016025337A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board
JP2016025338A (en) * 2014-07-25 2016-02-08 京セラサーキットソリューションズ株式会社 Wiring board

Also Published As

Publication number Publication date
JP4423023B2 (en) 2010-03-03

Similar Documents

Publication Publication Date Title
WO2007126090A1 (en) Circuit board, electronic device and method for manufacturing circuit board
KR20150092881A (en) Pcb, package substrate and a manufacturing method thereof
JP2010135721A (en) Printed circuit board comprising metal bump and method of manufacturing the same
JP6027001B2 (en) Heat dissipation circuit board
JP2016063130A (en) Printed wiring board and semiconductor package
JP2010135720A (en) Printed circuit board comprising metal bump and method of manufacturing the same
JP2018032660A (en) Printed wiring board and method for manufacturing the same
JP2006237637A (en) Printed wiring board and method of manufacturing the same
JP6669330B2 (en) Printed circuit board with built-in electronic components and method of manufacturing the same
TW201444440A (en) Printed circuit board and fabricating method thereof
JP4423023B2 (en) Wiring board
JP2010123829A (en) Printed wiring board and manufacturing method thereof
JP2018032661A (en) Printed wiring board and method for manufacturing the same
KR100873835B1 (en) Printed wiring board and method of manufacturing the same
JP2010123830A (en) Printed wiring board and manufacturing method thereof
JP2002261439A (en) Insulating sheet, its manufacturing method, wiring board, and its manufacturing method
JP5370883B2 (en) Wiring board
JP2014123592A (en) Process of manufacturing printed wiring board and printed wiring board
JP7057792B2 (en) Laminated body and its manufacturing method
JP2005057298A (en) Printed wiring board and manufacturing method therefor
JP2005183483A (en) Wiring board
JP2004119442A (en) Method for manufacturing wiring board with solder bump
JP2004172304A (en) Wiring board and its manufacturing method
JP2015126103A (en) Printed wiring board and method of manufacturing the same
JP2004119544A (en) Wiring board and its manufacturing method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20061117

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090330

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090512

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090710

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20091109

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20091207

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121211

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees