JP2005175124A - Wiring module and printed circuit board for mounting the same - Google Patents

Wiring module and printed circuit board for mounting the same Download PDF

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Publication number
JP2005175124A
JP2005175124A JP2003411549A JP2003411549A JP2005175124A JP 2005175124 A JP2005175124 A JP 2005175124A JP 2003411549 A JP2003411549 A JP 2003411549A JP 2003411549 A JP2003411549 A JP 2003411549A JP 2005175124 A JP2005175124 A JP 2005175124A
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Prior art keywords
wiring
external connection
wiring module
connection terminals
module
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Japanese (ja)
Inventor
Toshio Ofusa
俊雄 大房
Yutaka Yoshikawa
吉川  裕
Norihiko Miyahara
紀彦 宮原
Yasutaka Meiraku
泰孝 明楽
Toshiaki Ishii
俊明 石井
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Toppan Inc
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Toppan Printing Co Ltd
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Priority to JP2003411549A priority Critical patent/JP2005175124A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring module having ease of use and a high degree of freedom, wherein the cost is reduced by decreasing the number of layers of a printed circuit board for an electronic apparatus and high density cross wires are realized, and to provide the printed circuit board for mounting the wiring module. <P>SOLUTION: The wiring module comprises a plurality of pairs, each comprising external connection terminals and wires interconnecting the external connection terminals on an insulation layer. Further, in the wiring module, one part of the external connection terminals is collectively arranged to a prescribed region of the wiring module, and another part of the external connection terminals in pairs, with the one part above, is collectively arranged to the other region. Moreover, in the wiring module, a pair of the external connection terminals and the wires has no electrical connecting part with another pair. Desired wiring is completed for the printed circuit board, by mounting the wiring module onto the printed circuit board, wherein the connection terminals in pairs are provided at positions, straddling at least one or more wires, to connect the connection terminals provided to the printed circuit board to the external connection terminals in the wiring module. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

高速信号対応の高密度な配線と、配線層数減による低コスト化が可能な半導体装置搭載用プリント配線板とその配線補完用モジュールに関する。   The present invention relates to a high-density wiring for high-speed signals, a printed wiring board for mounting on a semiconductor device capable of reducing the cost by reducing the number of wiring layers, and a module for complementing the wiring.

従来の技術では配線の交差がある場合には、プリント配線板の層数を増やし、一方の配線を別の層に迂回させることで対応してきた。これによって交差する配線が多数存在する場合にも対応可能となったが、層数を増やすことはそのままコストアップとなってしまい、用途によっては適用できない場合があった。一方、交差する配線が少ない場合にはジャンパーチップと呼ばれるチップ型抵抗器やジャンパー線を接続することで対応していた。特許文献1では1つのチップで1本の交差しか対応できなかったジャンパーチップを改善したもので、多ピンの半導体パッケージ型のセラミック多層配線板で複数のジャンパーチップの代わりをさせようとするものであり、これはLCC(Leadless Chip
Carrier)タイプの端子形状を持つものとなっている。特許文献2は複数のジャンパー線をフィルムに挟み込んで一体化し、ジャンパー線端部を露出させて接続できるようにしたものである。
In the prior art, when there is a wiring intersection, the number of layers of the printed wiring board is increased, and one wiring is bypassed to another layer. This makes it possible to deal with a case where there are a large number of intersecting wirings, but increasing the number of layers directly increases the cost and may not be applicable depending on the application. On the other hand, when there are few intersecting wirings, a chip type resistor called a jumper chip or a jumper wire is connected. Patent Document 1 is an improvement of a jumper chip that can handle only one intersection with one chip, and is intended to replace a plurality of jumper chips with a multi-pin semiconductor package type ceramic multilayer wiring board. Yes, this is LCC (Leadless Chip)
Carrier) type terminal shape. In Patent Document 2, a plurality of jumper wires are sandwiched and integrated into a film, and end portions of the jumper wires are exposed so that they can be connected.

以下に公知文献を示す。
特開平7−50462号公報 実開平5−79971号公報
The known literature is shown below.
Japanese Patent Laid-Open No. 7-50462 Japanese Utility Model Publication No. 5-79971

半導体パッケージ型のセラミック多層配線板を使用した場合は、端子位置やサイズが限定されるため使用しにくい点、配線ピッチに比べて端子ピッチが大きいため配線の引き回しに影響が出る点、セラミック多層基板が高価という点、などが課題として挙げられる。LCCタイプなどの半導体パッケージの端子では0.5〜1.27mmピッチが一般的である。一方、配線の微細化が進む最近の電子機器用プリント配線板では、50μmピッチ程度の高密度パターンが一般的になっており、それと比較すると1桁以上ピッチが粗い状況である。そのような状況において、例えば32本の配線をまとめて交差させる場合、幅16〜40mmのまとまったスペースが2列必要になり、50μmピッチの配線160〜400本分のスペースを32本の配線のために犠牲にしてしまう計算になる。そのため、実際の配線パターン中に端子を配置できない場合が多くなっている。また、交差される側の配線本数が決まっていないため、それに合わせたサイズのセラミック多層基板を個別に用意する必要があり、使い勝手と価格で、親基板側を多層化したほうが安くなる場合が多い状況である。   When a semiconductor package type ceramic multilayer wiring board is used, the terminal position and size are limited, so it is difficult to use, the terminal pitch is larger than the wiring pitch, and the wiring routing is affected. Ceramic multilayer substrate However, it is expensive. A pitch of 0.5 to 1.27 mm is generally used for terminals of a semiconductor package such as an LCC type. On the other hand, in recent printed wiring boards for electronic devices, where the miniaturization of wiring is progressing, a high-density pattern with a pitch of about 50 μm is generally used, and the pitch is one digit or more coarse compared to that. In such a situation, for example, when 32 wires are crossed together, two rows of 16 to 40 mm wide spaces are required, and a space of 160 to 400 wires with a pitch of 50 μm is required for 32 wires. This is a sacrifice. For this reason, there are many cases where terminals cannot be arranged in an actual wiring pattern. In addition, since the number of wirings on the intersecting side is not determined, it is necessary to prepare a ceramic multilayer substrate of a size that matches that, and it is often cheaper to multilayer the parent substrate side for ease of use and price. Is the situation.

これとは別に、複数のジャンパー線をフィルムに挟み込んで一体化し、ジャンパー線端部を露出させて接続できるようにしたものは、価格と自由度にメリットがあるが、微細なピッチで接続することが困難なため、高密度配線基板用に使用するには不向きである。このような一般的な用途とは別に、半導体素子を複数個搭載するポリイミドベースの半導体装置用基板も注目され始めている。現在は2メタルと呼ばれる両面に配線を形成した基板で対応するか4層以上のガラエポ基板で対応するしかなく、2メタル品が高価で特性インピーダンスを制御する必要のある高速信号を扱う用途では2メタルでは十分な性能を確保できないため、ビルドアップ基板で対応する例が増えている。   Separately, multiple jumper wires that are sandwiched between films and integrated so that the ends of the jumper wires can be exposed have advantages in price and flexibility, but they must be connected at a fine pitch. Is difficult to use for high-density wiring boards. Apart from such general applications, polyimide-based semiconductor device substrates on which a plurality of semiconductor elements are mounted are also drawing attention. Currently, it can only be handled by a substrate with wiring formed on both sides, called 2 metal, or it can be handled by a glass-epoxy substrate with 4 or more layers, and 2 metal products are expensive and are used for handling high-speed signals that require characteristic impedance control. Since sufficient performance cannot be ensured with metal, there are an increasing number of examples that support build-up substrates.

本発明の課題は、配線の微細化が進む最近の電子機器用プリント配線板の層数減による低コスト化と高密度な交差配線と自由度の高い使い勝手の良さを実現する配線モジュール、及びそれを搭載したプリント配線板を提供しようとするものである。   An object of the present invention is to provide a wiring module that realizes cost reduction by reducing the number of layers of recent printed wiring boards for electronic devices whose wiring is miniaturized, high-density cross wiring, and high ease of use. It is intended to provide a printed wiring board equipped with.

上記課題を考慮し、多くの材料とプロセスを検討した結果、ポリイミド樹脂やガラスエポキシ基材(ガラス繊維から成る布にエポキシ樹脂を含浸し熱加工した絶縁用基材)等からなる絶縁基板の上に交差用の配線とその両端に外部接続端子を形成した配線モジュールが上記課題の解決には最適であることを見出した。価格の安いポリイミドやガラスエポキシ基材等の絶縁フィルムはTABやプリント配線板で多くの実績があり、入手も容易である。同様に、配線形成も実績があり、ポリイミドフィルムを使用したパターン形成ではCOF方式(Chip on Film)の液晶ドライバ用途で既に30μmピッチの配線が量産化されており、導体1層あたりの配線収容量は他の配線基板より格段に高い状況である。また、接続端子は一般的で使いやすいワイヤーボンディング方式なら100μmピッチ以下での接続が可能である。TAB方式(Tape Automated Bonding)やCOF方式による30〜50μmピッチの接続も、現状では接続端子同士を安定して接続させることは難しいが、将来的には可能と考えられるなど、種々の接続方式に対応させることが可能である。   As a result of studying many materials and processes in consideration of the above problems, it was found that an insulating substrate made of polyimide resin or glass epoxy base material (an insulating base material in which a glass fiber cloth is impregnated with an epoxy resin and thermally processed) is used. It has been found that a wiring module in which wiring for crossing and external connection terminals are formed at both ends thereof is optimal for solving the above problems. Insulating films such as low-cost polyimide and glass epoxy base materials have many achievements in TAB and printed wiring boards, and are easily available. Similarly, there is a track record in wiring formation, and in pattern formation using a polyimide film, 30 μm pitch wiring has already been mass-produced for COF (Chip on Film) liquid crystal driver applications, and the wiring capacity per conductor layer Is much higher than other wiring boards. In addition, if the connection terminal is a general and easy-to-use wire bonding method, connection with a pitch of 100 μm or less is possible. Connection of 30-50 μm pitch by TAB method (Tape Automated Bonding) or COF method is also difficult at present, but it is difficult to connect the connection terminals to each other. It is possible to make it correspond.

本発明の請求項1に係る発明は、絶縁層の表面上に配線層を積層した配線モジュールにおいて、該配線層は、一対の外部接続端子と、該外部接続端子間を結ぶ配線とからなる一対の組が複数個形成されていることを特徴とする配線モジュールである。   The invention according to claim 1 of the present invention is the wiring module in which the wiring layer is laminated on the surface of the insulating layer, wherein the wiring layer includes a pair of external connection terminals and a wiring connecting the external connection terminals. A wiring module characterized in that a plurality of sets are formed.

本発明の請求項2に係る発明は、前記複数の外部接続端子の一部が、配線モジュールの一定領域に集中して配置され、これと対となる外部接続端子の一部が別の一定領域に集中して配置されていることを特徴とする請求項1記載の配線モジュールである。   In the invention according to claim 2 of the present invention, a part of the plurality of external connection terminals is concentrated in a certain area of the wiring module, and a part of the external connection terminals paired therewith is another constant area. The wiring module according to claim 1, wherein the wiring module is arranged in a concentrated manner.

上記配線モジュールが、親基板の接続端子に対応する複数の接続端子とそれを結ぶ配線を有することによって親基板の配線を補完するという特徴と、配線モジュール上の接続端子が1ヶ所以上の一定領域に集中して設けられている特徴を示したものであり、接続端子を集中して設ける一定領域は、別の一定領域と完全に独立して複数の一定領域が存在することが望ましいが、接続端子の配置上の制約などの理由でその一部が重なり合っても問題ない。   The wiring module includes a plurality of connection terminals corresponding to the connection terminals of the parent board and wirings connecting the connection terminals, thereby supplementing the wiring of the parent board, and a fixed region having one or more connection terminals on the wiring module The fixed area where the connection terminals are concentrated is preferably a plurality of fixed areas that are completely independent of other fixed areas. There is no problem even if some of them overlap for reasons such as terminal layout restrictions.

本発明の請求項3に係る発明は、外部接続端子とそれを結ぶ配線が、ほぼ対称の位置に配置され、一部の外部接続端子または配線の位置や形状を変えることや、外部接続端子または配線以外の目印を付加することによってその方向が判別可能な部分を有することを特徴とする請求項1、又は2記載の配線モジュール。
である。
In the invention according to claim 3 of the present invention, the external connection terminals and the wirings connecting the external connection terminals are arranged at substantially symmetrical positions, and the positions and shapes of some of the external connection terminals or wirings are changed. 3. The wiring module according to claim 1, further comprising a portion whose direction can be discriminated by adding a mark other than the wiring.
It is.

配線と接続端子が配線モジュールのほぼ中央部の点またはその点を中心とする線に対してほぼ対称な配置であることを特徴とし、方向の判別が容易なように工夫したものである。それは配線や接続端子の一部を視認可能なレベルで位置をずらしたり、形状を変えたり、配線や接続端子以外の目印を付けることで対応可能なものになっている。   The wiring and the connection terminal are arranged substantially symmetrically with respect to a substantially central point of the wiring module or a line centered on the point, and the device is devised so that the direction can be easily determined. It can be dealt with by shifting the position at a level where a part of the wiring and the connection terminal can be visually recognized, changing the shape, and attaching a mark other than the wiring and the connection terminal.

本発明の請求項4に係る発明は、絶縁基板上に形成された複数の外部接続端子及び配線が、配線モジュール内で、お互いに電気的な接続部を持たないことを特徴とする請求項1、又は2記載の配線モジュールである。   The invention according to claim 4 of the present invention is characterized in that the plurality of external connection terminals and wirings formed on the insulating substrate do not have electrical connection portions to each other in the wiring module. Or a wiring module according to 2.

本発明の請求項5に係る発明は、前記絶縁層の表面及び裏面上に配線層を積層した配線モジュールにおいて、前記一対の外部接続端子が、異なる配線層内に配置され、前記外部端子間を結ぶ配線は、前記絶縁層を貫通するビア用孔内に形成したビアの配線を介して導通させることを特徴とする請求項1乃至3のいずれか1項記載の配線モジュールである。   The invention according to claim 5 of the present invention is the wiring module in which the wiring layers are laminated on the front surface and the back surface of the insulating layer, wherein the pair of external connection terminals are arranged in different wiring layers, and the external terminals are arranged between the external terminals. 4. The wiring module according to claim 1, wherein the wiring to be connected is conducted through a via wiring formed in a via hole penetrating the insulating layer. 5.

配線モジュール上の配線が片面だけに存在するものや、両面に配線を有するが配線モジュール内で各々の電気的な接続部の無いもので、層数が少なく安価な構造である配線モジュールを示したものである。   A wiring module that has wiring on the wiring module only on one side or that has wiring on both sides but does not have each electrical connection in the wiring module and has a low number of layers and an inexpensive structure is shown. Is.

本発明の請求項6に係る発明は、前記配線及び外部接続端子が、銅によって形成され、外部接続端子の部分が耐食性のある金属またはカーボンなどの導電性物質で覆われ、配線の部分を保護するための絶縁膜が接続端子以外の部分に形成されたことを特徴とする請求項1乃至5のいずれか1項記載の配線モジュールである。   In the invention according to claim 6 of the present invention, the wiring and the external connection terminal are formed of copper, and the external connection terminal portion is covered with a corrosion-resistant metal or a conductive material such as carbon to protect the wiring portion. 6. The wiring module according to claim 1, wherein an insulating film is formed on a portion other than the connection terminal.

一般的に使用される材料を使用する事で、入手と製造の容易な形態の配線モジュールを示したものである。また、配線を保護するための絶縁膜と外部接続端子を覆う導電性物質は完全に独立していても良く、オーバーラップしていても良い。   It shows a wiring module that is easy to obtain and manufacture by using commonly used materials. In addition, the insulating film for protecting the wiring and the conductive material covering the external connection terminal may be completely independent or may overlap.

本発明の請求項7に係る発明は、少なくとも1本以上の配線を跨ぐ位置に対となる接続端子を設けたプリント配線板において、請求項1乃至5のいずれか1項記載の配線モジュールを搭載することによって、プリント配線板に設けた前記接続端子と前記配線モジュール内の外部接続端子とが接続されて所望の配線が完結することを特徴とするプリント配線板である。   The invention according to claim 7 of the present invention is a printed wiring board provided with a pair of connection terminals at a position straddling at least one or more wirings, and the wiring module according to any one of claims 1 to 5 is mounted. By doing so, the connection terminal provided on the printed wiring board and the external connection terminal in the wiring module are connected to complete a desired wiring.

配線モジュールの外部接続端子に対応する接続端子を備えたプリント配線板で、これに配線モジュールを搭載することで、プリント配線板と配線モジュールとの対応する端子間が接続され、本来の配線が完結する形態としたことにより、プリント配線板の層数を増やさずに目的が達成される特徴を示したものである。また、配線モジュールが複数のプリント配線板を接続するためのものではなく、一個のプリント配線板上に固着され、その配線を補完するものである。   A printed wiring board with connection terminals corresponding to the external connection terminals of the wiring module. By mounting the wiring module on this, the corresponding terminals between the printed wiring board and the wiring module are connected, and the original wiring is completed. By adopting such a form, the characteristic that the object is achieved without increasing the number of layers of the printed wiring board is shown. In addition, the wiring module is not for connecting a plurality of printed wiring boards, but is fixed on one printed wiring board to complement the wiring.

本発明の請求項8に係る発明は、前記プリント配線板が、1層の配線層、又は2層の配線層で形成されたことを特徴とする請求項7記載のプリント配線板である。   The invention according to claim 8 of the present invention is the printed wiring board according to claim 7, wherein the printed wiring board is formed of one wiring layer or two wiring layers.

プリント配線板のうち、配線モジュールを搭載することによる効果の顕著に現れる、配線層が少ないプリント配線板を示したものである。   Among the printed wiring boards, a printed wiring board having a small number of wiring layers, in which the effect of mounting a wiring module appears significantly, is shown.

本発明による配線モジュールとそれに対応するプリント配線板との組合せにより、従来はビルドアップ基板を使用していたアプリケーションが、より安価な2メタルテープ基板と配線モジュールの組合せで対応可能となったり、2メタルテープ基板を使用していた例では1メタルテープ基板と配線モジュールの組合せで対応可能となるなど、配線の層数を減らすことができ、全体の厚みとコストを低減することができた。特に2メタルテープを1メタルにすることでコストは従来の半分以下となった。このように元々の層数が少ない基板に対して、層数削減によるコスト削減効果が大きなものとなっている。   The combination of the wiring module according to the present invention and the printed wiring board corresponding to the wiring module makes it possible for an application that conventionally uses a build-up board to be supported by a combination of a cheaper two-metal tape board and a wiring module. In an example in which a metal tape substrate is used, the number of wiring layers can be reduced, such as a combination of one metal tape substrate and a wiring module, and the overall thickness and cost can be reduced. In particular, the cost is reduced to less than half of the conventional cost by using two metal tapes as one metal. Thus, the cost reduction effect by reducing the number of layers is large with respect to the original substrate having a small number of layers.

また、配線モジュールの裏面にベタのグラウンド層を設け、配線層が2層の2メタル基板を配線層が1層の1メタル基板にした場合は、層数削減による効果だけでなく、交差する配線間に本発明の配線モジュールによるシールド層を入れることができるため、交差する配線間のクロストークが大幅に低減し、より高速な信号に対応可能となった。   In addition, when a solid ground layer is provided on the back surface of the wiring module and a two-metal board with two wiring layers is used as a one-metal board with one wiring layer, not only the effect of reducing the number of layers but also the crossing wiring Since the shield layer by the wiring module of the present invention can be inserted between them, the crosstalk between the intersecting wirings is greatly reduced, and it becomes possible to cope with higher speed signals.

本発明の実施の形態を詳細に説明する。図1は、本発明の配線モジュールを示す部分図で、(a)は、平面図であり、(b)は側断面図である。図1(a)は、絶縁基板14上の片側には、複数の外部接続端子11が整列し配置され、一方の片側にも各々と対となる外部接続端子11が配置されている。前記外部接続端子11は配線12により導通されている。該配線12の両端の2個の外部接続端子11は親基板の配線板、例えばプリント配線板の配線回路内の接続端子と導通され、配線回路ができあがるものである。図上のx−x面の断面図を図1(b)に示す。図1(b)は、基板14の片面のみに一対の外部接続端子11及び配線12が形成されている。   Embodiments of the present invention will be described in detail. 1A and 1B are partial views showing a wiring module of the present invention, in which FIG. 1A is a plan view and FIG. 1B is a side sectional view. In FIG. 1A, a plurality of external connection terminals 11 are arranged and arranged on one side of an insulating substrate 14, and a pair of external connection terminals 11 are also arranged on one side. The external connection terminal 11 is electrically connected by a wiring 12. The two external connection terminals 11 at both ends of the wiring 12 are electrically connected to the connection terminals in the wiring circuit of the parent substrate, for example, the printed circuit board, thereby completing the wiring circuit. A cross-sectional view of the xx plane in the figure is shown in FIG. In FIG. 1B, a pair of external connection terminals 11 and wirings 12 are formed only on one side of the substrate 14.

図2は、本発明の別の配線モジュールを示す部分図で、(a)は、平面図であり、(b)は側断面図である。図2(a)は、絶縁基板14上の片側には、複数の外部接続端子11が整列し配置され、一方の片側にも各々と対となる外部接続端子11が配置されている。前記外部接続端子11は配線12により導通されている。該配線12の両端の2個の外部接続端子11は親基板の配線板、例えばプリント配線板の配線回路内の接続端子と導通され、配線回路ができあがるものである。図上のx−x面の断面図を図2(b)に示す。図2(b)は、基板14の両面ともに各々一対の外部接続端子11及び配線12が形成されている。すなわち表裏2層配線を形成した本発明の配線モジュールである。   2A and 2B are partial views showing another wiring module of the present invention, in which FIG. 2A is a plan view and FIG. 2B is a side sectional view. In FIG. 2A, a plurality of external connection terminals 11 are arranged and arranged on one side of the insulating substrate 14, and a pair of external connection terminals 11 are also arranged on one side. The external connection terminal 11 is electrically connected by a wiring 12. The two external connection terminals 11 at both ends of the wiring 12 are electrically connected to the connection terminals in the wiring circuit of the parent substrate, for example, the printed circuit board, thereby completing the wiring circuit. A cross-sectional view of the xx plane in the figure is shown in FIG. In FIG. 2B, a pair of external connection terminals 11 and wirings 12 are formed on both surfaces of the substrate 14. That is, the wiring module of the present invention in which front and back two-layer wiring is formed.

図3は、本発明の更に別の配線モジュールを示す部分図で、(a)は、平面図であり、(b)は側断面図である。図3(a)は、絶縁基板14の表面上の片側には、複数の外部接続端子11が整列し配置され、一方の片側にも各々と対となるビア用パッド13が配置されている。前記ビア用パッド13は配線12により前記外部接続端子11と導通されている。該ビア用パッド13は配線モジュール基板を貫通するビアを介して裏面に配置した外部接続端子11と導通されている(図上表示せず)。図上のx−x面の断面図を図3(b)に示す。図3(b)は、基板14の表裏両面に外部接続端子11を配置し、ビア用パッド13の位置でビア15を形成、該ビア15を介して表面の外部接続端子11と裏面の外部接続端子11とを配線12により導通されている。すなわち表裏面に外部接続端子11を形成した本発明の配線モジュールである。   3A and 3B are partial views showing still another wiring module of the present invention, in which FIG. 3A is a plan view and FIG. 3B is a side sectional view. In FIG. 3A, a plurality of external connection terminals 11 are arranged and arranged on one side of the surface of the insulating substrate 14, and a pair of via pads 13 are also arranged on one side. The via pad 13 is electrically connected to the external connection terminal 11 by a wiring 12. The via pad 13 is electrically connected to the external connection terminal 11 disposed on the back surface through a via penetrating the wiring module substrate (not shown in the figure). A cross-sectional view of the xx plane in the figure is shown in FIG. In FIG. 3B, the external connection terminals 11 are arranged on both the front and back surfaces of the substrate 14, the via 15 is formed at the position of the via pad 13, and the external connection terminal 11 on the front surface and the external connection on the back surface through the via 15. The terminal 11 is electrically connected by the wiring 12. That is, the wiring module of the present invention in which the external connection terminals 11 are formed on the front and back surfaces.

以下、本発明の具体的実施例について説明する。   Hereinafter, specific examples of the present invention will be described.

図4は、実施例1の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図であり、(b)は、親基板の平面図で、(c)は、位置合わせして貼り合せた状態の平面図で、(d)は、配線モジュールと親基板との接続した側断面図である。板幅48mmで厚みが50μmのポリイミドテープ(ユーピレックスS、商品名、宇部興産(株)製)の片面に厚みが12μmの接着剤をコーティングした材料を用意し、ポリイミドテープの幅方向の端部付近にスプロケットホールを金型で穿孔した。幅約42mmで厚みが12μmの銅箔をポリイミドテープの中央にラミネートし、約180℃まで段階的に温度が上昇するオーブンに入れて接着剤を硬化させた。銅箔表面を酸で洗浄し乾燥させた後、銅箔上にポジ型液状レジスト(PMER−P(商品名)、東京応化(株)製)を約5μmの厚みで塗布し、乾燥させた。最終的に幅80μmの外部接続端子と間隙20μmとなるような遮光部と透過部を設けた露光用マスクで投影露光し、現像することで、外部接続端子とそれにつながる配線パターンを有する所望のレジストパターンを形成した。塩化第2鉄溶液をスプレーで吹き付け、レジスト開口部から露出した銅を除去し、水酸化ナトリウム溶液でレジストを剥離し、表面に電解金めっきを行い、外部接続端子と配線を保護した。以上のプロセスにて、幅約80μmの銅パターンと幅約20μmの間隙からなる外部接続端子11とそれにつながる線対称の配線12を備えた配線モ
ジュールを形成した(図4(a)参照)。
FIG. 4 is a partially enlarged view for explaining the connection between the wiring module and the parent board of Example 1, (a) is a plan view of the surface of the wiring module, and (b) is a plan view of the parent board. (C) is a top view of the state which aligned and bonded together, (d) is a sectional side view in which the wiring module and the parent substrate were connected. Prepare a material that is coated with an adhesive with a thickness of 12 μm on one side of a polyimide tape (UPILEX S, trade name, manufactured by Ube Industries Co., Ltd.) with a thickness of 48 mm and a thickness of 50 μm, and near the widthwise end of the polyimide tape A sprocket hole was drilled in the mold. A copper foil having a width of about 42 mm and a thickness of 12 μm was laminated on the center of the polyimide tape, and the adhesive was cured by placing it in an oven in which the temperature gradually increased to about 180 ° C. After the copper foil surface was washed with acid and dried, a positive liquid resist (PMER-P (trade name), manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the copper foil to a thickness of about 5 μm and dried. A desired resist having an external connection terminal and a wiring pattern connected thereto by projecting and developing with an exposure mask having an external connection terminal having a width of 80 μm and a light-shielding portion and a transmission portion with a gap of 20 μm. A pattern was formed. The ferric chloride solution was sprayed to remove the exposed copper from the resist opening, the resist was stripped with a sodium hydroxide solution, and the surface was subjected to electrolytic gold plating to protect the external connection terminals and wiring. Through the above process, a wiring module including the external connection terminal 11 having a copper pattern with a width of about 80 μm and a gap with a width of about 20 μm and a line-symmetrical wiring 12 connected to the external connection terminal 11 was formed (see FIG. 4A).

次に、この配線モジュール10の裏面に絶縁性のテープ状接着剤(APAS1592、商品名、住友3M(株)製)をラミネートし、金型で打抜いて個片に分離した後、外部接続端子と配線が片側に寄っていることを目印にして向きを決め、別に用意した片面に配線が形成された親基板20上に位置合わせして貼り合せた(図4(b)、(c)参照)。ワイヤーボンディングの配線25により配線モジュールの外部接続端子11とそれに対応する親基板の接続端子21を接続することで、配線モジュールによる配線交差部を有する片面プリント配線板を製造した(図4(d)参照)。   Next, an insulating tape-like adhesive (APAS 1592, trade name, manufactured by Sumitomo 3M Co., Ltd.) is laminated on the back surface of the wiring module 10, punched with a mold and separated into individual pieces, and external connection terminals Then, the direction is determined with reference to the fact that the wiring is close to one side, and the wiring is aligned and pasted on the parent substrate 20 in which the wiring is formed on one side prepared separately (see FIGS. 4B and 4C). ). A single-sided printed wiring board having wiring intersections by the wiring module was manufactured by connecting the external connection terminal 11 of the wiring module and the corresponding connection terminal 21 of the parent board by wiring 25 of wire bonding (FIG. 4D). reference).

図5は、実施例2の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図であり、(b)は、親基板の平面図で、(c)は、位置合わせして貼り合せた平面図で、(d)は、配線モジュールと親基板との接続した側断面図である。幅48mmで厚みが50μmのポリイミドテープの両面に厚みが12μmの銅層を形成した材料(グールドフレックス、商品名、ジャパンエナジー(株)製)を用意し、ポリイミドテープの幅方向の端部付近にスプロケットホールを金型で穿孔した。銅箔表面を酸で洗浄し乾燥させた後、銅箔上にポジ型液状レジスト(PMER−P(商品名)、東京応化(株)製)を約5μmの厚みで塗布し、乾燥させた。最終的に幅80μmの外部接続端子と間隙20μmとなるような遮光部と透過部を設けた露光用マスクで投影露光し、現像することで、外部接続端子とそれにつながる配線パターンを有する所望のレジストパターンを形成した。裏面にPETフィルムを貼り合せた後、塩化第2鉄溶液をスプレーで吹き付け、レジスト開口部から露出した銅を除去し、水酸化ナトリウム溶液でレジストを剥離した。過マンガン酸カリウム溶液でエッチング後のポリイミド表面に残るクロム層を除去した後、表面に電解金めっきを行い、外部接続端子と配線を金で保護した。裏面のPETフィルムを剥離し、裏面の銅層を露出させた。最後に、金型で打抜いて個片に分離することで、幅約80μmの銅パターンと幅約20μmの間隙からなる外部接続端子11とそれにつながる配線12及び目印用のマークを備えた配線モジュール10を形成した(図5(a)参照)。   FIGS. 5A and 5B are partial enlarged views for explaining the connection between the wiring module and the parent board of the second embodiment. FIG. 5A is a plan view of the surface of the wiring module, and FIG. 5B is a plan view of the parent board. (C) is the top view which aligned and bonded together, (d) is a sectional side view which connected the wiring module and the parent board. Prepare a material (Gould Flex, trade name, manufactured by Japan Energy Co., Ltd.) that has a copper layer with a thickness of 12 μm on both sides of a polyimide tape with a width of 48 mm and a thickness of 50 μm. Sprocket holes were drilled with a mold. After the copper foil surface was washed with acid and dried, a positive liquid resist (PMER-P (trade name), manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the copper foil to a thickness of about 5 μm and dried. A desired resist having an external connection terminal and a wiring pattern connected thereto by projecting and developing with an exposure mask having an external connection terminal having a width of 80 μm and a light-shielding portion and a transmission portion with a gap of 20 μm. A pattern was formed. After the PET film was bonded to the back surface, a ferric chloride solution was sprayed to remove copper exposed from the resist opening, and the resist was peeled off with a sodium hydroxide solution. After removing the chromium layer remaining on the polyimide surface after etching with a potassium permanganate solution, the surface was subjected to electrolytic gold plating to protect the external connection terminals and wiring with gold. The back PET film was peeled off to expose the back copper layer. Finally, the wiring module is provided with an external connection terminal 11 comprising a copper pattern having a width of about 80 μm and a gap having a width of about 20 μm, a wiring 12 connected to the external connection terminal 11 and a mark for marking by punching with a die and separating into individual pieces. 10 was formed (see FIG. 5A).

次に、この配線モジュール10の裏面に導電性ペースト(DBC120DV、商品名、パナソニック ファクトリーソリューションズ株式会社製)をディスペンサーで塗布し、別に用意した両面に配線が形成された親基板上に位置合わせして貼り合せた(図5(b)、(c)参照)。導電性ペーストを硬化することで親基板のグラウンドパターン22aとの電気的な接続と、配線モジュールの貼り合わせを同時におこなった。   Next, a conductive paste (DBC120DV, trade name, manufactured by Panasonic Factory Solutions Co., Ltd.) is applied to the back surface of the wiring module 10 with a dispenser, and aligned on a separately prepared parent substrate on which wiring is formed on both sides. They were pasted together (see FIGS. 5B and 5C). By hardening the conductive paste, electrical connection with the ground pattern 22a of the parent substrate and bonding of the wiring module were performed at the same time.

ワイヤーボンディングの配線25により配線モジュールの外部接続端子11と対応するプリント配線板の接続端子21を接続することで、親基板上に形成した信号ラインと配線モジュール状の配線との電気的な干渉がほとんど無く、搭載した配線モジュールによって配線の交差部を有する高速信号対応の両面プリント配線板を製造した(図5(d)参照)。   By connecting the connection terminal 21 of the printed wiring board corresponding to the external connection terminal 11 of the wiring module by the wiring 25 of the wire bonding, the electrical interference between the signal line formed on the parent substrate and the wiring of the wiring module shape is prevented. There was almost no double-sided printed wiring board corresponding to high-speed signals having wiring intersections with the mounted wiring module (see FIG. 5D).

図6は、実施例3の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図であり、(b)は、配線モジュールの裏面の平面図であり、(c)は、配線モジュールと親基板との接続した側断面図である。幅48mmで厚みが50μmのポリイミドテープ(ユーピレックスS、商品名、宇部興産(株)製)の片面に厚みが12μmの接着剤をコーティングした材料を用意し、ポリイミドテープの幅方向の端部付近にスプロケットホールとはんだボール接続用のビアを金型で穿孔した。以下、裏面にPETフィルムを貼りつけてエッチングし、PETフィルムを剥離すること以外
は実施例1とほぼ同様のプロセスで配線パターンを形成した。この時、配線パターンには向きを特定するためのダミーランドを設けておいた。
6A and 6B are partial enlarged views for explaining the connection between the wiring module and the parent board of the third embodiment. FIG. 6A is a plan view of the front surface of the wiring module, and FIG. 6B is a plan view of the back surface of the wiring module. FIG. 3C is a side sectional view of the wiring module and the parent substrate connected to each other. Prepare a material in which a polyimide tape with a thickness of 12 μm is coated on one side of a polyimide tape (UPILEX S, trade name, manufactured by Ube Industries Co., Ltd.) having a width of 48 mm and a thickness of 50 μm. A sprocket hole and a via for connecting a solder ball were drilled with a mold. Thereafter, a wiring pattern was formed in substantially the same process as in Example 1 except that a PET film was attached to the back surface and etched, and the PET film was peeled off. At this time, a dummy land for specifying the direction was provided in the wiring pattern.

次に、この配線モジュール裏面のビア用孔16内にはんだボールを挿入し、リフローすることではんだボールを外部接続端子として形成した。別に用意した親基板上に配線モジュールを位置合わせし、再びリフローすることにより配線モジュールの外部接続端子11と対応するプリント配線板の接続端子21を接続することで、搭載した配線モジュールによって配線の交差部を有するプリント配線板を製造した(図6(c)参照)。   Next, solder balls were inserted into the via holes 16 on the back surface of the wiring module and reflowed to form solder balls as external connection terminals. A wiring module is aligned on a separately prepared parent board and reflowed again to connect the external connection terminal 11 of the wiring module and the connection terminal 21 of the corresponding printed wiring board. The printed wiring board which has a part was manufactured (refer FIG.6 (c)).

図7は、実施例4の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図であり、(b)は、配線モジュールと親基板との接続した側断面図である。ボール接続用のビアを形成しないところ以外は実施例3と同じプロセスで製造した配線モジュール10を、親基板20とフリップチップ接続を行った半導体素子30の上面に絶縁性接着剤8で貼り合せ、配線モジュール上の外部接続端子11と親基板の接続端子21とをワイヤーボンディングの配線25で接続し、樹脂封止した(図7(b)参照)。   FIG. 7 is a partially enlarged view for explaining the connection between the wiring module and the parent substrate of Example 4, wherein (a) is a plan view of the surface of the wiring module, and (b) is a wiring module and the parent substrate. FIG. The wiring module 10 manufactured by the same process as in Example 3 except that the via for ball connection is not formed is bonded to the upper surface of the semiconductor element 30 that is flip-chip connected to the parent substrate 20 with the insulating adhesive 8. The external connection terminal 11 on the wiring module and the connection terminal 21 of the parent substrate were connected by wire bonding wiring 25 and sealed with resin (see FIG. 7B).

その他の実施例では、幅70mmで厚みが50μmのポリイミドテープの片面に厚みが12μmの銅層を形成した材料(グールドフレックス、商品名、ジャパンエナジー(株)製)を用意し、ポリイミドテープの幅方向の端部付近にスプロケットホールを金型で穿孔した。銅箔表面を酸で洗浄し乾燥させた後、銅箔上にポジ型液状レジスト(PMER−P(商品名)、東京応化(株)製)を約5μmの厚みで塗布し、乾燥させた。接続端子及び配線パターンの遮光部とその周囲に透過部を設けた親基板用の露光マスクで投影露光し、現像することで、外部接続端子とそれにつながる配線パターンを有する所望のレジストパターンを形成した。塩化第2鉄溶液をスプレーで吹き付け、レジスト開口部から露出した銅を除去し、水酸化ナトリウム溶液でレジストを剥離した。過マンガン酸カリウム溶液でエッチング後のポリイミド表面に残るクロム層を除去した後、カバーレジスト1を印刷し、接続端子21に電解金めっきを施し、親基板が完成した。また、同じポリイミドテープを用いて同様に配線モジュールを形成した。親基板の裏面に厚みが12μmのテープ状接着剤をラミネートし、厚みが100μmの放熱板を位置合わせして貼り合せた後、同様に配線モジュールを位置合わせして親基板に貼り合せた。半導体素子をダイボンディング後、厚みを100μmに削った半導体素子の電極と親基板の接続端子をワイヤーボンディングで接続するのと同時に、配線モジュールの外部接続端子と親基板の接続端子をワイヤーボンディングで接続した。このとき、半導体素子と配線モジュールは重なり合わないように配置されている。最後に半導体素子を搭載した面を一括でトランスファモールドし、カード型メモリモジュールを完成させた。このときの基板のトータル厚みは80μm未満で、従来4層基板を用いていた構成での厚みが340μmあったのに比較すると基板の厚みは1/4以下に減少した。   In another example, a material (Gould Flex, trade name, manufactured by Japan Energy Co., Ltd.) in which a copper layer having a thickness of 12 μm is formed on one side of a polyimide tape having a width of 70 mm and a thickness of 50 μm is prepared. A sprocket hole was drilled with a mold near the end in the direction. After the copper foil surface was washed with acid and dried, a positive liquid resist (PMER-P (trade name), manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the copper foil to a thickness of about 5 μm and dried. Projection exposure was performed with an exposure mask for a parent substrate provided with a light-shielding portion of the connection terminal and the wiring pattern and a transmission portion around the connection terminal, and development was performed, thereby forming a desired resist pattern having the external connection terminal and the wiring pattern connected thereto. . The ferric chloride solution was sprayed to remove copper exposed from the resist opening, and the resist was stripped with a sodium hydroxide solution. After removing the chromium layer remaining on the polyimide surface after etching with the potassium permanganate solution, the cover resist 1 was printed, and the connection terminal 21 was subjected to electrolytic gold plating to complete the parent substrate. Moreover, the wiring module was similarly formed using the same polyimide tape. A tape-like adhesive having a thickness of 12 μm was laminated on the back surface of the parent substrate, and a heat sink having a thickness of 100 μm was aligned and bonded, and then the wiring module was similarly aligned and bonded to the parent substrate. After die bonding of the semiconductor element, the electrode of the semiconductor element whose thickness is cut to 100 μm and the connection terminal of the parent board are connected by wire bonding, and at the same time, the external connection terminal of the wiring module and the connection terminal of the parent board are connected by wire bonding. did. At this time, the semiconductor element and the wiring module are arranged so as not to overlap each other. Finally, the surface on which the semiconductor element was mounted was collectively transfer molded to complete the card type memory module. The total thickness of the substrate at this time was less than 80 μm, and the thickness of the substrate was reduced to ¼ or less compared to the thickness of 340 μm in the conventional configuration using the four-layer substrate.

本発明の配線モジュールを示す部分図で、(a)は、平面図で、(b)は側断面図である。It is the fragmentary figure which shows the wiring module of this invention, (a) is a top view, (b) is a sectional side view. 本発明の配線モジュールを示す部分図で、(a)は、平面図で、(b)は側断面図である。It is the fragmentary figure which shows the wiring module of this invention, (a) is a top view, (b) is a sectional side view. 本発明の配線モジュールを示す部分図で、(a)は、平面図で、(b)は側断面図である。It is the fragmentary figure which shows the wiring module of this invention, (a) is a top view, (b) is a sectional side view. 本発明の実施例1の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図で、(b)は、親基板の平面図で、(c)は、位置合わせして貼り合せた平面図で、(d)は、配線モジュールと親基板との接続した側断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is the elements on larger scale explaining the connection of the wiring module of Example 1 of this invention, and a parent board, (a) is a top view of the surface of a wiring module, (b) is a top view of a parent board, (c) is a plan view of the alignment and pasting, and (d) is a side sectional view of the wiring module and the parent substrate connected to each other. 本発明の実施例2の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図で、(b)は、親基板の平面図で、(c)は、位置合わせして貼り合せた平面図で、(d)は、配線モジュールと親基板との接続した側断面図である。It is the elements on larger scale explaining the connection of the wiring module of Example 2 of this invention, and a parent board, (a) is a top view of the surface of a wiring module, (b) is a top view of a parent board, (c) is a plan view of the alignment and bonded together, and (d) is a side sectional view of the wiring module and the parent substrate connected to each other. 本発明の実施例3の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図で、(b)は、配線モジュールの裏面の平面図で、(c)は、配線モジュールと親基板との接続した側断面図である。It is the elements on larger scale explaining the connection of the wiring module of Example 3 of this invention, and a parent board, (a) is a top view of the surface of a wiring module, (b) is a top view of the back surface of a wiring module. (C) is the sectional side view which connected the wiring module and the main board | substrate. 本発明の実施例4の配線モジュールと親基板との接続を説明する部分拡大図で、(a)は、配線モジュールの表面の平面図で、(b)は、配線モジュールと親基板との接続した側断面図である。It is the elements on larger scale explaining the connection of the wiring module of Example 4 of this invention, and a mother board, (a) is a top view of the surface of a wiring module, (b) is the connection of a wiring module and a mother board. FIG.

符号の説明Explanation of symbols

1…カバーレジスト
2…カバーレジスト層の開口部
8…絶縁性接着剤
9…導電性接着剤
10…配線モジュール
11…外部接続端子
11a…(裏面の)外部接続端子
12…配線
12a…(裏面の)配線
13…ビア用パッド
14…絶縁基板
15…ビア
16…ビア用孔
17…半田ボール
20…親基板
21…(親基板の)接続端子
22…(親基板の)配線
22a…(親基板の)グランドパターン
24…(親基板の)絶縁基板
25…ワイヤーボンディングの配線
30…半導体素子
31…バンプ
DESCRIPTION OF SYMBOLS 1 ... Cover resist 2 ... Opening part 8 of cover resist layer ... Insulating adhesive 9 ... Conductive adhesive 10 ... Wiring module 11 ... External connection terminal 11a ... (on the back surface) External connection terminal 12 ... Wiring 12a ... (on the back surface) ) Wiring 13 ... via pad 14 ... insulating substrate 15 ... via 16 ... via hole 17 ... solder ball 20 ... parent substrate 21 ... (parent substrate) connection terminal 22 ... (parent substrate) wiring 22a ... (parent substrate) ) Ground pattern 24... (Insulating substrate) 25 (parent substrate)... Wire bonding wiring 30... Semiconductor element 31.

Claims (8)

絶縁層の表面上に配線層を積層した配線モジュールにおいて、該配線層は、一対の外部接続端子と、該外部接続端子間を結ぶ配線とからなる一対の組が複数個形成されていることを特徴とする配線モジュール。   In a wiring module in which a wiring layer is laminated on the surface of an insulating layer, the wiring layer includes a plurality of pairs each including a pair of external connection terminals and a wiring connecting the external connection terminals. A featured wiring module. 前記複数の外部接続端子の一部が、配線モジュールの一定領域に集中して配置され、これと対となる外部接続端子の一部が別の一定領域に集中して配置されていることを特徴とする請求項1記載の配線モジュール。   A part of the plurality of external connection terminals is concentrated in a certain area of the wiring module, and a part of the external connection terminal paired therewith is concentrated in another constant area. The wiring module according to claim 1. 外部接続端子とそれを結ぶ配線が、ほぼ対称の位置に配置され、一部の外部接続端子または配線の位置や形状を変えることや、外部接続端子または配線以外の目印を付加することによってその方向が判別可能な部分を有することを特徴とする請求項1、又は2記載の配線モジュール。   The external connection terminals and the wiring that connects them are arranged in almost symmetrical positions, changing the position and shape of some of the external connection terminals or wiring, or adding a mark other than the external connection terminals or wiring in that direction The wiring module according to claim 1, wherein the wiring module has a distinguishable portion. 絶縁基板上に形成された複数の外部接続端子及び配線が、配線モジュール内で、お互いに電気的な接続部を持たないことを特徴とする請求項1、又は2記載の配線モジュール。   The wiring module according to claim 1 or 2, wherein the plurality of external connection terminals and wirings formed on the insulating substrate do not have electrical connection portions to each other in the wiring module. 前記絶縁層の表面及び裏面上に配線層を積層した配線モジュールにおいて、前記一対の外部接続端子が、異なる配線層内に配置され、前記外部端子間を結ぶ配線は、前記絶縁層を貫通するビア用孔内に形成したビアの配線を介して導通させることを特徴とする請求項1乃至3のいずれか1項記載の配線モジュール。   In the wiring module in which wiring layers are laminated on the front surface and the back surface of the insulating layer, the pair of external connection terminals are arranged in different wiring layers, and the wiring connecting the external terminals is a via penetrating the insulating layer. 4. The wiring module according to claim 1, wherein the wiring module is electrically connected through a via wiring formed in the hole. 前記配線及び外部接続端子が、銅によって形成され、外部接続端子の部分が耐食性のある金属またはカーボンなどの導電性物質で覆われ、配線の部分を保護するための絶縁膜が接続端子以外の部分に形成されたことを特徴とする請求項1乃至5のいずれか1項記載の配線モジュール。   The wiring and the external connection terminal are formed of copper, the external connection terminal portion is covered with a corrosion-resistant metal or a conductive material such as carbon, and an insulating film for protecting the wiring portion is a portion other than the connection terminal The wiring module according to claim 1, wherein the wiring module is formed as described above. 少なくとも1本以上の配線を跨ぐ位置に対となる接続端子を設けたプリント配線板において、請求項1乃至5のいずれか1項記載の配線モジュールを搭載することによって、プリント配線板に設けた前記接続端子と前記配線モジュール内の外部接続端子とが接続されて所望の配線が完結することを特徴とするプリント配線板。   In the printed wiring board which provided the connecting terminal used as a pair in the position which straddles at least 1 or more wiring, by mounting the wiring module of any one of Claims 1 thru | or 5, the said provided in the printed wiring board A printed wiring board comprising: a connection terminal connected to an external connection terminal in the wiring module to complete a desired wiring. 前記プリント配線板が、1層の配線層、又は2層の配線層で形成されたことを特徴とする請求項7記載のプリント配線板。   The printed wiring board according to claim 7, wherein the printed wiring board is formed of one wiring layer or two wiring layers.
JP2003411549A 2003-12-10 2003-12-10 Wiring module and printed circuit board for mounting the same Pending JP2005175124A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010219364A (en) * 2009-03-18 2010-09-30 Nec Corp Method of modifying printed wiring board, and modified printed wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010219364A (en) * 2009-03-18 2010-09-30 Nec Corp Method of modifying printed wiring board, and modified printed wiring board

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