JP2005165871A - Noise analysis method of semiconductor integrated circuit, noise analyzer and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To appropriately design arrangement (such as component arrangement and wiring patterns) of each circuit by evaluating an effect of noise to be superimposed on a signal outputted from a semiconductor integrated circuit to an external circuit in advance at a design stage of an electronic device. <P>SOLUTION: In the case of analyzing the noise to flow from the semiconductor integrated circuit (IC) to the external circuit in an oscillation circuit comprising the IC and its external circuit, a noise source in the oscillation circuit is modeled. Concretely, noise spectrum and various impedance characteristics at a noise outflow point are extracted and a noise model circuit 30 is created based on the extracted data. Then, the noise in the external circuit (the circuit comprising a quartz resonator 28, capacitors C1, C2) constituting the oscillation circuit is analyzed using the created noise model circuit 30. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device for pre-evaluating the influence of noise superimposed on a signal output from a semiconductor integrated circuit to an external circuit in an electronic device composed of a semiconductor integrated circuit and its external circuit at the design stage of the electronic device. The present invention relates to an integrated circuit noise analysis method, a semiconductor integrated circuit noise analysis apparatus, and a program.

  In recent years, with the increase in operation speed and functionality of electronic devices, there is a problem of so-called EMI that unnecessary electromagnetic radiation (noise) generated inside the device adversely affects the inside of the device and other electronic devices and causes malfunction. Close up. As one of main noise generating factors in electronic equipment, for example, a semiconductor integrated circuit such as a one-chip microcomputer can be cited.

  Therefore, when manufacturing electronic devices equipped with semiconductor integrated circuits, the effects of noise (harmonics) superimposed on signals output from the semiconductor integrated circuit to external circuits within the electronic devices are analyzed and studied in advance at the design stage. There is a need to. And by appropriately performing noise analysis at this design stage, the layout of semiconductor integrated circuits and external circuits (component layout, wiring pattern, etc.) on the printed circuit board (hereinafter referred to as “PCB”) should be designed appropriately. And adverse effects due to noise can be suppressed.

  Various methods have been proposed for analyzing noise from a semiconductor integrated circuit. For example, a method for analyzing switching noise at a power supply terminal of a semiconductor integrated circuit is known. Specifically, a digital circuit in a semiconductor integrated circuit is modeled by a switch element and a parasitic capacitance, and a change in a power supply current waveform accompanying a switching operation of the switch element is analyzed (for example, see Patent Document 1). .

As an analysis method for signals transmitted between a semiconductor integrated circuit and an external circuit, an IBIS, which is an analog high-frequency model describing signal input / output characteristics of a semiconductor integrated circuit, standardized by ANSI (American National Standards Institute). A method using an (I / O Buffer Information Specification) model is also known.
JP 2002-231813 A

  However, although the technique described in Patent Document 1 can analyze the noise of the power supply / ground (GND) terminal from the power supply current waveform of the semiconductor integrated circuit, it analyzes the noise flowing out from various other signal terminals. It was not applicable as a method.

  On the other hand, in the case of the IBIS model, input / output characteristics at various signal terminals can be analyzed. However, since the IBIS model is intended for signal transient analysis, it is not suitable for analysis on a frequency axis such as noise analysis. there were.

  Therefore, the control signal output from the semiconductor integrated circuit to the external circuit or the circuit element in one specific function circuit (for example, an oscillation circuit) constituted by the circuit element formed in the semiconductor integrated circuit and the external circuit. Establishing a method to appropriately design circuit layout, wiring patterns, etc. on PCBs by analyzing in advance, at the design stage, noise that is superimposed on the various signals such as signals output to external circuits. Was desired.

  The present invention has been made in view of the above problems. In an electronic device including a semiconductor integrated circuit and its external circuit, the influence of noise superimposed on a signal output from the semiconductor integrated circuit to the external circuit is designed in the electronic device. The purpose of this is to make it possible to appropriately design the arrangement of each circuit (component arrangement, wiring pattern, etc.) by performing preliminary evaluation in stages.

  The invention according to claim 1, which has been made to solve the above problem, is a method of analyzing noise that is a current component having a frequency higher than that of a signal that is superimposed on a signal output from a semiconductor integrated circuit to an external circuit. A characteristic acquisition step of acquiring a frequency characteristic of the noise output from the semiconductor integrated circuit to the external circuit, and a noise model that outputs the noise of the frequency to be analyzed based on the acquired frequency characteristic A model circuit creation step for creating a circuit and a noise analysis in the external circuit when the noise is input to the external circuit using the created noise model circuit according to a circuit pattern of the external circuit And a noise analysis step to be performed.

  That is, the noise model circuit is a model circuit that outputs the same noise as the noise acquired in the characteristic acquisition step. For example, when the frequency of the noise to be analyzed is f [MHz], the frequency in the acquisition result is It is created so as to output the same noise as that at f.

  The noise frequency characteristic acquisition method in the characteristic acquisition step may be acquired, for example, by actually configuring a semiconductor integrated circuit and an external circuit on a PCB and actually measuring noise from the semiconductor integrated circuit. Further, it may be acquired by simulation using a computer, and a specific acquisition method is not particularly limited.

  In addition, when the two methods illustrated above are compared, the actual acquisition data can be obtained by the actual acquisition method. However, the accuracy of the acquisition method by the simulation varies depending on the simulation method. Considering this, actual measurement is preferable. On the other hand, when actually measuring, it is necessary to prepare a semiconductor circuit and an external circuit and configure the circuit, so from the viewpoint of easy data acquisition, it is based on a simulation that does not require actual parts / circuits. The acquisition method is convenient.

  In the noise analysis step, circuit analysis is performed by combining the created noise model circuit and an external circuit. This makes it possible to see the behavior of the noise output from the noise model circuit in the external circuit. As is well known, when a current (noise) having a high frequency is input to a predetermined circuit, the current distribution in the circuit varies depending on the arrangement of components constituting the circuit, the wiring pattern, and the like. That is, also in the present invention, how and how much noise from the semiconductor integrated circuit is distributed in the external circuit differs depending on the circuit pattern of the external circuit (for example, the arrangement of components and wiring pattern). come.

  Therefore, in the present invention, a noise model circuit is created, and the noise in the external circuit when the noise from the noise model circuit is output to the external circuit is analyzed, so that noise analysis corresponding to the circuit pattern difference of the external circuit is performed. Is realized.

  The noise output source in the semiconductor integrated circuit and the external circuit may be circuits having different functions, respectively, or a circuit having one function by a part of the semiconductor integrated circuit and the external circuit. May be configured. As an example of the former, for example, a case where various control signals are output from a memory control circuit configured in a semiconductor integrated circuit to an external memory circuit (memory IC) can be considered. On the other hand, as the latter example, for example, as in claim 4 described later, a case where one oscillation circuit is configured by a part of the semiconductor integrated circuit and an external circuit is conceivable.

  Therefore, according to the noise analysis method of the present invention (Claim 1), noise analysis from the semiconductor integrated circuit to the external circuit can be appropriately performed at the design stage. For example, the semiconductor integrated circuit and the external circuit are mounted. In electronic equipment, the influence of noise superimposed on the signal output from the semiconductor integrated circuit to the external circuit is evaluated in advance at the design stage of the electronic equipment, so that the placement of each circuit (part placement, wiring pattern, etc.) is appropriately It becomes possible to design.

  Here, various specific configurations of the noise model circuit created in the model circuit creation step are conceivable as long as desired noise can be output. For example, as described in claim 2, the frequency acquired in the characteristic acquisition step You may comprise as a circuit which consists of an ideal current source of zero internal resistance which outputs the electric current corresponding to a characteristic. If the noise model circuit is configured in this way, the noise model circuit can be created more easily.

  On the other hand, if the noise model circuit is configured with only the ideal current source, it is easy to create the noise model circuit, but the impedance inside the semiconductor integrated circuit that is the source of noise, the impedance of the external circuit that is the destination of the noise, etc. Since this is not taken into account, the accuracy of noise analysis may be lowered.

  Therefore, for example, as in claim 3, in the characteristic acquisition step, an impedance frequency characteristic when the semiconductor integrated circuit is viewed from a noise output unit that outputs the noise in the semiconductor integrated circuit, and the noise The frequency characteristics of the impedance viewed from the output circuit side from the output unit are acquired, and in the model circuit creation step, the ideal current source and the ideal current source are determined based on the frequency characteristics acquired in the characteristic acquisition step. You may make it produce the said noise model circuit which consists of internal impedance connected in parallel. In this way, a noise model circuit that matches the actual noise source is created, so that noise analysis can be performed with high accuracy.

  The noise analysis method for a semiconductor integrated circuit according to claim 4 is the noise analysis method for a semiconductor integrated circuit according to any one of claims 1 to 3, wherein the external circuit and a part of the semiconductor integrated circuit An oscillation circuit that supplies an oscillation signal of a predetermined frequency into the semiconductor integrated circuit is configured, and the noise is output from the semiconductor integrated circuit side to the external circuit in the oscillation circuit. In this way, noise evaluation in a relatively noisy oscillation circuit can be performed appropriately at the design stage. For example, it is possible to appropriately design how the oscillation circuit should be configured and arranged on the PCB. It becomes possible.

  Next, the invention according to claim 5 is an apparatus for analyzing noise that is a current component having a frequency higher than that of a signal that is superimposed on a signal output from the semiconductor integrated circuit to an external circuit, from the semiconductor integrated circuit. A characteristic acquisition means for acquiring a frequency characteristic of the noise output to the external circuit, and a model circuit for creating a noise model circuit that outputs the noise of the frequency to be analyzed based on the acquired frequency characteristic Noise analysis means for performing noise analysis in the external circuit when the noise is input to the external circuit using the created noise model circuit, according to a circuit pattern of the external circuit, It is provided with.

  For this reason, if the noise analysis device according to claim 5 is used, the noise analysis method according to claim 1 can be realized. In this case, the same operation and effect as the noise analysis method according to claim 1 can be realized. An effect can be obtained.

  In the noise analysis apparatus for a semiconductor integrated circuit according to claim 5, the current corresponding to the frequency characteristic acquired by the characteristic acquisition unit is output from the model circuit generation unit as described in claim 6, for example. The noise model circuit including an ideal current source having zero internal resistance may be created. If the noise analysis apparatus configured as described above is used, the noise analysis method according to claim 2 can be realized, and in this case, the same operation and effect as the noise analysis method according to claim 2 can be obtained. Can do.

  The noise analysis device for a semiconductor integrated circuit according to claim 5 is characterized in that, as described in claim 7, for example, the characteristic acquisition means further includes a noise output unit for outputting the noise in the semiconductor integrated circuit. Obtaining the frequency characteristics of the impedance viewed from the inside of the semiconductor integrated circuit and the frequency characteristics of the impedance viewed from the noise output section from the noise output section, and the model circuit creating means obtains each of the characteristics obtained by the characteristic obtaining means. The noise model circuit including an ideal current source and an internal impedance connected in parallel to the ideal current source may be created based on the frequency characteristics. If the thus configured noise analysis apparatus is used, the noise analysis method according to claim 3 can be realized, and in this case, the same operation and effect as the noise analysis method according to claim 3 can be obtained. Can do.

  A noise analysis apparatus for a semiconductor integrated circuit according to claim 8 is the noise analysis apparatus according to any one of claims 5 to 7, wherein the external circuit and a part of the semiconductor integrated circuit are used to generate an internal noise in the semiconductor integrated circuit. An oscillation circuit that supplies an oscillation signal having a predetermined frequency to the oscillation circuit is configured, and the noise is output from the semiconductor integrated circuit side to the external circuit in the oscillation circuit. If the noise analysis device configured as described above is used, the noise analysis method according to claim 4 can be realized, and in this case, the same operation and effect as the noise analysis method according to claim 4 can be obtained. Can do.

  As a specific example of the oscillation circuit, for example, a CMOS oscillation circuit as set forth in claim 9 may be used. That is, the noise analysis device for a semiconductor integrated circuit according to claim 9 is the noise analysis device according to claim 8, wherein the oscillation circuit includes at least a CMOS inverter formed in the semiconductor integrated circuit and the external circuit. A CMOS oscillation circuit comprising a vibrator connected to an output side of the CMOS inverter, the noise being configured to be output from the CMOS inverter to the vibrator side Yes. Since the CMOS oscillation circuit is a typical oscillation circuit for generating an internal clock in a semiconductor integrated circuit, it is more effective to perform noise analysis in the CMOS oscillation circuit according to the present invention (claim 9).

  The noise analysis apparatus according to the present invention (claims 5 to 9) can be realized by various methods, for example, can be realized separately by hardware, but the computer executes application software (program). Can be realized.

  That is, for example, as described in claim 10, a program for causing a computer to function as each means in the noise analysis apparatus for a semiconductor integrated circuit according to any one of claims 5 to 9 is provided, and the computer stores the program. By executing this, the noise analysis apparatus of the present invention is realized.

  Each program for causing the computer to function as the noise analysis apparatus of the present invention is recorded on a computer-readable recording medium such as a floppy (registered trademark) disk, a magneto-optical disk, a CD-ROM, a memory card, or a hard disk. If necessary, it can be used by loading it into a computer and starting it.

  Preferred embodiments of the present invention will be described below with reference to the drawings. First, an oscillation circuit to be subjected to noise analysis in the present embodiment will be described with reference to FIG. As shown in FIG. 1, the oscillation circuit 10 of this embodiment includes an inverter 26 and an inverter 27 (both CMOS inverters) formed inside a semiconductor integrated circuit (hereinafter referred to as “IC”) 20 and an external circuit of the IC 20. This is a well-known CMOS oscillation circuit composed of a crystal resonator 28 and a circuit composed of two capacitors C1 and C2.

  Specifically, in the IC 20, the input side of the inverter 26 is connected to the inverter input terminal 21 of the IC 20, and the output side of the inverter 26 is connected to the inverter output terminal 22 of the IC 20 and the input side of the subsequent inverter 27. Also connected to. On the other hand, in the external circuit, both ends of the crystal resonator 28 are connected to the inverter input terminal 21 and the inverter output terminal 22 of the IC 20, respectively. One end of the capacitor C2 is further connected to the inverter input terminal 21, and the inverter output terminal 22 is further connected to one end of a capacitor C1. The other ends of the capacitors C1 and C2 are both connected to the ground (GND) terminal 23 of the IC 20. In the present embodiment, the crystal resonator 28 is taken as an example of the resonator. However, it is needless to say that the resonator is not limited to a crystal resonator, and may be a ceramic resonator, for example.

  In the oscillation circuit 10 configured as described above, the output includes high-order harmonics of the oscillation frequency due to nonlinearity inside the IC 20, specifically, for example, nonlinearity of a semiconductor element constituting the inverter 26 and the like. As these flow out of the IC 20, noise problems occur. Therefore, the inventors of the present application clarified the propagation path of the noise current in the oscillation circuit 10 and modeled the noise generation source.

  As shown in FIG. 1, the path of the current flowing out from the IC 20 differs depending on the frequency component, and most of the current component of the oscillation frequency passes through the crystal resonator 28, passes through the capacitor C2, and is connected to the GND terminal 23 which is the feedback path of the IC 20. To flow. On the other hand, most of the current components of high-order harmonics that are noise flow out of the inverter output terminal 22 and then flow to the feedback path via the capacitor C1. From this, it is understood that the noise source of the oscillation circuit 10 may be modeled so that noise flows out from the inverter output terminal 22.

  Thus, in the present embodiment, as will be described later, the noise source of the oscillation circuit 10 is first modeled, and noise is transferred from the modeled circuit (noise model circuit 30; see FIG. 2) to the external circuit where the noise flows out. By constructing a circuit such that the noise flows out, the influence of noise from the IC 20 on the external circuit is analyzed.

Next, a noise analysis method for the oscillation circuit 10 in this embodiment, that is, a method for analyzing noise output from the IC 20 constituting the oscillation circuit 10 to an external circuit will be described with reference to FIG. The noise analysis of the present embodiment is roughly divided into the following three steps (1) to (3).
(1) Step of extracting (acquiring) various characteristics at the inverter output terminal 22 (see FIG. 2A)
(2) Step of creating a noise model circuit based on the extracted characteristics (see FIG. 2B)
(3) Step of performing noise analysis of the oscillation circuit 10 using the created noise model circuit (see FIG. 2C)
The step (1) corresponds to the characteristic acquisition step of the present invention and corresponds to the processing executed by the characteristic acquisition means of the present invention, and the step (2) corresponds to the model circuit creation step of the present invention. The step (3) corresponds to the noise analysis step of the present invention and is executed by the noise analysis unit of the present invention. It corresponds to the processing. Hereinafter, the noise analysis method in the oscillation circuit 10 of the present embodiment realized by the steps (1) to (3) will be specifically described with reference to FIG.

  As shown in FIG. 2A, first, various characteristics are extracted at the inverter output terminal 22 which is the step of the above (1). Specifically, in this example, the frequency characteristic (noise spectrum) of the noise current, the internal impedance, that is, the frequency characteristic of the impedance viewed from the inverter output terminal 22 inside the IC 20, and the external impedance, that is, the external circuit from the inverter output terminal 22 The frequency characteristics of the observed impedance are extracted.

  In the present embodiment, the noise spectrum is extracted by creating an evaluation board in which only the oscillation circuit 10 is arranged on the PCB, and measuring the current at the inverter output terminal 22 when the oscillation circuit 10 is actually operated (oscillated). It was done by doing. However, it is not always necessary to cause the oscillation circuit 10 to oscillate. For example, a so-called open loop operation in which a signal having a predetermined frequency is input to the inverter 26 from an external signal generator may be performed to measure the current at that time.

  Further, for example, the noise spectrum may be extracted by operating a circuit simulation program or the like on a computer (not shown) instead of actual measurement. In that case, the extracted data representing various characteristics is configured to be stored in a memory or a hard disk of a computer.

  Next, the noise model circuit which is the step (2) is created. In the present embodiment, as shown in FIG. 2B, a noise model circuit 30 including an ideal current source (hereinafter simply referred to as “current source”) 31 and an internal impedance 32 is created. Among these, the internal impedance 32 is configured by an equivalent circuit whose characteristics are the same as the internal impedance characteristics extracted in the step (1). The current value of the current source 31 is calculated for each frequency based on the frequency characteristics, internal impedance characteristics, and external impedance characteristics of the extracted noise current.

  The internal impedance 32 does not need to be configured by an equivalent circuit having frequency characteristics as described above, and may be fixed to an internal impedance value at a specific frequency to be analyzed, for example. Alternatively, the GND terminal 23 may be the power supply terminal 24 (see FIG. 1). Further, as processing of the internal terminal 33, the internal layout of the IC 20 is taken into consideration and connected to the power supply or GND.

  The operation of creating the noise model circuit 30 is configured to be executed by a program operating on a computer. The generated data representing the noise model circuit 30 is configured to be stored in a computer memory, a hard disk, or the like.

  Next, noise analysis of the oscillation circuit 10 which is the step (3) is performed. Specifically, as shown in FIG. 2C, the oscillation circuit 10 is configured by using the noise model circuit 30 created in the step (2), and various characteristics such as current characteristics of the circuit are analyzed. To do. That is, a circuit in which the noise model circuit 30 and the circuit outside the IC 20 in the oscillation circuit 10 are connected is configured, and the current waveform analysis of each part of the external circuit with respect to the noise output from the noise model circuit 30 is performed. Is verified.

  The construction of the analysis circuit by connecting the noise model circuit 30 and the external circuit and the various analyzes by the analysis circuit are all configured to be executed by a program operating on the computer. The data representing the analysis circuit and various data such as analysis results are stored in a computer memory, hard disk, or the like.

  Of the above analysis circuits, when the external circuit, that is, the circuit comprising the crystal oscillator 28 and the capacitors C1 and C2, is expressed on a computer, the actual component arrangement / wiring pattern on the PCB is taken into account. By doing so, it is possible to analyze a noise distribution when an oscillation circuit is actually formed by a PCB. In other words, it is possible to perform an optimal design such as how to optimally form the oscillation circuit 10 on the PCB by performing noise analysis on a computer at the design stage.

  In the present embodiment, the semiconductor integrated circuit of the present invention is constituted by a computer and various programs (the above-described programs for executing the steps (1) to (3)) that are executed on the computer. A noise analyzer is configured. However, when the step (1) is performed by actual measurement, an evaluation board and measurement equipment (both not shown) necessary for the actual measurement are components of the noise analysis apparatus of the present invention.

  Using the above-described noise analysis method (noise analysis device) of the present embodiment, the noise analysis result of the external circuit constituting the oscillation circuit 10 and the arrangement of the external circuit (component arrangement / pattern) are appropriately set based on the analysis result An example in the case of changing to is shown in FIGS.

  FIG. 3 shows the result of analyzing the noise level at the PCB end where the oscillation circuit 10 is formed. “Before change” is the analysis result of the PCB 60 in FIG. There is an analysis result of PCB 60a in FIG. That is, each of the PCB 60 and the PCB 60a shown in FIG. 4 shows a specific example of the PCB on which the oscillation circuit 10 is formed. Then, when the analysis circuit is constructed for each of the PCBs 60 and 60a in consideration of the component arrangement, the wiring pattern, and the like, and noise analysis is performed, distribution data of current density as illustrated is obtained.

  Here, in the PCB 60 “before change”, as can be seen from the partially enlarged view, the inverter output terminal 22 and the GND terminal are separated from each other. Therefore, noise from the inverter output terminal 22 via the capacitor C1 is radiated to the outside while reaching the GND terminal 23 from the land to which the other end of the capacitor C1 is connected, and as a result, the noise level in the vicinity increases. End up.

  On the other hand, the PCB 60a after “change” is a wiring pattern changed to reduce noise, and the inverter output terminal 22 and the GND terminal 23 are adjacent to each other as shown in the enlarged partial view thereof. As a result, the noise level at the PCB end is reduced as is apparent from FIG. 3, and the noise level on the PCB is reduced as is clear from the current density distribution of the PCB 60 and PCB 60a in FIG.

  As described above, in this embodiment, when the oscillation circuit 10 is formed on the PCB, the noise model circuit 30 of the oscillation circuit 10 is created, and noise analysis is performed using the noise model circuit 30. As a result, it is possible to verify in advance at the design stage how the external circuit of the IC 20 in the oscillation circuit 10 is optimally arranged on the PCB.

  Therefore, according to the noise analysis method (noise analysis apparatus) of the present embodiment, in the oscillation circuit 10 including the IC 20 and its external circuit, noise analysis from the IC 20 to the external circuit can be appropriately performed at the design stage. By pre-evaluating the influence of noise superimposed on the signal output from the IC 20 to the external circuit at the PCB design stage, it becomes possible to appropriately design the arrangement of each circuit (component arrangement, wiring pattern, etc.). .

The embodiment of the present invention is not limited to the above-described embodiment, and it goes without saying that various forms can be adopted as long as it belongs to the technical scope of the present invention.
For example, in the above embodiment, the noise model circuit 30 includes the current source 31 and the internal impedance 32. However, the noise model circuit 30 may include only the current source 41 as in the noise model circuit 40 illustrated in FIG. . In this case, in the step (1) of extracting various characteristics, it is only necessary to set the current source 41 that extracts only the noise spectrum and generates the extracted noise. Therefore, it is not necessary to extract each impedance, and the noise model circuit 40 can be created more easily.

  However, if high accuracy is required from the noise analysis result, it is preferable to create the noise model circuit 30 including the internal impedance 32 as in the above embodiment. In this way, a noise model circuit that matches the actual noise source is created, so that noise analysis can be performed with high accuracy.

  For example, the noise model circuit may be a voltage source model as shown in FIG. That is, the noise model circuit 50 of FIG. 5B is configured by an ideal voltage source 51 and an internal impedance 52. By using the noise model circuit 50, the same effect as that of the above embodiment can be obtained.

  Furthermore, in the above-described embodiment, the case where the noise analysis is performed using the oscillation circuit 10 including the semiconductor integrated circuit and the external circuit as an example has been described. However, the application of the present invention is not limited to the oscillation circuit. The present invention can be applied to any case where noise is superimposed on a signal from a semiconductor integrated circuit to an external circuit.

  Furthermore, in each of the above-described embodiments, various programs for causing the drawing processing system of the present invention to function are described as being stored in the HDD 13. For example, these various programs are stored on a floppy (registered trademark) disk. It can also be recorded in various storage devices (computer-readable recording media) such as a magneto-optical disk, CD-ROM, and hard disk.

  In this case, the drawing processing system of the present invention can be realized in the computer system by loading the program recorded in the recording medium into the computer system and starting it as necessary. It should be noted that the ROM and backup RAM may be recorded as computer-readable recording media so that the programs are recorded, and the ROM or backup RAM may be incorporated into a computer system. The program can also be installed on the computer via a communication line. The program transmitted through the communication line also corresponds to the program according to claim 21.

It is a circuit diagram which shows schematic structure of the oscillation circuit of this embodiment. It is explanatory drawing which shows the noise analysis method in the oscillation circuit of this embodiment. It is a graph which shows the analysis result of the noise level using the noise analysis method of this embodiment. It is explanatory drawing which shows the result of having analyzed the current density distribution on PCB using the noise analysis method of this embodiment. It is a circuit diagram which shows the modification of a noise model circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Oscillator circuit, 20 ... IC (semiconductor integrated circuit), 21 ... Inverter input terminal, 22 ... Inverter output terminal, 23 ... GND terminal, 24 ... Power supply terminal, 26, 27 ... Inverter, 28 ... Crystal oscillator, 30, 40, 50 ... Noise model circuit, 31, 41 ... Current source, 32, 52 ... Internal impedance, 33 ... Internal terminal, 51 ... Ideal voltage source, 60, 60a ... PCB (printed circuit board), C1, C2 ... Capacitor

Claims (10)

A method of analyzing noise that is a current component having a frequency higher than that of a signal superimposed on a signal output from a semiconductor integrated circuit to an external circuit,
A characteristic acquisition step of acquiring a frequency characteristic of the noise output from the semiconductor integrated circuit to the external circuit;
A model circuit creating step for creating a noise model circuit that outputs the noise of the frequency to be analyzed based on the acquired frequency characteristics;
Using the created noise model circuit, a noise analysis step in which noise analysis in the external circuit when the noise is input to the external circuit is performed according to a circuit pattern of the external circuit;
A noise analysis method for a semiconductor integrated circuit, comprising: The noise model circuit created in the model circuit creating step comprises an ideal current source having zero internal resistance, which outputs a current corresponding to the frequency characteristic obtained in the characteristic obtaining step. Noise analysis method for semiconductor integrated circuits. In the characteristic acquisition step, the frequency characteristics of the impedance when the semiconductor integrated circuit is viewed from the noise output section from which the noise is output in the semiconductor integrated circuit, and the impedance frequency when the external circuit side is viewed from the noise output section. Get the characteristics and
In the model circuit creation step, the noise model circuit including an ideal current source and an internal impedance connected in parallel to the ideal current source is created based on each frequency characteristic acquired in the characteristic acquisition step. 2. The noise analysis method for a semiconductor integrated circuit according to claim 1. The external circuit and a part of the semiconductor integrated circuit constitute an oscillation circuit that supplies an oscillation signal having a predetermined frequency into the semiconductor integrated circuit.
The noise analysis method for a semiconductor integrated circuit according to claim 1, wherein the noise is output from the semiconductor integrated circuit side to the external circuit in the oscillation circuit. An apparatus for analyzing noise that is a current component having a frequency higher than that of a signal superimposed on a signal output from a semiconductor integrated circuit to an external circuit,
Characteristic acquisition means for acquiring frequency characteristics of the noise output from the semiconductor integrated circuit to the external circuit;
Model circuit creating means for creating a noise model circuit that outputs the noise of the frequency to be analyzed based on the acquired frequency characteristics;
Noise analysis means for performing noise analysis in the external circuit when the noise is input to the external circuit using the created noise model circuit, according to a circuit pattern of the external circuit;
A noise analysis apparatus for a semiconductor integrated circuit, comprising: The said model circuit creation means creates the said noise model circuit which consists of an ideal current source of zero internal resistance from which the electric current corresponding to the frequency characteristic acquired by the said characteristic acquisition means is output. Noise analysis device for semiconductor integrated circuits. The characteristic acquisition means further includes an impedance frequency characteristic when the semiconductor integrated circuit is viewed from a noise output section from which the noise is output in the semiconductor integrated circuit, and an impedance frequency when the external circuit side is viewed from the noise output section. Get the characteristics and
The model circuit creating means creates the noise model circuit composed of an ideal current source and an internal impedance connected in parallel to the ideal current source based on each frequency characteristic acquired by the characteristic acquiring unit. The noise analysis apparatus for a semiconductor integrated circuit according to claim 5. The external circuit and a part of the semiconductor integrated circuit constitute an oscillation circuit that supplies an oscillation signal having a predetermined frequency into the semiconductor integrated circuit.
The noise analysis device for a semiconductor integrated circuit according to any one of claims 5 to 7, wherein the noise is output from the semiconductor integrated circuit side to the external circuit in the oscillation circuit. The oscillation circuit is a CMOS oscillation circuit including at least a CMOS inverter formed in the semiconductor integrated circuit and a vibrator that constitutes the external circuit and is connected to an output side of the CMOS inverter. The noise analysis device for a semiconductor integrated circuit according to claim 8, wherein the noise is output from the CMOS inverter to the vibrator side.   The program for functioning a computer as said each means in the noise analysis apparatus of the semiconductor integrated circuit in any one of Claims 5-9.