JP4453433B2 - Bypass capacitor arrangement information acquisition apparatus and method - Google Patents

Bypass capacitor arrangement information acquisition apparatus and method Download PDF

Info

Publication number
JP4453433B2
JP4453433B2 JP2004137352A JP2004137352A JP4453433B2 JP 4453433 B2 JP4453433 B2 JP 4453433B2 JP 2004137352 A JP2004137352 A JP 2004137352A JP 2004137352 A JP2004137352 A JP 2004137352A JP 4453433 B2 JP4453433 B2 JP 4453433B2
Authority
JP
Japan
Prior art keywords
frequency
power supply
bypass capacitor
emi
emi countermeasure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004137352A
Other languages
Japanese (ja)
Other versions
JP2005321864A (en
Inventor
宗明 松村
友幸 中尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2004137352A priority Critical patent/JP4453433B2/en
Publication of JP2005321864A publication Critical patent/JP2005321864A/en
Application granted granted Critical
Publication of JP4453433B2 publication Critical patent/JP4453433B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Description

本発明は、LSI(large scale integrated circuit:大規模集積回路)等の集積回路を搭載する基板に対してEMI(electro-magnetic interference:電磁波妨害)対策用のバイパスコンデンサの最適配置を行うために必要な情報を取得するためのバイパスコンデンサ配置情報取得装置及び方法に関する。   The present invention is necessary for optimally arranging bypass capacitors for measures against EMI (electro-magnetic interference) on a substrate on which an integrated circuit such as an LSI (large scale integrated circuit) is mounted. The present invention relates to a bypass capacitor arrangement information acquisition apparatus and method for acquiring various information.

近年、EMIノイズ問題が顕在化している。EMIノイズとは、集積回路内部の電源電圧変動である電源ノイズが集積回路を搭載する基板の電源配線に伝播し、基板の電源配線のアンテナとしての働きにより、電源ノイズが電磁波として空間に放射される現象のことである。今後、集積回路の高速化、多ピン化、大電流化に伴い、電源ノイズはますます大きくなる傾向にあるが、これはEMIノイズが大きくなることを意味している。   In recent years, the EMI noise problem has become apparent. The EMI noise is a power supply noise that is a fluctuation of a power supply voltage inside the integrated circuit propagates to the power supply wiring of the board on which the integrated circuit is mounted, and the power supply noise is radiated to the space as an electromagnetic wave by the function of the antenna of the power supply wiring of the board. It is a phenomenon. In the future, with the increase in the speed of integrated circuits, the increase in the number of pins, and the increase in current, the power supply noise tends to increase further, which means that the EMI noise increases.

主要各国には、電子機器から発生するEMIノイズについて上限値を定めたEMI規格が存在し、このEMI規格を満たすことが義務付けられている。例えば、日本ではVCCI規格、EUではEN規格、米国ではFCC規格が存在し、これらの規格を満たさない機器の輸入、販売が禁止されている。   In each major country, there is an EMI standard that defines an upper limit for EMI noise generated from electronic equipment, and it is obliged to satisfy this EMI standard. For example, the VCCI standard exists in Japan, the EN standard exists in the EU, and the FCC standard exists in the United States. Import and sales of devices that do not satisfy these standards are prohibited.

EMI対策として、一般に、基板にバイパスコンデンサを配置するという方法が用いられているが、バイパスコンデンサの配置場所決定方法として、例えば、基板設計時に、集積回路近傍にバイパスコンデンサを適当に配置し、基板設計後に実測によるEMIノイズの確認と、バイパスコンデンサ追加に伴う基板の再設計を繰り返すことで、EMI規格をクリアできるバイパスコンデンサの配置場所を決めるという方法がある。   As a measure against EMI, generally, a method of arranging a bypass capacitor on a substrate is used. As a method of determining a location of a bypass capacitor, for example, when designing a substrate, a bypass capacitor is appropriately arranged in the vicinity of an integrated circuit. There is a method of determining the location of the bypass capacitor that can satisfy the EMI standard by repeatedly checking the EMI noise by actual measurement after the design and re-designing the substrate accompanying the addition of the bypass capacitor.

しかしながら、このような後追い的なEMI対策では、EMI対策期間は数ヶ月もの長期にわたり、EMI対策コストも大きな負担になってしまう。そこで、また、従来、簡易計算式を用いた電源ノイズの電圧判定から、バイパスコンデンサ配置場所の妥当性を簡易的に行う方法が提案されている(例えば、特許文献1参照)。
特開2002−140382号公報
However, in such a follow-up EMI countermeasure, the EMI countermeasure period is as long as several months, and the EMI countermeasure cost becomes a heavy burden. Therefore, conventionally, a method has been proposed in which the validity of the location of the bypass capacitor is simply determined based on the voltage determination of the power supply noise using a simple calculation formula (see, for example, Patent Document 1).
JP 2002-140382 A

集積回路を搭載する基板に対してバイパスコンデンサの最適配置を行うには、EMI対策が必要な周波数を特定した上で、EMI対策に有効な場所に、EMI対策に有効な周波数特性を有するバイパスコンデンサを配置する必要がある。しかし、特許文献1に記載の技術は、このようなものではなく、特許文献1に記載の技術では、EMI対策期間が長くなり、EMI対策コストの上昇を招いてしまうという問題点があった。   In order to optimally place a bypass capacitor on a substrate on which an integrated circuit is mounted, a frequency having an effective frequency characteristic for EMI countermeasures is specified at a place effective for EMI countermeasures after specifying a frequency that requires EMI countermeasures. Need to be placed. However, the technique described in Patent Document 1 is not such a problem, and the technique described in Patent Document 1 has a problem that the EMI countermeasure period becomes long and the EMI countermeasure cost increases.

本発明は、かかる点に鑑み、集積回路を搭載する基板に対するバイパスコンデンサの最適配置を効果的に行い、EMI対策期間を短くし、EMI対策コストの低減化を図ることができるようにしたバイパスコンデンサ配置情報取得装置及び方法を提供することを目的とする。   In view of this point, the present invention effectively performs optimal placement of a bypass capacitor with respect to a substrate on which an integrated circuit is mounted, shortens the EMI countermeasure period, and reduces the EMI countermeasure cost. An object is to provide an arrangement information acquisition apparatus and method.

本発明のバイパスコンデンサ配置情報取得装置は、基板が発生するEMIノイズの解析結果から、EMI対策が必要な周波数を決定するEMI対策周波数決定手段を有するというものである。   The bypass capacitor arrangement information acquisition apparatus of the present invention has EMI countermeasure frequency determining means for determining a frequency that requires EMI countermeasure from the analysis result of EMI noise generated by the substrate.

本発明のバイパスコンデンサ配置情報取得方法は、EMI対策周波数決定手段が、基板が発生するEMIノイズの解析結果から、EMI対策が必要な周波数を決定するEMI対策周波数決定工程を有するというものである。   The bypass capacitor arrangement information acquisition method of the present invention is such that the EMI countermeasure frequency determining means has an EMI countermeasure frequency determining step of determining a frequency that requires EMI countermeasure from the analysis result of the EMI noise generated by the substrate.

本発明のバイパスコンデンサ配置情報取得装置によれば、EMI対策周波数決定手段により、バイパスコンデンサ配置情報の一つとして、EMI対策周波数情報を取得することができる。また、本発明のバイパスコンデンサ配置情報取得方法によれば、EMI対策周波数決定工程により、バイパスコンデンサ配置情報の一つとして、EMI対策周波数情報を取得することができる。   According to the bypass capacitor arrangement information acquiring apparatus of the present invention, the EMI countermeasure frequency information can be acquired as one of the bypass capacitor arrangement information by the EMI countermeasure frequency determining means. Further, according to the bypass capacitor arrangement information acquisition method of the present invention, the EMI countermeasure frequency information can be acquired as one of the bypass capacitor arrangement information by the EMI countermeasure frequency determination step.

そこで、本発明により取得したEMI対策周波数情報の他に、例えば、集積回路の電源端子電流波形を取得することでEMI対策が必要な電源端子を求めることが可能となる。また、共振周波数やインピーダンス情報等を含むバイパスコンデンサ・データベースを用意することで、EMI対策周波数に最適な周波数特性を有するバイパスコンデンサを決定することが可能となる。   Therefore, in addition to the EMI countermeasure frequency information acquired by the present invention, for example, it is possible to obtain a power supply terminal that requires an EMI countermeasure by acquiring a power supply terminal current waveform of the integrated circuit. In addition, by preparing a bypass capacitor database including resonance frequency, impedance information, and the like, it is possible to determine a bypass capacitor having frequency characteristics optimal for the EMI countermeasure frequency.

したがって、本発明によれば、集積回路を搭載する基板に対するバイパスコンデンサの最適配置を効果的に行い、EMI対策期間を短くし、EMI対策コストの低減化を図ることができる。   Therefore, according to the present invention, it is possible to effectively arrange the bypass capacitor with respect to the substrate on which the integrated circuit is mounted, shorten the EMI countermeasure period, and reduce the EMI countermeasure cost.

図1は本発明のバイパスコンデンサ配置情報取得装置の一実施形態の概念図であり、本発明のバイパスコンデンサ配置情報取得装置の一実施形態は、CPUとメモリ等を有するコンピュータで構成することができる。   FIG. 1 is a conceptual diagram of an embodiment of a bypass capacitor arrangement information acquisition apparatus according to the present invention. One embodiment of the bypass capacitor arrangement information acquisition apparatus of the present invention can be configured by a computer having a CPU and a memory. .

図1中、1は特定対策周波数保持手段であり、EMI対策を行うことが予め特定されている周波数を特定対策周波数として保持するものである。2はEMIノイズ解析結果保持手段であり、LSIを搭載する基板をシミュレーションモデル化した基板モデル等を用いてLSIを搭載する基板が発生するEMIノイズを解析した結果(EMIノイズの大きさの周波数分布)を保持するものである。3はEMI規格保持手段であり、EMI規格の内容を保持するものである。   In FIG. 1, reference numeral 1 denotes a specific countermeasure frequency holding means, which holds a frequency that is specified in advance as a specific countermeasure frequency for performing EMI countermeasures. Reference numeral 2 denotes EMI noise analysis result holding means, which is a result of analyzing EMI noise generated by a substrate on which an LSI is mounted using a substrate model obtained by modeling a substrate on which an LSI is mounted (frequency distribution of the magnitude of EMI noise). ). Reference numeral 3 denotes EMI standard holding means, which holds the contents of the EMI standard.

4はEMI対策周波数決定手段であり、特定対策周波数保持手段1が保持する特定対策周波数と、EMIノイズ解析結果保持手段2が保持するEMIノイズ解析結果と、EMI規格保持手段3が保持するEMI規格を入力し、EMI対策が必要な周波数をEMI対策周波数として決定するものである。5はEMI対策周波数保持手段であり、EMI対策周波数決定手段4が決定したEMI対策周波数を保持するものである。   Reference numeral 4 denotes EMI countermeasure frequency determination means, which is a specific countermeasure frequency held by the specific countermeasure frequency holding means 1, an EMI noise analysis result held by the EMI noise analysis result holding means 2, and an EMI standard held by the EMI standard holding means 3. , And a frequency that requires EMI countermeasures is determined as an EMI countermeasure frequency. Reference numeral 5 denotes an EMI countermeasure frequency holding means for holding the EMI countermeasure frequency determined by the EMI countermeasure frequency determining means 4.

EMI対策周波数決定手段4は、EMI対策周波数算出部6とEMI対策周波数出力部7を有している。EMI対策周波数算出部6は、EMIノイズ解析結果保持手段2から入力したEMIノイズ解析結果と、EMI規格保持手段3から入力したEMI規格を比較して、EMI規格を超えている周波数を全てEMI対策周波数として算出するものである。   The EMI countermeasure frequency determination means 4 includes an EMI countermeasure frequency calculation unit 6 and an EMI countermeasure frequency output unit 7. The EMI countermeasure frequency calculation unit 6 compares the EMI noise analysis result input from the EMI noise analysis result holding means 2 with the EMI standard input from the EMI standard holding means 3, and determines all frequencies exceeding the EMI standard as EMI countermeasures. It is calculated as a frequency.

EMI対策周波数出力部7は、EMI対策周波数算出部6が算出したEMI対策周波数及び特定対策周波数保持手段1から入力した特定対策周波数をEMI対策周波数として決定し、これらをEMI対策周波数保持部5に出力するものである。   The EMI countermeasure frequency output unit 7 determines the EMI countermeasure frequency calculated by the EMI countermeasure frequency calculation unit 6 and the specific countermeasure frequency input from the specific countermeasure frequency holding unit 1 as the EMI countermeasure frequency, and supplies these to the EMI countermeasure frequency holding unit 5. Output.

8は電源端子電流波形保持手段であり、基板に搭載されるLSIをシミュレーションモデル化したLSIモデルを用いてLSIが有する外部端子の中の電源端子(LSIがパッケージ化されている場合には電源ピン、パッケージ化されていない場合には電源パッド)に流れる電流の波形を保持するものである。   Reference numeral 8 denotes power source terminal current waveform holding means, which uses an LSI model obtained by modeling an LSI mounted on a substrate as a simulation model, and uses the power source terminal among the external terminals of the LSI (a power pin when the LSI is packaged) In the case of not being packaged, the waveform of the current flowing in the power supply pad) is held.

9はEMI対策電源端子決定手段であり、EMI対策周波数保持手段5が保持するEMI対策周波数と、電源端子電流波形保持手段8が保持するLSIの電源端子の電流波形を入力し、EMI対策が必要な電源端子を決定するものである。   Reference numeral 9 denotes an EMI countermeasure power supply terminal determining means, which inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5 and the current waveform of the power supply terminal of the LSI held by the power supply terminal current waveform holding means 8 and requires EMI countermeasures. The power supply terminal is determined.

10はEMI対策電源端子番号・最適バイパスコンデンサ種類保持手段であり、EMI対策周波数ごとに、EMI対策電源端子決定手段9が決定したEMI対策電源端子の番号と、後述する最適バイパスコンデンサ決定手段が決定した最適バイパスコンデンサの種類を保持するものである。   Reference numeral 10 denotes an EMI countermeasure power terminal number / optimum bypass capacitor type holding means, and for each EMI countermeasure frequency, the number of the EMI countermeasure power terminal determined by the EMI countermeasure power terminal determining means 9 and the optimum bypass capacitor determining means described later are determined. The type of the optimum bypass capacitor is maintained.

EMI対策電源端子決定手段9は、電流振幅周波数分布計算部11と、電流振幅抽出部12と、EMI対策電源端子算出部13を有している。電流振幅周波数分布計算部11は、電源端子電流波形保持手段8から入力した各電源端子の電流波形をフーリエ変換することにより各電源端子に流れる電流の電流振幅の周波数分布を計算するものである。   The EMI countermeasure power supply terminal determining means 9 includes a current amplitude frequency distribution calculating section 11, a current amplitude extracting section 12, and an EMI countermeasure power supply terminal calculating section 13. The current amplitude frequency distribution calculation unit 11 calculates the frequency distribution of the current amplitude of the current flowing through each power supply terminal by Fourier transforming the current waveform of each power supply terminal input from the power supply terminal current waveform holding means 8.

電流振幅抽出部12は、電流振幅周波数分布計算部11が計算した各電源端子に流れる電流の電流振幅周波数分布から、各電源端子に流れる電流の成分のうち、EMI対策周波数成分の電流振幅を抽出するものである。   The current amplitude extraction unit 12 extracts the current amplitude of the EMI countermeasure frequency component from the current amplitude frequency distribution of the current flowing through each power supply terminal calculated by the current amplitude frequency distribution calculation unit 11 from among the current components flowing through each power supply terminal. To do.

EMI対策電源端子算出部13は、電流振幅抽出部12が抽出した電源端子に流れる電流のEMI対策周波数成分の電流振幅から、EMI対策周波数の各々ごとに、各電源端子のうち、EMI対策周波数成分の電流振幅が最も大きな電流が流れる電源端子をEMI対策電源端子として算出してEMI対策電源端子番号・最適バイパスコンデンサ種類保持手段10に出力するものである。   The EMI countermeasure power supply terminal calculation unit 13 calculates the EMI countermeasure frequency component of each power supply terminal for each EMI countermeasure frequency from the current amplitude of the EMI countermeasure frequency component of the current flowing through the power supply terminal extracted by the current amplitude extraction unit 12. Is calculated as an EMI countermeasure power supply terminal and is output to the EMI countermeasure power supply terminal number / optimum bypass capacitor type holding means 10.

14はバイパスコンデンサ・データベースであり、使用可能とされた複数のバイパスコンデンサについて、例えば、図2に示すように、品番、容量、寄生インダクタンス(ESL:equivalent series inductance)、寄生抵抗(ESR:equivalent series resistance)、共振周波数を情報としてデータベース化してなるものである。   Reference numeral 14 denotes a bypass capacitor database. As shown in FIG. 2, for example, as shown in FIG. 2, a plurality of bypass capacitors that can be used are part number, capacitance, parasitic inductance (ESL: equivalent series inductance), parasitic resistance (ESR: equivalent series). resistance) and resonance frequency as a database.

15は最適バイパスコンデンサ決定手段であり、EMI対策周波数保持手段5が保持するEMI対策周波数を入力し、バイパスコンデンサ・データベース14内のバイパスコンデンサから、EMI対策周波数の各々ごとに、EMI対策周波数で最もインピーダンスが低いバイパスコンデンサを最適バイパスコンデンサとして決定するものである。   Numeral 15 is an optimum bypass capacitor determination means, which inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5, and from the bypass capacitor in the bypass capacitor database 14, the EMI countermeasure frequency is the highest for each EMI countermeasure frequency. A bypass capacitor having a low impedance is determined as the optimum bypass capacitor.

最適バイパスコンデンサ決定手段15は、インピーダンス計算部16と最適バイパスコンデンサ算出部17を有している。インピーダンス計算部16は、バイパスコンデンサ・データベース14内にあるバイパスコンデンサの容量、寄生インダクタンス及び寄生抵抗から、EMI対策周波数の各々ごとに、バイパスコンデンサ・データベース14内の各バイパスコンデンサのEMI対策周波数でのインピーダンスを計算するものである。   The optimum bypass capacitor determination unit 15 includes an impedance calculator 16 and an optimum bypass capacitor calculator 17. The impedance calculation unit 16 calculates the frequency of the bypass capacitor in the bypass capacitor database 14 from the capacitance, parasitic inductance, and parasitic resistance for each EMI countermeasure frequency at the EMI countermeasure frequency of each bypass capacitor in the bypass capacitor database 14. Impedance is calculated.

最適バイパスコンデンサ算出部17は、EMI対策周波数の各々ごとに、各バイパスコンデンサのインピーダンスを比較し、最もインピーダンスの低いバイパスコンデンサをEMI対策に最適なバイパスコンデンサとして算出し、EMI対策電源端子番号・最適バイパスコンデンサ種類保持手段10に出力するものである。   The optimum bypass capacitor calculating unit 17 compares the impedance of each bypass capacitor for each EMI countermeasure frequency, calculates the bypass capacitor having the lowest impedance as the optimum bypass capacitor for the EMI countermeasure, This is output to the bypass capacitor type holding means 10.

図3は電源端子電流波形及びEMIノイズ解析結果の取得装置の一例の概念図である。図3中、18は基板に搭載するLSIをシミュレーションモデル化したLSIモデルを保持するLSIモデル保持手段、19はLSIモデル保持手段18が保持するLSIモデルから電源端子電流波形を取得する電源端子電流波形取得手段(例えば、回路解析シミュレータ)である。   FIG. 3 is a conceptual diagram of an example of an apparatus for acquiring a power supply terminal current waveform and an EMI noise analysis result. In FIG. 3, reference numeral 18 denotes an LSI model holding means for holding an LSI model obtained by modeling an LSI mounted on a substrate, and 19 denotes a power supply terminal current waveform for acquiring a power supply terminal current waveform from the LSI model held by the LSI model holding means 18. It is an acquisition means (for example, circuit analysis simulator).

20はLSIを搭載する基板をシミュレーションモデル化した基板モデルを保持する基板モデル保持手段、21は基板モデル保持手段20が保持する基板モデル及び電源端子電流波形保持手段8が保持する電源端子電流波形からEMIノイズを解析するEMIノイズ解析手段(例えば、電磁界解析シミュレータ)である。   Reference numeral 20 denotes a board model holding means for holding a board model obtained by simulating a board on which an LSI is mounted. Reference numeral 21 denotes a board model held by the board model holding means 20 and a power supply terminal current waveform held by the power supply terminal current waveform holding means 8. EMI noise analysis means (for example, an electromagnetic field analysis simulator) for analyzing EMI noise.

電源端子電流波形取得手段19は、LSIを搭載する基板がプリント基板の場合には、図4に示すように、プリント基板22に搭載されるLSI23をシミュレーションモデル化したLSIモデルを用いて電源ピン24等、LSI23の全ての電源ピンの電流波形を電源端子電流波形として取得する。   When the board on which the LSI is mounted is a printed board, the power supply terminal current waveform acquisition unit 19 uses the LSI model obtained by simulating the LSI 23 mounted on the printed board 22 as shown in FIG. The current waveforms of all the power supply pins of the LSI 23 are acquired as power supply terminal current waveforms.

また、LSIを搭載する基板がSIP(system in package)の場合、電源端子電流波形取得手段19は、LSIを搭載する基板がSIPを構成する多層配線基板の場合には、図5に示すように、多層配線基板25に搭載されるLSI26、27をシミュレーションモデル化したLSIモデルを用いて電源パッド28、29等、LSI26、27の全ての電源パッドの電流波形を電源端子電流波形として取得する。なお、30、31はボンディングワイヤである。   In addition, when the substrate on which the LSI is mounted is a SIP (system in package), the power supply terminal current waveform acquisition means 19 is as shown in FIG. 5 when the substrate on which the LSI is mounted is a multilayer wiring substrate constituting the SIP. Then, using the LSI model obtained by modeling the LSIs 26 and 27 mounted on the multilayer wiring board 25, the current waveforms of all the power pads of the LSIs 26 and 27, such as the power pads 28 and 29, are acquired as power source terminal current waveforms. 30 and 31 are bonding wires.

EMIノイズ解析手段21は、LSIを搭載する基板がプリント基板の場合には、図4に示すプリント基板22をシミュレーションモデル化した基板モデル及び電源端子電流波形取得手段19がLSI23のシミュレーションモデルから取得した電源端子電流波形に基づいてEMIノイズを解析することになる。   When the board on which the LSI is mounted is a printed board, the EMI noise analyzing means 21 is obtained from the simulation model of the LSI 23 by the board model obtained by modeling the printed board 22 shown in FIG. The EMI noise is analyzed based on the power supply terminal current waveform.

また、EMIノイズ解析手段21は、LSIを搭載する基板がSIPを構成する多層配線基板の場合には、図5に示す多層配線基板25をシミュレーションモデル化した多層配線基板モデル及び電源端子電流波形取得手段19がLSI26、27のシミュレーションモデルから取得した電源端子電流波形に基づいてEMIノイズを解析することになる。   Further, the EMI noise analysis means 21 obtains a power supply terminal current waveform and a multilayer wiring board model obtained by simulating the multilayer wiring board 25 shown in FIG. 5 when the board on which the LSI is mounted is a multilayer wiring board constituting the SIP. The means 19 analyzes the EMI noise based on the power supply terminal current waveform acquired from the simulation models of the LSIs 26 and 27.

本発明のバイパスコンデンサ配置情報取得装置の一実施形態では、本発明のバイパスコンデンサ配置情報取得方法の一実施形態が実行される。本発明のバイパスコンデンサ配置情報取得方法の一実施形態は、次の3つの工程を含んでいる。   In one embodiment of the bypass capacitor arrangement information acquiring apparatus of the present invention, one embodiment of the bypass capacitor arrangement information acquiring method of the present invention is executed. One embodiment of the bypass capacitor arrangement information acquisition method of the present invention includes the following three steps.

第1の工程は、EMI対策周波数決定手段4が、特定対策周波数保持手段1が保持する特定対策周波数と、EMIノイズ解析結果保持手段2が保持するEMIノイズ解析結果と、EMI規格保持手段3が保持するEMI規格を入力し、EMI対策周波数を決定し、決定したEMI対策周波数をEMI対策周波数保持手段5に保持させるEMI対策周波数決定工程である。   In the first step, the EMI countermeasure frequency determining means 4 has the specific countermeasure frequency held by the specific countermeasure frequency holding means 1, the EMI noise analysis result held by the EMI noise analysis result holding means 2, and the EMI standard holding means 3 This is an EMI countermeasure frequency determination step in which an EMI standard to be held is input, an EMI countermeasure frequency is determined, and the determined EMI countermeasure frequency is held in the EMI countermeasure frequency holding means 5.

第2の工程は、EMI対策電源端子決定手段9が、EMI対策周波数保持手段5が保持するEMI対策周波数と、電源端子電流波形保持手段8が保持する電源端子電流波形を入力し、EMI対策電源端子を決定し、決定したEMI対策電源端子の番号をEMI対策電源端子番号・最適バイパスコンデンサ種類保持手段10に保持させるEMI対策電源端子決定工程である。   In the second step, the EMI countermeasure power supply terminal determining means 9 inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5 and the power supply terminal current waveform held by the power supply terminal current waveform holding means 8, and the EMI countermeasure power supply This is an EMI countermeasure power supply terminal determination step in which the terminal is determined and the determined EMI countermeasure power supply terminal number is held in the EMI countermeasure power supply terminal number / optimum bypass capacitor type holding means 10.

第3の工程は、最適バイパスコンデンサ決定手段15が、EMI対策周波数保持手段5が保持するEMI対策周波数を入力し、バイパスコンデンサ・データベース14内のバイパスコンデンサから、EMI対策周波数で最もインピーダンスが低いバイパスコンデンサを最適バイパスコンデンサとして決定する最適バイパスコンデンサ決定工程である。   In the third step, the optimum bypass capacitor determining means 15 inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5, and the bypass having the lowest impedance at the EMI countermeasure frequency is selected from the bypass capacitors in the bypass capacitor database 14. This is an optimum bypass capacitor determination step for determining a capacitor as an optimum bypass capacitor.

図6はEMIノイズ解析結果保持手段2が保持するEMIノイズ解析結果の例を示す図である。図6に示すようにEMIノイズには周波数依存性があり、図6の例では、周波数FxにおいてEMI規格の一種であるVCCI規格をオーバーしていることが分かる。この周波数FxがEMI対策周波数である。   FIG. 6 is a diagram showing an example of the EMI noise analysis result held by the EMI noise analysis result holding means 2. As shown in FIG. 6, the EMI noise has frequency dependency, and in the example of FIG. 6, it can be seen that the frequency Fx exceeds the VCCI standard which is a kind of EMI standard. This frequency Fx is an EMI countermeasure frequency.

本実施形態においては、EMI対策周波数決定手段4が、特定対策周波数保持手段1が保持する特定対策周波数と、EMIノイズ解析結果保持手段2が保持するEMIノイズ解析結果と、EMI規格保持手段3が保持するEMI規格を入力し、EMI対策周波数を決定する。   In the present embodiment, the EMI countermeasure frequency determining means 4 includes the specific countermeasure frequency held by the specific countermeasure frequency holding means 1, the EMI noise analysis result held by the EMI noise analysis result holding means 2, and the EMI standard holding means 3 The EMI standard to be held is input and the EMI countermeasure frequency is determined.

具体的には、EMI対策周波数算出部6が、EMIノイズ解析結果保持手段2から入力したEMIノイズ解析結果と、EMI規格保持手段3から入力したEMI規格を比較し、EMI規格を超えている周波数を全て算出する。例えば、複数の周波数F1、F2、・・・、FnにおいてEMI規格を超えている場合には、これら複数の周波数F1、F2、・・・、FnをEMI対策周波数として算出する。   Specifically, the EMI countermeasure frequency calculation unit 6 compares the EMI noise analysis result input from the EMI noise analysis result holding unit 2 with the EMI standard input from the EMI standard holding unit 3, and the frequency exceeding the EMI standard. Are all calculated. For example, when the plurality of frequencies F1, F2,..., Fn exceed the EMI standard, the plurality of frequencies F1, F2,.

そして、EMI対策周波数出力部7が、EMI対策周波数算出部6が算出したEMI対策周波数及び特定対策周波数保持手段1から入力した特定対策周波数をEMI対策周波数として決定し、これらをEMI対策周波数保持手段5に出力し、EMI対策周波数保持手段5は、EMI対策周波数出力部7から出力されるEMI対策周波数を保持する。   Then, the EMI countermeasure frequency output section 7 determines the EMI countermeasure frequency calculated by the EMI countermeasure frequency calculation section 6 and the specific countermeasure frequency input from the specific countermeasure frequency holding means 1 as the EMI countermeasure frequency, and these are determined as the EMI countermeasure frequency holding means. The EMI countermeasure frequency holding means 5 holds the EMI countermeasure frequency output from the EMI countermeasure frequency output unit 7.

図7は電源端子電流波形保持手段8が保持する電源端子電流波形の例(或る1つの電源端子の電流波形の例)を示す図である。本実施形態では、EMI対策電源端子決定手段9が、EMI対策周波数保持手段5が保持するEMI対策周波数と、電源端子電流波形保持手段8が保持するLSIの電源端子の電流波形を入力し、EMI対策周波数の各々ごとに、EMI対策電源端子を決定する。   FIG. 7 is a diagram showing an example of a power supply terminal current waveform held by the power supply terminal current waveform holding means 8 (an example of a current waveform of a certain power supply terminal). In this embodiment, the EMI countermeasure power supply terminal determining means 9 inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5 and the current waveform of the power supply terminal of the LSI held by the power supply terminal current waveform holding means 8, and the EMI. An EMI countermeasure power supply terminal is determined for each countermeasure frequency.

具体的には、電流振幅周波数分布計算部11が、電源端子電流波形保持手段8が保持する電源端子電流波形(LSI動作時の1周期分の情報)をフーリエ変換し、図8に示すように、各電源端子に流れる電流の電流振幅の周波数分布を算出し、そして、電流振幅抽出部12が、電流振幅周波数分布計算部11が計算した各電源端子の電流振幅周波数分布から、図9に示すように、EMI対策周波数の各々ごとに、各電源端子に流れる電流のEMI対策周波数成分の電流振幅を抽出する。   Specifically, the current amplitude frequency distribution calculation unit 11 performs a Fourier transform on the power supply terminal current waveform (information for one cycle during LSI operation) held by the power supply terminal current waveform holding unit 8 as shown in FIG. The frequency distribution of the current amplitude of the current flowing through each power supply terminal is calculated, and the current amplitude extraction unit 12 shows the current amplitude frequency distribution of each power supply terminal calculated by the current amplitude frequency distribution calculation unit 11 as shown in FIG. As described above, for each EMI countermeasure frequency, the current amplitude of the EMI countermeasure frequency component of the current flowing through each power supply terminal is extracted.

更に、EMI対策電源端子算出部13が、電流振幅抽出部12が抽出した各電源端子に流れる電流のEMI対策周波数成分の電流振幅から、EMI対策周波数の各々ごとに、EMI対策周波数の電流成分の電流振幅が最も大きな電流が流れる電源端子をEMI対策電源端子として算出し、これをEMI対策電源端子番号・最適バイパスコンデンサ種類保持手段10に出力する。図9の例では、端子番号Nxの電源端子がEMI対策電源端子として算出されることになる。   Further, the EMI countermeasure power terminal calculating unit 13 calculates the current component of the EMI countermeasure frequency for each EMI countermeasure frequency from the current amplitude of the EMI countermeasure frequency component of the current flowing through each power terminal extracted by the current amplitude extracting section 12. The power supply terminal through which the current with the largest current amplitude flows is calculated as the EMI countermeasure power supply terminal, and this is output to the EMI countermeasure power supply terminal number / optimum bypass capacitor type holding means 10. In the example of FIG. 9, the power supply terminal with the terminal number Nx is calculated as the EMI countermeasure power supply terminal.

本実施形態では、EMI対策電源端子の近傍をEMI対策場所としてバイパスコンデンサを配置する。例えば、配線基板がプリント基板の場合において、図10に示すように、電源ピン32がEMI対策電源端子の場合には、電源ピン32の近傍をバイパスコンデンサ33の配置場所とする。また、配線基板がSIPの多層配線基板の場合には、図11に示すように、電源パッド34がEMI対策電源端子の場合には、電源パッド34の近傍をバイパスコンデンサ35の配置場所とする。   In the present embodiment, a bypass capacitor is disposed near the EMI countermeasure power supply terminal as an EMI countermeasure place. For example, when the wiring board is a printed board, as shown in FIG. 10, when the power supply pin 32 is an EMI countermeasure power supply terminal, the vicinity of the power supply pin 32 is the place where the bypass capacitor 33 is disposed. When the wiring board is a SIP multilayer wiring board, as shown in FIG. 11, when the power supply pad 34 is an EMI countermeasure power supply terminal, the vicinity of the power supply pad 34 is the place where the bypass capacitor 35 is disposed.

図12はバイパスコンデンサのインピーダンスの周波数特性の例を示す図である。バイパスコンデンサには、容量だけでなく、寄生インピーダンスと寄生抵抗が存在する。この3つの要素により、バイパスコンデンサのインピーダンスは、周波数に大きく依存することになる。このため、バイパスコンデンサには、EMIノイズに対して効果のある周波数領域と、ほとんど効果が望めない周波数領域が存在する。   FIG. 12 is a diagram illustrating an example of frequency characteristics of impedance of the bypass capacitor. The bypass capacitor has not only a capacitance but also a parasitic impedance and a parasitic resistance. By these three factors, the impedance of the bypass capacitor greatly depends on the frequency. For this reason, the bypass capacitor has a frequency region which is effective against EMI noise and a frequency region where almost no effect can be expected.

そこで、本実施形態では、バイパスコンデンサ・データベース14を設け、最適バイパスコンデンサ決定手段15は、EMI対策周波数保持手段5が保持するEMI対策周波数を入力し、EMI対策周波数の各々ごとに、バイパスコンデンサ・データベース14内のバイパスコンデンサから、EMI対策周波数において最もインピーダンスが低いバイパスコンデンサを最適バイパスコンデンサとして決定するとしている。   Therefore, in the present embodiment, the bypass capacitor database 14 is provided, and the optimum bypass capacitor determination means 15 inputs the EMI countermeasure frequency held by the EMI countermeasure frequency holding means 5, and the bypass capacitor The bypass capacitor having the lowest impedance at the EMI countermeasure frequency is determined from the bypass capacitors in the database 14 as the optimum bypass capacitor.

具体的には、インピーダンス計算部16が、バイパスコンデンサ・データベース14内にあるバイパスコンデンサの容量、寄生インダクタンス、寄生抵抗から、EMI対策周波数の各々ごとに、各バイパスコンデンサのEMI対策周波数でのインピーダンスを計算する。   Specifically, the impedance calculator 16 calculates the impedance of each bypass capacitor at the EMI countermeasure frequency for each EMI countermeasure frequency from the capacitance, parasitic inductance, and parasitic resistance of the bypass capacitor in the bypass capacitor database 14. calculate.

そして、最適バイパスコンデンサ算出部17が、EMI対策周波数の各々ごとに、各バイパスコンデンサのインピーダンスを比較し、最もインピーダンスの低いバイパスコンデンサをEMI対策に最適なバイパスコンデンサとして算出し、これをEMI対策電源端子番号・最適バイパスコンデンサ種類保持手段10に出力する。   Then, the optimum bypass capacitor calculation unit 17 compares the impedance of each bypass capacitor for each EMI countermeasure frequency, calculates the bypass capacitor having the lowest impedance as the optimum bypass capacitor for the EMI countermeasure, and uses this as the EMI countermeasure power supply. Output to terminal number / optimum bypass capacitor type holding means 10.

本発明のバイパスコンデンサ配置情報取得装置の一実施形態によれば、本発明のバイパスコンデンサ配置情報取得方法の一実施形態を実行することができる。即ち、EMI対策周波数決定手段4によりEMI対策周波数を決定することができ、EMI対策電源端子決定手段9によりEMI対策電源端子を決定することができ、最適バイパスコンデンサ決定手段15によりEMI対策周波数に最も有効なバイパスコンデンサを選択することができる。   According to one embodiment of the bypass capacitor arrangement information acquiring apparatus of the present invention, one embodiment of the bypass capacitor arrangement information acquiring method of the present invention can be executed. That is, the EMI countermeasure frequency determining means 4 can determine the EMI countermeasure frequency, the EMI countermeasure power supply terminal determining means 9 can determine the EMI countermeasure power supply terminal, and the optimum bypass capacitor determining means 15 can determine the EMI countermeasure frequency most. An effective bypass capacitor can be selected.

したがって、EMI対策電源端子の近傍にEMI対策に有効な周波数特性を有するバイパスコンデンサを配置することができるので、集積回路を搭載する基板に対するバイパスコンデンサの最適配置を効果的に行い、EMI対策期間を短くし、EMI対策コストの低減化を図ることができる。   Therefore, a bypass capacitor having frequency characteristics effective for EMI countermeasures can be arranged in the vicinity of the EMI countermeasure power supply terminal. Therefore, the optimum arrangement of the bypass capacitors with respect to the substrate on which the integrated circuit is mounted is effectively performed, and the EMI countermeasure period is increased. It can be shortened and the EMI countermeasure cost can be reduced.

ここで、本発明のバイパスコンデンサ配置情報取得装置及び方法を整理すると、本発明のバイパスコンデンサ配置情報取得装置及び方法には、少なくとも、以下に記述するバイパスコンデンサ配置情報取得装置及び方法が含まれる。   Here, when the apparatus and method for acquiring bypass capacitor arrangement information according to the present invention are arranged, the apparatus and method for acquiring bypass capacitor arrangement information according to the present invention include at least the apparatus and method for acquiring bypass capacitor arrangement information described below.

(付記1)バイパスコンデンサの配置を行うための情報を取得するバイパスコンデンサ配置情報取得装置であって、基板が発生するEMIノイズの解析結果から、EMI対策が必要な周波数を決定するEMI対策周波数決定手段を有することを特徴とするバイパスコンデンサ配置情報取得装置。 (Supplementary note 1) A bypass capacitor arrangement information acquisition device for acquiring information for arranging a bypass capacitor, and for determining an EMI countermeasure frequency determining an EMI countermeasure frequency from an analysis result of EMI noise generated by a substrate A bypass capacitor arrangement information acquisition apparatus characterized by comprising means.

(付記2)前記EMI対策周波数決定手段は、EMIノイズの値がEMI規格を超えている周波数を前記EMI対策が必要な周波数として決定することを特徴とする付記1記載のバイパスコンデンサ配置情報取得装置。 (Supplementary note 2) The bypass capacitor arrangement information acquisition device according to supplementary note 1, wherein the EMI countermeasure frequency determining means determines a frequency at which an EMI noise value exceeds an EMI standard as a frequency that requires the EMI countermeasure. .

(付記3)前記EMI対策周波数決定手段は、EMI対策を行うことが予め特定されている周波数、及び、EMIノイズ解析結果から得られるEMIノイズの値がEMI規格を超えている周波数を前記EMI対策が必要な周波数として決定することを特徴とする付記1記載のバイパスコンデンサ配置情報取得装置。 (Supplementary Note 3) The EMI countermeasure frequency determining means determines the frequency for which the EMI countermeasure is specified in advance and the frequency at which the value of the EMI noise obtained from the EMI noise analysis result exceeds the EMI standard. Is determined as a necessary frequency. 2. The bypass capacitor arrangement information acquisition apparatus according to appendix 1, wherein:

(付記4)前記EMI対策周波数決定手段が決定した前記EMI対策が必要な周波数及び集積回路の電源端子電流波形から、EMI対策が必要な電源端子を決定するEMI対策電源端子決定手段を有することを特徴とする付記1、2又は3記載のバイパスコンデンサ配置情報取得装置。 (Additional remark 4) It has EMI countermeasure power supply terminal determination means for determining the power supply terminal which needs EMI countermeasure from the frequency required by the EMI countermeasure frequency determination means and the power supply terminal current waveform of the integrated circuit. The bypass capacitor arrangement information acquisition device according to appendix 1, 2 or 3, characterized by the above.

(付記5)前記EMI対策電源端子決定手段は、集積回路の電源端子電流波形から、前記集積回路の各電源端子に流れる電流の電流振幅の周波数分布を算出し、前記EMI対策が必要な周波数の各々ごとに、前記集積回路の電源端子のうち、前記EMI対策が必要な周波数の電流成分の電流振幅が最も大きな電流が流れる電源端子を前記EMI対策が必要な電源端子として決定することを特徴とする付記2記載のバイパスコンデンサ配置情報取得装置。 (Additional remark 5) The said EMI countermeasure power supply terminal determination means calculates the frequency distribution of the current amplitude of the electric current which flows into each power supply terminal of the said integrated circuit from the power supply terminal current waveform of an integrated circuit, and has the frequency of the said EMI countermeasure required For each of the power supply terminals of the integrated circuit, a power supply terminal through which a current having a maximum current amplitude of a current component having a frequency requiring the EMI countermeasure is determined as a power supply terminal requiring the EMI countermeasure. The bypass capacitor arrangement information acquisition device according to Supplementary Note 2.

(付記6)バイパスコンデンサ・データベース内のバイパスコンデンサの中から、前記EMI対策が必要な周波数の各々ごとに、前記EMI対策が必要な周波数でインピーダンスが最小となるバイパスコンデンサを最適バイパスコンデンサとして決定する最適バイパスコンデンサ決定手段を有することを特徴とする付記1〜5のいずれか一項に記載のバイパスコンデンサ配置情報取得装置。 (Supplementary Note 6) For each frequency that requires the EMI countermeasure, a bypass capacitor that has a minimum impedance at the frequency that requires the EMI countermeasure is determined as an optimum bypass capacitor from among the bypass capacitors in the database. The bypass capacitor arrangement information acquisition device according to any one of appendices 1 to 5, further comprising an optimum bypass capacitor determination unit.

(付記7)前記バイパスコンデンサ・データベースは、品番、容量、寄生インダクタンス、寄生抵抗、共振周波数を情報としてバイパスコンデンサをデータベース化してなるものであることを特徴とする付記6記載のバイパスコンデンサ配置情報取得装置。 (Supplementary note 7) The bypass capacitor database is obtained by creating a database of bypass capacitors using information on product number, capacitance, parasitic inductance, parasitic resistance, and resonance frequency as information. apparatus.

(付記8)前記最適バイパスコンデンサ決定手段は、前記EMI対策が必要な周波数の各々ごとに、前記バイパスコンデンサ・データベース内のバイパスコンデンサの前記EMI対策が必要な周波数でのインピーダンスを計算し、該計算したインピーダンスが最小のバイパスコンデンサを前記最適バイパスコンデンサとして決定することを特徴とする付記6又は7記載のバイパスコンデンサ配置情報取得装置。 (Supplementary Note 8) The optimum bypass capacitor determination means calculates the impedance of the bypass capacitor in the bypass capacitor database at the frequency requiring the EMI countermeasure for each frequency requiring the EMI countermeasure. The bypass capacitor arrangement information acquisition apparatus according to appendix 6 or 7, wherein the bypass capacitor having the smallest impedance is determined as the optimum bypass capacitor.

(付記9)バイパスコンデンサの配置を行うための情報を取得するバイパスコンデンサ配置情報取得方法であって、EMI対策周波数決定手段が、基板が発生するEMIノイズの解析結果から、EMI対策が必要な周波数を決定するEMI対策周波数決定工程を有することを特徴とするバイパスコンデンサ配置情報取得方法。 (Supplementary note 9) A bypass capacitor arrangement information acquisition method for acquiring information for arranging a bypass capacitor, wherein the EMI countermeasure frequency determining means determines the frequency at which the EMI countermeasure is required from the analysis result of the EMI noise generated by the board. A method of acquiring bypass capacitor arrangement information, comprising a step of determining an EMI countermeasure frequency.

(付記10)前記EMI対策周波数決定工程では、EMIノイズの値がEMI規格を超えている周波数を前記EMI対策が必要な周波数として決定することを特徴とする付記9記載のバイパスコンデンサ配置情報取得方法。 (Supplementary note 10) The bypass capacitor arrangement information acquiring method according to supplementary note 9, wherein, in the EMI countermeasure frequency determining step, a frequency at which an EMI noise value exceeds an EMI standard is determined as a frequency that requires the EMI countermeasure. .

(付記11)前記EMI対策周波数決定工程では、EMI対策を行うことが予め特定されている周波数、及び、EMIノイズ解析結果から得られるEMIノイズの値がEMI規格を超えている周波数を前記EMI対策が必要な周波数として決定することを特徴とする付記9記載のバイパスコンデンサ配置情報取得方法。 (Supplementary Note 11) In the EMI countermeasure frequency determining step, the frequency at which the EMI countermeasure is specified in advance and the frequency at which the value of the EMI noise obtained from the EMI noise analysis result exceeds the EMI standard are determined as the EMI countermeasure. Is determined as a necessary frequency. 10. The bypass capacitor arrangement information acquiring method according to appendix 9.

(付記12)EMI対策電源端子決定手段が、前記EMI対策周波数決定工程で決定したEMI対策必要な周波数及び集積回路の電源端子電流波形から、EMI対策が必要な電源端子を決定するEMI対策電源端子決定工程を有することを特徴とする付記9、10又は11記載のバイパスコンデンサ配置情報取得方法。 (Additional remark 12) EMI countermeasure power supply terminal determination means determines the power supply terminal which requires EMI countermeasure from the frequency and the power supply terminal current waveform of the integrated circuit which require the EMI countermeasure determined in the EMI countermeasure frequency determination step. The bypass capacitor arrangement information acquisition method according to appendix 9, 10 or 11, characterized by comprising a terminal determination step.

(付記13)前記EMI対策電源端子決定工程は、前記集積回路の電源端子電流波形から、前記集積回路の各電源端子に流れる電流の電流振幅の周波数分布を算出し、前記EMI対策が必要な周波数の各々ごとに、前記集積回路の電源端子のうち、前記EMI対策が必要な周波数の電流成分の電流振幅が最も大きな電流が流れる電源端子を前記EMI対策が必要な電源端子として決定する工程を有することを特徴とする付記12記載のバイパスコンデンサ配置情報取得方法。 (Supplementary Note 13) In the EMI countermeasure power supply terminal determination step, a frequency distribution of current amplitude of current flowing through each power supply terminal of the integrated circuit is calculated from a power supply terminal current waveform of the integrated circuit, and the frequency that requires the EMI countermeasure For each of the power supply terminals of the integrated circuit, the power supply terminal through which the current having the largest current amplitude of the current component of the frequency requiring the EMI countermeasure is determined as the power supply terminal requiring the EMI countermeasure. The bypass capacitor arrangement information acquisition method according to supplementary note 12, characterized by:

(付記14)最適バイパスコンデンサ決定手段が、バイパスコンデンサ・データベース内のバイパスコンデンサの中から、前記EMI対策が必要な周波数の各々ごとに、前記EMI対策が必要な周波数でインピーダンスが最小となるバイパスコンデンサを最適バイパスコンデンサとして決定する最適バイパスコンデンサ決定工程を有することを特徴とする付記9〜13のいずれか一項に記載のバイパスコンデンサ配置情報取得方法。 (Supplementary Note 14) The optimum bypass capacitor determining means is a bypass capacitor that minimizes impedance at a frequency that requires the EMI countermeasure for each frequency that requires the EMI countermeasure from among the bypass capacitors in the bypass capacitor database. The method for obtaining bypass capacitor arrangement information according to any one of appendices 9 to 13, further comprising: an optimum bypass capacitor determination step for determining as an optimum bypass capacitor.

(付記15)前記最適バイパスコンデンサ決定手段では、前記EMI対策が必要な周波数の各々ごとに、前記バイパスコンデンサ・データベース内のバイパスコンデンサの前記EMI対策が必要な周波数でのインピーダンスを計算し、該計算したインピーダンスが最小のバイパスコンデンサを前記最適バイパスコンデンサとして決定することを特徴とする付記14記載のバイパスコンデンサ配置情報取得方法。 (Supplementary Note 15) The optimum bypass capacitor determination means calculates the impedance of the bypass capacitor in the bypass capacitor database at the frequency requiring the EMI countermeasure for each frequency requiring the EMI countermeasure. 15. The bypass capacitor arrangement information acquisition method according to appendix 14, wherein the bypass capacitor having the smallest impedance is determined as the optimum bypass capacitor.

本発明のバイパスコンデンサ配置情報取得装置の一実施形態の概念図である。It is a conceptual diagram of one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備えるバイパスコンデンサ・データベースの例を示す図である。It is a figure which shows the example of the bypass capacitor database with which one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention is provided. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備える電源端子電流波形保持手段が保持する電源端子電流波形及びEMI解析結果保持手段が保持するEMIノイズ解析結果の取得装置の一例の概念図である。FIG. 5 is a conceptual diagram of an example of an apparatus for acquiring a power supply terminal current waveform held by a power supply terminal current waveform holding unit and an EMI noise analysis result held by an EMI analysis result holding unit included in an embodiment of a bypass capacitor arrangement information acquisition apparatus of the present invention. is there. プリント基板の概念図である。It is a conceptual diagram of a printed circuit board. SIP(システム・イン・パッケージ)の多層配線基板の概念図である。It is a conceptual diagram of a multilayer wiring board of SIP (system in package). 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備えるEMIノイズ解析結果保持手段が保持するEMIノイズ解析結果の例を示す図である。It is a figure which shows the example of the EMI noise analysis result hold | maintained by the EMI noise analysis result holding | maintenance means with which one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention is provided. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備える電源端子電流波形保持手段が保持する電源端子電流波形の例を示す図である。It is a figure which shows the example of the power supply terminal current waveform which the power supply terminal current waveform holding means with which one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention is equipped hold | maintains. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備えるEMI対策電源端子決定手段が備える電流振幅計算部が計算した電流振幅周波数分布の例を示す図である。It is a figure which shows the example of the current amplitude frequency distribution which the current amplitude calculation part with which the EMI countermeasure power supply terminal determination means with which one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention is provided is provided. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態が備えるEMI対策電源端子決定手段が備える電流振幅抽出部が抽出した各電源端子の電流振幅の例を示す図である。It is a figure which shows the example of the current amplitude of each power supply terminal which the current amplitude extraction part with which the EMI countermeasure power supply terminal determination means with which one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention is provided is equipped. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態を使用したバイパスコンデンサの配置場所を説明するための図である。It is a figure for demonstrating the arrangement place of the bypass capacitor which uses one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention. 本発明のバイパスコンデンサ配置情報取得装置の一実施形態を使用したバイパスコンデンサの配置場所を説明するための図である。It is a figure for demonstrating the arrangement place of the bypass capacitor which uses one Embodiment of the bypass capacitor arrangement | positioning information acquisition apparatus of this invention. バイパスコンデンサのインピーダンスの周波数特性の例を示す図である。It is a figure which shows the example of the frequency characteristic of the impedance of a bypass capacitor.

符号の説明Explanation of symbols

1…特定対策周波数保持手段
2…EMIノイズ解析結果保持手段
3…EMI規格保持手段
4…EMI対策周波数決定手段
5…EMI対策周波数保持手段
6…EMI対策周波数算出部
7…EMI対策周波数出力部
8…電源端子電流波形保持手段
9…EMI対策電源端子決定手段
10…EMI対策電源端子番号・最適バイパスコンデンサ種類保持手段
11…電流振幅周波数分布計算部
12…電流振幅抽出部
13…EMI対策電源端子算出部
14…バイパスコンデンサ・データベース
15…最適バイパスコンデンサ決定手段
16…インピーダンス計算部
17…最適バイパスコンデンサ算出部
18…LSIモデル保持手段
19…電源端子電流波形取得手段
20…基板モデル保持手段
21…EMIノイズ解析手段
22…プリント基板
23…LSI
24…電源ピン
25…多層配線基板
26、27…LSI
28、29…電源パッド
30、31…ワイヤボンディング
32…電源ピン
33…バイパスコンデンサ
34…電源パッド
35…バイパスコンデンサ
DESCRIPTION OF SYMBOLS 1 ... Specific countermeasure frequency holding means 2 ... EMI noise analysis result holding means 3 ... EMI standard holding means 4 ... EMI countermeasure frequency determining means 5 ... EMI countermeasure frequency holding means 6 ... EMI countermeasure frequency calculating section 7 ... EMI countermeasure frequency output section 8 Power source terminal current waveform holding means 9 EMI countermeasure power terminal determining means 10 EMI countermeasure power terminal number / optimum bypass capacitor type holding means 11 Current amplitude frequency distribution calculating section 12 Current amplitude extracting section 13 EMI countermeasure power terminal calculating Unit 14 ... Bypass capacitor database 15 ... Optimum bypass capacitor determination means 16 ... Impedance calculation section 17 ... Optimum bypass capacitor calculation section 18 ... LSI model holding means 19 ... Power supply terminal current waveform acquisition means 20 ... Board model holding means 21 ... EMI noise Analysis means 22 ... printed circuit board 23 ... LSI
24 ... Power supply pin 25 ... Multilayer wiring board 26, 27 ... LSI
28, 29 ... Power supply pad 30, 31 ... Wire bonding 32 ... Power supply pin 33 ... Bypass capacitor 34 ... Power supply pad 35 ... Bypass capacitor

Claims (5)

バイパスコンデンサの配置を行うための情報を取得するバイパスコンデンサ配置情報取得装置であって、
基板が発生するEMIノイズの解析結果から、バイパスコンデンサの配置によるEMI対策が必要な周波数を決定するEMI対策周波数決定手段と、
前記EMI対策周波数決定手段が決定した前記EMI対策が必要な周波数及び集積回路の電源端子電流波形から、EMI対策が必要な電源端子を決定するEMI対策電源端子決定手段と、
を有することを特徴とするバイパスコンデンサ配置情報取得装置。
A bypass capacitor arrangement information acquisition device that acquires information for arranging a bypass capacitor,
EMI countermeasure frequency determining means for determining a frequency that requires EMI countermeasure by arrangement of a bypass capacitor from an analysis result of EMI noise generated by the substrate;
EMI countermeasure power supply terminal determining means for determining a power supply terminal requiring EMI countermeasure from the frequency required for the EMI countermeasure determined by the EMI countermeasure frequency determining means and the power supply terminal current waveform of the integrated circuit;
A bypass capacitor arrangement information acquisition device comprising:
前記EMI対策電源端子決定手段は、前記集積回路の電源端子電流波形から、前記集積回路の各電源端子に流れる電流の電流振幅の周波数分布を算出し、前記EMI対策が必要な周波数の各々ごとに、前記集積回路の電源端子のうち、前記EMI対策が必要な周波数の電流成分の電流振幅が最も大きな電流が流れる電源端子を前記EMI対策が必要な電源端子として決定すること
を特徴とする請求項1に記載のバイパスコンデンサ配置情報取得装置。
The EMI countermeasure power supply terminal determining means calculates the frequency distribution of the current amplitude of the current flowing through each power supply terminal of the integrated circuit from the power supply terminal current waveform of the integrated circuit, and for each frequency requiring the EMI countermeasure. The power supply terminal through which the current having the largest current amplitude of the current component of the frequency requiring the EMI countermeasure is determined as the power supply terminal requiring the EMI countermeasure among the power supply terminals of the integrated circuit. The bypass capacitor arrangement information acquisition device according to 1.
バイパスコンデンサ・データベース内のバイパスコンデンサの中から、前記EMI対策が必要な周波数の各々ごとに、前記EMI対策が必要な周波数でインピーダンスが最小となるバイパスコンデンサを最適バイパスコンデンサとして決定する最適バイパスコンデンサ決定手段を有すること
を特徴とする請求項1又は2に記載のバイパスコンデンサ配置情報取得装置。
Determining an optimum bypass capacitor for each of the bypass capacitors in the bypass capacitor database that determines the bypass capacitor having the minimum impedance at the frequency requiring the EMI countermeasure as the optimum bypass capacitor. The bypass capacitor arrangement information acquiring apparatus according to claim 1, further comprising: means.
バイパスコンデンサの配置を行うための情報を取得するバイパスコンデンサ配置情報取得方法であって、
コンピュータが有するEMI対策周波数決定手段が、基板が発生するEMIノイズの解析結果から、バイパスコンデンサの配置によるEMI対策が必要な周波数を決定するEMI対策周波数決定工程と、
前記コンピュータが有するEMI対策電源端子決定手段が、前記EMI対策周波数決定工程で決定した前記EMI対策が必要な周波数及び集積回路の電源端子電流波形から、EMI対策が必要な電源端子を決定するEMI対策電源端子決定工程と、
を有することを特徴とするバイパスコンデンサ配置情報取得方法。
A bypass capacitor arrangement information acquisition method for acquiring information for arranging a bypass capacitor,
An EMI countermeasure frequency determining means included in the computer determines from the analysis result of the EMI noise generated by the substrate an EMI countermeasure frequency determining step of determining a frequency that requires an EMI countermeasure by disposing a bypass capacitor;
The EMI countermeasure power supply terminal determining means of the computer determines the power supply terminal that requires EMI countermeasure from the frequency and the power supply terminal current waveform of the integrated circuit that require the EMI countermeasure determined in the EMI countermeasure frequency determining step. Power supply terminal determination step;
A bypass capacitor arrangement information acquisition method comprising:
前記EMI対策電源端子決定工程は、前記集積回路の電源端子電流波形から、前記集積回路の各電源端子に流れる電流の電流振幅の周波数分布を算出し、前記EMI対策が必要な周波数の各々ごとに、前記集積回路の電源端子のうち、前記EMI対策が必要な周波数の電流成分の電流振幅が最も大きな電流が流れる電源端子を前記EMI対策が必要な電源端子として決定する工程を有すること
を特徴とする請求項4に記載のバイパスコンデンサ配置情報取得方法。
The EMI countermeasure power supply terminal determining step calculates a frequency distribution of current amplitude of a current flowing through each power supply terminal of the integrated circuit from the power supply terminal current waveform of the integrated circuit, and for each frequency requiring the EMI countermeasure. A step of determining a power supply terminal through which a current having a maximum current amplitude of a current component having a frequency requiring the EMI countermeasure among the power supply terminals of the integrated circuit is determined as a power supply terminal requiring the EMI countermeasure. The bypass capacitor arrangement information acquisition method according to claim 4.
JP2004137352A 2004-05-06 2004-05-06 Bypass capacitor arrangement information acquisition apparatus and method Expired - Fee Related JP4453433B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004137352A JP4453433B2 (en) 2004-05-06 2004-05-06 Bypass capacitor arrangement information acquisition apparatus and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004137352A JP4453433B2 (en) 2004-05-06 2004-05-06 Bypass capacitor arrangement information acquisition apparatus and method

Publications (2)

Publication Number Publication Date
JP2005321864A JP2005321864A (en) 2005-11-17
JP4453433B2 true JP4453433B2 (en) 2010-04-21

Family

ID=35469128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004137352A Expired - Fee Related JP4453433B2 (en) 2004-05-06 2004-05-06 Bypass capacitor arrangement information acquisition apparatus and method

Country Status (1)

Country Link
JP (1) JP4453433B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5664649B2 (en) 2010-06-03 2015-02-04 株式会社村田製作所 Capacitor placement support method and capacitor placement support device
WO2012133496A1 (en) * 2011-03-29 2012-10-04 日本電気株式会社 Decoupling method, device for designing power supply line, and circuit board
JP2020143898A (en) * 2019-03-04 2020-09-10 日本電信電話株式会社 Common mode noise transmission path estimation device

Also Published As

Publication number Publication date
JP2005321864A (en) 2005-11-17

Similar Documents

Publication Publication Date Title
JP3501674B2 (en) Printed circuit board characteristic evaluation apparatus, printed circuit board characteristic evaluation method, and storage medium
KR101610724B1 (en) Simulation apparatus for estimating emi acceptable level of semiconductor level and method thereof
US20070057380A1 (en) Method for designing semiconductor apparatus, system for aiding to design semiconductor apparatus, computer program product therefor and semiconductor package
CN101533426B (en) Power supply noise analysis method, system and program for electronic circuit board
JP2006209590A (en) Electromagnetic field analysis device, analysis method, and analysis program
US6875920B2 (en) Semiconductor device and design support method of electronic device using the same
Yang et al. PCB PDN prelayout library for top-layer inductance and the equivalent model for decoupling capacitors
Ichikawa et al. Simulation of integrated circuit immunity with LECCS model
Leca et al. EMI measurements, modeling, and reduction of 32-Bit high-performance microcontrollers
Sjiariel et al. Power integrity simulation of power delivery network system
JP4169755B2 (en) Simulated measurement device for generated noise on electronic substrate and simulated measurement method for generated noise
JP4453433B2 (en) Bypass capacitor arrangement information acquisition apparatus and method
KR102028921B1 (en) Device for measuring integrated circuit current and method for measuring integrated circuit current using the device
US7882468B2 (en) Integrated circuit device evaluation device, evaluation method, and evaluation program
US6704680B2 (en) Method for decoupling capacitor optimization for a temperature sensor design
JP5304460B2 (en) Printed wiring board power circuit design apparatus, printed wiring board power circuit design method and program
JP3988623B2 (en) Electronic circuit characteristic analysis computer program and characteristic analysis method
JP4966697B2 (en) Electromagnetic interference noise analysis method and semiconductor integrated circuit
Goral et al. Power delivery network simulation methodology including integrated circuit behavior
Umekawa Simple modeling method of EMI simulation for PCB
Garben et al. Mid-frequency delta-I noise analysis of complex computer system boards with multiprocessor modules and verification by measurements
US20090112558A1 (en) Method for simultaneous circuit board and integrated circuit switching noise analysis and mitigation
JP4760622B2 (en) Electromagnetic radiation analysis apparatus, analysis method, and analysis program
JP4216088B2 (en) Apparatus and method for calculating the impedance of a circuit board
JP2007219667A (en) Resonance frequency calculation unit and resonance frequency calculation method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070312

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090722

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090728

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090925

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20091020

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091211

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100112

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100125

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130212

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140212

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees