JP2005160931A - Microcomputer for controlling game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a random number with high confidence without relying on the interval of a monitor cycle in a fixed period in a microcomputer for controlling a game machine, incorporating a random number circuit for generating a random number value to be used for the lottery of a jackpot, etc., in the game machine. <P>SOLUTION: The microcomputer for controlling the game machine includes the random number circuit and a random number fetching control circuit. The random number fetching control circuit is constituted to output a random number acquisition signal to the random number circuit and, at the same time, to output an interruption request signal for allowing a central processor to perform a random number processing to an interruption control circuit when an outer trigger signal is inputted from the outer part of the microcomputer for controlling the game machine. Accordingly, high real-time property is obtained and the random number with high confidence is provided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a microcomputer used for controlling a gaming machine represented by a pachinko machine, a pachislot machine, etc., and more particularly to a gaming machine controlling microcomputer having a built-in random number circuit used for jackpot lottery.

  The pachinko gaming machine has a display device that can variably display multiple types of symbols, so that the batted ball that is driven into the game area passes through the symbol operating gate, which is a specific winning opening, so that the variably display is started. It is configured. In addition, the swivel-type gaming machine called a pachislot is provided with a display device capable of variably displaying a plurality of types of symbols, and is configured to start variability display by pressing a start lever. In both pachinko and pachislot machines, when this variable display stops in accordance with a predetermined combination of symbols, it becomes a big hit, a predetermined game value is given to the player, and a large amount of game balls and medals can be paid out It becomes.

  The gaming machine uses a random number for the jackpot lottery. Regarding the timing for acquiring the random number value, as shown in FIG. 6, the presence or absence of a random number capture signal, that is, the pachinko There was a method for acquiring a random value with software processing that checks whether there is an input signal from a sensor of a specific prize opening or a switch of a start lever of a pachislot, and if there is a signal, takes a random value.

Further, as shown in FIG. 7, when a signal from a sensor or switch is input to the counter value storage circuit, the counter value is read from the counter circuit that counts a clock signal or the like, and this value is referred to as a hardware random number. There was also a way to get it as a numerical value.
JP 2003-263309 A JP 2001-120753 A

  Conventionally, however, the timing for fetching random values depends on a constant monitoring cycle with software processing. In particular, random number acquisition processing has a high priority, so if it is performed in the main processing, management time management is performed so that software random numbers are updated when software development is performed, and hardware random numbers are read in a timely manner. It was necessary to clarify. Also, in acquiring hardware random numbers using a counter circuit, a bus line for transmitting random value data related to jackpots, which is important information for gaming machines, existed outside the microcomputer for controlling gaming machines. In some cases, fraudulent acts such as falsification of random number data and forgery of random number generation circuits were performed.

  Claim 1 of the present invention generates a random number value by storing means for storing a game machine control program, a central processing unit for controlling the game machine by executing the game machine control program stored in the storage means A game comprising a random number circuit, a random number capture control circuit that outputs a random number capture signal for storing a random number value, and an interrupt control circuit that performs an interrupt process on the central processing unit when an interrupt request signal is input In the machine control microcomputer, the random number circuit includes a random number generation unit that generates a random value, a random value storage unit that stores a random value generated by the random number generation unit, and a random number storage unit that receives the random number value by inputting a read signal. An output data control unit that outputs a random number value in the numerical value storage unit, and the random number value capture control circuit receives the external trigger signal from the outside of the gaming machine control microcomputer. And outputting an interrupt request signal for performing a random process with respect to the interrupt control circuit simultaneously outputs the random number acquisition signal to the value storage unit.

  Claim 2 of the present invention generates a random number value, a storage means storing a game machine control program, a central processing unit for controlling the game machine, executing the game machine control program stored in the storage means A game comprising a random number circuit, a random number capture control circuit that outputs a random number capture signal for storing a random number value, and an interrupt control circuit that performs an interrupt process on the central processing unit when an interrupt request signal is input In the machine control microcomputer, the random number circuit includes a random number generation unit that generates a random value, a random value storage unit that stores a random value generated by the random number generation unit, and a random number storage unit that receives the random number value by inputting a read signal. An output data control unit that outputs a random number value in a numerical value storage unit; and a setting unit that sets initial information for the random number generation unit. Simultaneously outputting a random number capture signal to the random value storage unit when a signal input permission unit permitting the input of an external trigger signal from outside the control microcomputer and a signal output from the signal input permission unit are input And a signal control unit that outputs an interrupt request signal for performing random number processing on the interrupt control circuit.

  It is characterized by providing a microcomputer for gaming machine control with high real-time characteristics that does not depend on a monitoring program for random number acquisition, and by incorporating a bus line related to random number inside, the circuit becomes simple and the number of parts is reduced. It is possible to provide a microcomputer for controlling a gaming machine that can increase the confidentiality of random numbers because it is difficult to tamper with random numbers from the outside.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a gaming machine control microcomputer 1 according to the first embodiment of the present invention. The ROM 3 is a storage means for storing a game machine control program (user program) created by a game machine manufacturer, a program for starting a chip when the power is turned on, a security check program, and the like. The RAM 4 is used as a work area for programs stored in the ROM 3. The CPU 2 is a central processing unit that controls the gaming machine according to a program stored in the ROM 3.

  The timer circuit 5 incorporates n (for example, 4) m-bit (for example, 8 and 16-bit) counters and various control registers, and is a circuit capable of making a real-time interrupt request and measuring time by setting a user program. .

The reset control circuit 6 is a circuit that resets the CPU 2 when a reset signal is input from the outside of the gaming machine control microcomputer or when a program runaway detection signal is input.
The interrupt control circuit 7 is a circuit that controls an interrupt request from the outside and an interrupt request from a built-in peripheral circuit.

The random number capture control circuit 8 is a circuit that outputs a random number capture signal and a random number processing interrupt signal when an external trigger signal is input from the outside of the gaming machine control microcomputer.
The random number circuit 9 is a circuit that generates a random number. Details of the random number acquisition control circuit 8 and the random number circuit 9 will be described later with reference to FIG.

The external bus control circuit 10 is a bus interface that strengthens the interface function between the external bus and the internal bus of the chip and the direction control and drive capability of the address bus, data bus, and control signals.
The clock circuit 11 divides the clock input from the clock input terminal (corresponding to the EXTAL terminal) by an arbitrary division ratio (for example, divide by 4 or the like), and supplies a clock signal to the CPU and each internal circuit as an internal system clock. Is a circuit for supplying The generated clock is output to the outside from a clock output terminal (corresponding to the E terminal).
The address decoding circuit 12 is a decoding circuit for an external device of a user program, and outputs a chip select signal.

  This figure shows a watchdog timer circuit that generates a time-out signal when a program runaway occurs, a non-designated area run prohibition circuit that monitors whether the user program is executing correctly within the address range specified, and verification Although a verification circuit that is connected to an external device such as a tester to check the authenticity of the microcomputer is omitted, these circuits may be added if necessary.

  FIG. 2 is a block diagram showing the configuration of the random number fetch control circuit 8 and the random number circuit 9 incorporated in the gaming machine control microcomputer 1 of the present invention. The setting unit 9a gives the random value generation unit 9b a value for obtaining an initial value of the random number (for example, a fixed value arbitrarily set in advance by a game machine control microcomputer developer such as 1, 2, 3 or the chip-specific value). Identification number value (ID number), RAM value, RAM addition value obtained by adding RAM values, values for obtaining different random number initial values for each chip), random number value update cycle, etc. This is a circuit for setting initial information. The random value generation unit 9b is a circuit that generates a random value based on information from the setting unit 9a, and includes a circuit that generates a random value such as an M-sequence random number. The random value storage unit 9c is a register that takes in the random value generated from the random value generation unit 9b, and takes in the random value when the random number acquisition signal from the random number acquisition control circuit 8 is input. The output data control unit 9d outputs the random number value stored in the random value storage unit 9c when the random value storage unit read signal is input.

  The random number acquisition control unit 8a in the random number acquisition control circuit 8 outputs a random number acquisition signal to the random value storage unit 9c when the external trigger signal is input, and at the same time, the CPU 2 performs random number processing on the interrupt control circuit 7. A random number processing interrupt signal is output to execute

  FIG. 3 is a time chart showing the fetching of random values according to the present invention. In this embodiment, since it is assumed that a 16-bit random value is generated by an 8-bit microprocessor, the random value storage read signal is converted into a random value (upper) read signal and a random value (lower). The description will be divided into two read signals. When a random number fetch signal is input at point A, the random value R1 of the random number generation unit at that time is stored in the random value storage unit. When a random value (upper) read signal is input, an upper flag is set at point C. When a random number (lower) read signal is input, a lower flag is set at point F, and a flag clear signal is also generated. By this flag clear signal, the upper flag and the lower flag are cleared.

  In order to avoid the unstable operation of changing the random number value in the random number value storage unit while reading the random number value, do not store a new random number value even if an external interrupt signal is input while reading the random number value. To do. That is, the value in the random number storage unit is not changed until the upper flag and the lower flag are cleared by the flag clear signal. For example, even when a random value fetch signal is input at point D, the value is not cleared at point E, so the value of the random number storage unit is not fetched at point E.

  FIG. 4 is a block diagram of the random number fetch control circuit 108 and the random number circuit 109 of the gaming machine control microcomputer according to the second embodiment of the present invention. The signal input permission unit 108b in the random number acquisition control circuit 108 permits the input of the external trigger signal when the signal input permission signal from the setting unit 109a in the random number circuit 109 is input. When the input of the external trigger signal is permitted, the external trigger signal is input to the signal control unit 108c, and the signal control unit 108c outputs the external trigger signal to the random value storage unit 109c as a random number acquisition signal and simultaneously performs random number processing. An interrupt signal is output. If the random number storage unit 109c receives a random number capture signal, the random value storage unit 109c captures the random value generated from the random value generation unit 109b. When the input of the external trigger signal is not permitted by the setting unit 109a, the random value storage unit 109c generates a random value when a random value storage unit read signal is input by an arbitrary software process. The random number generated from the unit 109b is taken in.

  When the input of the external trigger signal is permitted by the signal input permission unit 108b, the timing of taking in the random number value by the software is the same as that in FIG. On the other hand, the case where the numerical value storage unit 109c takes in the random number by the random value storage unit read signal is shown in the time chart of FIG. When a random value (upper) read signal is input at point A ′ in FIG. 5, the random value R11 of the random value generator is stored in the random value storage. When a random value (upper) read signal is input, an upper flag is set at point C. When a random number (lower) read signal is input, a lower flag is set at point F, and a flag clear signal is also generated. By this flag clear signal, the upper flag and the lower flag are cleared. In this time chart, the random number value (upper) read signal is input when the random number value (upper) read signal is input, but the random number (upper) read signal or random number (lower) read signal is input at the storage timing. When it is done.

  The present invention can be modified within a range that can be assumed by those skilled in the art other than the above-described embodiments. For example, although the external trigger signal input terminal is set as a dedicated terminal, the * INT terminal or the like may be used as a terminal for inputting an external trigger signal without providing a dedicated terminal. Although the random number is exemplified by 2 bytes, it may be 1 byte or 3 bytes or more. The random number generator may generate a physical random number obtained from a thermal noise generating element or the like.

  It is possible to provide a gaming machine control microcomputer incorporating a random number circuit that can be used in gaming machines such as pachinko machines and pachislot machines with a jackpot effect. Further, the microcomputer of the present invention can be used for things that require random values in addition to pachinko and pachislot control, such as simulation calculations using random values and encryption of data using random values. .

It is a block diagram of the microcomputer for game machine control regarding Example 1 of this invention. It is a block diagram of a random number acquisition control circuit and a random number circuit built in the microcomputer for gaming machine control according to the first embodiment of the present invention. It is a time chart showing taking in of the random number value regarding Example 1 of the present invention. It is a block diagram of a random number acquisition control circuit and a random number circuit built in the microcomputer for gaming machine control according to the second embodiment of the present invention. It is a time chart showing taking in of the random number value regarding Example 2 of the present invention. It is a flowchart showing the conventional software random number acquisition. It is a conceptual diagram showing the conventional hardware random number acquisition.

Explanation of symbols

1,201 Microcomputer for game machine control 2 CPU
3 ROM
4 RAM
5 Timer circuit 6 Reset control circuit 7 Interrupt control circuit 8, 108 Random number capture control circuit 8a Random number capture control unit 108b Signal input permission unit 108c Signal control unit 9, 109 Random number circuit 9a, 109a Setting unit 9b, 109b Random value Generation unit 9c, 109c Random value storage unit 9d, 109d Output data control unit 10 External bus control circuit 11 Clock circuit 12 Address decode circuit 220 Counter value storage circuit 221 Counter circuit

Claims (2)

A storage means for storing a game machine control program, a central processing unit for executing the game machine control program stored in the storage means and controlling the game machine, a random number circuit for generating a random value, and a random value storage In a gaming machine control microcomputer comprising a random number fetch control circuit for outputting a random number fetch signal for performing an interrupt control circuit for interrupting the central processing unit by inputting an interrupt request signal,
The random number circuit includes: a random number generation unit that generates a random value; a random value storage unit that stores a random value generated by the random number generation unit; and a random value stored in the random value storage unit by input of a read signal of the random value storage unit And an output data control unit for outputting
When the external trigger signal is input from the outside of the gaming machine control microcomputer, the random value acquisition control circuit outputs a random number acquisition signal to the random value storage unit and at the same time performs random number processing on the interrupt control circuit. A microcomputer for gaming machine control, characterized by outputting an interrupt request signal for performing. A storage means for storing a game machine control program, a central processing unit for executing the game machine control program stored in the storage means and controlling the game machine, a random number circuit for generating a random value, and a random value storage In a gaming machine control microcomputer comprising a random number fetch control circuit for outputting a random number fetch signal for performing an interrupt control circuit for interrupting the central processing unit by inputting an interrupt request signal,
The random number circuit includes: a random number generation unit that generates a random value; a random value storage unit that stores a random value generated by the random number generation unit; and a random value stored in the random value storage unit by input of a read signal of the random value storage unit And an output data control unit for outputting and a setting unit for setting initial information for the random number generation unit,
The random value acquisition control circuit receives a signal input permission unit that permits input of an external trigger signal from the outside of the gaming machine control microcomputer by a signal from the setting unit, and a signal output from the signal input permission unit. And a signal control unit for outputting an interrupt request signal for performing random number processing to the interrupt control circuit at the same time as outputting a random number capture signal to the random value storage unit. Your microcomputer.

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