JP2005159575A - Surface-mounted piezoelectric oscillator - Google Patents

Surface-mounted piezoelectric oscillator Download PDF

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JP2005159575A
JP2005159575A JP2003392989A JP2003392989A JP2005159575A JP 2005159575 A JP2005159575 A JP 2005159575A JP 2003392989 A JP2003392989 A JP 2003392989A JP 2003392989 A JP2003392989 A JP 2003392989A JP 2005159575 A JP2005159575 A JP 2005159575A
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wiring board
printed wiring
multilayer printed
piezoelectric oscillator
terminal
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JP4239798B2 (en
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Yoji Nagano
洋二 永野
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Toyo Communication Equipment Co Ltd
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Toyo Communication Equipment Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface-mounted piezoelectric oscillator which deals with miniaturization and is provided with a means for suppressing the influence of a floating capacitance caused by a monitor electrode pad and a coupling phenomenon. <P>SOLUTION: The surface-mounted piezoelectric oscillator is provided with a first multilayer printed wiring board provided with an uneven portion on its top surface, a second multilayer printed wiring board to be fixed along the lower surface peripheral edge of the first multilayer printed wiring board, a piezoelectric vibrating element hermetically sealed in the uneven portion, and a circuit element mounted on the bottom surface of the first multilayer printed wiring board. In this oscillator, a monitor electrode for input/output inspection of the piezoelectric vibrating element is disposed on the region of the lower surface of the first multilayer printed wiring board to which the second multilayer printed wiring board abuts. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、表面実装型圧電発振器に関し、特にセラミックパッケージに実装した圧電振動素子の周波数を確認するための機能端子の構造に起因する種々の不具合を解決した表面実装型圧電発振器に関するものである。   The present invention relates to a surface mount piezoelectric oscillator, and more particularly to a surface mount piezoelectric oscillator that solves various problems caused by the structure of a functional terminal for confirming the frequency of a piezoelectric vibration element mounted on a ceramic package.

携帯電話機等の移動体通信機器の普及に伴う低価格化及び小型化の急激な進展により、これらの通信機器に使用される水晶振動子や水晶発振器に対しても低価格化、小型化の要求が高まっている。   Due to the rapid progress in price reduction and miniaturization accompanying the popularization of mobile communication devices such as mobile phones, there is a demand for price reduction and miniaturization of crystal units and crystal oscillators used in these communication devices. Is growing.

前述する要求を満足した従来の表面実装型水晶発振器として、例えば特開2003−163540号公報で開示されたようなものがあり、図5(a)はそのパッケージの構成を示す縦断面図、図5(b)はアンダーフィル樹脂を省略した状態の下面図である。
従来の表面実装型水晶発振器100は、図5(a)に示すように、水晶振動素子101と、発振回路および温度補償回路を構成するICチップ102と、複数のセラミック絶縁層からなる積層体であって上面に前記水晶振動素子101を収容するための第1のキャビティー部103aを備えると共に下面に前記ICチップ102を収容するための第2のキャビティー部103bを備える略矩形状の容器体103と、前記第1のキャビティー部103aの開口を閉止するための蓋体104と、を備えている。前記第1のキャビティー部103aの内底面に形成したパッド電極106に導電性接着剤を介して前記水晶振動素子101の一方端部で片持ち支持すると共に電気的な接続をした上で前記蓋体104によりキャビティー部103aを気密封止し、前記第2のキャビティー部103bの内底面(天井面)に配設するIC電極パッド111に導体バンプを介して前記ICチップ102をフリップチップ実装した上でアンダーフィル樹脂105で封止する構造を有する。
As a conventional surface-mount type crystal oscillator that satisfies the above-mentioned requirements, there is one disclosed in, for example, Japanese Patent Laid-Open No. 2003-163540, and FIG. 5A is a longitudinal sectional view showing the configuration of the package. FIG. 5B is a bottom view of the state in which the underfill resin is omitted.
As shown in FIG. 5A, a conventional surface-mount type crystal oscillator 100 is a laminated body composed of a crystal resonator element 101, an IC chip 102 that constitutes an oscillation circuit and a temperature compensation circuit, and a plurality of ceramic insulating layers. A substantially rectangular container body having a first cavity portion 103a for accommodating the crystal resonator element 101 on the upper surface and a second cavity portion 103b for accommodating the IC chip 102 on the lower surface. 103 and a lid 104 for closing the opening of the first cavity portion 103a. The lid electrode 106 formed on the inner bottom surface of the first cavity portion 103a is cantilevered at one end of the crystal resonator element 101 via a conductive adhesive and electrically connected to the lid. The cavity portion 103a is hermetically sealed by the body 104, and the IC chip 102 is flip-chip mounted on the IC electrode pad 111 disposed on the inner bottom surface (ceiling surface) of the second cavity portion 103b via a conductor bump. In addition, the structure is sealed with the underfill resin 105.

前記第2のキャビティー部103bの開口形状は、図5(b)に示すように、前記容器体103の長手方向に対向する辺部夫々の隅側に配設する外部端子電極112間の領域に張り出す張出部110を有する略十字状形状であるとともに、一対の対向する前記張出部110(の内底面)に前記水晶振動素子と電気的に接続するモニタ電極パッド113a及び113bを配置することで対をなす該モニタ電極パッドを互いに最も離した状態にすることができ、モニタ電極パッド同士間の浮遊容量の影響を抑えて前記水晶振動素子の温度特性を安定且つ確実に測定することが可能となる。
特開2003−163540号公報
As shown in FIG. 5B, the opening shape of the second cavity portion 103b is an area between the external terminal electrodes 112 disposed on the corners of the side portions facing the longitudinal direction of the container body 103. Monitor electrode pads 113a and 113b that are electrically connected to the crystal resonator element are disposed on a pair of opposed protruding portions 110 (inner bottom surfaces). By doing so, the paired monitor electrode pads can be placed in the most separated state, and the temperature characteristics of the crystal resonator element can be measured stably and reliably while suppressing the influence of stray capacitance between the monitor electrode pads. Is possible.
JP 2003-163540 A

近年では水晶発振器の更なる小型化への要求が高まっており、水晶発振器の(平面方向)外形寸法が2.0×2.5mmからそれ以下の大きさへと移行しつつある。そのため、小型化に対応した容器体(小型容器体)が有する(前記ICチップとのクリアランスを考慮しつつ可能な限り小型化した)前記張出部(及び前記第2のキャビティー部)では、前記各モニタ電極パッドを互いに最も離した状態にしたとしても、モニタ電極パッド同士の間隙の距離が短くなる(狭小になる)ため該モニタ電極パッド同士間の浮遊容量の影響を抑止することが極めて困難となる。   In recent years, demands for further miniaturization of crystal oscillators have increased, and the external dimensions of crystal oscillators (in the planar direction) are shifting from 2.0 × 2.5 mm to smaller sizes. Therefore, in the overhanging part (and the second cavity part) that the container body (small container body) corresponding to the miniaturization has (made as small as possible in consideration of the clearance with the IC chip), Even when the monitor electrode pads are separated from each other, the distance between the monitor electrode pads is shortened (decreased), so that the influence of stray capacitance between the monitor electrode pads can be extremely suppressed. It becomes difficult.

さらに不都合なことに前記ICチップの小型化が進んでおらず、(小型化に対応していない)従来の前記ICチップ及び前記小型容器体を用いて小型化への要求に対応しなければならない。ここで、図5(b)に示す前記容器体103を前記小型容器体と仮定すると共に同図を参酌することで、従来の水晶発振器が有する構造で小型化への要求に対応した場合に発生する問題点について説明する。小型容器体103において、一対の前記モニタ電極パッド113a及び113bを互いに最も離した状態にするという仕様(引用発明)を満足させると、図5(b)に示すように、前記小型容器体103の配線パターンの引き回し、特に前記ICチップ102が有する水晶接続(入力)端子に対応するIC電極パッド111aと前記モニタ電極パッド113aとを電気的に接続する配線パターン121が前記ICチップ102の真下に配設、即ち該配線パターン121と前記ICチップが有する発振回路とが対向配置することとなり、両者間においてカップリング現象が生じて水晶発振器の発振周波数に影響を与える虞があるという問題が発生していた。   Further unfavorably, the IC chip has not been miniaturized, and the demand for miniaturization must be met using the conventional IC chip and the small container body (not compatible with miniaturization). . Here, it is assumed that the container body 103 shown in FIG. 5 (b) is the small container body, and taking into consideration the same figure, this occurs when the conventional crystal oscillator has a structure that meets the demand for miniaturization. The problem to be described will be described. When the specification (cited invention) in which the pair of monitor electrode pads 113a and 113b are separated from each other in the small container body 103 is satisfied, as shown in FIG. A wiring pattern 121 for electrically connecting the IC electrode pad 111a corresponding to the crystal connection (input) terminal of the IC chip 102 and the monitor electrode pad 113a is arranged directly under the IC chip 102. In other words, the wiring pattern 121 and the oscillation circuit included in the IC chip are arranged to face each other, and there is a problem that a coupling phenomenon may occur between the two and affect the oscillation frequency of the crystal oscillator. It was.

つまり解決しようとする問題点は、小型化に対応し、且つモニタ電極パッドに起因する浮遊容量の影響及びカップリング現象を抑止する手段を備えた表面実装型圧電発振器を提供することができない点である。   In other words, the problem to be solved is that it is not possible to provide a surface-mount piezoelectric oscillator that can cope with downsizing and has means for suppressing the influence of the stray capacitance caused by the monitor electrode pad and the coupling phenomenon. is there.

上記課題を解決するために本発明に係わる請求項1記載の発明は、上面に凹部を備える第1の多層プリント配線基板と、該第1の多層プリント配線基板の下面の周縁に沿って固着される第2の多層プリント配線基板と、前記凹部に密閉封入された圧電振動素子と、前記第1の多層プリント配線基板の下面に実装された回路素子と、を備えた表面実装型圧電発振器であって、前記圧電振動素子の入出力検査用モニタ端子を前記第2の多層プリント配線基板が当接する前記第1の多層プリント配線基板の下面の領域に配設したことを特徴とする。   In order to solve the above-mentioned problem, the invention according to claim 1 according to the present invention is fixed along a peripheral edge of a first multilayer printed wiring board having a concave portion on an upper surface and a lower surface of the first multilayer printed wiring board. And a circuit element mounted on the lower surface of the first multilayer printed wiring board, and a second multilayer printed wiring board that is hermetically sealed in the recess. The input / output inspection monitor terminal of the piezoelectric vibration element is disposed in a region of the lower surface of the first multilayer printed wiring board in contact with the second multilayer printed wiring board.

本発明に係わる請求項2記載の発明は、請求項1において、前記第2の多層プリント配線基板の前記モニタ端子と対向する箇所にシールド膜を配設したことを特徴とする。   A second aspect of the present invention according to the present invention is characterized in that, in the first aspect, a shield film is disposed at a location facing the monitor terminal of the second multilayer printed wiring board.

本発明に係わる請求項3記載の発明は、請求項2において、前記モニタ端子を前記第1の多層プリント配線基板下面の同一辺部に配設したことを特徴とする。   A third aspect of the present invention according to the present invention is characterized in that, in the second aspect, the monitor terminal is disposed on the same side of the lower surface of the first multilayer printed wiring board.

本発明に係わる請求項4記載の発明は、請求項3において、前記第1の多層プリント配線基板下面の同一辺部の両隅に配設する外部端子のいずれか一方がグランド外部端子であることを特徴とする。   According to a fourth aspect of the present invention, in the third aspect, any one of the external terminals disposed at both corners of the same side of the lower surface of the first multilayer printed wiring board is a ground external terminal. It is characterized by.

本発明に係わる請求項5記載の発明は、請求項4において、前記シールド膜の一部が前記グランド外部端子と重複したことを特徴とする。   According to a fifth aspect of the present invention, in the fourth aspect, a part of the shield film overlaps with the ground external terminal.

本発明は、前記第1及び第2の多層プリント配線基板を用いることで前記モニタ端子を最適位置に設置することが可能となり、さらに該モニタ端子を覆うシールド膜を前記第2の多層プリント配線基板に配設することにより、モニタ電極端子に起因する浮遊容量の影響及びカップリング現象を抑止することが可能にするという効果を有する。   The present invention makes it possible to install the monitor terminal at an optimum position by using the first and second multilayer printed wiring boards, and further, a shield film covering the monitor terminal is provided as the second multilayer printed wiring board. By disposing, the effect of stray capacitance caused by the monitor electrode terminal and the coupling phenomenon can be suppressed.

以下、図示した本発明の実施の形態に基づいて、本発明を詳細に説明する。   Hereinafter, the present invention will be described in detail based on the illustrated embodiment of the present invention.

図1(a)は本発明の第1の実施形態の表面実装型圧電発振器としての水晶発振器の構成を示す縦断面図、図1(b)は封止樹脂及び環状基板を省略した状態の下面図、図1(c)は第1の実施形態に係わる環状基板の下面図である。
第1の実施形態の水晶発振器(TCXO)10は、略矩形状のATカット水晶基板と該水晶基板の両主面に配設する励振電極(不図示)と該励振電極夫々から長手方向の一方端部に延在するリード電極(不図示)とを備える水晶振動素子1と、発振回路および温度補償回路を構成する回路素子、例えばICチップ2と、上面に前記水晶振動素子1を収容するための凹部(キャビティー部)3aを備えると共に平坦状の下面の略中央に前記ICチップ2を実装するための接続端子6を備える略矩形状のセラミックパッケージ(第1の多層プリント配線基板)3と、前記凹部3aを閉止するための金属蓋4と、前記セラミックパッケージ3の下面の周縁に沿って固着される環状基板(第2の多層プリント配線基板)5と、を備えている。
前記セラミックパッケージ3の下面、特に四隅近傍には内部導体18を介して前記水晶振動素子1及び前記ICチップ2と電気的に接続する外部入出力用端子電極としての機能を有する外部端子15が、前記セラミックパッケージ3の長手方向に対向する辺部の略中央には前記水晶振動素子1と電気的に接続する2個の入出力検査用モニタ端子(モニタ電極パッド)14が配設されている。該各モニタ端子14は前記セラミックパッケージ3の下面において互いに最も離した状態にあることから、両者間の浮遊容量の影響を抑止することが可能となる。
前記環状基板5は、その上面に前記各外部端子15に電気的且つ機械的に対応する内部端子16を備えると共に、内部導体(不図示)を介して下面四隅近傍に前記各内部端子16に電気的に対応する実装端子17(前記TCXO10における外部接続用電極パッドとなる。)を備えている。
FIG. 1A is a longitudinal sectional view showing a configuration of a crystal oscillator as a surface-mounted piezoelectric oscillator according to a first embodiment of the present invention, and FIG. 1B is a bottom view in a state where a sealing resin and an annular substrate are omitted. FIG. 1 and FIG. 1C are bottom views of the annular substrate according to the first embodiment.
The crystal oscillator (TCXO) 10 according to the first embodiment includes a substantially rectangular AT-cut quartz substrate, excitation electrodes (not shown) disposed on both main surfaces of the quartz substrate, and one longitudinal direction from each of the excitation electrodes. To accommodate the crystal resonator element 1 having a lead electrode (not shown) extending at the end, a circuit element constituting an oscillation circuit and a temperature compensation circuit, for example, an IC chip 2, and the crystal resonator element 1 on the upper surface. A substantially rectangular ceramic package (first multilayer printed wiring board) 3 having a connection terminal 6 for mounting the IC chip 2 at the approximate center of the flat bottom surface, And a metal lid 4 for closing the recess 3a, and an annular substrate (second multilayer printed wiring board) 5 fixed along the peripheral edge of the lower surface of the ceramic package 3.
An external terminal 15 having a function as an external input / output terminal electrode electrically connected to the crystal resonator element 1 and the IC chip 2 via an internal conductor 18 on the lower surface of the ceramic package 3, particularly in the vicinity of the four corners, Two input / output inspection monitor terminals (monitor electrode pads) 14 that are electrically connected to the crystal resonator element 1 are disposed at substantially the center of the side portion of the ceramic package 3 facing in the longitudinal direction. Since each of the monitor terminals 14 is in the most separated state on the lower surface of the ceramic package 3, the influence of the stray capacitance between them can be suppressed.
The annular substrate 5 is provided with internal terminals 16 electrically and mechanically corresponding to the external terminals 15 on the upper surface, and electrically connected to the internal terminals 16 in the vicinity of the bottom corners via internal conductors (not shown). Corresponding mounting terminals 17 (which serve as external connection electrode pads in the TCXO 10).

前記凹部3aの内底面に形成した前記パッド電極7に導電性接着剤11を介して前記水晶振動素子1の一方端部(前記リード電極)で片持ち支持すると共に電気的な接続し、前記モニタ端子14を介して外部の周波数調整装置(不図示)で前記水晶振動素子1の周波数を測定し、蒸着等により該水晶振動素子1の発振周波数を所定値に調整する。周波数調整を終えた前記水晶振動素子1を収容する前記凹部3aを前記金属蓋4により気密封止する。前記接続端子6に導体バンプ12を介して前記ICチップ2をフリップチップ実装し、前記セラミックパッケージ3の下面の周縁、換言すれば前記モニタ端子14及び前記外部端子15を覆うように前記環状基板5を載置すると共に前記外部端子15と該各外部端子15に対応する前記内部端子16とを電気的且つ機械的に接続、例えばはんだ接合した上で前記ICチップ2を封止樹脂(アンダーフィル樹脂)13で封止する構造を有する。なお前記ICチップ2のフリップチップ実装部の信頼性(ヒートサイクル試験等)が保証されるのであれば前記封止樹脂13を省略しても構わない。   The pad electrode 7 formed on the inner bottom surface of the recess 3a is cantilevered and electrically connected to one end portion (the lead electrode) of the quartz crystal vibration element 1 via a conductive adhesive 11, and the monitor The frequency of the crystal resonator element 1 is measured by an external frequency adjusting device (not shown) via the terminal 14, and the oscillation frequency of the crystal resonator element 1 is adjusted to a predetermined value by vapor deposition or the like. The concave portion 3 a for accommodating the crystal resonator element 1 whose frequency has been adjusted is hermetically sealed by the metal lid 4. The IC chip 2 is flip-chip mounted on the connection terminal 6 via the conductor bump 12, and the annular substrate 5 is covered so as to cover the peripheral edge of the lower surface of the ceramic package 3, in other words, the monitor terminal 14 and the external terminal 15. And the external terminals 15 and the internal terminals 16 corresponding to the external terminals 15 are electrically and mechanically connected, for example, soldered, and then the IC chip 2 is sealed with a sealing resin (underfill resin). ) 13 for sealing. The sealing resin 13 may be omitted if the reliability (heat cycle test or the like) of the flip chip mounting portion of the IC chip 2 is guaranteed.

さらに、前記セラミックパッケージ3の配線パターンの引き回し、特に前記ICチップ2が有する水晶接続(入力)端子に対応する接続端子と前記モニタ端子14とを電気的に接続する配線パターンが前記ICチップ2の真下に配設、即ち該配線パターンと前記ICチップ2が有する発振回路とが対向配置する場合や前記TCXO10の更なる小型化、低背化への要求に対応した場合などには、前記環状基板5を構成する任意の互いに重なり合う絶縁層同士間にシールド膜20を配設し該シールド膜20で前記各モニタ端子14を覆うと共にシールド膜20を接地する(グランド電位)ことでモニタ端子14及び前記ICチップ2が有する発振回路間におけるカップリング現象を抑止することが可能となる。   Further, the wiring pattern of the ceramic package 3, particularly the wiring pattern for electrically connecting the connection terminal corresponding to the crystal connection (input) terminal of the IC chip 2 and the monitor terminal 14, is provided on the IC chip 2. When the wiring board and the oscillation circuit included in the IC chip 2 are arranged opposite to each other, or when the TCXO 10 meets the demand for further downsizing and lowering the height, the annular substrate is used. 5, a shield film 20 is disposed between any mutually overlapping insulating layers constituting 5, and each of the monitor terminals 14 is covered with the shield film 20 and the shield film 20 is grounded (ground potential). It becomes possible to suppress the coupling phenomenon between the oscillation circuits of the IC chip 2.

図2(a)は本発明の第2の実施形態の表面実装型圧電発振器としての水晶発振器の封止樹脂及び環状基板を省略した状態の下面図、図2(b)は第2の実施形態に係わる環状基板の下面図である。
第2の実施形態の水晶発振器が第1の実施形態と異なる点は、前記モニタ端子を前記セラミックパッケージの一方辺部に併設した点にある。
前記TCXO10では前記各モニタ端子14を前記セラミックパッケージ3の下面の長手方向に対向する辺部(即ち短辺部)の略中央に設置したが、例えば図2(a)に示すように、セラミックパッケージ23の下面の一方の短辺部(同図における左側短辺部)に沿って前記各モニタ端子24を併設したとしても前記シールド膜が有するシールド効果により前記浮遊容量の影響を抑止することは可能である。さらに望ましくは、例えば図2(b)に示すように、前記セラミックパッケージ23の下面の一方の短辺部側に配設する一方の前記外部端子(図2(a)における左側短辺部の下側)が前記ICチップ2が有するGND端子と電気的に接続する前記外部端子(グランド外部端子)25dであって、該グランド外部端子25dと重複する(図2(b)中のD部)ようにシールド膜30を配設することで前記浮遊容量の影響を更に抑止することが可能となる。なお前記シールド膜30が前記各モニタ端子24を覆うと共に、該シールド膜20を接地させることは言うまでもない。また前記各モニタ端子24を前記セラミックパッケージ23の下面の長辺部側に沿って併設しても構わない。
FIG. 2A is a bottom view of the crystal oscillator as the surface-mounted piezoelectric oscillator according to the second embodiment of the present invention in which the sealing resin and the annular substrate are omitted, and FIG. 2B is the second embodiment. It is a bottom view of the annular substrate concerning.
The crystal oscillator of the second embodiment is different from the first embodiment in that the monitor terminal is provided on one side of the ceramic package.
In the TCXO 10, each of the monitor terminals 14 is installed at the approximate center of the side portion (that is, the short side portion) opposed to the longitudinal direction of the lower surface of the ceramic package 3. For example, as shown in FIG. Even if each of the monitor terminals 24 is provided along one short side (the left short side in the figure) of the lower surface of 23, it is possible to suppress the influence of the stray capacitance due to the shielding effect of the shielding film. It is. More desirably, for example, as shown in FIG. 2 (b), one external terminal (below the left short side in FIG. 2 (a)) disposed on one short side of the lower surface of the ceramic package 23. Side) is the external terminal (ground external terminal) 25d that is electrically connected to the GND terminal of the IC chip 2, and overlaps with the ground external terminal 25d (D portion in FIG. 2B). By disposing the shield film 30 on the surface, it is possible to further suppress the influence of the stray capacitance. Needless to say, the shield film 30 covers the monitor terminals 24 and grounds the shield film 20. The monitor terminals 24 may be provided along the long side of the lower surface of the ceramic package 23.

図3は本発明に係わる環状基板の第2の実施形態の構成を示す上面斜視図である。
図3に示す環状基板35は前記TCXO10に用いる前記環状基板の第2の実施形態であって、該環状基板35の上面(前記セラミックパッケージ3の下面に対向する面)の前記モニタ端子に対向する箇所を凹設し該各凹設部35aの内底面に導体膜(シールド膜)38を被着してあり、グランド電位の該各導体膜38によって前記各モニタ端子間の浮遊容量の影響を、またモニタ端子及び前記ICチップ(が有する発振回路)間におけるカップリング現象を抑止することが可能となる。前記凹設部35aは前記環状基板35(の上面)及び前記セラミックパッケージ(の下面)を対向配置し電気的及び機械的に接続(例えばはんだ接合)する際、該はんだを介して前記各導体膜38と該各導体膜38に隣接する各内部端子36(及び前記各外部端子)との、また前記各導体膜38を介して前記モニタ端子同士での電気的短絡を防止するための空隙を形成するためのものである。
また、前記環状基板の上面四隅を凸設し該凸設部の上面、即ち環状基板の最上面に前記内部端子を配設したとしても同様の効果が得られる。
FIG. 3 is a top perspective view showing the configuration of the second embodiment of the annular substrate according to the present invention.
An annular substrate 35 shown in FIG. 3 is a second embodiment of the annular substrate used in the TCXO 10 and is opposed to the monitor terminal on the upper surface of the annular substrate 35 (the surface facing the lower surface of the ceramic package 3). The conductive film (shield film) 38 is deposited on the inner bottom surface of each recessed portion 35a, and the influence of the stray capacitance between the monitor terminals is affected by each conductive film 38 of the ground potential. Further, it becomes possible to suppress the coupling phenomenon between the monitor terminal and the IC chip (the oscillation circuit included in the IC chip). The concave portion 35a is arranged so that the annular substrate 35 (the upper surface thereof) and the ceramic package (the lower surface thereof) face each other and are electrically and mechanically connected (for example, soldered), and the conductor films are interposed via the solder. 38 and an internal terminal 36 adjacent to each conductor film 38 (and each external terminal), and a gap for preventing an electrical short circuit between the monitor terminals via each conductor film 38 is formed. Is to do.
Further, the same effect can be obtained even when the four corners of the upper surface of the annular substrate are protruded and the internal terminals are arranged on the upper surface of the protrusion, that is, the uppermost surface of the annular substrate.

図4は本発明に係わる環状基板の第3の実施形態の構成を示す下面斜視図である。
図4に示す環状基板45は前記TCXO10に用いる前記環状基板の第3の実施形態であって、該環状基板45の下面(前記TCXOにおける実装面であって、同図における上面にあたる。)の前記モニタ端子に対向する箇所を凹設し該凹設部45aの内底面(天井面)に導体膜(シールド膜)48を被着してあり、該導体膜48によって前記各モニタ端子間の浮遊容量の影響を、またモニタ端子及び前記ICチップ(が有する発振回路)間におけるカップリング現象を抑止することが可能となる。前記各凹設部45aは、前記環状基板45を有するTCXOを外部のプリント基板にはんだ実装した際、該はんだを介して前記各導体膜48と該各導体膜48に隣接する(環状基板45の下面四隅に配設する)実装端子47(及び該実装端子47に対応する外部の前記プリント基板の実装パターン)との電気的短絡を防止するための空隙を形成するためのものである。
また、前記環状基板の下面四隅を凸設し該凸設部の上面、即ち環状基板の最下面に前記実装端子を配設したとしても同様の効果が得られる。
FIG. 4 is a bottom perspective view showing the configuration of the third embodiment of the annular substrate according to the present invention.
An annular substrate 45 shown in FIG. 4 is a third embodiment of the annular substrate used in the TCXO 10, and the lower surface of the annular substrate 45 (the mounting surface in the TCXO, which corresponds to the upper surface in FIG. 4). A portion facing the monitor terminal is recessed, and a conductive film (shield film) 48 is deposited on the inner bottom surface (ceiling surface) of the recessed portion 45a, and the conductive film 48 allows stray capacitance between the monitor terminals. And the coupling phenomenon between the monitor terminal and the IC chip (the oscillation circuit) can be suppressed. When the TCXO having the annular substrate 45 is solder-mounted on an external printed board, each of the recessed portions 45a is adjacent to the conductor films 48 and the conductor films 48 via the solder (of the annular substrate 45). This is to form a gap for preventing an electrical short circuit with the mounting terminals 47 (and the mounting pattern of the external printed circuit board corresponding to the mounting terminals 47) disposed at the four corners of the lower surface.
Further, the same effect can be obtained even if the four corners of the lower surface of the annular substrate are convexly provided and the mounting terminals are arranged on the upper surface of the convex portion, that is, the lowermost surface of the annular substrate.

前記第2の多層プリント配線基板に環状基板を用いて本発明を説明したが、少なくとも最下層に平板状の絶縁層を用いて積層一体化した、即ち上方に開口する凹部を上面に(且つ平坦状の下面を)備える第2の多層プリント配線基板であっても構わない。   Although the present invention has been described using an annular substrate as the second multilayer printed wiring board, at least the lowest layer is laminated and integrated using a flat insulating layer, that is, a concave portion opening upward is formed on the upper surface (and flat). It may be a second multilayer printed wiring board having a lower surface.

発振回路および温度補償回路を構成する回路素子はICチップのみならず、発振回路および温度補償回路を構成するディスクリート部品と温度補償回路の補償量や発振周波数を微調整するためのコンデンサ等の電子部品であっても構わない。また、前記多層基板(集合基板)の下面には前記ICチップの他に該ICチップに供給される電源電圧に重畳される高周波ノイズを除去するためのコンデンサ等をも実装しても構わない。   Circuit elements constituting the oscillation circuit and the temperature compensation circuit are not only IC chips, but also electronic components such as discrete parts constituting the oscillation circuit and the temperature compensation circuit and capacitors for finely adjusting the compensation amount and oscillation frequency of the temperature compensation circuit It does not matter. In addition to the IC chip, a capacitor or the like for removing high-frequency noise superimposed on the power supply voltage supplied to the IC chip may be mounted on the lower surface of the multilayer substrate (collective substrate).

TCXOを用いて本発明を説明したが、自動周波数制御(AFC)回路を付加した所謂VC−TCXO、VCXO、SPXO、OCXO、SAW発振器等のデバイスに適用できることは云うまでもない。   Although the present invention has been described using TCXO, it goes without saying that the present invention can be applied to devices such as so-called VC-TCXO, VCXO, SPXO, OCXO, and SAW oscillators to which an automatic frequency control (AFC) circuit is added.

ATカット水晶基板を用いて本発明を説明したが、本発明はATカットに限定するものではなくBTカット、CTカット、DTカット、SCカット、GTカット等のカットアングルの水晶基板に適用できることは云うまでもない。   Although the present invention has been described using an AT-cut quartz substrate, the present invention is not limited to an AT-cut, but can be applied to a quartz substrate having a cut angle such as a BT cut, CT cut, DT cut, SC cut, or GT cut. Needless to say.

また本発明は、水晶振動素子(水晶基板)のみに限定するものではなくランガサイト、四方酸リチウム、タンタル酸リチウム、ニオブ酸リチウム等のその他の圧電材料にも適用できることは云うまでもない。   Needless to say, the present invention is not limited to a quartz resonator element (quartz substrate), but can be applied to other piezoelectric materials such as langasite, lithium tetragonal acid, lithium tantalate, and lithium niobate.

本発明の第1の実施形態としての水晶発振器の構成を示すものであって、(a)はその縦断面図、(b)は封止樹脂及び環状基板を省略した状態の下面図、(c)は環状基板の下面図である。BRIEF DESCRIPTION OF THE DRAWINGS The structure of the crystal oscillator as the 1st Embodiment of this invention is shown, Comprising: (a) is the longitudinal cross-sectional view, (b) is a bottom view of the state which abbreviate | omitted sealing resin and the cyclic | annular board | substrate, (c) ) Is a bottom view of the annular substrate. 本発明の第2の実施形態としての水晶発振器の構成を示すものであって、(a)は封止樹脂及び環状基板を省略した状態の下面図、(b)は環状基板の下面図である。2 shows a configuration of a crystal oscillator as a second embodiment of the present invention, where (a) is a bottom view of a state where a sealing resin and an annular substrate are omitted, and (b) is a bottom view of the annular substrate. FIG. . 環状基板の第2の実施形態の構成を示す上面斜視図である。It is an upper surface perspective view which shows the structure of 2nd Embodiment of a cyclic | annular board | substrate. 環状基板の第3の実施形態の構成を示す下面斜視図である。It is a lower surface perspective view which shows the structure of 3rd Embodiment of a cyclic | annular board | substrate. 従来の水晶発振器の構成を示すものであって、(a)はその縦断面図、(b)はアンダーフィル樹脂を省略した状態の下面図である。The structure of the conventional crystal oscillator is shown, Comprising: (a) is the longitudinal cross-sectional view, (b) is a bottom view of the state which abbreviate | omitted the underfill resin.

符号の説明Explanation of symbols

1・・水晶振動素子 2・・ICチップ 3・・セラミックパッケージ
3a・・凹部 4・・金属蓋 5・・環状基板 6・・接続端子
7・・パッド電極 10・・TCXO 11・・導電性接着剤
12・・導体バンプ 13・・封止樹脂 14・・モニタ端子 15・・外部端子
16・・内部端子 17・・実装端子 18・・内部導体 20・・シールド膜
23・・セラミックパッケージ 24・・モニタ端子 25d・・グランド外部端子
30・・シールド膜
35・・環状基板 35a・・凹設部 38・・導体膜
45・・環状基板 45a・・凹設部 47・・実装端子 48・・導体膜
100・・表面実装型水晶発振器 101・・水晶振動素子 102・・ICチップ
103・・容器体(及び小型容器体) 103a・・第1のキャビティー部
103b・・第2のキャビティー部 104・・蓋体
105・・アンダーフィル樹脂 106・・パッド電極 110・・張出部
111、111a・・IC電極パッド 112・・外部端子電極
113a、113b・・モニタ電極パッド 121・・配線パターン

1. Crystal oscillator 2. IC chip 3. Ceramic package 3a. Recess 4. Metal lid 5. Ring substrate 6. Connection terminal 7. Pad electrode 10. TCXO 11. Conductive bonding Agent 12 Conductor bump 13 Sealing resin 14 Monitor terminal 15 External terminal 16 Internal terminal 17 Mounting terminal 18 Internal conductor 20 Shield film 23 Ceramic package 24 Monitor terminal 25d · · Ground external terminal 30 · · Shield film 35 · · Annular substrate 35a · · Recessed portion 38 · · Conductor film 45 · · Annular substrate 45a · · Recessed portion 47 · · Mounting terminal 48 · · Conductor film DESCRIPTION OF SYMBOLS 100..Surface-mount type crystal oscillator 101..Crystal oscillator 102..IC chip 103..Container body (and small container body) 103a..First cavity portion 103b..Second Cavity part 104 .. Lid 105.. Underfill resin 106.. Pad electrode 110.. Overhang part 111, 111 a ... IC electrode pad 112 ... External terminal electrodes 113 a, 113 b ... Monitor electrode pad 121 ... Wiring pattern

Claims (5)

上面に凹部を備える第1の多層プリント配線基板と、該第1の多層プリント配線基板の下面の周縁に沿って固着される第2の多層プリント配線基板と、前記凹部に密閉封入された圧電振動素子と、前記第1の多層プリント配線基板の下面に実装された回路素子と、を備えた表面実装型圧電発振器であって、
前記圧電振動素子の入出力検査用モニタ端子を前記第2の多層プリント配線基板が当接する前記第1の多層プリント配線基板の下面の領域に配設したことを特徴とする表面実装型圧電発振器。
A first multilayer printed wiring board having a recess on the upper surface, a second multilayer printed wiring board fixed along the periphery of the lower surface of the first multilayer printed wiring board, and a piezoelectric vibration hermetically sealed in the recess A surface-mounted piezoelectric oscillator comprising: an element; and a circuit element mounted on a lower surface of the first multilayer printed wiring board,
A surface-mount type piezoelectric oscillator characterized in that an input / output inspection monitor terminal of the piezoelectric vibration element is disposed in a region of a lower surface of the first multilayer printed wiring board in contact with the second multilayer printed wiring board.
前記第2の多層プリント配線基板の前記モニタ端子と対向する箇所にシールド膜を配設したことを特徴とする請求項1に記載の表面実装型圧電発振器。   The surface-mount piezoelectric oscillator according to claim 1, wherein a shield film is disposed at a position facing the monitor terminal of the second multilayer printed wiring board. 前記モニタ端子を前記第1の多層プリント配線基板下面の同一辺部に配設したことを特徴とする請求項2に記載の表面実装型圧電発振器。   3. The surface mount piezoelectric oscillator according to claim 2, wherein the monitor terminal is disposed on the same side of the lower surface of the first multilayer printed wiring board. 前記第1の多層プリント配線基板下面の同一辺部の両隅に配設する外部端子のいずれか一方がグランド外部端子であることを特徴とする請求項3に記載の表面実装型圧電発振器。   4. The surface mount piezoelectric oscillator according to claim 3, wherein any one of the external terminals disposed at both corners of the same side portion of the lower surface of the first multilayer printed wiring board is a ground external terminal. 前記シールド膜の一部が前記グランド外部端子と重複したことを特徴とする請求項4に記載の表面実装型圧電発振器。

The surface-mount piezoelectric oscillator according to claim 4, wherein a part of the shield film overlaps with the ground external terminal.

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JP2016072652A (en) * 2014-09-26 2016-05-09 京セラクリスタルデバイス株式会社 Crystal oscillator

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