JP2005159136A - Cob mounting frame, package mounting frame, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To progress further miniaturization in COB mounting. <P>SOLUTION: A frame has a frame member, a conductor unit, and an electrically conductive bump unit. A lid for protecting a semiconductor chip is stuck on one surface of the frame member. The conductor unit is formed on the surface of the frame member opposite to the one surface. The bump unit is formed on the conductor unit to electrically connect the pad of the semiconductor chip with the conductor unit. Thus, if the frame is used, the semiconductor chip can be COB-mounted without using a bonding wire. Therefore, the mounting size can be made smaller than that in a conventional COB mounting method. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to mounting of a semiconductor chip and a semiconductor device. In particular, the present invention relates to a COB mounting frame and a package mounting frame.

  As a method for mounting a semiconductor chip, COB (Chip On Board) mounting and package mounting are known (for example, see Patent Document 1 and Patent Document 2). FIG. 15 shows a schematic top view of a semiconductor device COB-mounted by a conventional method on the upper side and a schematic cross-sectional view on the lower side. As shown in the figure, in the COB mounting, a semiconductor chip 16 is fixed on a COB substrate 14 having a through hole 10 and a post 12 connected to an external signal line. Then, the pad 18 of the semiconductor chip 16 is connected to the post 12 by a bonding wire 20 (this connection method is called wire bonding). In normal COB mounting, in order to protect the bonding wire 20 and the semiconductor chip 16, a frame body 24 is provided and a glass lid 26 is adhered thereon, or a resin is poured around the semiconductor chip 16 and cured.

  FIG. 16 shows a schematic top view of a semiconductor device packaged by a conventional method on the upper side and a schematic sectional view on the lower side. As shown in the figure, in package mounting, after bonding the semiconductor chip 16 to the die pad portion 32 of the package substrate 30, the pads 18 and the inner leads 34 are wire-bonded. In order to protect the bonding wire 20 and the semiconductor chip 16, a glass lid 36 is bonded to the upper part of the package substrate 30.

  In the COB mounting, an interval for disposing the bonding wire 20 is required between the post 12 of the COB substrate 14 and the semiconductor chip 16. This interval needs to be long enough to accommodate the capillary used during wire bonding, and is usually about 1.5 to 3 mm. In the case of package mounting, a certain distance is required between the inner lead 34 and the semiconductor chip 16 for the same reason as in the case of COB mounting. This interval is equivalent to the case of COB mounting. Since COB mounting and package mounting require such a space, there is a limit to miniaturization.

Therefore, in order to further increase the density and reduce the size and weight, a CSP (chip size package) using a package having almost the same dimensions as a semiconductor chip has been introduced in recent years. In this technology, for example, a BGA (Ball Grid Array) or the like is used to connect a semiconductor chip and leads on the package side by solder balls or solder bumps.
JP-A-10-199909 (Section 2-4, FIGS. 1 to 7) JP-A-10-125833 (Section 2-6, FIGS. 1 to 4)

However, since CSP mounting is mainly a face-down method, there is a problem that it cannot be applied to a light receiving element or an optical element such as a CCD. This is because these elements utilize the element forming surface of the chip as a light receiving surface.
An object of the present invention is to realize further downsizing in COB mounting, and thereby downsize a light receiving element and an optical element to be COB mounted.

  Another object of the present invention is to realize further miniaturization in package mounting, and thereby to reduce the size of a light receiving element and an optical element mounted on the package.

  The invention of claim 1 is a frame used for COB mounting of a semiconductor chip, and includes a frame member, a conductor portion, and a conductive bump portion. A lid for protecting the semiconductor chip is attached to one surface of the frame member. The conductor portion is formed on a surface of the frame member opposite to the one surface. The bump part is formed on the conductor part in order to electrically connect the pad of the semiconductor chip and the conductor part.

The frame for COB mounting according to claim 2 is characterized in that, in the invention according to claim 1, side through holes are formed on the outer edge side surface of the frame member.
The invention according to claim 3 is a frame used for COB mounting of a semiconductor chip, comprising a frame member, an external terminal portion, a conductor portion, and a conductive bump portion. . The frame member is formed in a frame shape whose inner edge and outer edge are along the outer periphery of the semiconductor chip. A lid for protecting the semiconductor chip is attached to one surface of the frame member. On the side opposite to the one surface, a first surface divided by at least one step recessed on the inner edge side and a second surface on the inner edge side from the first surface are formed. The external terminal portion is a through hole formed on the first surface or a pin provided so as to insert the frame member from the first surface. The conductor portion is formed from the second surface to the external terminal portion. The bump part is formed on the conductor part on the second surface in order to electrically connect the pad of the semiconductor chip and the conductor part.

A semiconductor device according to a fourth aspect is characterized in that a semiconductor chip which is a photoelectric conversion element is COB-mounted using the COB-mounting frame according to any one of the first to third aspects.
According to a fifth aspect of the present invention, there is provided a frame used for package mounting a semiconductor chip, comprising a frame member, a conductor portion, and a conductive bump portion. A lid for protecting the semiconductor chip is attached to one surface of the frame member. The conductor portion is formed on a surface of the frame member opposite to the one surface. The bump part is formed on the conductor part in order to electrically connect the pad of the semiconductor chip and the conductor part.

  The invention of claim 6 is a frame used for mounting a semiconductor chip on a package, and includes a frame member, leads, and conductive bump portions. The frame member is formed in a frame shape whose inner edge and outer edge are along the outer periphery of the semiconductor chip. A lid for protecting the semiconductor chip is attached to one surface of the frame member. On the side opposite to the one surface, an outer surface divided by at least one step recessed toward the inner edge side and an inner surface on the inner edge side with respect to the outer surface are formed. The lead is inserted through the outer edge of the frame member from the inner side surface. The bump portion is formed on the lead on the inner surface in order to electrically connect the pad of the semiconductor chip and the lead.

  According to a seventh aspect of the present invention, a semiconductor device as a photoelectric conversion element is package-mounted using the package mounting frame according to the fifth or sixth aspect.

  By using the COB mounting frame of the present invention, a semiconductor chip can be COB mounted without using bonding wires. For this reason, the mounting size can be reduced as compared with the conventional COB mounting method. Similarly, if the frame for mounting a package according to the present invention is used, the mounting size can be made smaller than before. Therefore, since it is impossible to apply CSP mounting, a semiconductor chip that has conventionally had a limit in reducing the mounting size can be reduced by COB mounting or package mounting using the frame of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in each figure, the same code | symbol is attached | subjected to the same element and the overlapping description is abbreviate | omitted.
<First Embodiment>
FIG. 1A is a schematic top view of the semiconductor device according to the first embodiment of the present invention, and FIG. 1B is a schematic cross-sectional view taken along the line XX ′ in FIG. Yes. This embodiment corresponds to claims 1 and 4. The semiconductor device 40 is configured by COB mounting the semiconductor chip 50 using the frame body 44, the COB substrate 46, and the transparent lid 48 of the present invention.

  The semiconductor chip 50 is formed as a solid-state image sensor. The transparent lid 48 protects the semiconductor chip 50 and functions as an optical window, and is made of, for example, glass. The COB substrate 46 includes a cavity portion 54 for housing and fixing the semiconductor chip 50, a plurality of through holes 56 (32 in this example), and a plurality of substrate wirings 58 formed corresponding to each through hole 56. And have. Metal plating is applied to the inner surface of the through hole 56, and one end of each substrate wiring 58 extends to each through hole 56.

  The frame body 44 is formed such that the dimension of the outer edge is larger than the dimension of the outer edge of the cavity part 54, and the dimension of the inner edge is smaller than the dimension of the outer edge of the cavity part 54. The frame body 44 is formed by cutting, for example, Teflon (registered trademark) or ceramic. The material of the frame body 44 is not limited to these. Any insulating solid that can be processed into a desired shape and has sufficient strength may be used. The same applies to the second to fifth embodiments described later.

  FIG. 2A is an enlarged view of the vicinity of the frame body 44 in FIG. 1B, and FIG. 2B is an exploded cross-sectional view thereof. As shown in the figure, the frame body 44 has a stepped portion 62 for attaching a transparent lid 48. A frame wiring 64 made of a metal thin film is formed on the surface of the frame 44 opposite to the stepped portion 62. The frame wiring 64 may be formed by attaching a conductive material such as gold or aluminum by a method such as vapor deposition.

  Solder bumps 66 are formed on the frame wiring 64. The solder bumps 66 are formed at positions facing the pads 68 of the semiconductor chip 50 when the frame 44 is disposed on the semiconductor chip 50 and the COB substrate 46. A plurality of frame body wires 64 and solder bumps 66 are formed corresponding to each substrate wire 58. That is, the frame body wiring 64 and the solder bumps 66 are formed in a region that is not opposed to the substrate wiring 58 when disposed on the COB substrate 46 (for example, a cross section between YY ′ in FIG. 1A). Absent. In the following description, a region where no wiring is formed on the surface of the frame opposite to the step portion for attaching the lid is referred to as a non-wiring region.

  Here, the correspondence between the claims and the present embodiment will be described. In addition, the correspondence shown below is one interpretation shown for reference, and does not limit the present invention. The conductor portion described in the claims corresponds to the frame wiring 64. The bump portion described in the claims corresponds to the solder bump 66. The frame member described in the claims corresponds to a portion excluding the frame body wiring 64 and the solder bump 66 from the frame body 44.

  Next, a mounting method using the frame body 44 described above will be described. First, the semiconductor chip 50 is attached to the cavity portion 54 of the COB substrate 46 using, for example, an adhesive. At this time, the light receiving surface of the semiconductor chip 50 is set to be opposite to the COB substrate 46. Next, for example, cream solder is applied to the solder bump 66 and the side opposite to the solder bump 66 in the frame body wiring 64, and for example, an insulating adhesive is applied to the non-wiring region. Next, alignment is performed so that the solder bumps 66 of the frame body 44 are aligned with the pads 68 and the side opposite to the solder bumps 66 in the frame body wiring 64 is on the substrate wiring 58.

  In this state, for example, these are placed on a hot plate so that the frame body 44 and the COB substrate 46 are heated to such an extent that the solder bumps 66 are not melted. Then, remove them from the hot plate and let them cool. As a result, the solder bump 66 is soldered to the pad 68 by the cream solder and the insulating adhesive applied earlier, the frame body wiring 64 is soldered to the substrate wiring 58, and the non-wiring region is bonded to the COB substrate 46. Is done. Thereafter, the transparent lid 48 may be attached to the stepped portion 62 of the frame body 44 to seal the semiconductor chip 50. Instead of heating the frame body 44 to such an extent that the solder bumps 66 do not melt, the solder bumps 66 may be thermocompression bonded to the pads 68 (the same applies to other embodiments described later). The above is the description of the mounting method.

  As described above, in the first embodiment, the pads 68 of the semiconductor chip 50 and the substrate wirings 58 of the COB substrate 46 are connected via the solder bumps 66 and the frame body wirings 64 formed on the frame body 44. Therefore, since it is not necessary to use wire bonding for mounting, COB mounting can be performed with a simpler process than before. Moreover, the space | interval of the pad and post | mailbox required for wire bonding becomes unnecessary. Therefore, the semiconductor chip can be COB mounted with the minimum size. In addition, since the CSP mounting cannot be applied, the size of the semiconductor chip that has been limited in the conventional mounting size is COB mounted by using the frame body of the present embodiment, so that the size is as close as possible to the chip size. Can be implemented.

In the first embodiment, the example in which the substrate wiring 58 does not extend to the outer edge of the cavity portion 54 on the COB substrate 46 has been described. The present invention is not limited to such an embodiment. As shown in FIG. 3, the substrate wiring 58 may be extended to the outer edge of the cavity portion 54 to increase the contact area between the frame body wiring 64 and the substrate wiring 58.
The example in which the solder bump 66 is used as the connection means between the pad 68 and the frame 44 has been described. The present invention is not limited to such an embodiment. Instead of the solder bump 66, for example, a gold ball or a solder ball may be formed on the frame body wiring 64, or a probe pin may be provided. The same applies to the second to fifth embodiments described later. Further, the example in which the through hole 56 is formed in the COB substrate 46 as a connection means with an external signal line (not shown) has been described. The present invention is not limited to such an embodiment. Instead of the through hole, a pin inserted through the COB substrate and connected to the substrate wiring may be provided.

<Second Embodiment>
FIG. 4A is a schematic top view of the semiconductor device according to the second embodiment of the present invention, and FIG. 4B is a schematic cross-sectional view taken along the line XX ′ in FIG. Yes. This embodiment corresponds to claims 1, 2, and 4. The semiconductor device 80 is configured by COB mounting the semiconductor chip 50 using the frame body 84, the COB substrate 86, and the transparent lid 48 of the present embodiment. The COB substrate 86 has a cavity portion 94 for fixing the semiconductor chip 50 and a plurality of through holes 96. A plurality of end surface through holes 90 (side through holes) are formed on the outer edge side surface of the frame body 84 so as to face the plurality of through holes 96, respectively. The formation of these side through holes is the main difference between the present embodiment and the first embodiment.

  Fig.5 (a) is the figure which expanded the frame 84 vicinity of FIG.4 (b), FIG.5 (b) shows this with the exploded sectional view. As shown in the figure, the frame body 84 has a stepped portion 98 for attaching the transparent lid 48. In addition, on the surface of the frame body 84 opposite to the stepped portion 98, frame body wirings 100 corresponding to the end surface through holes 90 are formed. Solder bumps 104 are formed on the frame wiring 100 at positions facing the pads 68 of the semiconductor chip 50.

  Next, a mounting method using the frame body 84 described above will be described. First, as in the first embodiment, the semiconductor chip 50 is attached to the cavity portion 94. Next, cream solder is applied to the lower end of the end face through-hole 90 and the solder bump 104, and an insulating adhesive is applied to the non-wiring area. Next, after the alignment, the solder bump 104 is soldered to the pad 68, the end face through hole 90 is soldered to the through hole 96, and the non-wiring region is formed on the COB substrate in the same manner as in the first embodiment. Adhere to 86. Thereafter, the transparent lid 48 is attached to the stepped portion 98. Alternatively, the end face through hole 90 may be soldered to the through hole 96 after the frame body 84 and the COB substrate 86 are bonded without applying cream solder to the end face through hole 90. As mentioned above, also in 2nd Embodiment, the effect similar to 1st Embodiment can be acquired.

<Third Embodiment>
FIG. 6A is a schematic top view of a semiconductor device according to the third embodiment of the present invention, and FIG. 6B is a schematic cross-sectional view taken along line XX ′ in FIG. Yes. This embodiment corresponds to claims 3 and 4. The semiconductor device 110 is configured by COB mounting the semiconductor chip 50 using the frame body 114, the COB substrate 116, and the transparent lid 48. The main differences from the first embodiment are the following two points.

  First, the COB substrate 116 is formed in a plate shape without a cavity portion or a through hole. The size of the COB substrate 116 is larger than the size of the semiconductor chip 50. Secondly, the frame body 114 has a structure further including the outer peripheral portion of the COB substrate of the first and second embodiments. Hereinafter, the structure of the frame will be described in detail with reference to FIG. 7A is an enlarged view of the vicinity of the frame body 114 in FIG. 6B, and FIG. 7B is an exploded cross-sectional view thereof.

  The frame body 114 has a stepped portion 118 for attaching the transparent lid 48. The side opposite to the stepped portion 118 in the frame body 114 is formed in a staircase shape by two steps recessed to the inner edge side. Of these two steps, the step on the inner edge side is for housing the semiconductor chip 50 and is formed at a position slightly outside the outer periphery of the semiconductor chip 50. Further, the step on the outer edge side is formed at a position substantially equal to the outer periphery of the COB substrate 116 in order to fit the COB substrate 116. The step on the outer edge side may be formed at a position slightly outside the outer circumference from the dimension of the COB substrate 116.

  Here, as shown in FIG. 7B, of the three surfaces divided by the step, the inner edge surface is the bump surface (corresponding to the second surface described in the claims), and the outer edge surface is the hole surface. (Corresponding to the first surface of the claims), the surface between these is the substrate pasting surface. A plurality of through holes 120 are formed on the hole surface (in this example, 32 as shown in FIG. 6A). A frame wiring 124 is formed corresponding to each of these through holes 120. One end side of the frame body wiring 124 is formed on the bump surface, and the other end side extends to the through hole 120. In addition, solder bumps 126 are formed on the frame body wiring 124 on the bump surface at positions facing the pads 68.

  FIG. 8 is a schematic process cross-sectional view showing the main part of the method for manufacturing the frame body 114. Hereinafter, a method of manufacturing the frame body 114 will be described with reference to FIG. First, a square substrate formed of Teflon (registered trademark) or the like is prepared, and the center portion thereof is cut out squarely to form the frame-shaped first substrate 130. Next, the through hole 120 is formed. Next, a frame material wiring 124 is formed by attaching a conductive material by a method such as plating. FIG. 8A shows this state.

  Next, the second substrate 132 having the same size and shape as the first substrate 130 is attached to the surface of the first substrate 130 on the frame body wiring 124 side, for example, with an adhesive. FIG. 8B shows this state. Next, the first substrate 130 is cut to form bump surfaces, a substrate pasting surface, and a hole surface in a staircase pattern. At this time, the frame wiring 124 formed earlier is exposed and the frame wiring 124 is not cut. Then, solder bumps 126 are formed on each frame wiring 124. FIG. 8C shows this state. Thereafter, the second substrate 132 may be cut and processed into the shape shown in FIG. The above is the description of the method for manufacturing the frame body 114.

  Next, a mounting method using the frame body 114 of the present embodiment will be described with reference to FIG. First, after the cream solder is applied to the solder bump 126 with the hole surface of the frame body 114 facing upward, alignment is performed with the light receiving surface of the semiconductor chip 50 facing downward. In this state, the solder bumps 126 are soldered to the pads 68 in the same manner as in the first embodiment. Next, the back surface of the semiconductor chip 50 and the COB substrate 116, and the substrate pasting surface of the frame 114 and the COB substrate 116 are bonded to each other. Thereafter, the transparent lid 48 may be attached to the stepped portion 62 of the frame body 114. Note that the order of the steps may be changed as follows. First, the back surface of the semiconductor chip 50 is pasted on the COB substrate 116. Next, each solder bump 126 is soldered to each pad 68, and the substrate pasting surface is bonded to the COB substrate 116. Thereafter, the transparent lid 48 is attached to the step portion 118 of the frame body 44. The above is the description of the mounting method.

  As mentioned above, also in 3rd Embodiment, the effect similar to 1st and 2nd embodiment can be acquired. Furthermore, in the third embodiment, the frame body 114 has a structure further including the outer peripheral portion of the COB substrate of the first and second embodiments. Therefore, it is not necessary to connect the wiring part of the frame (frame wiring 64 in the first embodiment) and the wiring part of the COB substrate (substrate wiring 58 in the first embodiment) by soldering or the like. Therefore, the number of processes during chip mounting can be reduced.

In the third embodiment, the example in which the through hole 120 is formed in the frame body 114 as the connection means with the external signal line has been described. The present invention is not limited to such an embodiment. Instead of the through hole, a pin that is inserted through the frame and connected to the frame wiring may be provided. The through holes and pins here correspond to the external terminal portions described in the claims.
Further, an example in which two steps are formed on the side opposite to the stepped portion 118 in the frame body 114 has been described. The present invention is not limited to such an embodiment. For example, as shown in FIG. 9, only one step may be provided. In this case, the COB substrate is formed slightly larger than the size of the semiconductor chip 50. Further, the position of the step in the frame is made substantially equal to the size of the COB substrate so that the COB substrate is fitted to the frame. In mounting, the COB substrate and the frame body may be bonded by applying an adhesive to the side surface of the COB substrate.

<Fourth Embodiment>
FIG. 10A is a schematic top view of a semiconductor device according to the fourth embodiment of the present invention, and FIG. 10B is a schematic cross-sectional view taken along line XX ′ in FIG. Yes. This embodiment corresponds to claims 5 and 7. The semiconductor device 140 is configured by packaging the semiconductor chip 50 using the frame 144, the package 146, and the transparent lid 48 of the present embodiment.

  The package 146 has a die pad portion 150 for housing and fixing the semiconductor chip 50 and a plurality of leads 152 (32 in this example). The structure of the frame 144 is the same as that of the frame 24 of the first embodiment. That is, the frame body 144 includes a stepped portion 160 for attaching the transparent lid 48, a plurality of frame body wirings 164 corresponding to the plurality of leads 152, and a plurality of solder bumps 166.

  Next, a package mounting process using the frame body 144 of the present embodiment will be described. First, the semiconductor chip 50 is attached to the die pad portion 150 of the package 146 using, for example, an adhesive. At this time, the light receiving surface of the semiconductor chip 50 is set to be opposite to the package 146. Next, cream solder is applied to the solder bumps 166 and the frame body wiring 164, and an insulating adhesive is applied to the non-wiring area of the frame body 144. Next, alignment is performed so that the solder bumps 166 are aligned with the pads 68 and the frame wiring 164 is on the leads 152. In this state, as in the first embodiment, the solder bumps 166 are soldered to the pads 68, the frame body wiring 164 is soldered to the leads 152, and the non-wiring area is bonded to the package 146. Thereafter, the transparent lid 48 is attached to the stepped portion 160 of the frame body 144. The above is the description of the mounting method. As described above, in the fourth embodiment, the semiconductor chip 50 can be packaged without wire bonding. Therefore, also in the fourth embodiment, the same effect as that of the first embodiment can be obtained.

<Fifth Embodiment>
FIG. 11A is a schematic top view of a semiconductor device according to the fifth embodiment of the present invention, and FIG. 11B is a schematic cross-sectional view taken along the line XX ′ in FIG. Yes. This embodiment corresponds to claims 6 and 7. The semiconductor device 180 is configured by packaging the semiconductor chip 50 using the package 184 of this embodiment and the transparent lid 48. The package 184 includes a frame body 186 and a back cover portion 188.

  The back cover portion 188 does not have a die pad portion and is formed in a plate shape having a size slightly larger than that of the semiconductor chip 50. The frame body 186 has a structure further including the outer peripheral portion of the package 146 of the fourth embodiment. Hereinafter, the structure of the frame body 186 will be described in detail with reference to FIG. 12A is an enlarged view of the vicinity of the frame body 186 in FIG. 11B, and FIG. 12B is an exploded cross-sectional view thereof.

  The frame 186 has a step 192 for attaching the transparent lid 48. The side opposite to the step 192 in the frame 186 is formed in a stepped shape by two steps that are recessed toward the inner edge. Of these two steps, the step on the inner edge side is for housing the semiconductor chip 50 and is formed at a position slightly outside the outer periphery of the semiconductor chip 50. Further, the step on the outer edge side is for fitting the back cover 188 and is formed at a position substantially equal to the outer periphery of the back cover 188. The step on the outer edge side may be formed at a position slightly outside the outer periphery of the back cover 188.

  Here, as shown in FIG. 12B, of the three surfaces divided by the step, the inner edge surface is the inner surface, the outer edge surface is the outer surface, and the surface between them is the back cover pasting surface. And The frame body 186 has a plurality of leads 196 inserted through the outer edge from the inner side surface and bent at the outer edge (in this example, as shown in FIG. 11A, 32). Book). On the lead 196 (corresponding to the inner lead) on the inner surface, a solder bump 200 is formed at a position facing the pad 68.

  FIG. 13 is a schematic process cross-sectional view showing the main part of the method for manufacturing the frame 186. Hereinafter, the manufacturing method of the frame 186 will be described with reference to FIG. First, the lead frame is punched out and bent to form a lead 196. In addition, two square substrates formed of Teflon (registered trademark) or the like are prepared, and the frame-shaped upper substrate 204 and lower substrate 208 are formed by hollowing out the central portions thereof. The upper substrate 204 corresponds to the stepped portion 192 side of the lead frame in the frame 186, and the lower substrate 208 corresponds to the opposite side. Next, the upper substrate 204 and the lower substrate 208 are processed by cutting. FIG. 13A shows this state. Next, the lead 196 is attached on the lower substrate 208, and the upper substrate 204 is further attached thereon. FIG. 13B shows this state. Thereafter, solder bumps 200 may be formed on the leads 196. FIG. 13C shows this state.

  Note that the frame body 186 can be manufactured in another process. In this case, the steps up to FIG. 13A may be the same as described above. Thereafter, a lead 196 is attached on the lower substrate 208. FIG. 13 (d) shows this state. Next, solder bumps 200 are formed on the leads 196. FIG. 13E shows this state. Thereafter, the upper substrate 204 may be attached to the leads 196 and the lower substrate 208.

  Next, a mounting method using the frame body 186 and the back cover portion 188 according to the present embodiment will be described with reference to FIG. First, after the cream sol is applied to the solder bump 200 with the outer surface of the frame 186 facing upward, the light receiving surface of the semiconductor chip 50 is aligned downward. In this state, the solder bumps 200 are soldered to the pads 68 in the same manner as in the first embodiment. Next, the back surface of the semiconductor chip 50 and the back cover portion 188, and the back cover attaching surface of the frame body 186 and the back cover portion 188 are bonded to each other. Thereafter, the transparent lid 48 may be attached to the step portion 192. In addition, you may change the process order and implement as follows. First, the back surface of the semiconductor chip is attached to the back cover 188. Next, each solder bump 200 is soldered to each pad 68, and the back cover pasting surface of the frame body 186 is bonded to the back cover portion 188. Thereafter, the transparent lid 48 is attached to the step portion 192. The above is the description of the mounting method.

As mentioned above, also in 5th Embodiment, the effect similar to 4th Embodiment can be acquired. Furthermore, in the fifth embodiment, the frame body 186 has a structure further including the outer peripheral portion of the package 146 of the fourth embodiment. For this reason, it is not necessary to connect the frame body wiring and the lead by soldering or the like. Therefore, the number of processes during chip mounting can be reduced.
In the fifth embodiment, the example in which two steps are formed on the opposite side of the step 192 in the frame 186 has been described. The present invention is not limited to such an embodiment. For example, as shown in FIG. 14, only one step may be provided. In this case, the back cover is formed to be slightly larger than the size of the semiconductor chip 50. Further, the position of the step in the frame is made substantially equal to the size of the back cover so that the back cover is fitted to the frame. In mounting, the back cover and the frame may be bonded by applying an adhesive to the side surface of the back cover.

  In the first to fifth embodiments, the example in which the semiconductor chip 50 is formed as a solid-state imaging device has been described. The present invention is not limited to such an embodiment. The COB mounting frame and the package mounting frame of the present invention can also be applied to mounting of photoelectric conversion elements other than solid-state imaging devices and other semiconductor chips. Note that the photoelectric conversion element in this specification means a semiconductor chip that performs photoelectric conversion, and refers to, for example, a light receiving element such as a photodiode, an imaging element such as a CCD, a line sensor, or the like.

  As described above in detail, the present invention can be greatly used in the mounting of semiconductor chips.

1A is a schematic top view of a semiconductor device according to the first embodiment, and FIG. 1B is a schematic cross-sectional view thereof. (A) is a cross-sectional schematic diagram which shows the detail of the frame part in FIG.1 (b), (b) is the typical exploded sectional view. In 1st Embodiment, it is explanatory drawing which shows the example which extends board wiring to the outer edge of a cavity part. (A) is a top schematic diagram of the semiconductor device in 2nd Embodiment, (b) is the cross-sectional schematic diagram. (A) is a cross-sectional schematic diagram which shows the detail of the frame part in FIG.4 (b), (b) is the typical exploded sectional view. (A) is an upper surface schematic diagram of the semiconductor device in 3rd Embodiment, (b) is the cross-sectional schematic diagram. (A) is a cross-sectional schematic diagram which shows the detail of the frame part in FIG.6 (b), (b) is the typical exploded sectional view. It is typical process sectional drawing which shows the principal part of the manufacturing process of the frame in 3rd Embodiment. In 3rd Embodiment, it is a cross-sectional schematic diagram which shows the example which makes the level | step difference of a frame one. (A) is the upper surface schematic diagram of the semiconductor device in 4th Embodiment, (b) is the cross-sectional schematic diagram. (A) is the upper surface schematic diagram of the semiconductor device in 5th Embodiment, (b) is the cross-sectional schematic diagram. (A) is a cross-sectional schematic diagram which shows the detail of the frame part in FIG.11 (b), (b) is the typical exploded sectional view. It is typical process sectional drawing which shows the principal part of the manufacturing method of the frame in 5th Embodiment. In 5th Embodiment, it is a cross-sectional schematic diagram which shows the example which makes the level | step difference of a frame one. It is the upper surface schematic diagram and the cross-sectional schematic diagram which show the outline of the conventional COB mounting. It is the upper surface schematic diagram and the cross-sectional schematic diagram which show the outline of the conventional package mounting.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Through hole 12 Post 14 COB board | substrate 16 Semiconductor chip 18 Pad 20 Bonding wire 24 Frame body 26 Glass lid 30 Package board 32 Die pad part 34 Inner lead 36 Glass lid 40 Semiconductor device 44 Frame body 46 COB board 48 Transparent lid 50 Semiconductor chip 54 Cavity part 56 Through hole 58 Substrate wiring 62 Step part 64 Frame body wiring 66 Solder bump 68 Pad 80 Semiconductor device 84 Frame body 86 COB substrate 90 End face through hole 94 Cavity part 96 Through hole 100 Frame body wiring 104 Solder bump 110 Semiconductor device 114 Frame body 116 COB substrate 118 Stepped portion 120 Through hole 124 Frame body wiring 126 Solder bump 130 First substrate 132 Second substrate 140 Semiconductor device 144 Frame body 146 Package 150 Die Head portion 152 lead 160 stepped portion 164 frame body wiring 166 solder bump 180 a semiconductor device 184 package 186 frame 188 back cover portion 192 stepped portion 196 lead 200 solder bump 204 upper substrate 208 below the substrate

Claims (7)

A frame used for mounting a semiconductor chip on a COB (Chip On Board),
A frame member to which a lid for protecting the semiconductor chip is attached to one surface;
A conductor portion formed on a surface of the frame member opposite to the one surface;
A frame for COB mounting, comprising: a conductive bump portion formed on the conductor portion for electrically connecting the pad of the semiconductor chip and the conductor portion. In the frame for COB mounting according to claim 1,
A side through hole is formed on a surface on the outer edge side of the frame member. A COB mounting frame. A frame used for COB mounting a semiconductor chip,
An inner edge and an outer edge are formed in a frame shape along the outer periphery of the semiconductor chip, a lid for protecting the semiconductor chip is attached to one surface, and on the opposite side to the one surface, A frame member formed with a first surface divided by at least one step recessed on the inner edge side, and a second surface on the inner edge side with respect to the first surface;
An external terminal portion which is a through hole formed in the first surface, or a pin provided so as to be inserted through the frame member from the first surface;
A conductor portion formed from the second surface to the external terminal portion;
COB mounting, comprising: a conductive bump portion formed on the conductor portion on the second surface to electrically connect the pad of the semiconductor chip and the conductor portion Frame for use.   A semiconductor device, wherein a semiconductor chip which is a photoelectric conversion element is COB-mounted using the COB-mounting frame body according to any one of claims 1 to 3. A frame used to package a semiconductor chip,
A frame member to which a lid for protecting the semiconductor chip is attached to one surface;
A conductor portion formed on a surface of the frame member opposite to the one surface;
A package mounting frame, comprising: a conductive bump portion formed on the conductor portion for electrically connecting the pad of the semiconductor chip and the conductor portion. A frame used to package a semiconductor chip,
An inner edge and an outer edge are formed in a frame shape along the outer periphery of the semiconductor chip, a lid for protecting the semiconductor chip is attached to one surface, and on the opposite side to the one surface, A frame member formed with an outer surface divided by at least one step recessed on the inner edge side, and an inner surface on the inner edge side with respect to the outer surface;
From the inner side surface, a lead inserted through the outer edge of the frame member;
A package mounting frame, comprising: a conductive bump portion formed on the lead on the inner surface for electrically connecting the pad of the semiconductor chip and the lead. body.   A semiconductor device comprising a semiconductor chip as a photoelectric conversion element packaged using the package mounting frame according to claim 5.

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