JP2005150655A - Lead frame, semiconductor device using the same, and method for packaging semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device that prevents a lowering of joint at the soldered joint part even at the lead-free time, and does not cause separation of the joint part in the step of reflow soldering. <P>SOLUTION: This lead frame has a semiconductor device mounting section and a plurality of leads whose one end is arranged such that they are located near the semiconductor device mounting section, and is used for packaging that employs lead-free soldering. The surface of the lead's joint part at least with the wiring pattern of the packaging substrate is composed of a material that has a composition having a nickel content less than 3 mass %. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a lead frame, a semiconductor device using the lead frame, and a mounting method for the semiconductor device, and more particularly to mounting using lead-free solder.

In recent years, the problem of environmental pollution has become serious, and the use of so-called lead-free solder that does not use lead is also being promoted in the field of electronic components such as electronic devices such as personal computers and mobile phones.
Whereas eutectic solder has a melting point of about 183 ° C., lead-free solder usually has a solder melting point of about 220 ° C., which is about 40 ° C. higher than eutectic solder. Therefore, the reflow temperature, which has been set to about 230 ° C. at the past, has recently been changed from 240 ° C. to 245 ° C., and some of the higher reflow temperatures are set to 260 ° C.
Thus, as the solder used in the reflow process becomes lead-free from eutectic solder, the temperature setting of the reflow furnace is often increased.
When mounting semiconductor element components on a printed circuit board, mounting a large number of components is cumbersome and often marketed as a general-purpose board on which common components are mounted. In such a case, at least one reflow process is performed in the board manufacturer, and a reflow process for adding necessary parts in the assembly factory is performed. In such a case, there is a problem that the parts that have been mounted first go through a reflow process many times, and are easily peeled off.
For example, the voltage controlled oscillator (VCO) board currently used for mobile phones, etc., uses a lead frame made of the following materials, but is dropped for those that have undergone multiple reflow processes. There was a problem that it was easy to occur. In particular, with the change to the lead-free process, the problem that peeling occurs is prominent. This is particularly noticeable by the lead-free process, and the semiconductor device component is reflowed by using a tin-silver (Sn-3.5% Ag) solder in a nitrogen gas at a peak temperature of 240 ° C. with a solder amount of 50 to 80 μm. Mount on printed circuit board.
Also in this case, after several reflow steps, there is a problem that the joint part peels off and the component falls off.
Further, such a problem occurs similarly when lead solder is used and the number of reflow processes is large.

Thus, in recent years, due to the lead-free process, the reflow temperature is about 40 ° C. higher than before, and this temperature difference is large, which causes defects in various processes.
In particular, as described above, in the case of a VCO board, the density has been increasing in recent years, the area that can be used for mounting has been reduced, and in order to be able to withstand many reflow processes, the outflow of solder Therefore, it is necessary to reduce the amount of solder used to reduce the amount of solder. For this reason, the thickness of the solder layer per unit area has to be reduced, and there is a problem that sufficient bonding strength cannot be obtained and peeling is likely to occur.

As a result of analyzing the board mounted in this way by cross-sectional analysis, it was found that nickel in the lead frame diffused into the solder layer and lowered the solder jointability, as shown in the cross-sectional view of FIG. .
In particular, it is known that the growth rate of the Ni—Sn alloy is higher than the growth rate of the Cu—Sn alloy at a temperature exceeding 150 ° C. (see Non-Patent Document 1).
In other words, CAC-92 conventionally used for lead frames contains about 9% of Ni, so that Ni-Sn alloying is likely to proceed, and accordingly, Cu-Sn alloying is promoted. It is done.

  The present invention has been made in view of the above-described circumstances, and prevents the deterioration of the joining property of the solder joint portion even when lead-free and does not cause the peeling of the joint portion even in the reflow process. The purpose is to provide.

  The present invention comprises a semiconductor element mounting portion, and a plurality of leads that are disposed in the vicinity of the semiconductor element mounting portion so that one end thereof is located and are made of a nickel-containing material. In the lead frame used for mounting, the surface of the joint portion of the lead and at least the wiring pattern of the mounting substrate is nickel-containing so that acicular crystals are not deposited on the lead-free solder surface during the mounting. It is composed of a material having a composition of 3% by mass or less.

  With this configuration, even if nickel diffuses in the solder layer, the amount is 3% by mass or less, so that it is possible to maintain reliable connectivity without causing deterioration in bonding properties. When the temperature exceeds 150 ° C., when Ni and Sn react and the content of Ni is large, an alloy layer is formed, acicular crystals are deposited, the joint is broken, and peeling may occur. Since it is less than mass%, no peeling occurs.

According to the present invention, in the lead frame, the leading end of the lead is coated with a material having a nickel content of 3% by mass or less.
That is, it is not necessary that the whole is coated with a material having a composition with a nickel content of 3% by mass or less, and the nickel content should be reduced only at the tip.

  According to the present invention, in the lead frame, a tip portion of the lead is made of a material having a nickel content of 3% by mass or less.

  With this configuration, if the entire tip of the lead is made of a material having a composition with a nickel content of 3% by mass or less, the lead and the print can be more reliably compared to the case where only the surface layer has this composition ratio. Bondability with the wiring pattern on the substrate can be maintained.

  A semiconductor device according to the present invention includes a semiconductor element mounting portion, a plurality of leads arranged at one end in the vicinity of the semiconductor element mounting portion and made of a nickel-containing material, and the semiconductor element mounting region. A semiconductor element chip mounted and electrically connected to at least one of the leads; and a resin package that covers the semiconductor element chip and exposes an outer end of the lead to the outside. In the semiconductor device used for mounting using free solder, the surface of the joint portion of the lead and at least the wiring pattern of the mounting substrate is 3 mass of nickel so that the needle crystal does not precipitate during the mounting. % Of the material having a composition of less than%.

  With this configuration, if the entire tip of the lead is made of a material having a composition with a nickel content of 3% by mass or less, the lead and the print can be more reliably compared to the case where only the surface layer has this composition ratio. Bondability with the wiring pattern on the substrate can be maintained.

  In the semiconductor device of the present invention, in the semiconductor device described above, the tip of the lead is covered with a material having a composition with a nickel content of 3% by mass or less.

  In the semiconductor device of the present invention, in the semiconductor device described above, the tip of the lead is made of a material having a composition with a nickel content of 3% by mass or less.

  The method for mounting a semiconductor device according to the present invention is such that a lead made of a nickel-containing material of a semiconductor device is placed on a wiring pattern on the surface of a printed circuit board by a solder reflow method via a lead-free solder layer, and a reflow process is performed by heating. A method of mounting a semiconductor device that realizes the above-described method, wherein at least one surface of the wiring pattern or the lead made of a nickel-containing material contains nickel at the joint so that acicular crystals do not precipitate during mounting. It is composed of a material having a composition of 3% by mass or less.

  According to the present invention, in the semiconductor device mounting method, at least the surface of the joint between the lead and the wiring pattern is coated with a material having a composition having a nickel content of 3% by mass or less.

  In the semiconductor device mounting method according to the present invention, the surface of the wiring pattern is coated with a material having a composition with a nickel content of 3% by mass or less.

The present invention is the above semiconductor device mounting method, wherein the wiring pattern is made of a material having a nickel content of 3 mass% or less.
Here, since a normal lead needs to be bent at the time of mounting, it is necessary to maintain the hardness against bending and the wettability of solder. Therefore, in order to improve hardness and wettability, it is desirable that the frame material contains Ni.
Moreover, as a covering material on the surface of the lead or the wiring pattern, a material having a Ni content of 3% by mass or less, such as Sn—Bi, Sn—Ag, Sn, Pd, Pd—Au, is applicable. Further, in order to prevent diffusion of Ni from the substrate, it is desirable to interpose a diffusion preventing layer such as Cu. Further, it has been experimentally found that the diffusion preventing layer may be Ni alone.

  According to the semiconductor device of the present invention, in a lead-free process, there is no fear of peeling of the joint portion even after a reflow process at a high temperature, a lead frame having a high yield and high reliability and a semiconductor device and its semiconductor device It is possible to provide a mounting method.

Next, embodiments of the present invention will be described in detail with reference to the drawings.
(First embodiment)
FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a cross-sectional view of an essential part thereof, and FIG. 3 is a mounting state on a printed circuit board 20 as a mounting board of the semiconductor device. 4 is a perspective view showing an example of mounting a semiconductor chip of a lead frame used in the semiconductor device, FIG. 5 is a diagram showing a lead frame used in the embodiment, and FIG. 6 is a manufacturing process of the semiconductor device. FIG. 7 is a diagram showing a state in which a semiconductor element chip is mounted and wire bonding is performed, FIG. 7 is an explanatory diagram showing a resin sealing process of the semiconductor device, and FIG. 8 is a cross-sectional view of a main part after solder reflow FIG.
This semiconductor device is characterized in that the leads 2a, 2b, 2c and the suspension leads 3a, 3b derived from the resin package 1 are made of Cu-2.0% Sn-0.2% Ni. Thus, the connection with the wiring pattern 21 on the printed circuit board 20 is realized by the solder layer 22 made of lead-free solder, and the semiconductor device is configured not to fall off the printed circuit board 20 even after a plurality of reflow processes. is there.
Further, in this semiconductor device, semiconductor element chips 4 a and 4 b are mounted on die pads 5 a and 5 b as rectangular semiconductor element mounting regions and covered with a resin package 1. Leads 2a, 2b, 2c, 3a, and 3b are led out from the resin package 1.
The outer diameter of this resin package was 2.9 mm × 1.5 mm × 1.1 mm.

  In other words, this semiconductor device includes a lead frame, semiconductor element chips 4a and 4b, and a resin package 1 surrounding the lead frame. Then, the semiconductor element chips 4a and 4b constituting the two transistor chips are respectively mounted and fixed on the die pads 5a and 5b of the lead frame, and the pads of the semiconductor element chips 4a and 4b are connected to the lead terminals 2a, 2b and 2c. 3a and 3b are electrically connected through bonding wires 6, respectively. As described above, the semiconductor element chip electrically connected on the lead frame is sealed with the resin packages 1a and 1b, and the lead led out from the resin packages 1a and 1b is formed into a gull wing type. After resin sealing, prior to mounting on the printed circuit board, the surface of the lead terminal 2b (2a, 2c, 3a, 3b) is covered with a solder layer S0 as shown in FIG. The outer ends of the lead terminals 2a, 2b, 2c, 3a, and 3b are placed on a circuit pattern on a printed circuit board (not shown) via solder and heated at about 245 ° C. by a reflow method. Thus, mounting on the circuit pattern 21 on the surface of the printed circuit board 20 is performed via the lead-free solder layer 22.

  The lead frame has an enlarged perspective view in FIG. 4 and a plan view in FIG. 5, and the first and second semiconductor element chip mounting portions between the two side bars 8 provided with the feed holes 9. A plurality of lead frame units, each comprising a lead pad 2a, 2b, 2c opposite to the suspension leads. is there.

Next, a method for mounting the semiconductor device will be described.
First, a method for manufacturing the lead frame will be described.
In this method, a strip material made of a plate-like body (copper plate) of a Cu-Sn-Ni alloy (trade name MF202H) having a composition ratio of Cu-0.2Sn-0.2Ni is punched and processed as shown in FIG. In addition, a large number of lead frame units each including a die pad 5a, 5b, suspension leads 3a, 3b, and lead terminals 2a, 2b, 2c are sequentially arranged between the side bars 8 provided with the feed holes 9. The shape of the installed lead frame body is processed. At this time, the punching die is changed so that a notch can be formed simultaneously with the punching. When plating is required, the lead m main body surface of the lead frame body formed in this way is subjected to electrolytic plating to lead portions made of a metal layer having a multilayer structure as shown in FIG. 9 (described later). To form a lead frame.

  Next, a method for manufacturing a semiconductor device using this lead frame will be described.

  First, as shown in FIG. 6, the semiconductor element chips 4a and 4b are fixed to the die pads 5a and 5b of the lead frame shown in FIG. Electrical connection with the terminals 2a, 2b and 2c is performed.

  Thereafter, as shown in FIG. 7, epoxy resin is injected into the space areas in the cavity spaces 11 a and 11 b formed by the upper mold 10 a and the lower mold 10 b to form a semiconductor device covered with the resin package 1. To do.

  Finally, after forming the solder layer S0 by plating on the lead surface exposed from the resin package, the side bar 8 is removed, and the lead terminal is formed into a gull wing shape, whereby the semiconductor device shown in FIG. 1 is formed.

Then, when mounted on the printed circuit board 20, reflow is efficiently performed with lead-free solder.
As a result, the cross section of the joint is shown in FIG. As a result of comparing the cross section of the joint portion when the lead frame of the conventional example shown in FIG. 8 and FIG. 10 is used, in the conventional example, Ni contained in the base material m1 made of CAC92 forms an alloy layer with Sn. Since an alloy layer is formed with Cu, the thickness of the alloy layer is increased as shown in FIG. And it turns out that the acicular crystal | crystallization consisting of the Ni-Sn alloy containing Cu is formed in the surface of a lead | read | reed. Sn produces many metals and intermetallic compounds, and the alloy layer growth is promoted as the Sn ratio increases. Particularly in the case of lead-free solder, the Sn ratio increases, resulting in the promotion of alloy layer growth. As the thickness of the alloy layer S1 increases, the rate at which Sn in the solder is mixed increases and the Sn content in the solder decreases, resulting in brittle solder. Thus, it can be seen that the solder layer is bonded to the nickel layer of the lead frame and a cavity is formed. On the other hand, in the present invention, although the alloy layer S1 is slightly thicker, it does not proceed further and maintains a good bonding interface.
According to the present embodiment, even when the reflow process at a high temperature of 245 ° C. was performed about 5 times, a good bonded interface could be obtained without dropping. In addition, the cross-sectional analysis by EDX analysis also maintained strong bonding without the alloy layer becoming thicker or the appearance of needle-like crystals made of Ni-Sn alloy containing Cu.

In addition to the above embodiment, the same experiment was conducted on lead frames having other compositions. When a lead frame with a low Ni content as shown in the following table was used as an example, 100% dropout did not occur, whereas a material as shown in the following table was also used as a lead frame as a comparative example. In some cases, 100% loss occurred. Here, the material of the frame was used as shown below.

  Furthermore, in the present embodiment, the Ni content on the lead surface is 3% by mass or less at the junction with the wiring pattern of the printed circuit board, so that the reflow process has a high temperature of 245 ° C. or higher. However, a good bonding state can be maintained without acicular crystals being precipitated. For this reason, the probability that the bonded state is destroyed is greatly reduced.

(Second Embodiment)
Next, a second embodiment of the present invention will be described.

In the above-described embodiment, the lead is configured in bulk. However, as shown in FIG. 9, a modified example may be configured in which a plating layer is formed on the lead surface to form a two-layer structure.
That is, the die pad, the suspension lead, and the lead are formed by forming a coating layer of a plating layer on a base body m1 made of nickel to form a two-layer structure. And a plating layer m2 made of a Cu layer.
Further, since the nickel content on the surface of the lead exposed from the sealing resin of the semiconductor device is 3% by mass or less, there is no reaction between Ni and Sn, so the formation of the alloy layer is reduced, and even after 5 reflows. The alloy layer S0 formed between the solder layer 22 and the solder layer 22 does not increase greatly and is firmly connected, so that a stable external terminal structure can be formed.
The plating layer may be made of a metal that can stably prevent diffusion of Ni, such as gold, copper, tin, and palladium solder. Also in this case, the solder layer S0 is formed on the surface after resin sealing.

  In the lead frame of the present invention, if the plating layer is made of a metal such as gold, which is easy to form a eutectic with solder, it is possible to make a good connection when mounted on a printed circuit board. . In addition to the diffusion prevention layer, this plating layer may be formed with another plating layer outside thereof to form a multilayer structure.

  Further, although the lead frame manufacturing method of the present invention is formed by the punching method, a combination of the punching method and the etching method or an etching method may be used.

  In the above embodiment, the lead of the lead frame has been described, but the same applies to the wiring pattern of a mounting board such as a printed circuit board, and at least the surface of the joint has a nickel content of 3% by mass or less. By using it, the joining is further ensured. Moreover, peeling of a joint part can also be prevented by using a surface having only a wiring pattern with a nickel content of 3% by mass or less.

  In the above-described embodiment, the mounting of two transistors has been described. However, the present invention can be applied to the case of mounting a single transistor, and is not limited to such a discrete element. Needless to say, the present invention is also applicable.

Furthermore, the material is not limited to the above embodiment and can be applied to various cases. For example, the combinations shown in Table 2 are possible.

  As described above, according to the semiconductor device of the present invention, it is effective in improving the yield of the semiconductor device mounted by the reflow process at a high temperature in the lead-free process.

The figure which shows the semiconductor device which concerns on the 1st Embodiment of this invention The figure which shows the principal part enlarged view of the 1st Embodiment of this invention. The figure which shows the example of mounting of the semiconductor device which concerns on the 1st Embodiment of this invention Explanatory drawing (The state except the resin package is shown) of the semiconductor device which concerns on the 1st Embodiment of this invention The figure which shows a part of manufacturing process of the semiconductor device which concerns on the 1st Embodiment of this invention. The figure which shows a part of manufacturing process of the semiconductor device which concerns on the 1st Embodiment of this invention. The figure which shows a part of manufacturing process of the semiconductor device which concerns on the 1st Embodiment of this invention. The figure which shows the junction part cross section after the reflow of the semiconductor device of the embodiment The figure which shows the principal part of the semiconductor device which concerns on the 2nd Embodiment of this invention. The figure which shows the junction cross-section after the reflow of the semiconductor device of a prior art example

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Resin package 1a Resin package 1b Resin package 2a, 2b, 2c Lead terminal 3a, 3b Suspension lead 4a, 4b Semiconductor element chip 5a, 5b Die pad (semiconductor element mounting part)
5e Extension part 6 Bonding wire 7 Notch 8 Side bar 9 Feed hole m0, m1 Base material m2 Plating layer S0 Solder (alloy) layer S1 Alloy layer

Claims (10)

A semiconductor element mounting portion;
A lead frame that is disposed in the vicinity of the semiconductor element mounting portion so that one end thereof is positioned and includes a plurality of leads made of a nickel-containing material, and is used for mounting using lead-free solder,
The lead is made of a material having a composition with a nickel content of 3% by mass or less so that at least the surface of the joint portion with the wiring pattern of the mounting substrate does not deposit needle crystals on the lead-free solder surface during the mounting. Lead frame. The lead frame according to claim 1,
A lead frame in which the tip of the lead is coated with a material having a nickel content of 3% by mass or less. The lead frame according to claim 1,
A lead frame in which a tip portion of the lead is made of a material having a composition with a nickel content of 3 mass% or less. A semiconductor element mounting portion;
In the vicinity of the semiconductor element mounting portion, a lead frame provided with a plurality of leads disposed with one end and made of a nickel-containing material;
A semiconductor element chip mounted in the semiconductor element mounting region and electrically connected to at least one of the leads; and
A semiconductor device that covers the semiconductor element chip and includes a resin package that exposes the outer end of the lead to the outside, and is used for mounting using lead-free solder,
A semiconductor device in which at least a surface of a joint portion of the lead with a wiring pattern of a mounting substrate is made of a material having a nickel content of 3% by mass or less so that acicular crystals do not precipitate during the mounting. The semiconductor device according to claim 4,
A semiconductor device in which a tip portion of the lead is coated with a material having a nickel content of 3% by mass or less. The semiconductor device according to claim 4,
A semiconductor device in which a tip portion of the lead is made of a material having a composition with a nickel content of 3% by mass or less. A semiconductor device mounting method in which a lead of a semiconductor device is placed on a wiring pattern on a printed circuit board surface by a solder reflow method via a lead-free solder layer, and a reflow process is realized by heating,
At least one surface of the wiring pattern or the lead made of the nickel-containing material is made of a material having a composition with a nickel content of 3% by mass or less at the joint so that the needle-like crystals do not precipitate during mounting. Semiconductor device mounting method. A method for mounting a semiconductor device according to claim 7,
A method for mounting a semiconductor device, wherein at least a surface of a joint portion between the lead and the wiring pattern is coated with a material having a nickel content of 3 mass% or less. A method for mounting a semiconductor device according to claim 8, comprising:
A method for mounting a semiconductor device, wherein a surface of the wiring pattern is coated with a material having a nickel content of 3% by mass or less. A method for mounting a semiconductor device according to claim 8, comprising:
A method for mounting a semiconductor device, wherein the wiring pattern is made of a material having a composition with a nickel content of 3% by mass or less.

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