JP2005097736A - 銅を覆う障壁物質を形成するための半導体処理方法及び組成物 - Google Patents

銅を覆う障壁物質を形成するための半導体処理方法及び組成物 Download PDF

Info

Publication number
JP2005097736A
JP2005097736A JP2004242474A JP2004242474A JP2005097736A JP 2005097736 A JP2005097736 A JP 2005097736A JP 2004242474 A JP2004242474 A JP 2004242474A JP 2004242474 A JP2004242474 A JP 2004242474A JP 2005097736 A JP2005097736 A JP 2005097736A
Authority
JP
Japan
Prior art keywords
solution
compound
cobalt
composition
chelating agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004242474A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005097736A5 (enExample
Inventor
Varughese Mathew
マシュー ヴァルギーズ
Sam S Garcia
エス． ガルシア サム
Christopher M Prindle
エム． プリンドゥル クリストファー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of JP2005097736A publication Critical patent/JP2005097736A/ja
Publication of JP2005097736A5 publication Critical patent/JP2005097736A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemically Coating (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2004242474A 2003-08-27 2004-08-23 銅を覆う障壁物質を形成するための半導体処理方法及び組成物 Pending JP2005097736A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/650,002 US6924232B2 (en) 2003-08-27 2003-08-27 Semiconductor process and composition for forming a barrier material overlying copper

Publications (2)

Publication Number Publication Date
JP2005097736A true JP2005097736A (ja) 2005-04-14
JP2005097736A5 JP2005097736A5 (enExample) 2007-10-04

Family

ID=34217057

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004242474A Pending JP2005097736A (ja) 2003-08-27 2004-08-23 銅を覆う障壁物質を形成するための半導体処理方法及び組成物

Country Status (2)

Country Link
US (1) US6924232B2 (enExample)
JP (1) JP2005097736A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022153914A1 (ja) * 2021-01-18 2022-07-21 東京エレクトロン株式会社 めっき処理方法およびめっき処理装置

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7205233B2 (en) * 2003-11-07 2007-04-17 Applied Materials, Inc. Method for forming CoWRe alloys by electroless deposition
US7268074B2 (en) * 2004-06-14 2007-09-11 Enthone, Inc. Capping of metal interconnects in integrated circuit electronic devices
JP4503401B2 (ja) * 2004-09-08 2010-07-14 株式会社荏原製作所 金属膜の成膜方法及び配線の形成方法
US7176133B2 (en) * 2004-11-22 2007-02-13 Freescale Semiconductor, Inc. Controlled electroless plating
US20080207005A1 (en) * 2005-02-15 2008-08-28 Freescale Semiconductor, Inc. Wafer Cleaning After Via-Etching
US20060280860A1 (en) * 2005-06-09 2006-12-14 Enthone Inc. Cobalt electroless plating in microelectronic devices
US20070049008A1 (en) * 2005-08-26 2007-03-01 Martin Gerald A Method for forming a capping layer on a semiconductor device
JP2009507365A (ja) * 2005-09-01 2009-02-19 エヌエックスピー ビー ヴィ 二重ダムシーン相互接続上のキャッピング層形成
US7410899B2 (en) * 2005-09-20 2008-08-12 Enthone, Inc. Defectivity and process control of electroless deposition in microelectronics applications
US20090045164A1 (en) * 2006-02-03 2009-02-19 Freescale Semiconductor, Inc. "universal" barrier cmp slurry for use with low dielectric constant interlayer dielectrics
US20070184652A1 (en) * 2006-02-07 2007-08-09 Texas Instruments, Incorporated Method for preparing a metal feature surface prior to electroless metal deposition
US20070181653A1 (en) * 2006-02-08 2007-08-09 Michaelson Lynne M Magnetic alignment of integrated circuits to each other
WO2007095972A1 (en) * 2006-02-24 2007-08-30 Freescale Semiconductor, Inc. Semiconductordevice including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprissing multiple organic components for use in a semiconductor device
WO2007095973A1 (en) * 2006-02-24 2007-08-30 Freescale Semiconductor, Inc. Integrated system for semiconductor substrate processing using liquid phase metal deposition
US7378339B2 (en) * 2006-03-30 2008-05-27 Freescale Semiconductor, Inc. Barrier for use in 3-D integration of circuits
US7410544B2 (en) * 2006-04-21 2008-08-12 Freescale Semiconductor, Inc. Method for cleaning electroless process tank
US7772128B2 (en) * 2006-06-09 2010-08-10 Lam Research Corporation Semiconductor system with surface modification
US7572723B2 (en) * 2006-10-25 2009-08-11 Freescale Semiconductor, Inc. Micropad for bonding and a method therefor
US20080254205A1 (en) * 2007-04-13 2008-10-16 Enthone Inc. Self-initiated alkaline metal ion free electroless deposition composition for thin co-based and ni-based alloys
US7807572B2 (en) * 2008-01-04 2010-10-05 Freescale Semiconductor, Inc. Micropad formation for a semiconductor
RU2492279C2 (ru) * 2008-01-24 2013-09-10 Басф Се Неэлектролитическое осаждение барьерных слоев
US9551074B2 (en) * 2014-06-05 2017-01-24 Lam Research Corporation Electroless plating solution with at least two borane containing reducing agents
US10325876B2 (en) 2014-06-25 2019-06-18 Nxp Usa, Inc. Surface finish for wirebonding
US9786634B2 (en) 2015-07-17 2017-10-10 National Taiwan University Interconnection structures and methods for making the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5755859A (en) * 1995-08-24 1998-05-26 International Business Machines Corporation Cobalt-tin alloys and their applications for devices, chip interconnections and packaging
US5695810A (en) 1996-11-20 1997-12-09 Cornell Research Foundation, Inc. Use of cobalt tungsten phosphide as a barrier material for copper metallization
US6551856B1 (en) * 2000-08-11 2003-04-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming copper pad redistribution and device formed
US6605874B2 (en) 2001-12-19 2003-08-12 Intel Corporation Method of making semiconductor device using an interconnect
US6645567B2 (en) 2001-12-19 2003-11-11 Intel Corporation Electroless plating bath composition and method of using
US6528409B1 (en) 2002-04-29 2003-03-04 Advanced Micro Devices, Inc. Interconnect structure formed in porous dielectric material with minimized degradation and electromigration
US6797312B2 (en) * 2003-01-21 2004-09-28 Mattson Technology, Inc. Electroless plating solution and process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022153914A1 (ja) * 2021-01-18 2022-07-21 東京エレクトロン株式会社 めっき処理方法およびめっき処理装置
JP7614232B2 (ja) 2021-01-18 2025-01-15 東京エレクトロン株式会社 めっき処理方法およびめっき処理装置

Also Published As

Publication number Publication date
US6924232B2 (en) 2005-08-02
US20050048773A1 (en) 2005-03-03

Similar Documents

Publication Publication Date Title
JP2005097736A (ja) 銅を覆う障壁物質を形成するための半導体処理方法及び組成物
US7262504B2 (en) Multiple stage electroless deposition of a metal layer
Shacham-Diamand et al. Electroless copper deposition for ULSI
US7279231B2 (en) Electroless plating structure
US8766342B2 (en) Electroless Cu plating for enhanced self-forming barrier layers
CN101578393B (zh) 通过无电镀形成金属薄膜的镀敷物及其制造方法
KR20010082732A (ko) 반도체 디바이스를 제조하기 위한 방법
US20050161338A1 (en) Electroless cobalt alloy deposition process
KR101170560B1 (ko) 반도체 산업에서 사용하기 위한 3성분 물질의 무전해석출용 조성물
US6398855B1 (en) Method for depositing copper or a copper alloy
US7064065B2 (en) Silver under-layers for electroless cobalt alloys
US7332193B2 (en) Cobalt and nickel electroless plating in microelectronic devices
WO2009125255A1 (en) Surface treatment in semiconductor manufacturing
US7622382B2 (en) Filling narrow and high aspect ratio openings with electroless deposition
US20050170650A1 (en) Electroless palladium nitrate activation prior to cobalt-alloy deposition
US20060280860A1 (en) Cobalt electroless plating in microelectronic devices
US7572723B2 (en) Micropad for bonding and a method therefor
US7198662B2 (en) Electroless plating pre-treatment solution and electroles plating method
KR101224205B1 (ko) 반도체 배선용 무전해 은 도금액, 이를 이용한 무전해 도금 공정 및 이에 의해 제조된 은 피막
EP1022355B1 (en) Deposition of copper on an activated surface of a substrate
JP4343366B2 (ja) 基質活性面上の銅析出
KR100522824B1 (ko) 무전해 도금을 이용한 패턴 내 금속배선 형성방법
KR20120063566A (ko) 고안정성 무전해 은 도금액, 이를 이용한 무전해 도금 공정 및 이에 의해 제조된 은 피막

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070820

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070820

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20090804

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090811

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091111

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20100223