JP2005093512A - Method of manufacturing wiring circuit board and multilayer wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide methods of manufacturing a wiring circuit board and a multilayer wiring board, wherein a short circuit hardly occurs between adjacent bumps or interconnect lines. <P>SOLUTION: As shown in Figure (a), a multilayered metal plate 100 is prepared. A bump forming metal layer 103 is composed of two layers, a bump forming metal layer 103a, and a bump forming metal layer 103b whose etching rate is higher than that of the metal layer 103a. As shown in Figure (d), the bump forming metal layer 103 is partially etched to form bumps 106. Thereafter, as shown in Figure (e), an etching stopping layer 102 is removed using the bumps 106 as a mask. As shown in Figure (f), an insulating film 108 is laminated so as to expose only the tops of the bumps 106 for the formation of the wiring circuit board. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a printed circuit board for mounting electronic devices such as IC and LSI and a method for manufacturing a multilayer wiring board, and more particularly to a method for manufacturing a printed circuit board capable of realizing high-density mounting and a method for manufacturing a multilayer wiring board. About.

  In recent years, the progress of semiconductor manufacturing technology is very remarkable, and the miniaturization of semiconductor elements has been realized by the dramatic progress of fine pattern formation technology such as mask process technology and etching technology. In order to highly integrate the wiring board, it is necessary to make the wiring board multi-layered and to form the connection between the upper and lower wirings with high reliability and fineness. For that purpose, for example, a metal film such as copper foil is etched from one surface side by wet etching to form a bump having a trapezoidal longitudinal cross section, and the bump is used as an interlayer film conduction means for conducting between the upper and lower wirings. (For example, Patent Document 1).

  Here, with reference to FIGS. 4 and 5, a process of manufacturing a multilayer wiring board using a wiring circuit board on which a bump made of copper is formed on a copper foil and the bump is formed will be described. 4 and 5 are cross-sectional views of the substrate showing the manufacturing process of the prior art.

  First, as shown in FIG. 4A, a multilayer metal plate 300 is prepared. The multilayer metal plate 300 includes an etching stopper layer 302 made of Ni (nickel) having a thickness of about 2 μm, which is laminated on a wiring forming metal layer 301 made of a copper foil having a thickness of about 18 μm, and an etching stopper layer 302. And a bump-forming metal layer 303 made of a copper foil having a thickness of about 100 μm.

  Next, as shown in FIG. 4B, a resist 304 is applied or laminated on the bump forming metal layer 303. Then, exposure is performed using an exposure mask in which a plurality of circular patterns are formed, and then development is performed, thereby forming a resist mask 305 as shown in FIG. 4C. The resist mask 305 has a circular pattern. Note that the distance between adjacent resist masks is d1.

  Next, as shown in FIG. 4D, the bump forming metal layer 303 is etched using the resist mask 305 as a mask, thereby forming the bumps 306 of the interlayer film conducting means that conducts between the upper and lower wirings.

  Since the resist mask 305 has a circular pattern, the cross-sectional shape of the bump 306 is circular. Further, since etching is performed by wet etching, the bump forming metal layer 303 is isotropically etched. Therefore, the etching solution enters under the resist mask 305, and etching proceeds in the horizontal direction as well as in the vertical direction (side etching). As a result, the vertical cross-sectional shape of the bump 306 is substantially trapezoidal, and the distance between the bottom surfaces of adjacent bumps is d6. In this etching, the etching stopper layer 302 prevents the wiring forming metal layer 301 from being etched when the bump forming metal layer 303 is etched.

  Then, as shown in FIG. 4E, after removing the resist mask 305, the etching stopper layer 302 is etched and removed using the bumps 306 as a mask. At this time, the etching stopper layer 307 is interposed between the bump 306 and the wiring forming metal layer 301. Next, as shown in FIG. 4F, an insulating film 308 such as a resin is pushed from above the bump 306 so that only the top of the bump 306 is exposed, and is bonded to manufacture a printed circuit board 309.

  Next, a manufacturing process of a multilayer wiring board using the wiring circuit board 309 will be described with reference to FIG. As shown in FIG. 5A, wiring circuit boards 309 and 320 and a core board 310 are prepared, and the wiring circuit boards 309 and 320 are arranged on both upper and lower surfaces of the core board 311.

  The core substrate 310 includes an insulating substrate 311 made of a resin or a ceramic material, a wiring 312 made of a metal such as copper, and a through hole 313 for connecting between upper and lower conductors. The wiring 312 is composed of wirings 312a, 312b, and 312c, for example. A wiring 312a is formed on one surface of the insulating substrate 311, and a wiring 312b and a wiring 312c are formed on the other surface. The wirings 312a and 312b provided on the upper and lower surfaces of the insulating substrate 311 are connected by a through-hole 313 for connecting the upper and lower conductors. The through hole 313 is formed by forming a hole in the insulating substrate 311 with a drill and then forming a metal layer 314 such as copper on the inner wall of the hole by plating or the like.

  The printed circuit board 320 is manufactured by the same method as the printed circuit board 309. In the printed circuit board 320, a bump 323 made of copper is formed on a metal layer 321 for wiring formation via an etching stopper layer 322 made of Ni having a thickness of about 2 μm. An insulating film 324 is formed so that the top of the bump 323 is exposed.

  Then, as shown in FIG. 5B, the multilayer wiring board 330 is manufactured by pressing the core board 310 with the printed circuit boards 309 and 320 therebetween. At this time, the printed circuit board 309 and the core board 310 are pressure-bonded so that the tops of the bumps 306 formed on the printed circuit board 301 are in contact with the wiring 312 a formed on the core board 310. In addition, the printed circuit board 320 and the core substrate 310 are pressure-bonded so that the tops of the bumps 323 formed on the printed circuit board 320 are in contact with the wiring 312 c formed on the core substrate 310.

  Next, resist is applied to the upper and lower surfaces of the multilayer wiring board 330, and exposure and development are performed, thereby forming resist masks 331a to 331e having a predetermined pattern as shown in FIG. Note that the distance between the resist masks 331a and 331b adjacent to each other is d3.

  Next, as shown in FIG. 5D, the wiring forming metal layers 301 and 321 are etched using the resist masks 331a to 331e as masks to form wirings 332 (wirings 332a to 332e), and a multilayer wiring board 340 is formed. Is made. Since the etching is performed by wet etching, the wiring forming metal layers 301 and 321 are isotropically etched. Accordingly, the etching solution also enters under the resist mask 331, and etching proceeds in the horizontal direction as well as in the vertical direction (side etching). As a result, the vertical cross-sectional shape of the wiring 332 is substantially trapezoidal, and the distance between the bottom surfaces of the wirings 332a and 332b adjacent to each other is d7.

JP 2001-111189 A (paragraphs [0025]-[0029])

  However, in order to fabricate a circuit having a fine pattern, it is necessary to shorten the distance between adjacent bumps or wirings. However, in the prior art, there is a problem that a short circuit occurs between bumps or wirings. .

  That is, when the bump forming metal layer 303 is etched by wet etching, which is isotropic etching, side etching occurs, so that the vertical cross-sectional shape of the bump 306 is substantially trapezoidal. When the distance d1 between the resist masks 305 is shortened (the design pattern is miniaturized) in order to form a fine pattern, the distance d6 between the bottom surfaces of adjacent bumps is shortened according to the design pattern. A sufficient space cannot be secured between the bottom surfaces of the bumps, and a short circuit occurs between the bottom surfaces of the bumps.

  Similarly, the vertical cross-sectional shapes of the wirings 432a to 432e are substantially trapezoidal due to the influence of side etching. When the distance d3 between the resist masks 431a and 431b is shortened (the design pattern is miniaturized) to form a fine pattern, the distance d7 between the bottom surfaces of the wirings 432a and 432b is shortened according to the design pattern. Therefore, a sufficient space cannot be secured between the bottom surfaces of the wirings, and a short circuit occurs between the wirings 432a and 432b.

  As described above, the short circuit occurs between the bumps or between the wirings because the vertical cross-sectional shape of the bumps and the wirings is substantially trapezoidal, so that a sufficient space cannot be secured between the bottom surfaces.

  The present invention solves the above problem, and even if the distance between the resist masks is shortened to form a fine pattern, a sufficient space can be secured between the bottom surfaces of the bumps or wirings. The present invention provides a printed circuit board and a multilayer wiring board manufacturing method in which no short circuit occurs between bumps and between wirings.

  In the first aspect of the present invention, a first bump forming metal layer is formed on the wiring forming metal layer via an etching stopper layer, and the first bump forming metal layer is formed on the first bump forming metal layer. A resist is applied to or laminated on the second bump-forming metal layer on the multilayer metal plate on which the second bump-forming metal layer having a slower etching rate than the bump-forming metal layer is formed. Forming a resist mask by patterning, and forming a bump by etching the first bump forming metal layer and the second bump forming metal layer using the resist mask as a mask. A bump forming step, and an insulating film laminating step for laminating an insulating film so that a top of the bump is exposed on a surface on which the bump is formed. A method of manufacturing a printed circuit board to be.

  According to the second aspect of the present invention, a first bump forming metal layer is formed on one surface of the etching stopper layer, and the first bump forming metal is formed on the first bump forming metal layer. A second bump forming metal layer having an etching rate slower than that of the first layer is formed, a first wiring forming metal layer is formed on the other surface of the etching stopper layer, and the first wiring forming metal layer is formed. On the second bump-forming metal layer, a multilayer metal plate on which a second wiring-forming metal layer having an etching rate slower than that of the first wiring-forming metal layer is formed. A resist mask forming step of forming a resist mask by applying and patterning a resist, and etching the first bump forming metal layer and the second bump forming metal layer using the resist mask as a mask. A printed circuit board comprising: a bump forming step for forming a bump; and an insulating film stacking step for stacking an insulating film so that a top of the bump is exposed on a surface on which the bump is formed. It is a manufacturing method.

  A third aspect of the present invention is the method for manufacturing a printed circuit board according to the second aspect, wherein a resist is applied or laminated on the second wiring forming metal layer after the insulating film laminating step. A resist mask forming step of forming a resist mask by patterning; and etching the first wiring forming metal layer and the second wiring forming metal layer using the resist mask as a mask, And a wiring forming step to be formed.

  The invention according to claim 4 is a negative-type metal layer on the bump forming metal layer with respect to the multilayer metal plate in which the bump forming metal layer is formed on the wiring forming metal layer via an etching stopper layer. A first resist mask forming step of forming a first resist mask by applying or laminating and patterning a resist, and using the first resist mask as a mask, the bump forming metal layer has a predetermined thickness A bump upper forming step for forming the bump upper portion by etching until a positive resist is formed on the bump forming metal layer etched to a predetermined film thickness while leaving the first resist mask. A second resist that forms a second resist mask on the side surface of the upper portion of the bump by applying or laminating, exposing and developing. And a bump forming metal layer etched to the predetermined film thickness by using the first resist mask and the second resist mask as a mask to further etch the bump under the bump upper portion. A bump forming step of forming a bump by forming a lower portion; and an insulating film laminating step of laminating an insulating film so that a top of the bump is exposed on the surface on which the bump is formed. It is a manufacturing method of a printed circuit board.

  The invention according to claim 5 has an insulating layer and wiring formed in a predetermined pattern on both upper and lower surfaces of the insulating layer, and the upper and lower surfaces of the wiring are formed in the insulating film. A wiring circuit board in which bumps manufactured by the method for manufacturing a wiring circuit board according to claim 2 are formed on both upper and lower surfaces of the core board connected by through holes, and the top of the bumps is the wiring of the core board. A multilayer metal plate that is laminated so as to be in contact with the substrate, a resist mask forming step in which a resist mask is formed by applying or laminating a resist on the upper and lower surfaces of the multilayer metal plate and patterning, and the resist mask. By etching the first wiring formation metal layer and the second wiring formation metal layer as a mask, a wiring formation step for forming a wiring is performed. A method for manufacturing a multilayer wiring board, which comprises the flop, the.

  The invention according to claim 6 includes an insulating layer and wiring formed in a predetermined pattern on both upper and lower surfaces of the insulating layer, and the upper and lower surfaces of the wiring are formed in the insulating film. A wiring circuit board in which bumps manufactured by the method for manufacturing a wiring circuit board according to claim 3 are formed on both upper and lower surfaces of the core board connected by through holes, and the top of the bumps is the wiring of the core board. A method of manufacturing a multilayer wiring board, comprising: a step of producing a multilayer metal plate by being laminated so as to be in contact with each other.

  According to the first and second aspects of the invention, the lower layer can be etched quickly in the lateral direction by performing the etching from the metal layer having a lower etching rate toward the metal layer having a lower etching rate. It becomes possible. As a result, compared to the prior art, it is possible to secure a sufficient space between the bottom surfaces of the bumps, and it is possible to manufacture a printed circuit board that does not cause a short circuit between the bumps even with a fine pattern.

  Further, according to the invention of claim 3, since the lower part of the bump forming metal layer is sufficiently removed by etching stepwise, a sufficient space can be secured between the bottom surfaces of the bumps. Even if it is a fine pattern, it is possible to manufacture a printed circuit board in which no short circuit occurs between bumps.

  Further, according to the invention described in claim 4, by performing the etching from the metal layer having a low etching rate to the metal layer having a high etching rate in the lower layer, the lower layer can be etched quickly in the lateral direction. Become. As a result, it is possible to secure a sufficient space between the bottom surfaces of the wirings as compared with the prior art, and it is possible to manufacture a printed circuit board that does not cause a short circuit between the wirings even with a fine pattern.

  Further, according to the invention described in claim 5 and claim 6, by using a printed circuit board in which sufficient space is secured between the bottom surfaces of the bumps or wirings, even between fine bumps or between wirings. Thus, it becomes possible to manufacture a multilayer wiring board in which no short circuit occurs.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 3.
[First Embodiment]
First, a first embodiment will be described with reference to FIG. FIG. 1 is a cross-sectional view of a substrate illustrating a manufacturing process of a printed circuit board according to the first embodiment of the present invention in the order of steps.

  First, as shown in FIG. 1A, a multilayer metal plate 100 is prepared. This multilayer metal plate 100 was laminated on an etching stopper layer 102 made of Ni having a thickness of about 2 μm, which was laminated on a metal layer 101 for wiring formation made of a copper foil having a thickness of about 18 μm, and further laminated thereon. And a bump forming metal layer 103 made of a copper foil having a thickness of about 100 μm.

  The bump forming metal layer 103 is composed of two metal layers, bump forming metal layers 103a and 103b. The bump forming metal layer 103b is formed on the etching topper layer 102, and the bump forming metal layer 103b is formed on the bump forming metal layer 103b. A bump forming metal layer 103a is formed. The bump forming metal layer 103b is made of a material having a higher etching rate than the bump forming metal layer 103a. Therefore, when wet etching is performed under the same etching conditions (etching solution, etching time, temperature, etc.), the bump forming metal layer 103b is etched faster than the bump forming metal layer 103a. The bump forming metal layer 103a corresponds to the “second bump forming metal layer” of the present invention, and the bump forming metal layer 103b corresponds to the “first bump forming metal layer” of the present invention.

  In order to make a difference in the etching rate, materials having different compositions and crystal structures are used for the bump forming metal layers 103a and 103b. For example, it is possible to make a difference in the etching rate by using copper foils having different hardnesses. As an example, a copper foil having a hardness of about 150 [Hv] is used for the bump forming metal layer 103a, and a copper foil having a hardness of about 80 [Hv] is used for the bump forming metal layer 103b. Since the copper foil having a low hardness has a higher etching rate than the copper foil having a high hardness, the bump forming metal layer 103b has a higher etching rate than the bump forming metal layer 103a. A copper foil having a low hardness (copper foil of about 80 [Hv]) can be obtained, for example, by baking a copper foil having a high hardness (copper foil of about 150 [Hv]) at about 250 ° C. for 15 to 60 minutes. It is also possible to make a difference in etching rate by using rolled copper for one copper foil and plated copper for the other copper foil. Further, it is possible to make a difference by using a copper foil on one side and a copper alloy foil on the other side.

  Next, as shown in FIG. 1B, a resist 104 is applied or laminated on the bump forming metal layer 103a. Then, for comparison with the prior art, exposure is performed using the same exposure mask as the prior art in which a plurality of circular patterns are formed, and then development is performed, as shown in FIG. A resist mask 105 is formed. For example, a negative resist is applied, and the resist 104 is exposed using an exposure mask on which a plurality of circular patterns are formed. Thereafter, the resist that has not been exposed is removed by development, and a resist mask 105 having a circular pattern is formed. By using an exposure mask on which the same pattern as in the conventional technique is used, the distance between the resist masks becomes d1 as in the conventional technique.

  Then, as shown in FIG. 1D, the bump forming metal layer 103 is etched using the resist mask 105 as a mask to form the bump 106. This etching is performed by wet etching, and the etching solution used cannot etch the etching stopper layer 102 made of Ni, but uses an etching solution that can etch the bump forming metal layer 103. Since patterning is performed using an exposure mask on which a circular pattern is formed, the cross-sectional shape of the bump 106 has a circular shape.

  In this etching step, etching is performed from the bump forming metal layer 103a toward the bump forming metal layer 103b. Since the etching rate of the bump forming metal layer 103b is faster than the etching rate of the bump forming metal layer 103a, the bump forming metal layer 103b is etched faster in the lateral direction. At this time, the distance between the bottom surfaces of the adjacent bumps 106 is d2. This distance d2 is longer than the distance d6 between the bottom surfaces of the bumps 306 formed by the conventional technique (d2> d6). Thus, even if the distance between the adjacent resist masks 105 is the same as d1 in the prior art, the distance between the bumps after etching becomes longer than that in the prior art. This is because the bump forming metal layer 103b is etched faster in the lateral direction than the conventional technique because the etching speed of the bump forming metal layer 103b is faster than the etching speed of the bump forming metal layer 103a. .

  In this etching step, the etching stopper layer 102 prevents the wiring forming metal film 101 from being etched. Then, the resist mask 105 used as an etching mask is removed. FIG. 1D shows a state after the resist mask 105 is peeled off.

  Then, as shown in FIG. 1E, the etching stopper layer 102 is etched and removed using the bump 106 as a mask. At this time, the etching stopper layer 107 is interposed between the bump 106 and the wiring forming metal layer 101b. In this etching, the metal constituting the bump 106 (copper in this embodiment) is not etched, but the metal constituting the etching stopper layer 102 (Ni in this embodiment) is etched. Liquid (Ni stripping solution) is used.

  Then, as shown in FIG. 1F, the printed circuit board 120 is manufactured by laminating the insulating film 108 on the surface on which the bumps 106 are formed by pressure bonding with a hot press or a heat roller. At this time, a material that is appropriately thinner than the height of the bump 106 is used so that only the top of the bump 106 is exposed from the surface of the insulating film 108. For this insulating film 108, a resin, a ceramic material, or the like is used. In the case of using a ceramic material, the ceramic material constituting the insulating film 108 is pulverized in advance, and the ceramic material and resin are mixed to prepare a plurality of green sheets.

  The insulating film 108 is formed by applying an insulating material made of a liquid polyimide resin, epoxy resin, or the like in a precursor state by a curtain coater, a blade blade method, a bar coater, a screen printing method, or the like, and baking it. May be. Furthermore, a thermoplastic resin may be used in addition to a polyimide resin or an epoxy resin. As this thermoplastic resin, liquid crystal polymer, PEEK, PES, PPS, PET, or the like is used and molded by the T-die method.

  As described above, the bump forming metal layer is divided into two layers, and etching is performed from the metal layer with a slow etching rate to the metal layer with a fast etching rate in the lower layer, thereby quickly etching the lower layer in the horizontal direction. It becomes possible to do. As a result, even with the same design pattern as that of the prior art, a sufficient space can be secured between the bottom surfaces of the bumps, and a printed circuit board that does not cause a short circuit between the bumps even with a fine pattern can be manufactured. It becomes possible.

  In this embodiment, a multilayer metal plate in which the bump forming metal layer is divided into two layers is used, but the present invention is not limited to this. A multilayer metal plate in which a plurality of layers having a low etching rate are laminated from the lower layer to the upper layer or the etching rate is continuously changed may be used by dividing into three or more layers.

[Second Embodiment]
A second embodiment will be described with reference to FIG. FIG. 2 is a cross-sectional view of the substrate showing the manufacturing process of the multilayer wiring substrate in the second embodiment of the present invention in the order of steps.

  First, as shown in FIG. 2A, a multilayer metal plate 130 is prepared. The multilayer metal plate 130 has substantially the same configuration as the multilayer metal plate 100 in the first embodiment. However, not only the bump forming metal layer 103 but also the wiring forming metal layer 101 includes the wiring forming metal layer 101a. And 101b are two different metal layers. The wiring forming metal layer 101b is made of a material having an etching rate faster than that of the wiring forming metal layer 101a. The wiring forming metal layer 101b is formed on the etching stopper layer 102, and the wiring forming metal layer 101a is formed thereon. Is formed. The wiring forming metal layer 101a corresponds to the “second wiring forming metal layer” of the present invention, and the wiring forming metal layer 101b corresponds to the “first wiring forming metal layer” of the present invention.

  Similar to the first embodiment, the etching rate is differentiated by using copper foils having different hardnesses. As an example, by using a copper foil having a hardness of about 150 [Hv] for the wiring forming metal layer 101a and using a copper foil of about 80 [Hv] for the wiring forming metal layer 101b, a wiring forming metal layer is obtained. The etching rate of 101b is faster than that of the wiring forming metal layer 101a.

  Next, as in the first embodiment, the bump forming metal layer 103 is etched to form the bump 106, and then the etching stopper layer 102 is removed, and the insulating film 108 is stacked, whereby FIG. A printed circuit board 140 is prepared as shown in FIG.

  Next, as shown in FIG. 2C, the wiring circuit boards 140 and 150 and the core board 160 are prepared, and the wiring circuit boards 140 and 150 are arranged on both the upper and lower surfaces of the core board 160. The printed circuit board 140 is manufactured by the above-described printed circuit board manufacturing method. Further, the printed circuit board 150 is manufactured by the same process as the printed circuit board 140 only by changing the pattern of the exposure mask.

  The core substrate 160 includes an insulating substrate 161 made of a resin or a ceramic material, a wiring 162 made of a metal such as copper, and a through-hole 133 for connecting between upper and lower conductors. The wiring 162 includes wirings 162a, 162b, and 162c. A wiring 162a is formed on one surface of the insulating substrate 161, and a wiring 162b and a wiring 162c are formed on the other surface. Then, the wirings 162a and 162b provided on the upper and lower surfaces of the insulating substrate 131 are connected by a through hole 163 for connecting the upper and lower conductors. The through-hole 163 for connecting the upper and lower conductors is produced by forming a hole in the insulating substrate 161 with, for example, a drill and then forming a metal layer 164 such as copper on the inner wall of the hole by plating.

  Then, the printed circuit board 140 and the core board 160 are pressure-bonded so that the bumps 106 of the printed circuit board 140 are in contact with the wiring 162 a formed on one surface of the core board 160. Further, the printed circuit board 150 and the core board 160 are pressure-bonded so that the bumps 106 of the printed circuit board 150 are in contact with the wiring 162 c formed on the other surface of the core board 160. Then, temporary baking is performed at a temperature of 200 ° C to 300 ° C.

  Next, a resist is applied or laminated on the wiring forming metal layer 101a. For comparison with the conventional technique, resist masks 171a to 171e having a predetermined pattern are formed as shown in FIG. 2D by performing exposure and development using the same exposure mask as the conventional technique. To do. By using an exposure mask on which the same pattern as that in the conventional technique is used, the distance between the resist masks 171a and 171b becomes d3 which is the same as that in the conventional technique.

  Then, using the resist masks 171a to 171e as a mask, the wiring forming metal layer 101 is etched to form wirings 172a to 172e. For example, the wirings 172a, 172b, and 172d are formed on the bumps 106 with the etching stopper layer 107 interposed therebetween. By forming the bump and the wiring in this way, the bump and the wiring are electrically connected, and each bump functions as an interlayer connection means.

  The distance between the adjacent wirings 172a and 172b is d4. This distance d4 is longer than the distance d7 between the wirings 332a and 332b formed by the conventional technique (d4> d7). Thus, even if the distance between adjacent resists is the same d3 as in the prior art, the distance between the interconnects after etching becomes longer than in the prior art. This is because the wiring forming metal layer 101b is etched faster in the lateral direction than the prior art because the etching speed of the wiring forming metal layer 101b is faster than the etching speed of the wiring forming metal layer 101a. .

  As described above, the metal layer for wiring formation is divided into two layers, and etching is performed from the metal layer with a lower etching rate toward the metal layer with a lower etching rate, thereby quickly etching the lower layer in the horizontal direction. It becomes possible to do. As a result, even if the design pattern is the same as that of the prior art, a sufficient space can be secured between the bottom surfaces of the bumps, and a multilayer wiring board that does not cause a short circuit between the wirings even if the pattern is fine can be manufactured. It becomes possible. Further, like the bump forming metal layer, the wiring forming metal layer may be divided into three or more layers.

  In the present embodiment, the wiring circuit boards 140 and 150 are stacked on both surfaces of the core substrate 160, and then the wiring is formed by etching the wiring forming metal layer 101. However, the present invention is not limited to this. The wiring forming metal layer 101 of the wiring circuit boards 140 and 150 may be etched in advance to form wiring, and then laminated on the core substrate 160 to produce a multilayer wiring board.

[Third Embodiment]
A third embodiment will be described with reference to FIG. FIG. 3 is a cross-sectional view of a substrate showing the steps of manufacturing a printed circuit board according to the third embodiment of the present invention in the order of steps.

  As shown in FIG. 3A, a multilayer metal plate 200 is prepared. This multilayer metal plate 200 was laminated on a wiring forming metal layer 201 made of a copper foil having a thickness of about 18 μm, and an etching stopper layer 202 made of Ni having a thickness of about 2 μm, and further laminated thereon. And a bump-forming metal layer 203 made of a copper foil having a thickness of about 100 μm.

  Next, a negative resist (not shown) is applied or laminated on the bump-forming metal layer 203, and exposure is performed using the same exposure mask as in the prior art in which a plurality of circular patterns are formed. By performing development, a resist mask 205 is formed as shown in FIG. By using an exposure mask on which the same pattern as in the conventional technique is formed, the distance between the resist masks is the same as d1 in the conventional technique.

  Then, as shown in FIG. 3C, using the resist mask 205 as a mask, the bump forming metal layer 203 is etched by wet etching until a predetermined film thickness is obtained, thereby forming the bump upper portion 206a. Since patterning is performed using an exposure mask on which a circular pattern is formed, the cross-sectional shape of the bump upper portion 206a is circular. Further, the vertical cross-sectional shape of the bump upper portion 206a is substantially trapezoidal due to the influence of side etching.

  Next, as shown in FIG. 3D, a positive resist 207 is applied or laminated on the bump forming metal layer 203. At this time, a resist 207 is also applied or laminated on the side surface of the bump upper portion 206a and the resist mask 205.

  Next, the resist 207 is irradiated with light at an angle perpendicular to the substrate to expose the entire surface, and then developed. By exposing the entire surface using a positive resist, the resist 207 is almost completely removed. However, since the exposure is performed by irradiating light at an angle perpendicular to the substrate, the bump upper portion 206a is exposed. Only the resist applied or laminated on the side surfaces of the bumps remains without being exposed to light, and as shown in FIG. 3E, a resist mask 208 is formed on the side surfaces of the bump upper portion 206a. As a result, a negative resist mask 205 is formed on the upper surface of the bump upper portion 206a, and a positive resist mask 208 is formed on the side surface of the bump upper portion 206a.

  Next, as shown in FIG. 3F, the bump-forming metal layer 203 is etched using the resist mask 205 and the resist mask 208 as a mask to form a bump lower portion 206b under the bump upper portion 206a. Since the bump upper portion 206a is protected by the resist masks 205 and 208, it is not etched in this etching process. In this manner, the bump 206 is formed by forming the bump lower portion 206b under the bump upper portion 206a. That is, the bump 206 is formed by etching the bump forming metal layer 203 in two stages.

  At this time, the distance between the bottom surfaces of the adjacent bumps 206 is d5, which is longer than the distance d6 between the bottom surfaces of the bumps 306 formed by the conventional technique (d5> d6). Thus, even if the distance between adjacent resist masks 205 is the same as d1 in the prior art, the distance between the bumps after etching is longer than that in the prior art. This is because the lower part of the bump forming metal layer 203 is sufficiently removed by etching in two steps as compared with the prior art. That is, when etched at once, the lower part of the bump forming metal layer is etched less than the upper part and is not sufficiently etched. However, by performing etching in two stages, the lower part of the bump forming metal layer is also sufficient. It is because it is etched. As a result, it is possible to ensure a sufficient space between the bottom surfaces of adjacent bumps.

  Next, after removing the resist masks 205 and 208, the etching stopper layer 202 is removed by etching using the bumps 206 as a mask, and further, an insulating film 210 is laminated on the surface on which the bumps 206 are formed, thereby forming a printed circuit board. Is made. Note that the etching stopper layer 209 is interposed between the bump 206 and the wiring forming metal layer 201 by removing the etching stopper layer 202 using the bump 206 as a mask.

  As described above, by etching the bump-forming metal layer 103 in two steps, a sufficient space can be secured between the bottom surfaces of the bumps even if the design pattern is the same as that of the prior art. Even so, it is possible to manufacture a printed circuit board in which no short circuit occurs between the bumps. Further, the bump forming metal layer 103 may be etched in three or more stages.

  It should be noted that the printed circuit board produced in this embodiment can be laminated on the core substrate 160 to produce a multilayer wiring board. In that case, the wiring forming metal layer 201 is etched in two stages in the same manner as the bump forming metal layer 203 to form wiring. As a result, it is possible to manufacture a multilayer wiring board in which no short circuit occurs between the wirings. Further, before being stacked on the core substrate 160, the wiring forming metal layer 201 may be etched in two stages to form wiring.

It is sectional drawing of the board | substrate which shows the manufacturing method of the printed circuit board in the 1st Embodiment of this invention in order of a process. It is sectional drawing of the board | substrate which shows the manufacturing method of the multilayer wiring board in the 2nd Embodiment of this invention in process order. It is sectional drawing of the board | substrate which shows the manufacturing method of the printed circuit board in the 3rd Embodiment of this invention in process order. It is sectional drawing of the board | substrate which shows the manufacturing method of the printed circuit board in a prior art in order of a process. It is sectional drawing of the base | substrate which shows the manufacturing method of the multilayer wiring board in a prior art in order of a process.

Explanation of symbols

100, 200 Multilayer metal plate 101, 201 Wiring forming metal layer 102, 107, 202, 209 Etching stopper layer 103, 203 Bump forming metal layer 104 Resist 105, 205 Resist mask 106, 206 Bump 108, 210 Insulating film 120, 140, 150 Wiring circuit board 160 Core board

Claims (6)

A first bump-forming metal layer is formed on the wiring-forming metal layer via an etching stopper layer, and the first bump-forming metal layer is formed on the first bump-forming metal layer more than the first bump-forming metal layer. For the multilayer metal plate on which the second bump forming metal layer having a low etching rate is formed,
A resist mask forming step of forming a resist mask by applying or laminating a resist on the second bump-forming metal layer and patterning;
Forming a bump by etching the first bump-forming metal layer and the second bump-forming metal layer using the resist mask as a mask; and
An insulating film laminating step of laminating an insulating film so that the top of the bump is exposed on the surface on which the bump is formed;
A method of manufacturing a printed circuit board, comprising: A first bump-forming metal layer is formed on one surface of the etching stopper layer, and an etching rate is lower on the first bump-forming metal layer than the first bump-forming metal layer. Two bump forming metal layers are formed, a first wiring forming metal layer is formed on the other surface of the etching stopper layer, and the first wiring forming metal layer is formed on the first wiring forming metal layer. For the multilayer metal plate on which the second metal layer for wiring formation having a slower etching rate than the metal layer for wiring formation is formed,
A resist mask forming step of forming a resist mask by coating or laminating a resist on the second bump-forming metal layer and patterning;
Forming a bump by etching the first bump-forming metal layer and the second bump-forming metal layer using the resist mask as a mask; and
An insulating film laminating step of laminating an insulating film so that the top of the bump is exposed on the surface on which the bump is formed;
A method of manufacturing a printed circuit board, comprising: After the insulating film stacking step, a resist mask forming step of forming a resist mask by applying or laminating a resist on the second wiring forming metal layer and patterning;
Forming a wiring by etching the first wiring forming metal layer and the second wiring forming metal layer using the resist mask as a mask; and
The manufacturing method of the printed circuit board of Claim 2 characterized by the above-mentioned. For the multilayer metal plate in which the bump forming metal layer is formed on the wiring forming metal layer via the etching stopper layer,
A first resist mask forming step of forming or forming a first resist mask by applying or laminating a negative resist on the bump forming metal layer and patterning;
An upper bump forming step for forming an upper bump by etching the bump forming metal layer to a predetermined film thickness using the first resist mask as a mask;
By applying or laminating a positive resist on the bump forming metal layer that has been etched to a predetermined thickness while leaving the first resist mask, exposure and development are performed. A second resist mask forming step of forming a second resist mask on the side surface;
Using the first resist mask and the second resist mask as a mask, the bump forming metal layer etched to the predetermined thickness is further etched to form a bump lower portion under the bump upper portion. A bump forming step for forming a bump by:
An insulating film laminating step of laminating an insulating film so that the top of the bump is exposed on the surface on which the bump is formed;
A method of manufacturing a printed circuit board, comprising: A core having an insulating layer and wiring formed in a predetermined pattern on both upper and lower surfaces of the insulating layer, wherein the upper and lower wirings are connected by through-holes formed in the insulating film; On the top and bottom sides of the board,
A step of producing a multilayer metal plate by laminating a printed circuit board on which bumps manufactured by the method for manufacturing a printed circuit board according to claim 2 are formed such that the tops of the bumps are in contact with the wiring of the core board. When,
A resist mask forming step of forming a resist mask by applying or laminating a resist on the upper and lower surfaces of the multilayer metal plate and patterning;
Forming a wiring by etching the first wiring forming metal layer and the second wiring forming metal layer using the resist mask as a mask; and
A method for producing a multilayer wiring board, comprising: A core having an insulating layer and wiring formed in a predetermined pattern on both upper and lower surfaces of the insulating layer, wherein the upper and lower wirings are connected by through-holes formed in the insulating film; On the top and bottom sides of the board,
A step of producing a multilayer metal plate by laminating a printed circuit board on which bumps manufactured by the method for manufacturing a printed circuit board according to claim 3 are formed such that the top of the bumps contacts the wiring of the core board. A method for producing a multilayer wiring board, comprising:

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