JP2005026317A - Laminated module board, its manufacturing method, and semiconductor ic mounting module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable a laminated module board with a built-in decoupling capacitor to be reduced in size and manufacturing costs. <P>SOLUTION: The laminated module board is equipped with insulating layers 113 and 115 and conductive layers 114 which are alternately stacked, and capacitor elements are each composed of the adjacent conductive layers and the insulating layer sandwiched between them. A plurality of electrode pads 134 electrically connected to semiconductor ICs are provided on a mounting surface 100a substantially perpendicular to the lamination planes of the insulating layers 113 and 115 and the conductive layers 114, and the semiconductor ICs are mounted on the electrode pads 134 so as to constitute a semiconductor IC mounting module. By this setup, the laminated module board can be improved enough in capacity without increasing its size so much in two-dimensional directions, and a large number of viaholes or viahole conductors are not required to be formed, so that the laminated module board can be restrained from increasing in manufacturing cost. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a laminated module substrate and a manufacturing method thereof, and more particularly to a laminated module substrate having a built-in decoupling capacitor and a manufacturing method thereof. The present invention also relates to a semiconductor IC mounting module, and more particularly to a semiconductor IC mounting module having a multilayer module substrate with a built-in decoupling capacitor.
[0002]
[Prior art]
In recent years, the operating frequency of a semiconductor IC typified by a CPU (Central Processing Unit) and the frequency of a high-frequency signal handled by a power amplifier IC are increasing. Power amplifier ICs that handle high-frequency semiconductor ICs and high-frequency signals are very susceptible to power supply noise. When this occurs, voltage drops occur due to the parasitic resistance and parasitic inductance of the power supply wiring and ground wiring, and the semiconductor IC It may cause malfunction. In order to prevent such a voltage drop caused by power supply noise, generally between power supplies of a semiconductor IC (between a power supply terminal connected to a power supply potential (Vcc) and a ground terminal connected to a ground potential (GND)). A decoupling capacitor is connected to. If a decoupling capacitor is connected between the power supplies of the semiconductor IC, the impedance of the power supply wiring and the ground wiring is reduced, so that a voltage drop caused by power supply noise can be effectively suppressed.
[0003]
The impedance required for the power supply wiring and the ground wiring is proportional to the operating voltage of the semiconductor IC and inversely proportional to the integration degree, switching current, and operating frequency of the semiconductor IC. Therefore, in recent semiconductor ICs having a high degree of integration, a low operating voltage, and a high operating frequency and high frequency signal frequency, the impedance required for the power supply wiring and ground wiring is very small. In order to achieve such a low impedance, it is necessary to increase the capacity of the decoupling capacitor and to reduce the inductance of the wiring connecting the power supply terminal or the ground terminal of the semiconductor IC and the decoupling capacitor as much as possible.
[0004]
As a large-capacity decoupling capacitor, an electrolytic capacitor or a multilayer ceramic capacitor is generally used. In order to suppress wiring inductance, it is necessary to dispose these capacitors as close as possible to the power supply terminal and ground terminal of the semiconductor IC. However, due to layout restrictions, it may be difficult to place an electrolytic capacitor, a multilayer ceramic capacitor, or the like in the vicinity of the power supply terminal or ground terminal of the semiconductor IC. In addition, in order to obtain a larger capacity, it is necessary to use a large number of these electrolytic capacitors and multilayer ceramic capacitors. In this case, there is a problem that the cost of the parts is significantly increased.
[0005]
As a technique for solving such a problem, Patent Document 1 proposes a technique of incorporating a decoupling capacitor in a multilayer module substrate on which a semiconductor IC is mounted. According to such a technique, it is not necessary to use an electrolytic capacitor or a multilayer ceramic capacitor as a separate component, and thus the number of components can be reduced.
[0006]
[Patent Document 1] Japanese Patent Laid-Open No. 6-338587
[0007]
[Problems to be solved by the invention]
However, the laminated module substrate shown in Patent Document 1 constitutes a large-capacity decoupling capacitor because the laminated surface of the capacitive electrode and capacitive insulating film constituting the decoupling capacitor is parallel to the mounting surface of the semiconductor IC. In order to do so, it is necessary to increase the size in the plane direction, and it becomes difficult to reduce the size of the laminated module substrate. In addition, since a large number of via holes and via hole conductors must be formed on the laminated module substrate, there is a problem that the manufacturing cost increases.
[0008]
Accordingly, an object of the present invention is to provide a multilayer module substrate and a method for manufacturing the same, which are easy to downsize and increase the capacity of a decoupling capacitor and are low in manufacturing cost.
[0009]
Another object of the present invention is to provide a semiconductor IC mounting module having the above laminated module substrate.
[0010]
[Means for Solving the Problems]
The multilayer module substrate according to the present invention is a multilayer module substrate that includes a plurality of insulating layers and a plurality of conductive layers that are alternately stacked, and in which a capacitive element is configured by adjacent conductive layers and insulating layers that exist between the conductive layers. A plurality of electrode pads for electrical connection with the semiconductor IC are provided on a surface substantially perpendicular to the laminated surface of the insulating layer and the conductive layer.
[0011]
As described above, the laminated module substrate according to the present invention is different from the laminated module substrate described in Patent Document 1 in that the surface substantially perpendicular to the laminated surface of the insulating layer and the conductive layer is the surface on which the semiconductor IC is mounted. Therefore, a sufficient capacity can be obtained without increasing the size in the plane direction so much. As a result, a small-sized and large-capacity decoupling capacitor can be built in, so even when a semiconductor IC having a high operating frequency such as a CPU or a power amplifier IC or a semiconductor IC handling a high-frequency signal is mounted. IC malfunctions can be effectively suppressed. Moreover, since the stacking direction is as described above, it is not necessary to form a large number of via holes and via hole conductors, and the manufacturing cost can be reduced.
[0012]
In a preferred embodiment of the present invention, at least one of the plurality of electrode pads is connected to one of adjacent conductive layers, and at least one of the plurality of electrode pads is connected to the other of the adjacent conductive layers. . In a preferred embodiment of the present invention, at least a part of a surface substantially perpendicular to the laminated surface among the surfaces of the laminated substrate constituted by the plurality of insulating layers and the plurality of conductive layers is provided. It is covered with an insulator, and the electrode pad is provided on the surface of the insulator. In a preferred embodiment of the present invention, the electrode pad and the conductive layer are connected through a conductive pattern formed on the surface of the insulator. In another preferred embodiment of the present invention, The electrode pad and the conductive layer are connected via a plated conductor or a through-hole electrode provided through the insulator.
[0013]
Furthermore, in a preferred embodiment of the present invention, a heat radiation ground pattern is further provided on the same surface as the electrode pad, and the ground pattern is connected to one or more conductive layers. Yes. With such a configuration, the heat generated by the semiconductor IC can be efficiently radiated to the laminated module substrate.
[0014]
The method of manufacturing a laminated module substrate according to the present invention includes a step of forming a laminated matrix by alternately laminating a plurality of insulating layers and a plurality of conductive layers, and the insulating layer and the conductive layer among the surfaces of the laminated matrix. A step of forming an insulator on a surface substantially perpendicular to the laminated surface, a plurality of electrode pads for electrically connecting a semiconductor IC to the surface of the insulator, and the electrode pads and the conductive layer And a step of forming a conductive pattern for connecting to the substrate and a step of taking out the laminated module substrate by cutting the laminated matrix. According to the present invention, since a large number of laminated module substrates having the above-described effects can be obtained, it is possible to reduce manufacturing costs.
[0015]
Further, in a preferred embodiment of the present invention, a step of forming a plurality of through holes including at least through holes for external terminals in the laminated matrix, and a step of forming a conductor inside the plurality of through holes. In addition, in the step of taking out the laminated module substrate, the external terminals are formed by cutting the laminated base body along the through holes for the external terminals. According to such a method, since the conductor formed inside the through hole by cutting becomes a half through hole conductor, it is possible to share the through hole between adjacent laminated module substrates, and the through hole to be formed It is possible to reduce the number of holes.
[0016]
In a preferred embodiment of the present invention, the insulating matrix further includes a step of forming a notch by grinding a part of a surface substantially perpendicular to the stacked surface of the surface of the stacked matrix. The step of forming the body is performed by filling the notch with an insulator. On the other hand, in another preferred embodiment of the present invention, plating is selectively applied to a part of the conductive layer exposed from a surface substantially perpendicular to the laminated surface of the surface of the laminated matrix. The step of selectively forming a plated conductor by the step of forming the insulator, the step of covering the plated conductor with an insulator, and further polishing the surface of the insulator to polish the plated conductor A step of exposing the tip portion of.
[0017]
A semiconductor IC mounting module according to the present invention includes a laminated module substrate having a plurality of insulating layers and a plurality of conductive layers alternately laminated, and a laminated surface of the insulating layer and the conductive layer among the surfaces of the laminated module substrate. A power supply terminal of the semiconductor IC is connected to one of adjacent conductive layers, and a ground terminal of the semiconductor IC is connected to the other of the adjacent conductive layers. It is characterized by being. According to the present invention, since a small and large-capacity decoupling capacitor is built in the multilayer module substrate, this semiconductor IC is a semiconductor IC that handles a high-frequency signal such as a semiconductor IC such as a CPU or a power amplifier IC. Even so, it is possible to effectively suppress malfunction of the semiconductor IC.
[0018]
Also, in a preferred embodiment of the present invention, a surface substantially perpendicular to the laminated surface of the insulating layer and the conductive layer is connected to the heat dissipation pattern of the semiconductor IC among the surfaces of the laminated module substrate. A ground pattern is provided, and the ground pattern is connected to one or more conductive layers. With such a configuration, as described above, it is possible to efficiently dissipate heat generated by the semiconductor IC to the multilayer module substrate.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0020]
FIG. 1 is a schematic perspective view showing a laminated module substrate 100 according to a preferred embodiment of the present invention, and FIG. 2 is a schematic sectional view of the laminated module substrate 100 cut along the line AA shown in FIG. FIG. 3 is a schematic cross-sectional view of the laminated module substrate 100 taken along the line BB shown in FIG.
[0021]
As shown in FIG. 1, the laminated module substrate 100 according to the present embodiment is provided so as to fill a laminated base 110 and a notch 111 provided on one main surface 110 a and the other main surface 110 b of the laminated base 110. Insulator 120, conductive pattern 130 provided on the surface of insulator 120, and half through-hole conductor (external terminal) 140 provided on the side surface of multilayer substrate 110, and semiconductor IC on mounting surface 100a The semiconductor IC mounting module is configured by mounting.
[0022]
The laminated substrate 110 has a structure in which insulating layers and conductive layers are alternately laminated in a direction substantially orthogonal to the mounting surface 100a. More specifically, as shown in FIG. 2 and FIG. 3, it is composed of six laminated units 112 and three thick film insulating layers 113, and three laminated units 112 are sandwiched between the thick film insulating layers 113. It has a configuration. Each stacked unit 112 has a configuration in which a conductive layer 114 and a thin film insulating layer 115 are stacked. One of the adjacent conductive layers 114 is used as a power supply conductive layer 114a, and the other is used as a ground conductive layer 114b. Used. In the present embodiment, among the conductive layers 114 included in the three consecutive laminated units 112, the conductive layers at both ends are the power supply conductive layers 114a, and the central conductive layer is the ground conductive layer 114b. In this specification, the term “conductive layer” simply refers to both the power supply conductive layer and the ground conductive layer.
[0023]
As the material of the thick film insulating layer 113 and the thin film insulating layer 115, it is preferable to use a resin or a composite material obtained by mixing a functional material powder such as ceramic (magnetic powder or dielectric powder) with a resin. It is preferable to use a thermosetting resin or a thermoplastic resin as the resin.
[0024]
Specific examples of thermosetting resins include epoxy resins, phenol resins, unsaturated polyester resins, vinyl ester resins, polyimide resins, phophenylylene ether (oxide) resins, bismaleimide triazine (cyanate ester) resins, and fumarate. Resins, polybutadiene resins, polyvinyl benzyl ether compound resins, and the like can be used.
[0025]
The thermoplastic resins include polybutadiene resin, aromatic polyester resin, polyphenylene sulfide resin, polyphenylylene ether (oxide) resin, polyethylene terephthalate resin, polybutylene terephthalate resin, polyethylene sulfide resin, polyether teterketone resin, poly Tetrafluoroethylene resin, polyether tetraketone resin, polytetrafluoroethylene resin graft resin, phenol resin, epoxy resin, low dielectric constant epoxy resin, bismaleimide triazine (cyanate ester) resin, vinyl benzyl resin, etc. can be used, Among these, phenol resin, epoxy resin, low dielectric constant epoxy resin, polybutadiene resin, bismaleimide triazine (cyanate ester) resin, among others It is preferable to use a vinyl benzyl resin as a base resin. These resins may be used alone or in combination of two or more. The mixing ratio in the case of mixing two or more types is arbitrary.
[0026]
In addition, as an inorganic material in the case of constituting a composite material, in order to obtain a relatively high dielectric constant, titanium-barium-neodymium ceramics, titanium-barium-tin ceramics, lead-calcium ceramics, titanium dioxide series Ceramics, barium titanate ceramics, calcium titanate ceramics, strontium titanate ceramics, calcium titanate ceramics, CaWO ₄ Ceramics, Ba (Mg, Nb) O ₃ Ceramics, Ba (Mg, Ta) O ₃ Ceramics, Ba (Co, Mg, Nb) O ₃ Ceramics, Ba (Co, Mg, Ta) O ₃ It is preferable to use a ceramic.
[0027]
The titanium dioxide-based ceramics refers to those containing the titanium dioxide crystal structure, including those containing only titanium dioxide and those containing a small amount of other additives. The same applies to other ceramics. In particular, titanium dioxide ceramics preferably have a rutile structure.
[0028]
In order to obtain a high Q without increasing the dielectric constant, silica powder, alumina, zirconia, potassium titanate whisker, calcium titanate whisker, and barium titanate whisker are used as the dielectric powder mixed with the resin material. Zinc oxide whiskers, glass chops, glass beads, carbon fibers, magnesium oxide (talc) and the like are preferably used. These resins may be used alone or in combination of two or more. The mixing ratio in the case of mixing two or more types is arbitrary.
[0029]
Moreover, when using a magnetic body for the inorganic material mixed with the resin material, the ferrite is preferably Mn—Mg—Zn, Ni—Zn, Mn—Zn, or the like. Further, a ferromagnetic metal can be used as the magnetic material. In this case, carbonyl iron, iron-silicon alloy, iron-aluminum-silicon alloy (trade name: Sendust), iron-nickel alloy (trade name: Permalloy). It is preferable to use an amorphous system (iron system, cobalt system) or the like.
[0030]
The thickness of the thick film insulating layer 113 may be appropriately selected according to the size required for the laminated module substrate 100, and the thickness of the thin film insulating layer 115 is preferably set to 5 μm or more and less than 100 μm. Note that as the material of the insulator 120, the materials listed as preferable materials for the thick film insulating layer 113 and the thin film insulating layer 115 can be used.
[0031]
As a material for the conductive layer 114, it is preferable to use copper (Cu), nickel (Ni), silver (Ag), gold (Au), aluminum (Al), or an alloy thereof, in consideration of conductivity and cost. For example, it is most preferable to use copper (Cu) or an alloy thereof. The thickness of the conductive layer 114 is preferably set to 5 μm or more and less than 75 μm.
[0032]
As shown in FIG. 1, the conductive pattern 130 includes a ground wiring pattern 131, a power supply wiring pattern 132, a signal wiring pattern 133, an electrode pad 134, and a ground solid pattern 135 described later, all of which are provided on the surface of the insulator 120. . The ground wiring pattern 131 is a wiring connecting the electrode pad 134 serving as a ground terminal and the corresponding conductive layer 114 (ground conductive layer 114b). The power wiring pattern 132 includes the electrode pad 134 serving as a power terminal. This wiring connects the corresponding conductive layer 114 (power supply conductive layer 114a). The signal wiring pattern 133 is a wiring for connecting the electrode pad 134 serving as a signal terminal and the half-through-hole conductor 140.
[0033]
As a material of the conductive pattern 130, gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), aluminum (Al), or an alloy thereof (silver palladium, silver platinum, etc.) is used. It is preferable.
[0034]
FIG. 4 is a schematic perspective view of the laminated module substrate 100 according to the present embodiment as viewed from the back side. Here, the “back surface” is a surface facing the mounting surface 100 a and is a surface on the side where the other main surface 110 b of the multilayer substrate 110 is exposed.
[0035]
As shown in FIG. 4, the ground wiring pattern 131 and the ground solid pattern 135 are provided on the surface of the insulator 120 on the back surface of the multilayer module substrate 100, and the ground wiring pattern 131 corresponds to the ground solid pattern 135. The conductive layer 114 to be connected is connected.
[0036]
As shown in FIGS. 1 to 4, in the laminated module substrate 100 according to the present embodiment, one of the adjacent conductive layers 114 among the plurality of conductive layers 114 provided via the thin film insulating layer 115 is a power supply conductive layer. The other is used as a ground conductive layer 114b. Since the thin film insulating layer 115 is provided between the power supply conductive layer 114a and the ground conductive layer 114b, the entire laminated base 110 functions as a large capacitive element. Here, in the laminated module substrate 100 according to the present embodiment, the laminated surface of the conductive layer 114 functioning as a capacitive electrode and the capacitive insulating film functioning as a capacitive insulating film is substantially perpendicular to the mounting surface 100a. Sufficient capacity can be obtained without increasing the size in the plane direction so much. In addition, in this embodiment, since the conductive layer 114 and the electrode pad 134 are connected in a plane on the insulator 120, there is no need to form a large number of via holes and via hole conductors in the laminated module substrate 100. It becomes possible to suppress the manufacturing cost.
[0037]
FIG. 5 is a schematic perspective view showing a state in which the semiconductor IC 150 is mounted on the multilayer module substrate 100 according to the present embodiment.
[0038]
As shown in FIG. 5, when the semiconductor IC 150 is mounted on the multilayer module substrate 100 according to the present embodiment, the semiconductor IC 150 is mounted on the mounting surface 100a, and each electrode terminal (see FIG. (Not shown) and each electrode pad 134 are electrically and mechanically connected. Thereby, the semiconductor IC mounting module is completed. The semiconductor IC module manufactured in this way is used by being mounted on a mother board (not shown).
[0039]
When the semiconductor IC 150 is mounted in this manner, among the electrode terminals of the semiconductor IC 150, the power terminal is connected to the power conductive layer 114a and the ground terminal is connected to the ground conductive layer 114b. The above-described capacitive element incorporated in the capacitor functions as a decoupling capacitor. Since the decoupling capacitor has a large capacity as described above, the impedance of the power supply wiring and the ground wiring is greatly reduced, and thereby a voltage drop caused by power supply noise can be effectively suppressed. Therefore, even when a semiconductor IC having a high operating frequency, such as a CPU or a power amplifier IC, or a semiconductor IC that handles a high-frequency signal is mounted, malfunction of the semiconductor IC can be effectively suppressed.
[0040]
Next, the manufacturing method of the multilayer module substrate 100 according to the present embodiment will be explained with reference to FIGS.
[0041]
First, a resin or a material obtained by mixing a functional material powder in a resin is dispersed in a solvent and a binder to form a paste, and this is a metal sheet 114 as a base material of the conductive layer 114 by a doctor blade method or the like as shown in FIG. Apply “on” to form a thin film insulating sheet 115 ′. The formed thin film insulating sheet 115 ′ finally becomes the thin film insulating layer 115. Thereby, a laminated sheet 112 ′ composed of the metal sheet 114 ′ and the thin film insulating sheet 115 ′ is formed.
[0042]
Next, the laminated sheet 112 ′ is cut into a predetermined size, and a plurality of sheets (three sheets in this example) are overlaid as shown in FIG. The laminated body 160 is produced by integrating.
[0043]
Next, as shown in FIG. 8, the laminated body 160 and the thick film insulating sheet 113 ′ are thermocompression-bonded or alternately overlapped with an adhesive layer when necessary to produce a laminated base material 170. FIG. 9 shows a state in which the laminated base material 170 is turned sideways, and FIG. 9 also shows a region 100 ′ that finally becomes the laminated module substrate 100.
[0044]
Next, as shown in FIG. 10, the front surface 170 a and the back surface 170 b of the laminated base material 170 are ground by dicing in a direction orthogonal to the laminated surface to form a notch 111. Next, as shown in FIG. 11, the notch 111 is filled with an insulating material to form an insulator 120. The insulator 120 can be formed by applying a resin material or a composite material in which a functional material powder is mixed in a resin, dispersed in a solvent or a binder, by printing or the like, and drying. Thereafter, the front surface 170a and the back surface 170b of the laminated base material 170 are polished and leveled (smoothed).
[0045]
Next, as shown in FIG. 12, a conductive pattern 130 is formed on the surface of the insulator 120. The conductive pattern 130 is formed by printing gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), aluminum (Al), or an alloy thereof (silver palladium, silver platinum, etc.). After forming using a method, a plating method, a vapor deposition method, a sputtering method, or the like, patterning may be performed into a predetermined shape by a patterning method.
[0046]
Next, as shown in FIG. 13, an external terminal through hole 180 is formed in a predetermined portion of the region where the insulator 120 is formed, and a conductor is formed therein. As a method of forming a conductor inside the external terminal through hole 180, a plating method can be used.
[0047]
Then, the laminated base material 170 is divided by dicing along the CC line and the DD line shown in FIG. 13, and a plurality (9 in this example) of laminated module substrates 100 are taken out. As described above, the laminated module substrate 100 is completed. When the laminated base material 170 is divided, the external terminal through hole 180 is divided in half to form a half through hole, and the conductor formed therein becomes the half through hole conductor (external terminal) 140 shown in FIG.
[0048]
With respect to the laminated module substrate 100 manufactured in this way, a semiconductor IC mounted module can be configured by mounting the semiconductor IC 150 on the mounting surface 100a as described above, and is built in the stacked module substrate 100. The impedance of the power supply wiring and the ground wiring is greatly reduced by the large capacity decoupling capacitor. Thereby, the voltage drop resulting from power supply noise can be suppressed effectively.
[0049]
Next, another preferred embodiment of the present invention will be described.
[0050]
FIG. 14 is a schematic perspective view showing a laminated module substrate 200 according to another preferred embodiment of the present invention. Elements that are the same as or substantially the same as those of the laminated module substrate 100 described above are given the same reference numerals, and redundant descriptions are omitted.
[0051]
As shown in FIG. 14, the laminated module substrate 200 according to the present embodiment has substantially the same structure as that of the laminated module substrate 100 described above. The main difference is that a large-area ground pattern 201 is formed in a region corresponding to the pattern. The ground pattern 201 is connected to a plurality (three in this example) of the heat radiation conductive layers 114c, and thus has a very large heat capacity. These heat-dissipating conductive layers 114c do not function as decoupling capacitors because the adjacent conductive layers have the ground potential, but the conductive layers 114a and 114b provided on both sides thereof constitute a decoupling capacitor. .
[0052]
When the semiconductor IC is mounted on the multilayer module substrate 200 having such a structure, the heat dissipation pattern of the semiconductor IC and the ground pattern 201 are connected via a conductive paste such as solder, thereby generating heat generated by the semiconductor IC. It is possible to efficiently dissipate heat to the laminated module substrate 200. Therefore, this embodiment is particularly effective when mounting a semiconductor IC that generates a large amount of heat.
[0053]
Thus, according to the present embodiment, in addition to the effect of the laminated module substrate 100 shown in FIG. 1, it is possible to obtain the effect of having excellent heat dissipation.
[0054]
Next, still another preferred embodiment of the present invention will be described.
[0055]
FIG. 15 is a schematic perspective view showing a laminated module substrate 300 according to still another preferred embodiment of the present invention. Elements that are the same as or substantially the same as those of the laminated module substrate 100 described above are given the same reference numerals, and redundant descriptions are omitted.
[0056]
As shown in FIG. 15, the laminated module substrate 300 according to the present embodiment is different from the laminated module substrate 100 described above in that the insulating layers 301 and 302 cover almost the entire main surface 110 a and the other main surface 110 b of the laminated substrate 110. Among the conductor patterns, the ends of the ground wiring pattern 131 and the power supply wiring pattern 132 are connected to the corresponding conductive layer 114 through the plated conductor 303. The laminated module substrate 300 having such a configuration has the same effect as the laminated module substrate 100 described above, and can be manufactured by the following method.
[0057]
First, after producing the laminated base material 170 shown in FIG. 9, a photoresist is applied to the entire surface 170a of the laminated base material 170, and the resist film in the region where the plated conductor 303 is to be formed is removed by photolithography. . Thereby, on the surface 170a of the laminated base material 170, the metal sheet 114 ′ is exposed in the region where the plated conductor 303 is to be formed, and the other region is covered with the resist film.
[0058]
Next, the exposed portion of the metal sheet 114 ′ is plated, thereby forming the plated conductor 303, and then the resist film is removed. FIG. 16 is an enlarged view of a main part of the laminated base material 170 with the resist film removed.
[0059]
Then, substantially the entire surface 170a of the laminated base material 170 on which the plated conductor 303 is formed is coated with an insulating material or covered with an insulating sheet, and the front end portion of the plated conductor 303 is exposed by polishing the surface. . Such a process is performed also on the back surface 170b of the laminated base material 170.
[0060]
The subsequent process is the same as the process shown in FIGS. 12 and 13, and after forming the conductive pattern 130 and the external terminal through hole 180, the laminated base material 170 is divided by dicing, and a plurality of processes are performed. The laminated module substrate 300 is obtained.
[0061]
As described above, the manufacturing process of the laminated module substrate 300 in the present embodiment has a feature that there is no step of forming the notch 111. Therefore, this embodiment is particularly effective when it is difficult to form the notch 111 or when it takes time to form the notch 111.
[0062]
Next, still another preferred embodiment of the present invention will be described.
[0063]
FIG. 17 is a schematic perspective view showing a laminated module substrate 400 according to still another preferred embodiment of the present invention. Elements that are the same as or substantially the same as those of the laminated module substrate 100, 200, or 300 described above are assigned the same reference numerals, and redundant descriptions are omitted.
[0064]
As shown in FIG. 17, the laminated module substrate 400 according to the present embodiment has the characteristics of the laminated module substrate 200 shown in FIG. 14 and the features of the laminated module substrate 300 shown in FIG. That is, in the present embodiment, the ground pattern 201 is formed on the surface of the insulating layer 301, and the ground pattern 201 and the heat dissipation conductive layer 114 c are connected by the plated conductor 401. Thereby, similarly to the laminated module substrate 200 shown in FIG. 14, the heat generated by the semiconductor IC can be efficiently radiated to the laminated module substrate 400. In this case, in order to further improve the heat dissipation, it is preferable to sufficiently increase the width of the plated conductor 401 connecting the ground pattern 201 and the heat dissipation conductive layer 114c as shown in FIG.
[0065]
The present invention is not limited to the embodiments described above, and various modifications are possible within the scope of the invention described in the claims, and these are also included in the scope of the present invention. Needless to say.
[0066]
For example, in each of the above embodiments, the multilayer substrate 110 is configured by using a plurality of multilayer units 112 and a plurality of thick film insulating layers 113. However, it is not essential to use the thick film insulating layer 113 in the present invention. The laminated substrate 110 may be configured by only a plurality of laminated units 112. In this case, since the number of stacked layers increases, the manufacturing cost increases, but the capacity and heat capacity of the decoupling capacitor can be greatly increased.
[0067]
In each of the above embodiments, among the conductive layers 114 included in the three consecutive laminated units 112, the conductive layers at both ends are used as the power supply conductive layers 114a, and the central conductive layer is used as the ground conductive layer 114b. However, this may be reversed. Further, the number of continuous laminated units 112 is not limited to three, and any number may be used as long as it is two or more.
[0068]
In addition, in each of the laminated module substrates 300 and 400, the conductive layer 114 and the conductive pattern 130 are connected by the plated conductor 303 or 401 formed by using a photolithography process. Instead of using it, the conductive pattern 130 and the conductive layer 114 may be connected by forming a through hole in the insulating layer and forming a through hole electrode therein. In this case, in order to more reliably connect the through-hole electrode 303 and the conductive layer 114, land patterns are formed in corresponding regions of the main surface 110a and the other main surface 110b of the multilayer substrate 110. preferable.
[0069]
【The invention's effect】
As described above, in the present invention, the laminated surface of the conductive layer functioning as the capacitor electrode and the capacitor insulating film functioning as the capacitor insulating film is substantially perpendicular to the surface (mounting surface) on which the semiconductor IC is mounted. Therefore, a sufficient capacity can be obtained without increasing the size in the plane direction so much. As a result, a small-sized and large-capacity decoupling capacitor can be built in, so even when a semiconductor IC having a high operating frequency such as a CPU or a power amplifier IC or a semiconductor IC handling a high-frequency signal is mounted. IC malfunctions can be effectively suppressed.
[0070]
Moreover, since the stacking direction is as described above, it is not necessary to form a large number of via holes and via hole conductors, and the manufacturing cost can be reduced.
[0071]
Also, if a ground pattern is provided in a region corresponding to the heat dissipation pattern of the mounted semiconductor IC and one or more conductive layers are connected thereto, the heat generated by the semiconductor IC can be efficiently dissipated to the laminated module substrate. It becomes possible.
[Brief description of the drawings]
FIG. 1 is a schematic perspective view showing a laminated module substrate 100 according to a preferred embodiment of the present invention.
2 is a schematic cross-sectional view taken along line AA shown in FIG.
3 is a schematic cross-sectional view taken along line B-BA shown in FIG.
FIG. 4 is a schematic perspective view of the laminated module substrate 100 as viewed from the back surface direction.
5 is a schematic perspective view showing a state in which a semiconductor IC 150 is mounted on a laminated module substrate 100 (semiconductor IC mounting module). FIG.
6 is a diagram illustrating a part of the manufacturing process of the laminated module substrate 100 (formation of a laminated sheet 112 ′). FIG.
7 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (formation of the laminated body 160). FIG.
8 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (formation of the laminated base material 170). FIG.
9 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (a state in which the laminated base material 170 is laid down horizontally). FIG.
10 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (formation of the notch 111). FIG.
11 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (formation of the insulator 120). FIG.
12 is a diagram showing a part of the manufacturing process of the laminated module substrate 100 (formation of the conductive pattern 130). FIG.
13 is a diagram illustrating a part of the manufacturing process of the laminated module substrate 100 (formation of the through hole for external terminal 180). FIG.
FIG. 14 is a schematic perspective view showing a laminated module substrate 200 according to another preferred embodiment of the present invention.
FIG. 15 is a schematic perspective view showing a laminated module substrate 300 according to still another preferred embodiment of the present invention.
16 is a diagram showing a part of the manufacturing process of the laminated module substrate 300 (formation of the plated conductor 303). FIG.
FIG. 17 is a schematic perspective view showing a laminated module substrate 400 according to still another preferred embodiment of the present invention.
[Explanation of symbols]
100, 200, 300, 400 Multilayer module substrate
100a mounting surface
100 ′ The region that will eventually become the laminated module substrate 100
110 Laminated substrate
110a, 110b Main surface of laminated substrate
111 cutout
112 Multilayer unit
112 'Laminated sheet
113 Thick film insulation sheet
113 'Thick film insulation layer
114 Conductive layer
114 'metal sheet
114a Conductive layer for power supply
114b Conductive layer for ground
114c Conductive layer for heat dissipation
115 Thin film insulating layer
115 'thin film insulation sheet
120 Insulator
130 Conductive pattern
131 Ground wiring pattern
132 Power supply wiring pattern
133 Signal wiring pattern
134 Electrode pad
135 Grand solid pattern
140 Half-through-hole conductor
150 Semiconductor IC
160 Laminate
170 Laminated base material
170a Surface of laminated base material
170b Back side of laminated base material
180 Through hole for external terminal
201 ground pattern
301,302 Insulating layer
303 Through-hole electrode
303 plated conductor
401 plated conductor

Claims (12)

A laminated module substrate comprising a plurality of insulating layers and a plurality of conductive layers alternately stacked, wherein a capacitive element is constituted by an adjacent conductive layer and an insulating layer existing between the conductive layers, wherein the insulating layer and the conductive layer A laminated module substrate, wherein a plurality of electrode pads for electrical connection with a semiconductor IC are provided on a surface substantially perpendicular to the laminated surface of the layers. The at least one of the plurality of electrode pads is connected to one of the adjacent conductive layers, and at least one of the plurality of electrode pads is connected to the other of the adjacent conductive layers. The laminated module substrate described. Of the surface of the laminated substrate constituted by the plurality of insulating layers and the plurality of conductive layers, at least part of a surface substantially perpendicular to the laminated surface is covered with an insulator, and the insulator The laminated module substrate according to claim 2, wherein the electrode pad is provided on a surface of the laminated module substrate. The laminated module substrate according to claim 3, wherein the electrode pad and the conductive layer are connected via a conductive pattern formed on the surface of the insulator. 5. The laminated module substrate according to claim 4, wherein the electrode pad and the conductive layer are further connected through a plated conductor or a through-hole electrode provided through the insulator. The ground plane for heat dissipation is further provided on the same surface as the surface on which the electrode pad is provided, and the ground pattern is connected to one or more conductive layers. 6. The laminated module substrate according to any one of 5 above. A step of forming a stacked matrix by alternately stacking a plurality of insulating layers and a plurality of conductive layers; and a surface of the stacked matrix that is substantially perpendicular to a stacked surface of the insulating layer and the conductive layer. Forming an insulator on the surface; forming a plurality of electrode pads for electrical connection with a semiconductor IC on the surface of the insulator; and a conductive pattern for connecting the electrode pads and the conductive layer. A method of manufacturing a laminated module substrate, comprising: a step; and a step of taking out the laminated module substrate by cutting the laminated matrix. In the step of forming a plurality of through holes including at least through holes for external terminals in the multilayer base and a step of forming a conductor in the plurality of through holes, and taking out the multilayer module substrate The method according to claim 7, wherein the external terminal is formed by cutting the laminated base body along the through hole for the external terminal. The method further comprises the step of forming a notch by grinding a part of a surface substantially perpendicular to the layered surface of the surface of the layered matrix, and the step of forming the insulator The method for manufacturing a laminated module substrate according to claim 7, wherein the method is performed by filling an insulator. The method further includes the step of selectively performing plating on a part of the conductive layer exposed from a surface substantially perpendicular to the stacked surface of the surface of the stacked matrix, thereby selectively forming a plated conductor. The step of forming the insulator is a step of covering the plated conductor with an insulator, and further comprising a step of exposing a tip portion of the plated conductor by polishing the surface of the insulator. The manufacturing method of the lamination | stacking module board of Claim 7 or 8. A laminated module substrate having a plurality of insulating layers and a plurality of conductive layers laminated alternately, and a surface substantially perpendicular to a laminated surface of the insulating layers and the conductive layers among the surfaces of the laminated module substrate A semiconductor IC mounted thereon, a power supply terminal of the semiconductor IC being connected to one of adjacent conductive layers, and a ground terminal of the semiconductor IC being connected to the other of the adjacent conductive layers IC mounting module. Of the surface of the laminated module substrate, a surface that is substantially perpendicular to the laminated surface of the insulating layer and the conductive layer is provided with a ground pattern connected to the heat dissipation pattern of the semiconductor IC, 12. The semiconductor IC mounting module according to claim 11, wherein the ground pattern is connected to one or more conductive layers.

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