JP2005025740A5 - - Google Patents

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Publication number
JP2005025740A5
JP2005025740A5 JP2004188272A JP2004188272A JP2005025740A5 JP 2005025740 A5 JP2005025740 A5 JP 2005025740A5 JP 2004188272 A JP2004188272 A JP 2004188272A JP 2004188272 A JP2004188272 A JP 2004188272A JP 2005025740 A5 JP2005025740 A5 JP 2005025740A5
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JP
Japan
Prior art keywords
memory
hot routine
data
microprocessor system
hot
Prior art date
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Granted
Application number
JP2004188272A
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English (en)
Japanese (ja)
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JP4826873B2 (ja
JP2005025740A (ja
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Publication date
Priority claimed from KR1020030044292A external-priority patent/KR100959133B1/ko
Application filed filed Critical
Publication of JP2005025740A publication Critical patent/JP2005025740A/ja
Publication of JP2005025740A5 publication Critical patent/JP2005025740A5/ja
Application granted granted Critical
Publication of JP4826873B2 publication Critical patent/JP4826873B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2004188272A 2003-07-01 2004-06-25 ホットルーチンメモリを有するマイクロプロセッサシステム Expired - Fee Related JP4826873B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR2003-044292 2003-07-01
KR1020030044292A KR100959133B1 (ko) 2003-07-01 2003-07-01 핫 루틴 메모리를 갖는 마이크로프로세서 시스템 및구현방법

Publications (3)

Publication Number Publication Date
JP2005025740A JP2005025740A (ja) 2005-01-27
JP2005025740A5 true JP2005025740A5 (https=) 2007-05-24
JP4826873B2 JP4826873B2 (ja) 2011-11-30

Family

ID=32844914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004188272A Expired - Fee Related JP4826873B2 (ja) 2003-07-01 2004-06-25 ホットルーチンメモリを有するマイクロプロセッサシステム

Country Status (4)

Country Link
US (1) US7363428B2 (https=)
JP (1) JP4826873B2 (https=)
KR (1) KR100959133B1 (https=)
GB (1) GB2403569B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI328198B (en) * 2006-12-11 2010-08-01 Via Tech Inc Gpu context switching system
JP4909963B2 (ja) * 2008-09-09 2012-04-04 株式会社東芝 統合メモリ管理装置
US20150324287A1 (en) * 2013-01-09 2015-11-12 Freescale Semiconductor, Inc. A method and apparatus for using a cpu cache memory for non-cpu related tasks
KR20150006614A (ko) * 2013-07-09 2015-01-19 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918586A (en) * 1985-07-31 1990-04-17 Ricoh Company, Ltd. Extended memory device with instruction read from first control store containing information for accessing second control store
US5249294A (en) * 1990-03-20 1993-09-28 General Instrument Corporation Determination of time of execution of predetermined data processing routing in relation to occurrence of prior externally observable event
US5603011A (en) 1992-12-11 1997-02-11 International Business Machines Corporation Selective shadowing and paging in computer memory systems
GB2284911A (en) 1993-12-16 1995-06-21 Plessey Semiconductors Ltd Flexible lock-down cache.
US5956495A (en) * 1997-09-22 1999-09-21 International Business Machines Corporation Method and system for processing branch instructions during emulation in a data processing system
JPH11194973A (ja) * 1997-11-06 1999-07-21 Seiko Epson Corp 画像情報処理装置、その制御方法および記録媒体
JP2000029783A (ja) * 1998-07-15 2000-01-28 Hitachi Ltd プロセッサ及び計算機
US6385721B1 (en) * 1999-01-22 2002-05-07 Hewlett-Packard Company Computer with bootable hibernation partition
KR100347865B1 (ko) 1999-11-15 2002-08-09 삼성전자 주식회사 어드레스 트레이스를 이용한 분기 예측 방법
KR100317976B1 (ko) 1999-12-31 2001-12-24 대표이사 서승모 캐시 메모리가 포함된 시스템에서 인터럽트 서비스 루틴을위한 장치
US6954822B2 (en) * 2002-08-02 2005-10-11 Intel Corporation Techniques to map cache data to memory arrays

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