JP2005005588A - Apparatus and method for manufacturing semiconductor device, semiconductor device, and electrooptic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device by which the yield of a product is improved by preventing a backflow from an atmosphere-side exhaust pipe so as to prevent the deterioration of the semiconductor device when exhausting atmosphere containing gas used for manufacturing the semiconductor from a reaction chamber. <P>SOLUTION: A check valve is arranged to the atmosphere-side exhaust pipe for exhausting an atmosphere within a chamber to an atmosphere side, the check valve is bypassed, and a bypass pipe arranged with a bypass valve is provided at the atmosphere-side exhaust pipe. In an exhaustion process, when chamber-side pressure on the side of the chamber of the check valve in the atmosphere-side exhaust pipe is higher than atmosphere-side pressure on the atmosphere side, the bypass valve is opened. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device manufacturing method and a manufacturing apparatus, and more particularly, a semiconductor device manufacturing method including an exhaust process for exhausting an atmosphere in a chamber when a semiconductor device is manufactured in a chamber using a gas. The present invention relates to a method and a manufacturing apparatus.
[0002]
[Prior art]
Conventionally, various gases are used to form various layers, films, and the like of a semiconductor device in the manufacturing process of the semiconductor device. And some of the gases are corrosive or dangerous, so that the gas is diluted with an inert gas such as nitrogen gas so that it is not exhausted into the atmosphere as it is after the completion of a certain process, It is sent to the abatement device through the exhaust pipe exhausted from the reaction chamber.
[0003]
For example, in a film forming process of forming a silicon oxide film, a silicon nitride film, or the like by low pressure CVD (Chemical Vapor Deposition) using a source gas and an inert gas, monosilane (SiH 4) is used as a source gas. Dichlorosilane (SiH2Cl2) or the like is used. By purging in the exhaust process after film formation using these gases, the atmosphere containing the gas is exhausted from the reaction chamber through the exhaust pipe. (For example, refer to Patent Document 1).
[0004]
[Patent Document 1]
JP-A-8-181112 (Example 1, Fig. 1)
[0005]
[Problems to be solved by the invention]
However, even if such a cycle purge is performed for a long time, the source gas cannot be completely removed from the exhaust pipe, and when the reaction chamber lid is opened, the pressure difference between the pressure in the reaction chamber and the atmospheric pressure. As a result, the source gas flows backward from the exhaust pipe, and the component of the backflowed source gas accumulates on the substrate surface of the semiconductor device in the next step, which may cause generation of foreign matters that degrade the semiconductor device. It was. In addition, if the back-flowing source gas is a corrosive gas, it may react with metal parts in the reaction chamber or metal parts such as a lid to generate rust. The generated rust contaminates other manufacturing equipment in the manufacturing line or the semiconductor device that is the product by scattering into the atmosphere as dust, resulting in a decrease in product yield. .
[0006]
Therefore, the present invention prevents the deterioration of the semiconductor device by preventing the backflow from the exhaust pipe on the atmosphere side when exhausting the atmosphere containing the gas used in the manufacture of the semiconductor device from the reaction chamber. An object of the present invention is to provide a method of manufacturing a semiconductor device that improves the yield of the semiconductor device.
[0007]
[Means for Solving the Problems]
According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a step of manufacturing a semiconductor device in a chamber using a gas; and a step of exhausting the atmosphere containing the gas in the chamber from the chamber. A check valve is interposed in the atmosphere side exhaust pipe for exhausting the atmosphere in the chamber to the atmosphere side, the bypass valve is bypassed, and a bypass pipe provided with a bypass valve is connected to the atmosphere side Provided in the exhaust pipe, and in the exhaust process, when the chamber side pressure on the chamber side of the check valve in the atmosphere side exhaust pipe is higher than the atmosphere side pressure on the atmosphere side, the bypass valve is opened. It is done.
[0008]
An apparatus for manufacturing a semiconductor device according to the present invention is an apparatus for manufacturing a semiconductor device, which manufactures a semiconductor device in a chamber using a gas, and executes an exhaust process for exhausting an atmosphere containing the gas in the chamber from the chamber. A check valve interposed in the atmosphere side exhaust pipe for exhausting the atmosphere in the chamber to the atmosphere side, and provided in the atmosphere side exhaust pipe, bypassing the check valve and bypassing A bypass pipe provided with a valve, and in the exhaust process, when the chamber side pressure on the chamber side of the check valve in the atmosphere side exhaust pipe is higher than the atmosphere side pressure on the atmosphere side, Control means for opening the bypass valve.
[0009]
According to such a configuration, when the atmosphere containing the gas used for manufacturing the semiconductor device is exhausted from the reaction chamber, the semiconductor device is prevented from deteriorating by preventing the backflow from the exhaust pipe on the atmosphere side. In addition, it is possible to provide a method and an apparatus for manufacturing a semiconductor device that improve the yield of products.
[0010]
Further, in the method for manufacturing a semiconductor device of the present invention, the exhaust process includes a cycle purge process, and after the cycle purge process, when the chamber side pressure is higher than the atmosphere side pressure, the bypass valve It is desirable that can be opened.
[0011]
According to such a configuration, since the bypass valve is opened after the residual gas in the atmosphere is sufficiently reduced by the cycle purge, the influence of the residual gas can be more reliably eliminated.
[0012]
In the method of manufacturing a semiconductor device according to the present invention, when the chamber side pressure is higher than the atmosphere side pressure, the chamber side pressure is higher than a predetermined first value, and the atmosphere side pressure is It is desirable that the time is lower than a predetermined second value.
[0013]
In the semiconductor device manufacturing apparatus of the present invention, a first pressure sensor that measures the chamber-side pressure of the check valve and a second pressure sensor that measures the atmosphere-side pressure of the check valve. Further, the control means has the chamber side pressure of the check valve in the atmosphere side exhaust pipe based on the outputs of the first pressure sensor and the second pressure sensor. It is desirable to determine whether the chamber side pressure is higher than the atmosphere side pressure by determining whether the pressure is higher than the atmospheric pressure.
[0014]
According to such a configuration, even if the bypass valve opens when a predetermined condition is met, when there is an accident or the like related to the atmosphere side exhaust pipe, the atmosphere does not flow backward from the bypass valve to the chamber. The bypass valve can be closed when a predetermined condition is met.
[0015]
In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the first value is a pressure value when the atmosphere equal to or greater than a maximum allowable flow rate of the check valve flows into the atmosphere-side exhaust pipe.
[0016]
According to such a configuration, the bypass valve can be opened when the pressure on the upstream side of the check valve, that is, the chamber side rises.
[0017]
In the method of manufacturing a semiconductor device according to the present invention, it is preferable that the atmosphere side exhaust pipe is provided so as to branch from a vacuum exhaust pipe for vacuum suction of the atmosphere in the chamber by a vacuum pump.
[0018]
The semiconductor device manufacturing apparatus of the present invention further includes a vacuum exhaust pipe for vacuum suction of the atmosphere in the chamber by a vacuum pump, and the atmosphere side exhaust pipe branches from the vacuum exhaust pipe. It is desirable to be provided as follows.
[0019]
According to such a configuration, the air can be released after being vacuumed.
[0020]
The semiconductor device, electro-optical device, or liquid crystal device of the present invention is a device manufactured by the method for manufacturing a semiconductor device of the present invention.
[0021]
According to such a configuration, a semiconductor device, an electro-optical device, or a liquid crystal device that is not deteriorated or contaminated by gas, rust, or the like can be realized.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. In this embodiment mode, a case where the present invention is applied to a liquid crystal device which is one of electro-optical devices will be described as a semiconductor device. The present invention can be similarly applied to an EL display device including an electroluminescence (EL) element using a light emitting substance. The present invention can be applied to an electro-optical device including a liquid crystal or the light emitting material as an electro-optical material.
First, a configuration in a pixel portion of a liquid crystal device according to an embodiment of the present invention will be described with reference to FIGS.
[0023]
FIG. 1 is a plan view of an element substrate of a liquid crystal device manufactured by the manufacturing method according to the present embodiment as viewed from the counter substrate side together with each component formed thereon. FIG. 2 is a cross-sectional view of the liquid crystal device obtained by cutting the liquid crystal device after the assembly process for sealing the liquid crystal by bonding the element substrate and the counter substrate at the position of the line HH ′ in FIG. 1. FIG. 3 is a schematic cross-sectional view of a liquid crystal device focusing on one pixel.
[0024]
As shown in FIGS. 1 to 3, the liquid crystal device is configured by sealing a liquid crystal 50 between a transparent element substrate 10 and a transparent counter substrate 20. The element substrate 10 is made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate. On the element substrate 10, pixel electrodes and the like constituting pixels are arranged in a matrix.
[0025]
In the pixel region, a plurality of scanning lines 3a and a plurality of data lines 6a are wired so as to intersect with each other, and pixel electrodes 9a are arranged in a matrix in an area partitioned by the scanning lines 3a and the data lines 6a. The A thin film transistor (hereinafter referred to as TFT) is provided corresponding to each intersection of the scanning line 3a and the data line 6a, and a pixel electrode 9a is connected to the TFT.
[0026]
A data line (source line) 6a to which an image signal is supplied is commonly connected to the sources of all TFTs in the column direction. Image signals to be written to the data lines 6a may be supplied line-sequentially or may be supplied for each group to a plurality of adjacent data lines 6a.
[0027]
Further, the scanning line 3a is connected to the gates of all the TFTs in the row direction, and the scanning signal is applied to the scanning line 3a in a pulsed manner in a line sequential manner at a predetermined timing. The pixel electrode 9a is connected to the drain of the TFT at the corresponding position.
[0028]
The TFT is turned on by the ON signal of the scanning line 3a, whereby the image signal supplied to the data line 6a is supplied to the pixel electrode 9a. A voltage between the pixel electrode 9 a and the counter electrode 21 provided on the counter substrate 20 is applied to the liquid crystal 50. In addition, a storage capacitor is provided in parallel with the pixel electrode 9a, and the storage capacitor enables the voltage of the pixel electrode 9a to be held for, for example, three digits longer than the time when the source voltage is applied. The storage capacitor improves the voltage holding characteristic and enables image display with a high contrast ratio.
[0029]
The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gradation display. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the electro-optical device as a whole.
[0030]
Grooves 11 are formed in a lattice pattern on an element substrate 10 such as glass or quartz. A TFT having an LDD (Lightly Doped Drain) structure is formed on the trench 11 via a lower light shielding film 12 and a first interlayer insulating film 13 (however, the first interlayer insulating film 13 may be two layers). ing. The groove 11 flattens the boundary surface between the TFT substrate and the liquid crystal 50.
[0031]
The TFT includes a scanning line 3a that forms a gate electrode through an insulating film 2 that forms a gate insulating film on a semiconductor layer 1a in which a channel region 1a ', a source region 1d, and a drain region 1e are formed. The scanning line 3a is formed to be wide at a portion to be a gate electrode, and the channel region 1a ′ is configured in a region where the semiconductor layer 1a and the scanning line 3a face each other.
[0032]
On the element substrate 10, a plurality of transparent pixel electrodes 9a are provided in a matrix, and data lines 6a and scanning lines 3a described later are provided along vertical and horizontal boundaries of the pixel electrodes 9a. The lower light-shielding film 12 is provided in a lattice shape corresponding to each pixel along the data line 6a and the scanning line 3a. The light shielding film 12 prevents reflected light from entering the channel region 1a, source region 1d, and drain region 1e of the TFT.
[0033]
The lower light-shielding film 12 includes, for example, a metal simple substance, an alloy, a metal silicide, a polysilicide, or a laminate of at least one of refractory metals such as Ti, Cr, W, Ta, Mo, and Pb. Etc.
[0034]
A second interlayer insulating film 14 is stacked on the TFT, and an island-like first intermediate conductive layer 15 extending in the direction of the scanning line 3a and the data line 6a is formed on the second interlayer insulating film 14. On the first intermediate conductive layer 15, the capacitor line 18 is disposed opposite to the dielectric film 17. The capacitor line 18 includes an extending portion extending in the direction of the data line 6a so as to overlap the first intermediate conductive layer 15, and a main line extending along the scanning line 3a.
[0035]
The first intermediate conductive layer 15 functions as a pixel potential side capacitance electrode (lower capacitance electrode) connected to the high concentration drain region 1e of the TFT and the pixel electrode 9a, and a part of the capacitance line 18 is a fixed potential side capacitance electrode ( Acts as the upper capacitive electrode).
[0036]
The capacitor line 18 has a multilayer structure of an upper capacitor electrode and a light shielding layer, and is disposed opposite to the first intermediate conductive layer 15 via the dielectric film 17 to constitute a storage capacitor and prevent internal reflection of light. It has a light shielding function. The intermediate conductive layer 15 is formed at a position relatively close to the semiconductor layer, so that irregular reflection of light can be efficiently prevented.
[0037]
The capacitor line 18 has a multilayer structure in which an upper capacitor electrode made of, for example, a conductive polysilicon film and a light shielding layer made of a metal silicide film containing a refractory metal or the like are laminated. For example, the capacitor line 18 is constituted by a polycide of a light shielding layer made of silicide of tungsten, molybdenum, titanium, or tantalum and an upper capacitor electrode made of N-type polysilicon. As a result, the capacitor line 18 functions as a fixed potential side capacitor electrode as well as a built-in light shielding film.
[0038]
The first intermediate conductive layer 15 is made of, for example, a conductive polysilicon film and functions as a pixel potential side capacitor electrode. The first intermediate conductive layer 15 functions not only as a pixel potential side capacitor electrode but also as a light absorption layer disposed between the capacitor line 18 serving as a built-in light shielding film and the TFT, and further, the pixel electrode 9a. And a high-concentration drain region 1e of the TFT. The first intermediate conductive layer 15 may also be composed of a single layer film or a multilayer film containing a metal or an alloy, like the capacitor line 18.
[0039]
The dielectric film 17 disposed between the first intermediate conductive layer 15 as the lower capacitor electrode and the capacitor line 18 constituting the upper capacitor electrode 18a is, for example, a relatively thin HTO (High Temperature) having a thickness of about 5 to 200 nm. Oxide) film, silicon oxide film such as LTO (Low Temperature Oxide) film, or silicon nitride film. From the viewpoint of increasing the storage capacity, it is better that the dielectric film 17 is thinner as long as the reliability of the film is sufficiently obtained.
[0040]
The capacitor line 18 extends from the image display area in which the pixel electrode 9a is disposed to the periphery thereof, and is electrically connected to a constant potential source to be a fixed potential. As such a constant potential source, a later-described scanning line driving circuit 63 for supplying a scanning signal for driving the TFT to the scanning line 3a and a later-described data line for controlling a sampling circuit for supplying an image signal to the data line 6a. A constant potential source such as a positive power source or a negative power source supplied to the drive circuit 61 may be used, or a constant potential supplied to the counter electrode 21 of the counter substrate 20 may be used. Further, the lower light shielding film 12 also extends from the image display area to the periphery thereof and is connected to a constant potential source in the same manner as the capacitor line 18 in order to prevent the potential fluctuation from adversely affecting the TFT. Good.
[0041]
Further, in order to electrically connect the data line 6a and the source region 1d, a second intermediate conductive layer 15b formed of the same layer as the first intermediate conductive layer 15 is formed. The second intermediate conductive layer 15b is electrically connected to the source region 1d through a contact hole 24a penetrating the second interlayer insulating film 14 and the insulating film 2.
[0042]
A third interlayer insulating film 19 is disposed on the capacitor line 18, and a data line 6 a is stacked on the third interlayer insulating film 19. The data line 6 a is electrically connected to the source region 1 d through a contact hole 24 b that penetrates the third interlayer insulating film 19 and the dielectric film 17.
[0043]
A pixel electrode 9a is stacked on the data line 6a with a fourth interlayer insulating film 25 interposed therebetween. The pixel electrode 9 a is electrically connected to the first intermediate conductive layer 15 through a contact hole 26 b that penetrates the fourth interlayer insulating film 25, the third interlayer insulating film 19, and the dielectric film 17. The first intermediate conductive layer 15 is electrically connected to the drain region 1 e through a contact hole 26 a penetrating the second interlayer insulating film 14 and the insulating film 2. On the pixel electrode 9a, an alignment film 16 made of polyimide polymer resin is laminated and rubbed in a predetermined direction.
[0044]
When the ON signal is supplied to the scanning line 3a (gate electrode), the channel region 1a 'becomes conductive, the source region 1d and the drain region 1e are connected, and the image signal supplied to the data line 6a is a pixel. It is given to the electrode 9a.
[0045]
On the other hand, the counter substrate 20 is provided with a first light-shielding film 23 in a region facing the data line 6a, the scanning line 3a, and the TFT formation region of the element substrate, that is, a non-display region of each pixel. The first light shielding film 23 prevents incident light from the counter substrate 20 side from entering the TFT channel region 1a ′, source region 1d, and drain region 1e. A counter electrode (common electrode) 21 is formed over the entire surface of the substrate 20 on the first light shielding film 23. An alignment film 22 made of a polyimide-based polymer resin is laminated on the counter electrode 21 and rubbed in a predetermined direction.
[0046]
A liquid crystal 50 is sealed between the element substrate 10 and the counter substrate 20. Thereby, the TFT writes the image signal supplied from the data line 6a to the pixel electrode 9a at a predetermined timing. Depending on the potential difference between the written pixel electrode 9a and the counter electrode 21, the orientation and order of the molecular assembly of the liquid crystal 50 change, and light is modulated to enable gradation display.
[0047]
As shown in FIGS. 1 and 2, the counter substrate 20 is provided with a light shielding film 42 as a frame for partitioning the display area. The light shielding film 42 is formed of, for example, the same or different light shielding material as the light shielding film 23.
[0048]
A sealing material 41 that encloses liquid crystal in a region outside the light shielding film 42 is formed between the element substrate 10 and the counter substrate 20. The sealing material 41 is disposed so as to substantially match the contour shape of the counter substrate 20, and fixes the element substrate 10 and the counter substrate 20 to each other. The sealing material 41 is missing in a part of one side of the element substrate 10, and a liquid crystal injection port 78 for injecting the liquid crystal 50 is formed in the gap between the bonded element substrate 10 and the counter substrate 20. The After the liquid crystal is injected from the liquid crystal injection port 78, the liquid crystal injection port 78 is sealed with a sealing material 79.
[0049]
A data line driving circuit 61 and a mounting terminal 62 are provided along one side of the element substrate 10 in a region outside the sealing material 41 of the element substrate 10, and scanning lines are provided along two sides adjacent to the one side. A drive circuit 63 is provided. On the remaining side of the element substrate 10, a plurality of wirings 64 for connecting the scanning line driving circuits 63 provided on both sides of the screen display area are provided. In addition, a conductive material 65 for electrically connecting the element substrate 10 and the counter substrate 20 is provided in at least one corner of the counter substrate 20.
[0050]
The liquid crystal device described above is manufactured using a method for manufacturing a semiconductor device described below. In particular, a transistor on a TFT substrate connected to a pixel electrode, an interlayer insulating film in a storage capacitor, a silicon oxide film in a HTO film, a silicon nitride film, and the like are manufactured by low pressure CVD.
[0051]
FIG. 4 is a piping diagram illustrating an example of the piping system according to the present embodiment.
[0052]
In FIG. 4, 100 is a vertical reactor which is a chamber. Various processes for forming a film on the surface of a semiconductor substrate for a liquid crystal device are performed inside the reaction furnace 100. The inside of the reaction furnace 100 is controlled so that the temperature and pressure become desired values according to the contents of various treatments, and when the steps related to each treatment are completed, a lid provided at the lower part of the reaction furnace 100 The cap 102 is removed, and a semiconductor device on which a film is formed, for example, a wafer is taken out. The reaction furnace 100 is provided with an inner tube (inner tube) 103 inside and an outer tube (outer tube) 104 around it. The inner tube 103 and the outer tube 104 are made of a corrosion-resistant material such as quartz. Although not shown here, a heater as a heating unit is provided around the outer tube 104, and the temperature in the reaction furnace 100 is controlled to a desired temperature by controlling the temperature of the heater. .
[0053]
A large number of semiconductor substrates such as semiconductor wafers are mounted on a boat which is a mounting table, and further, the boat is loaded (loaded) from the furnace port 105 at the bottom of the reaction furnace 100 in a state where the boat is mounted on the cap 102. 100. Since the cap 102 hermetically closes the furnace port 105 of the reaction furnace 100, the pressure and temperature can be accurately controlled in the reaction furnace 100. Then, after the film forming process or the like is performed, the semiconductor substrate is unloaded. Accordingly, the reaction furnace 100 is closed by the cap 102, thereby forming one closed substrate processing space. By opening the cap 102, the reaction furnace 100 is opened to the atmosphere.
[0054]
The reaction furnace 100 is connected to a plurality of gas supply pipes 111, 112, 113, 114 for supplying a raw material gas or an inert gas into the reaction furnace 100. Each gas supply pipe is connected to a gas source 115, 116, 117, and 118 connected to a gas source of a source gas or an inert gas, through a variety of valves 120, and a predetermined gas under a predetermined control. Is supplied into the reactor 100. In FIG. 4, 121 is a mass flow controller, and 122 is a pressure sensor. Incidentally, the gas pipe 115 supplies nitrogen gas, the gas pipe 116 supplies dichlorosilane gas, the gas pipe 117 supplies nitrous oxide gas, and the gas pipe 118 supplies ammonia gas.
[0055]
Therefore, in order to perform a desired film forming process or the like, a predetermined source gas and an inert gas are placed in a predetermined sequence and at a predetermined pressure in the reactor 100 while being controlled at a predetermined temperature by the heater described above. Supplied.
[0056]
On the other hand, the main exhaust pipe 131 for exhausting the gas in the reaction furnace 100 is connected to the reaction furnace 100. The main exhaust pipe 131 is a vacuum exhaust pipe that vacuums an atmosphere, which is a gas inside the main exhaust pipe 131, by a vacuum pump. In the middle of the main exhaust pipe 131, an atmosphere-side exhaust pipe 132 for communicating with the atmosphere and a slow exhaust pipe 133 for slow exhaust are branched. The main exhaust pipe 131 is provided with a main valve 141, a pressure control device 142, and a trap 143. A vacuum pump (not shown) is provided at the tip of the main exhaust pipe 131, and the atmosphere in the reaction furnace 100 is sucked by the vacuum pump and exhausted through the main exhaust pipe 131. The main valve 141 is controlled to open and close by the pressure control device 142. The trap 143 is a device for removing by-products in the exhausted atmosphere.
[0057]
The atmosphere side exhaust pipe 132 is provided with an atmosphere side valve 144, a check valve 145 and a trap 146. Further, a bypass pipe 147 for bypassing the atmosphere flow to the check valve 145 is provided in the atmosphere side exhaust pipe 132 so as to bypass the check valve 145. A bypass valve 148 is interposed in the bypass pipe 147. In other words, the bypass pipe 147 is provided in the main exhaust pipe 131 so as to connect the upstream side of the main valve 141, that is, the reaction furnace 100 side, and the atmosphere side.
[0058]
The slow exhaust pipe 133 is provided so as to bypass the main valve 141 in order to bypass the atmosphere flow of the main exhaust pipe 131. In other words, the slow exhaust pipe 133 is provided in the main exhaust pipe 131 so as to connect the upstream side of the main valve 141, that is, the reaction furnace 100 side, and the downstream side of the main valve 141, that is, the vacuum pump side. It is done. In the present embodiment, as shown in FIG. 4, the slow exhaust pipe 133 connected to the main exhaust pipe 131 on the upstream side of the main valve 141 is divided into two pipes in the middle. Is provided with a slow exhaust valve 149. The two pipes become one pipe and are again connected to the main exhaust pipe 131 on the downstream side of the main valve 141.
[0059]
On the upstream side of the main valve 141, that is, the main exhaust pipe 131 on the reaction furnace 100 side, a pressure sensor 151 is provided as a pressure gauge in the furnace via a sensor valve 152. Further, in the atmosphere side exhaust pipe 132, a pressure sensor 153 is provided as an exhaust side pressure gauge between the downstream side of the bypass valve 148 and the check valve 145, that is, between the atmosphere side and the trap 146. The atmosphere-side exhaust pipe 132 is provided with a detoxification device (not shown).
[0060]
Reference numeral 161 denotes a control device for controlling the opening and closing of various valves 120 and for controlling the temperature inside the reaction furnace 100 for supplying various gases into the reaction furnace 100 through the gas supply pipes. Various controls are performed such as heater control, opening / closing control of the main valve 141, the atmosphere side valve 144, and the bypass valve 148 for exhausting the atmosphere in the reactor 100. An instruction signal from an operator of the manufacturing apparatus and measurement signals from various sensors are input to the control device 161, and various controls are performed based on these signals. In FIG. 4, only the connection between the sensor and the valve according to the present embodiment is shown by a dotted line in the signal connection relationship with the control device 161.
[0061]
A process flow in the case of performing a process such as film formation using the semiconductor device manufacturing apparatus configured as described above will be described with reference to FIG. FIG. 5 is a diagram for explaining detailed processing contents in one film forming step.
[0062]
In FIG. 5, the processing content in the process is shown in the lower part, and the state of the temperature change in the reaction furnace 100 is shown in the upper part. First, when the process is started, first, a board on which a semiconductor wafer as a semiconductor device is placed is unloaded from the reaction furnace 100 (S1). The semiconductor wafer placed on the unloaded boat is cooled to the temperature of the atmosphere in the manufacturing place (S2). The cooled semiconductor device is placed on the boat (S3). The furnace cap 102 is opened and the boat is loaded (S4).
[0063]
Next, after the furnace port cap 102 is closed, the atmosphere in the reaction furnace 100 is vacuumed (S5). Simultaneously with starting vacuum suction, heating of the inside of the reaction furnace 100 is also started by the heater. When a predetermined pressure is reached, a leak check is performed (S6). When there is no leakage, the atmosphere in the reaction furnace 100 is further vacuumed (S7).
A stabilization process is performed to wait until the temperature in the reaction furnace 100 is stabilized at the film forming temperature for performing the film forming process and the pressure in the reaction furnace 100 is stabilized at the film forming pressure for performing the film forming process (S8). Thereafter, a film forming process such as an insulating film is performed by low pressure CVD using a source gas such as dichlorosilane (S9). Note that the temperature t in the reaction furnace 100 is not overheated by the heater after the film forming process, and thus the temperature t is lowered. In the case of low pressure CVD, the inside of the reaction furnace 100 is lower than the atmospheric pressure when a film forming process is performed.
[0064]
After film formation, an exhaust process is started. First, an inert gas such as nitrogen gas is supplied as a replacement gas into the reaction furnace 100 to perform a nitrogen purge to exhaust the remaining gas inside (S10), and then a reaction is performed. When the inside of the furnace is evacuated and an inert gas is sent as a replacement gas, a so-called cycle purge is performed in which the process of replacing the inside of the reaction furnace or the pipe with the replacement gas and the exhaust process in the reaction furnace or the pipe are repeated. This is performed several times (S11), and then a nitrogen purge is performed as an after purge (S12). The reason why the cycle purge is performed is that the residual gas in the atmosphere is sufficiently reduced by the cycle purge and then the bypass valve 148 is opened as will be described later, thereby more reliably eliminating the influence of the residual gas. .
[0065]
Thereafter, in order to return the inside of the reaction furnace 100 to atmospheric pressure, an atmosphere release process is performed (S13). After the internal pressure of the reaction furnace 100 returns to atmospheric pressure, the cap 102 of the furnace port 105 is opened and the boat is unloaded. (S14), the predetermined process ends.
[0066]
In the atmosphere release process S13, the main valve 141 of the main exhaust pipe 131 is closed to return the pressure in the reactor 100 to atmospheric pressure, the atmosphere side valve 144 of the atmosphere side exhaust pipe 132 is opened, and the check valve 145 is opened. Through the atmosphere. At this time, when the pressure measured by the pressure sensor 151 is a predetermined value, for example, 0.5 KPa (kilopascal) or more and the slow exhaust valve 149 and the main valve 141 are closed, the atmosphere side valve 144 is open.
[0067]
As described above, when the atmosphere side valve 144 is opened, the main exhaust pipe 131 is opened to the atmosphere via the check valve 145, but the main exhaust on the upstream side of the check valve 145, that is, the reactor 100 side. If the cap 102 of the furnace port 105 is opened when the pressure in the pipe 131 rises due to the resistance of the check valve 145, the atmosphere in the main exhaust pipe 131 will enter the reaction furnace 100. It will flow backward.
[0068]
Therefore, in order to prevent such backflow, when the pressure on the reactor 100 side of the check valve 145 (chamber side pressure) in the atmosphere side exhaust pipe 132 is higher than the atmosphere side pressure on the atmosphere side, The bypass valve 148 is controlled to open.
Specifically, the pressure sensor 151 measured with the pressure sensor 151 provided on the upstream side of the main valve 141, that is, the main exhaust pipe 131 on the reaction furnace 100 side, with the sensor valve 152 open. The pressure in the main exhaust pipe 131 on the reaction furnace 100 side, the pressure in the atmosphere side exhaust pipe 132 measured by the pressure sensor 153 provided on the downstream side of the check valve 145, that is, between the atmosphere side and the trap 146, When the pressure measured by the pressure sensor 151 is higher than the pressure measured by the pressure sensor 153, the control device 161 controls to open the bypass valve 148.
[0069]
When the atmosphere side valve 144 is opened, the atmosphere in the main exhaust pipe 131 flows into the atmosphere side exhaust pipe 132 via the check valve 145, but the amount of gas flowing into the check valve 145 depends on the resistance of the check valve 145. When the maximum allowable flow rate of 145 is exceeded, the pressure on the upstream side of the check valve 145, that is, the pressure on the reactor 100 side increases. On the other hand, the downstream side of the check valve 145, that is, the atmosphere side, is open to the atmosphere via the trap 146, and thus is close to atmospheric pressure. Therefore, when the main valve 141 and the slow exhaust valve 149 are closed, when the pressure measured by the pressure sensor 151 is equal to or higher than a predetermined value, for example, 0.5 KPa or higher, the control device 161 A control signal is output to open the bypass valve 148.
[0070]
Further, when the pressure rises due to some accident or the like at the end of the atmosphere side exhaust pipe 132, that is, before the trap 146 when viewed from the bypass valve 148 with the bypass valve 148 open, the bypass valve 148 is turned on. Therefore, the atmosphere in the atmosphere side exhaust pipe 132 and the main exhaust pipe 131 may flow backward toward the reactor 100.
Therefore, when the pressure measured by the pressure sensor 153 becomes a predetermined value, for example, −0.3 KPa or more, the control device 161 outputs a control signal to forcibly close the bypass valve 148.
[0071]
Therefore, the bypass valve 148 is opened when the pressure measured by the pressure sensor 153 is a predetermined value, for example, −0.3 KPa or more and the atmosphere side valve 144 is opened. The pressure measured by the pressure sensor 153 may be a predetermined value, for example, −0.3 KPa or more, and may be opened after a predetermined time has elapsed after the atmosphere side valve 144 is opened.
[0072]
As described above, according to the present embodiment, the bypass valve 148 is opened when a predetermined condition is met, and the atmosphere-side exhaust is prevented so that the atmosphere in the main exhaust pipe 131 does not flow backward to the reactor 100. When there is an accident or the like related to the pipe 132, the bypass valve 148 closes when a predetermined condition is met so that the atmosphere does not flow back from the bypass valve 148 to the reactor 100.
[0073]
Therefore, according to this embodiment, when the atmosphere containing the gas used for manufacturing the semiconductor device is exhausted from the reaction chamber, the semiconductor device is deteriorated by preventing the backflow from the exhaust pipe on the atmosphere side. It is possible to realize a method of manufacturing a semiconductor device that can prevent and improve the yield of products.
[0074]
The present invention is not limited to the above-described embodiment, and various changes and modifications can be made without departing from the scope of the present invention.
[Brief description of the drawings]
FIG. 1 is a plan view of a liquid crystal device according to an embodiment of the present invention as viewed from a counter substrate side.
FIG. 2 is a cross-sectional view of the liquid crystal device taken along the line HH ′ in FIG.
FIG. 3 is a schematic cross-sectional view of a liquid crystal device focusing on one pixel.
FIG. 4 is a piping diagram showing an example of a piping system of the manufacturing method according to the present embodiment.
FIG. 5 is a diagram for explaining an example of detailed processing contents in a film forming step;
[Explanation of symbols]
100 reactor (chamber), 102 cap, 103 inner tube, 104 outer tube, 105 furnace port, 131 main exhaust pipe, 132 atmospheric exhaust pipe, 141 main valve, 144 atmospheric valve, 145 check valve, 147 bypass Pipe, 148 Bypass valve

Claims (11)

In a method for manufacturing a semiconductor device, the method includes manufacturing a semiconductor device in a chamber using a gas, and exhausting an atmosphere containing the gas in the chamber from the chamber.
A check valve is interposed in the atmosphere side exhaust pipe for exhausting the atmosphere in the chamber to the atmosphere side,
Bypassing the check valve and providing a bypass pipe provided with a bypass valve in the atmosphere side exhaust pipe,
In the exhaust step, the bypass valve is opened when a chamber side pressure on the chamber side of the check valve in the atmosphere side exhaust pipe is higher than an atmosphere side pressure on the atmosphere side. A method for manufacturing a semiconductor device. The exhaust process includes a cycle purge process,
2. The method of manufacturing a semiconductor device according to claim 1, wherein after the cycle purge step, the bypass valve is opened when the chamber side pressure is higher than the atmosphere side pressure. When the chamber side pressure is higher than the atmosphere side pressure, the chamber side pressure is higher than a predetermined first value, and the atmosphere side pressure is lower than a predetermined second value. The method of manufacturing a semiconductor device according to claim 1, wherein the method is a time. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the first value is a pressure value when the atmosphere equal to or greater than a maximum allowable flow rate of the check valve flows into the atmosphere-side exhaust pipe. . 5. The atmosphere-side exhaust pipe is provided so as to branch from a vacuum exhaust pipe for vacuum-suctioning the atmosphere in the chamber by a vacuum pump. The manufacturing method of the semiconductor device of description. A semiconductor device manufacturing apparatus for manufacturing a semiconductor device in a chamber using a gas and executing an exhaust process for exhausting an atmosphere containing the gas in the chamber from the chamber,
A check valve interposed in the atmosphere side exhaust pipe for exhausting the atmosphere in the chamber to the atmosphere side;
A bypass pipe provided in the atmosphere-side exhaust pipe, bypassing the check valve, and having a bypass valve interposed;
Control means for opening the bypass valve in the exhaust step when the chamber side pressure on the chamber side of the check valve in the atmosphere side exhaust pipe is higher than the atmosphere side pressure on the atmosphere side. An apparatus for manufacturing a semiconductor device, comprising: A first pressure sensor for measuring the chamber side pressure of the check valve;
A second pressure sensor that measures the atmospheric pressure of the check valve;
The control means determines whether the chamber side pressure of the check valve in the atmosphere side exhaust pipe is higher than the atmosphere side pressure based on outputs of the first pressure sensor and the second pressure sensor. The apparatus for manufacturing a semiconductor device according to claim 6, wherein it is determined whether or not the chamber side pressure is higher than the atmosphere side pressure by determining whether or not the chamber side pressure is higher. Furthermore, it has a vacuum exhaust pipe for vacuum suction of the atmosphere in the chamber by a vacuum pump,
8. The semiconductor device manufacturing apparatus according to claim 6, wherein the atmosphere side exhaust pipe is provided so as to branch from the vacuum exhaust pipe. A semiconductor device manufactured by the manufacturing method according to claim 1. 10. The electro-optical device according to claim 9, further comprising an electro-optical material. The electro-optical device according to claim 10, wherein the electro-optical device is a liquid crystal device.

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