JP2004356142A - Stiffener for multilayered circuit wiring board - Google Patents

Stiffener for multilayered circuit wiring board Download PDF

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Publication number
JP2004356142A
JP2004356142A JP2003148684A JP2003148684A JP2004356142A JP 2004356142 A JP2004356142 A JP 2004356142A JP 2003148684 A JP2003148684 A JP 2003148684A JP 2003148684 A JP2003148684 A JP 2003148684A JP 2004356142 A JP2004356142 A JP 2004356142A
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Japan
Prior art keywords
wiring board
stiffener
circuit wiring
multilayer circuit
semiconductor element
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Granted
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JP2003148684A
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Japanese (ja)
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JP4333218B2 (en
Inventor
Yutaka Kato
裕 加藤
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Toppan Inc
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Toppan Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a stiffener for multilayered circuit wiring board that can prevent the occurrence of defective connection caused by hot stretching etc., in a solder reflowing step performed on a multilayered circuit wiring board at the time of connecting a semiconductor element to the wiring board. <P>SOLUTION: The stiffener has a larger size than the multilayered circuit wiring board has and a recessed section with the wiring board fitted by bonding on one surface. In addition, the temperature difference between the stiffener and wiring board is reduced and, at the same time, the slacking of the wiring board caused by thermal expansion is eliminated by using a material having a coefficient of thermal expansion larger than that of the material of the wiring board by 20-30% for the stiffener. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、半導体素子を多層回路配線板に接続する際に多層回路配線板を保持するためのスティフナーに関し、より詳しくは半導体素子を多層回路配線板に接続する際の工程の一つであるハンダリフロー工程、特にそのなかでもローカルリフロー方式と呼ばれる方式における接続不良を改善することができるスティフナーに関する。
【0002】
【従来の技術】
半導体大規模集積回路(LSI)等の半導体素子には、近年、動作速度がクロック周波数で1GHzに達するものが出現している。このような高速半導体では、トランジスタの集積度が高く、その結果入出力端子数が1000を越えることもある。
このような多端子数の半導体素子をプリント配線板に実装するために、半導体素子とプリント基板の間には多層回路配線板が配置され、両者の電気的接合の中継をしている。多層回路配線板は、高密集した半導体素子の端子との接合に対応するため、プリント配線基板よりも非常に薄い層構造と、同じくより微細な配線ピッチからなる配線パターンを持つ。また半導体素子との接合用に、接点部にはハンダバンプが設けられている。現在広く実用化されている多層回路配線板としては、例えばBGA(Ball Grid Array)やCSP(Chip Size Package)等が挙げられる。
【0003】
最近では、更なる高密度実装のためまた高動作周波数化のため、ポリイミド樹脂フィルムなどに配線パターンを形成したものを積層して、多層回路配線板全体の厚さを薄くすると共に層間持続長を短くすることにより高動作周波数化に対応させたものも開発されてきている。
【0004】
多層回路配線板への半導体素子搭載にはいくつかの方法があるが、ハンダリフロー装置を用いるのが一般的である。この装置では半導体素子と多層回路配線板を精密に位置合わせした状態で装置中を搬送しながら、温度を260℃近辺まで昇温した後、常温に戻す。前述の様に接合用に設けられたハンダバンプは高温で融解し、多層回路配線板と半導体素子各々の所定箇所間が接合され、温度低下と共に固化して接合は固定される。
【0005】
多層回路配線板はポリイミド樹脂フィルムなどを積層して配線パターンを形成したもので、厚みが薄く撓み易く、半導体素子を装着する際に不安定となるので、通常は多層回路配線板と同等の外形外縁で、半導体素子搭載箇所を取り囲む形状のスティフナーと呼ばれる金属板を接着することで平坦化を図ることが行われている。そして、多層回路配線板に例えばポリイミド樹脂フィルムを用いた場合にはスティフナーの材質としては銅を用いるのが一般的であった。これはポリイミド樹脂と銅は熱膨張係数がほぼ一致しており、ハンダリフロー工程での温度変化に対して変形が少なく問題がないと考えられていたからである。
【0006】
またスティフナーの形状に関する従来技術としては、半導体素子を装着した多層配線基板を実装基板に接合する際の、多層配線基板と実装基板との接合用に設けたハンダボールの接合を確実にする目的で、それぞれの構成要素間の応力を緩和するようにスティフナーの形状を前記ハンダボールの直上の位置で空間部を形成するなどが行われている。(例えば 特許文献1参照)
【0007】
【特許文献1】
特開平11−220055号公報(第3頁、図1)
【0008】
【発明が解決しようとする課題】
しかしながら、半導体素子の端子は近年ますます高密集化しており、特に半導体素子と多層配線基板である多層回路配線板を接続するためのハンダバンプは微小であるため多層回路配線板のわずかな変形による工程中の接合位置ズレや接合不良が大きな問題となっていた。特にこのわずかな変形はハンダリフロー工程でも片面側から、通常は下面側から加熱する、いわゆるローカルリフロー方式のハンダリフロー工程では問題となり、実装不可能となる事態も生じていた。
【0009】
工程中の位置ズレの発生原因は次のように考えられる。多層回路配線板の中央部分に半導体素子を装着するため、スティフナーは半導体素子を取り囲む枠状の形態であり、中央部には貫通口を有する形態である。従ってスティフナーは多層回路配線板にその周辺部分で接着される。ローカルリフロー方式によるハンダリフロー装置中で下面側である多層回路配線板側から加熱されると、多層回路配線板とスティフナー間に温度差が生じ、前述の様に多層回路配線板の材質をポリイミド樹脂としスティフナの材質を銅として熱膨張係数を同等に揃えた場合であっても膨張に差が発生する。
【0010】
この様に多層回路配線板のほうがスティフナーよりも高温になるため膨張の度合いは大きいにもかかわらず、周辺部を金属製のスティフナーに接着されているため多層回路配線板の半導体素子を搭載する領域はたるみを生じ、平面状態を維持できなくなり上下いずれかに膨れる。その結果、半導体素子側に膨れる場合には高温で融解したハンダバンプがつぶれ、半導体素子から離れる場合にはハンダバンプによる接合が形成されない、または接合が不安定になる場合がある、といった問題が生じていた。
【0011】
本発明は、以上の事情に鑑みてなされたものであり、その目的とするところは、半導体素子を多層回路配線板に接続するために行うハンダリフロー工程、特にローカルリフロー方式のハンダリフロー工程において、多層回路配線板の平坦性を維持して、半導体素子と多層回路配線板との接続を確実にすることができるスティフナーを提供することにある。
【0012】
【課題を解決するための手段】
上記目的を実現する為に、本発明では、以下のような手段を講じる。
即ち本発明のスティフナーの形状は、その外縁が接着する多層回路配線板の外縁より外側に位置し、また内縁が前記多層回路配線板の内側に位置する枠体で、かつ下面に前記多層回路配線板の厚みと同等の深さの窪みを有している。かつスティフナーの材質は多層回路配線板の熱膨張係数に比べ15%から30%大きい熱膨張係数を持つ金属からなる。前記窪みに前記多層回路配線板を嵌合させるように接着する。
【0013】
このような形態のスティフナーに多層回路配線板を接着したものをローカルリフロー方式によるハンダリフロー装置において処理する場合、多層回路配線板下面とスティフナー下面がほぼ面一となると共に、スティフナー下面の一部が加熱面に対して露出するため、多層回路配線板とスティフナーとの間の温度差を小さくでき、かつスティフナーの熱膨張係数を多層回路配線板よりも大きくすることでスティフナーの伸びを大きくし、多層回路配線板に面方向のテンションを与えてたるみを生じ難くして平面状態からのズレを抑えるものである。スティフナーの熱膨張係数の値は多層回路配線板に比して15%〜30%大きい値とするのが望ましい。ここでスティフナーの熱膨張係数が多層回路配線板に比して15%より小さい値の場合はたるみを減殺する効果に乏しく、また30%より大きい場合は伸び量の差が大きくなり過ぎ位置ずれを生じる可能性がある。
【0014】
【発明の実施の形態】
以下に本発明に係わる半導体素子と多層回路配線板とを接続するために行うハンダリフロー工程での接続をより確実に行うことが可能なスティフナーの実施の形態を図面を元に更に詳細に説明する。
【0015】
図1は本発明の一実施形態のスティフナー2を多層回路配線板1に接着したものの断面形状の説明図である。スティフナー2のみの形状は図2に示す。図1において、スティフナー2はその外縁が接着する多層回路配線板1の外縁より外側に位置している。また中央の半導体素子を装着する部位には相応する形状の穴が開いていて内縁を形成しているため、全体として枠体をなしている。一般的な多層回路配線板の厚みは150μm、一辺40mm程度の正方形であり、中央にハンダバンプを介して半導体素子(図示せず)を接合する。そのような形状の多層回路配線板を接着するスティフナー2は厚み500μm、一辺44mm程度の正方形であり、窪みの深さは150μである。また中央の半導体素子を装着する部位の穴は一辺25mmの正方形である。前記多層回路配線板1は下面の窪み4に嵌合して接着され、前記多層回路配線版1の下面とスティフナー2の下面がほぼ面一となるようにされている。一方、図3は従来の形状のスティフナー3を用いた断面説明図である。多層回路配線板1の外周に、前記多層回路配線板1の周縁とスティフナー3の外縁が一致する様に接着して用いられる。
【0016】
図1の実施形態および比較のため図3の従来の形態のものについて、スティフナーの材質ををそれぞれ多層回路配線板と同じ熱膨張係数を持つ銅、銅よりも20%熱膨張係数が大きい真鍮の2種の材質で作成し、それぞれの組み合わせについて比較を行った。ここで銅の線膨張率は16.5[10−6/K]、真鍮の線膨張率は19.8[10−6/K]である。多層回路配線板の基材であるポリイミドの線膨張率は銅と同等である。多層回路配線板を接着した側から加熱し、約100秒で260℃に昇温させ、30秒保持、約50秒で常温に戻した。この時の多層回路配線板中央部分の半導体素子を接合する領域の上下への変化量を測定した結果を表1に示す。
【0017】
【表1】

Figure 2004356142
【0018】
表1に示すように、従来の形状のスティフナーでは熱膨張係数の大きな材質を用いても効果は無い。また従来用いられていた熱膨張係数の材質では本発明の形状にしても改善は見られなかった。一方、本発明の形状で,かつその熱膨張係数が本発明に係る材質のものにした場合、変動量は小さく押さえられ、本発明のスティフナーを用いることで多層回路配線板の変形を抑えることが可能であることが確認された。
【0019】
なお上記実施形態は本発明の実施形態の一例に過ぎず、本発明は上記実施形態に限定されるものではない。
【0020】
【発明の効果】
以上説明したように、本発明のスティフナーを用いることにより、ローカルリフロー方式のハンダリフロー工程においてスティフナーで固定した多層回路配線板の熱変形を最小にすることが可能となり、熱変形によって引き起こされる半導体素子と多層回路配線板との接続不良を減少できる。
【0021】
【図面の簡単な説明】
【図1】本発明のスティフナーと多層回路配線板を接着した状態を示す断面図
【図2】本発明のスティフナーの一例を示す説明図
【図3】
従来の形状のスティフナーと多層回路配線板を接着した状態を示す断面図
【符号の説明】
1・・・多層回路配線板
2・・・スティフナー
3・・・スティフナー
4・・・窪み[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a stiffener for holding a multilayer circuit wiring board when connecting a semiconductor element to the multilayer circuit wiring board, and more particularly to a solder which is one of the steps for connecting a semiconductor element to the multilayer circuit wiring board. The present invention relates to a stiffener capable of improving a connection failure in a reflow process, particularly, a method called a local reflow method.
[0002]
[Prior art]
In recent years, semiconductor devices such as semiconductor large-scale integrated circuits (LSI) whose operation speed reaches 1 GHz in clock frequency have appeared. In such a high-speed semiconductor, the degree of integration of transistors is high, and as a result, the number of input / output terminals may exceed 1,000.
In order to mount a semiconductor element having such a large number of terminals on a printed wiring board, a multilayer circuit wiring board is arranged between the semiconductor element and the printed board, and relays electrical connection between the two. The multilayer circuit wiring board has a layer structure that is much thinner than a printed wiring board and a wiring pattern that also has a finer wiring pitch in order to cope with bonding to terminals of highly dense semiconductor elements. Further, solder bumps are provided on the contact portions for bonding with the semiconductor element. As multilayer circuit wiring boards that are currently in widespread use, for example, BGA (Ball Grid Array), CSP (Chip Size Package), and the like are given.
[0003]
Recently, for higher density mounting and higher operating frequency, laminates with wiring patterns formed on polyimide resin film etc. are laminated to reduce the overall thickness of the multilayer circuit wiring board and increase the interlayer persistence length. A device which is adapted to a higher operating frequency by shortening it has been developed.
[0004]
Although there are several methods for mounting a semiconductor element on a multilayer circuit wiring board, a solder reflow device is generally used. In this apparatus, the temperature is raised to around 260 ° C. while being transported in the apparatus with the semiconductor element and the multilayer circuit wiring board precisely aligned, and then returned to room temperature. As described above, the solder bumps provided for bonding are melted at a high temperature, the predetermined portions of the multilayer circuit wiring board and the respective semiconductor elements are bonded together, and are solidified as the temperature decreases, and the bonding is fixed.
[0005]
The multilayer circuit wiring board is formed by laminating a polyimide resin film etc. to form a wiring pattern.Thickness is easy to bend and it becomes unstable when semiconductor elements are mounted. At the outer edge, flattening is performed by bonding a metal plate called a stiffener having a shape surrounding a semiconductor element mounting portion. When, for example, a polyimide resin film is used for the multilayer circuit wiring board, copper is generally used as the material of the stiffener. This is because the polyimide resin and copper have almost the same thermal expansion coefficient, and it is considered that there is no problem with little deformation due to a temperature change in the solder reflow process.
[0006]
In addition, as a conventional technique regarding the shape of the stiffener, when bonding a multilayer wiring board on which a semiconductor element is mounted to a mounting board, the purpose is to ensure that the solder balls provided for bonding the multilayer wiring board and the mounting board are bonded. In order to relieve the stress between the components, a stiffener is formed in a shape just above the solder ball to form a space. (For example, see Patent Document 1)
[0007]
[Patent Document 1]
JP-A-11-220055 (page 3, FIG. 1)
[0008]
[Problems to be solved by the invention]
However, the terminals of semiconductor elements are becoming more and more dense in recent years. In particular, since the solder bumps for connecting the semiconductor elements and the multilayer circuit wiring board, which is a multilayer wiring board, are very small, the process due to slight deformation of the multilayer circuit wiring board is difficult. The misalignment and poor bonding at the middle have been a major problem. In particular, this slight deformation causes a problem in the so-called local reflow solder reflow process in which heating is performed from one side, usually from the lower surface side, even in the solder reflow process, and there has been a case where mounting becomes impossible.
[0009]
The cause of the displacement during the process is considered as follows. The stiffener has a frame-like form surrounding the semiconductor element and has a through hole in the central part in order to mount the semiconductor element on the central part of the multilayer circuit wiring board. Therefore, the stiffener is bonded to the multilayer circuit wiring board at the peripheral portion. When heated from the lower side of the multilayer circuit wiring board in the local reflow solder reflow device, a temperature difference occurs between the multilayer circuit wiring board and the stiffener, and the material of the multilayer circuit wiring board is changed to polyimide resin as described above. Even when the material of the stiffener is copper and the thermal expansion coefficients are equalized, a difference occurs in the expansion.
[0010]
Although the multilayer circuit wiring board is higher in temperature than the stiffener as described above, the degree of expansion is large, but the peripheral portion is adhered to the metal stiffener, so that the area where the semiconductor element of the multilayer circuit wiring board is mounted is mounted. Slack occurs, and a flat state cannot be maintained, and swells up or down. As a result, when swelling to the semiconductor element side, the solder bump melted at a high temperature is crushed, and when separated from the semiconductor element, there is a problem that bonding by the solder bump may not be formed or bonding may be unstable. .
[0011]
The present invention has been made in view of the above circumstances, and its purpose is to perform a solder reflow process for connecting a semiconductor element to a multilayer circuit wiring board, particularly in a local reflow solder reflow process. An object of the present invention is to provide a stiffener that can maintain the flatness of a multilayer circuit wiring board and reliably connect a semiconductor element to the multilayer circuit wiring board.
[0012]
[Means for Solving the Problems]
To achieve the above object, the present invention takes the following measures.
That is, the shape of the stiffener of the present invention is a frame body whose outer edge is located outside the outer edge of the multilayer circuit wiring board to be bonded, and whose inner edge is located inside the multilayer circuit wiring board, and the lower surface of the multilayer circuit wiring board. It has a depression of the same depth as the thickness of the plate. The material of the stiffener is made of a metal having a coefficient of thermal expansion 15% to 30% larger than that of the multilayer circuit wiring board. The multilayer circuit wiring board is bonded so as to fit into the recess.
[0013]
When a multilayer circuit wiring board bonded to a stiffener of such a form is processed by a local reflow solder reflow apparatus, the lower surface of the multilayer circuit wiring board and the lower surface of the stiffener are almost flush, and a part of the lower surface of the stiffener is partially removed. Because it is exposed to the heating surface, the temperature difference between the multilayer circuit wiring board and the stiffener can be reduced, and the expansion of the stiffener is increased by increasing the coefficient of thermal expansion of the stiffener as compared with the multilayer circuit wiring board. The purpose is to apply a tension in the surface direction to the circuit wiring board so that the circuit wiring board is less likely to be sagged and a deviation from a planar state is suppressed. It is desirable that the value of the coefficient of thermal expansion of the stiffener be 15% to 30% larger than that of the multilayer circuit wiring board. Here, if the coefficient of thermal expansion of the stiffener is smaller than 15% as compared with the multilayer circuit wiring board, the effect of reducing the sag is poor. Can occur.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of a stiffener which can more reliably perform connection in a solder reflow process performed for connecting a semiconductor element and a multilayer circuit wiring board according to the present invention will be described in detail with reference to the drawings. .
[0015]
FIG. 1 is an explanatory view of a cross-sectional shape of a stiffener 2 according to an embodiment of the present invention bonded to a multilayer circuit wiring board 1. FIG. 2 shows the shape of only the stiffener 2. In FIG. 1, the stiffener 2 is located outside the outer edge of the multilayer circuit wiring board 1 to which the outer edge is bonded. In addition, a hole of a corresponding shape is formed in a portion where the central semiconductor element is to be mounted to form an inner edge, so that the frame as a whole is formed. A general multilayer circuit wiring board has a thickness of 150 μm and a square of about 40 mm on a side, and a semiconductor element (not shown) is joined to the center via a solder bump. The stiffener 2 for bonding the multilayer circuit wiring board having such a shape is a square having a thickness of 500 μm and a side of about 44 mm, and the depth of the depression is 150 μm. The central hole for mounting the semiconductor element is a square having a side of 25 mm. The multilayer circuit wiring board 1 is fitted into and adhered to the recess 4 on the lower surface so that the lower surface of the multilayer circuit wiring board 1 and the lower surface of the stiffener 2 are substantially flush. On the other hand, FIG. 3 is a sectional explanatory view using a stiffener 3 having a conventional shape. It is used by being bonded to the outer periphery of the multilayer circuit wiring board 1 such that the peripheral edge of the multilayer circuit wiring board 1 and the outer edge of the stiffener 3 coincide.
[0016]
For the embodiment of FIG. 1 and the conventional one of FIG. 3 for comparison, the material of the stiffener was changed to copper having the same thermal expansion coefficient as that of the multilayer circuit wiring board, and brass having a 20% larger thermal expansion coefficient than copper. Two types of materials were used, and a comparison was made for each combination. Here, the linear expansion coefficient of copper is 16.5 [10 -6 / K], and the linear expansion coefficient of brass is 19.8 [10 -6 / K]. The linear expansion coefficient of polyimide, which is the base material of the multilayer circuit wiring board, is equivalent to that of copper. It was heated from the side where the multilayer circuit wiring board was bonded, raised to 260 ° C. in about 100 seconds, held for 30 seconds, and returned to room temperature in about 50 seconds. Table 1 shows the result of measuring the amount of change in the vertical direction of the region where the semiconductor element is bonded at the central portion of the multilayer circuit wiring board at this time.
[0017]
[Table 1]
Figure 2004356142
[0018]
As shown in Table 1, there is no effect even if a material having a large thermal expansion coefficient is used in a stiffener having a conventional shape. Also, no improvement was seen in the conventionally used material having a coefficient of thermal expansion even with the shape of the present invention. On the other hand, when the shape of the present invention and the thermal expansion coefficient thereof are made of the material according to the present invention, the amount of variation is kept small, and the deformation of the multilayer circuit wiring board can be suppressed by using the stiffener of the present invention. It was confirmed that it was possible.
[0019]
The above embodiment is merely an example of the embodiment of the present invention, and the present invention is not limited to the above embodiment.
[0020]
【The invention's effect】
As described above, by using the stiffener of the present invention, it is possible to minimize the thermal deformation of the multilayer circuit wiring board fixed by the stiffener in the local reflow solder reflow process, and the semiconductor element caused by the thermal deformation Connection failure with the multilayer circuit wiring board can be reduced.
[0021]
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a state in which a stiffener of the present invention is bonded to a multilayer circuit wiring board. FIG. 2 is an explanatory view showing an example of a stiffener of the present invention.
Cross-sectional view showing a state in which a stiffener of a conventional shape and a multilayer circuit wiring board are bonded together.
DESCRIPTION OF SYMBOLS 1 ... Multi-layer circuit wiring board 2 ... Stiffener 3 ... Stiffener 4 ... Depression

Claims (1)

半導体素子を多層回路配線板に接続する際に多層回路配線板の周囲を接着して保持するためのスティフナーであって、該スティフナーは外縁が前記多層回路配線板の周縁より外側に位置し、また内縁が前記多層回路配線板の周縁の内側に位置する枠体で、下面に前記多層回路配線板の厚みと同等の深さの窪みを有し、かつ多層回路配線板の熱膨張係数に比べ15%から30%大きい熱膨張係数を持つ金属からなることを特徴とするスティフナー。A stiffener for bonding and holding the periphery of the multilayer circuit wiring board when connecting the semiconductor element to the multilayer circuit wiring board, wherein the stiffener has an outer edge located outside the peripheral edge of the multilayer circuit wiring board, and A frame whose inner edge is located inside the periphery of the multilayer circuit wiring board, which has a depression on the lower surface having a depth equal to the thickness of the multilayer circuit wiring board, and which has a thermal expansion coefficient of 15 A stiffener comprising a metal having a coefficient of thermal expansion greater by% to 30%.
JP2003148684A 2003-05-27 2003-05-27 Multi-layer circuit board with stiffener Expired - Fee Related JP4333218B2 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010238828A (en) * 2009-03-30 2010-10-21 Ngk Spark Plug Co Ltd Wiring substrate with reinforcing material
KR101013546B1 (en) * 2007-08-31 2011-02-14 주식회사 하이닉스반도체 Substrate used memory module
JP2019009107A (en) * 2017-03-31 2019-01-17 株式会社Ctnb Light distribution control element, light distribution adjustment means, reflection member, reinforcing plate, lighting unit, display and television receiver

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101013546B1 (en) * 2007-08-31 2011-02-14 주식회사 하이닉스반도체 Substrate used memory module
JP2010238828A (en) * 2009-03-30 2010-10-21 Ngk Spark Plug Co Ltd Wiring substrate with reinforcing material
JP2019009107A (en) * 2017-03-31 2019-01-17 株式会社Ctnb Light distribution control element, light distribution adjustment means, reflection member, reinforcing plate, lighting unit, display and television receiver
CN114236901A (en) * 2017-03-31 2022-03-25 沪苏艾美珈光学技术(江苏)有限公司 Light distribution control element, light distribution adjustment mechanism, reflection member, reinforcing plate, illumination unit, display, and television
CN114236901B (en) * 2017-03-31 2023-08-22 沪苏艾美珈光学技术(江苏)有限公司 Light distribution control element, light distribution adjusting mechanism, reflecting member, reinforcing plate, illumination unit, display, and television

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