JP2004349299A - Thin film transistor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the shading structure and the simplified manufacturing method of a thin film transistor. <P>SOLUTION: An opaque structure 32 which is electrically insulated from a gate is provided adjacent to the gate located on a substrate 30, whereby light rays radiating from the substrate can be blocked, and a photo current is hardly induced in the source/drain 35 of the thin film transistor, channels, and conductors. The manufacturing method comprises steps of forming a photoresist pattern of irregular thickness through a mask equipped with a dual slit pattern, and finishing the transfer of a two-layered conductor layer pattern used for forming a source, a drain, and channels by the use of only one mask. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a thin film transistor and a method of manufacturing the same. More particularly, the present invention relates to a thin film transistor having a conductor structure for shielding light below a conductive line electrically connected to a drain (source), and a mask having a dual slit pattern. The invention relates to a method of manufacturing a thin film transistor to be defined.
[0002]
[Prior art]
Thin film transistors are widely used in modern electronic products, and are used, for example, in liquid crystal display panels for on / off control of each pixel. Accordingly, how to improve the structure and manufacturing method of the thin film transistor has been enthusiastically studied.
[0003]
The structure of a well-known thin film transistor is as shown in FIG. 1 and comprises the following basic units arranged on a substrate 10: a conductor structure 11, a first dielectric layer 12, a first semiconductor layer 13, a conductor layer 14. , And at least a second dielectric layer 15 and is electrically connected to the conductor 16 (patterned conductor structure). The conductor structure 11 is a gate, the first semiconductor layer 13 provides a channel, the conductor layer 14 is a source and a drain, the first dielectric layer 12 and the second dielectric layer 15 are for isolation and protection, The conducting wire 16 electrically connects the drain of the thin film transistor to the outside world. Naturally, FIG. 1 is a schematic diagram, and does not show the conduit of the electrical connection between the gate and the source outside. However, basically, the source is also electrically connected to the outside via the conductor of the second dielectric layer, and the gate is electrically connected to the outside via the conductor of the first dielectric layer and the second dielectric layer. .
[0004]
The patterns of the conductor structure 11, the first semiconductor layer 13, the conductor layer 14, the second dielectric layer 15 and the conductor 16 are all different, and if each layer is patterned by using an individual mask, 5 Masks and five pattern transfer steps are required. For this reason, techniques for reducing the number of required masks in order to reduce material costs, shorten manufacturing time, and increase production capacity are being successively submitted.
[0005]
For example, a known technique uses a method in which the conductor layer 14 and the conductor 16 are formed of the same material and two masks are combined to form one mask. However, such a method has a problem that it is impossible to cope with two kinds of requirements that are simultaneously optimized with one kind of material with respect to the difference between the requirements of the conductor and the source / drain. For example, according to a well-known technique, when a single mask is used by combining the second dielectric layer 15 and the first semiconductor layer 13, a problem of a relatively large gap and a relatively high leakage current (I _off ) due to the thin film transistor size is caused. Is brought. Further, a well-known technique employs a method in which a single mask is used for the first semiconductor layer 13 and the conductor layer 14, but a special exposure technique must be used for the halftone mask to be used. However, there are considerable difficulties in practical applications. There are non-patent documents 1 to 3 as reports of such technology.
[0006]
In addition, when the thin film transistor is applied to a liquid crystal display panel, a light beam is often projected on one surface of the thin film transistor from the back surface of the substrate 10, and the first dielectric layer 12 in the well-known technology is usually a transparent dielectric material. The first semiconductor layer 13, the conductive layer 14, and the conductive wire 16 are often irradiated with light rays to generate a photocurrent (such as an electron-hole pair generated by photoexcitation of the semiconductor), thereby causing a leakage current. Alternatively, a defect such as noise is generated.
[0007]
[Non-patent document 1]
A. Van Calster et al. "Simplified 3-step Fabrication for High Mobility AMLCD Panels" (Simplified 3-step Fabrication for High Mobility AMLCD Panels)
[Non-patent document 2]
K. Ono et al., "A Simplified 4 Photo-Mask Process for 34-cm Diagonal TFT-LCDs", IDRC 1995 [Non-Patent Document 3]
Chang W. H. "A TFT manufactured by 4-Masks Process with new Photolithography using a new photolithography and a 4-mask process" IDRC 1998
[Problems to be solved by the invention]
Taken together, the well-known structure and well-known method of forming thin-film transistors have considerable room for improvement, i.e., how to reduce the number of masks required when forming thin-film transistors and how to prevent currents induced by irradiation of light to the thin-film transistors. Is a problem that needs to be resolved.
[0009]
A main object of the present invention is to provide a method of forming a thin film transistor using four photomasks and a thin film transistor capable of effectively solving the problem of photocurrent in order to solve the above-mentioned drawbacks commonly known in the art. is there.
[0010]
[Means for Solving the Problems]
The invention according to claim 1 is a method for manufacturing a thin film transistor,
Providing a substrate;
Forming a gate on the substrate;
Forming a dielectric layer on the substrate and covering the gate;
Forming a first semiconductor layer on the dielectric layer;
Forming a second semiconductor layer on the first semiconductor layer;
Forming a photoresist layer on the second semiconductor layer;
Placing a mask over the photoresist layer, positioning the dual slit pattern provided on the mask above the gate, and positioning the middle of the dual slit pattern above the middle of the gate;
Patterning the photoresist layer to form a photoresist pattern comprising a thin portion and a thick portion and a thick portion located below the dual slit pattern at a position above the gate and the surrounding portion of the substrate;
Removing a portion of the second semiconductor layer and the first semiconductor layer that are not covered by the photoresist pattern;
A step of removing a thin portion of the photoresist pattern,
Removing a portion of the second semiconductor layer that is not covered by the remaining photoresist pattern;
And a method for manufacturing a thin film transistor.
According to a second aspect of the present invention, in the method of manufacturing a thin film transistor according to the first aspect, when the gate is formed, the opaque structure electrically isolated from the gate is partially removed from the second semiconductor layer. And a step of forming the thin film transistor so as to be located at least below the thin film transistor.
The invention according to claim 3 is a method for manufacturing a thin film transistor,
Providing a substrate;
Forming a gate on the substrate;
Forming a conductor structure and an opaque structure such that the conductor structure and the opaque structure are electrically isolated from each other;
Forming a first dielectric layer on the substrate and covering the first dielectric layer with the conductor structure and the opaque structure;
Forming a first semiconductor layer on the first dielectric layer;
Forming a second semiconductor layer on the first semiconductor layer;
Performing patterning to remove a portion of the second semiconductor layer and a portion of the first semiconductor layer, wherein the unremoved portion of the second semiconductor layer and the unremoved portion of the first semiconductor layer are at least positioned above the conductor structure; So that the unremoved portion of the first semiconductor layer covers at least a part of the opaque structure;
Forming a second dielectric layer on the substrate, and covering the second dielectric layer with an unremoved portion of the second semiconductor layer and an unremoved portion of the first semiconductor layer;
Forming an opening in the second dielectric layer and exposing a portion of the second semiconductor layer from the opening;
Forming a patterned conductor layer on the second dielectric layer, and positioning the patterned conductor layer also in the opening;
And a method for manufacturing a thin film transistor.
According to a fourth aspect of the present invention, in the method of manufacturing a thin film transistor according to the third aspect, the unremoved portion of the first semiconductor layer or the second semiconductor layer is removed along the periphery of the conductor structure and above the conductor structure. Is adjusted to be larger than the width of a portion not located above the conductor structure.
According to a fifth aspect of the present invention, in the method of manufacturing a thin film transistor according to the third aspect, the unremoved portion of the first semiconductor layer or the second semiconductor layer is formed along the periphery of the light-opaque structure above the light-opaque structure. The width of the unremoved portion is adjusted to be larger than the width of the portion that is not located above the light-impermeable structure.
The invention according to claim 6 is a thin film transistor,
A conductor structure located on the substrate,
An opaque structure located on the substrate and separated from the conductor structure;
A first dielectric layer covering the substrate, the conductor structure, and the opaque structure;
A first semiconductor layer located on the first dielectric layer and located above the conductor structure and at least a part of the opaque structure;
A second semiconductor layer located on a part of the first semiconductor layer and located above the conductor structure and at least a part of the light-opaque structure;
A second dielectric layer that covers the substrate, the first semiconductor layer and the second semiconductor layer, and includes at least one opening to partially expose the second semiconductor layer;
A patterned conductive layer positioned over the second dielectric layer and positioned in the opening, wherein the opaque structure is positioned below at least a portion of the patterned conductive layer. A conductor layer,
And a thin film transistor characterized by comprising:
According to a seventh aspect of the present invention, in the thin film transistor according to the sixth aspect, the width of a portion of the first semiconductor layer or the second semiconductor layer located above the conductor structure along the periphery of the conductor structure is equal to or smaller than the width of the conductor structure. The thin film transistor is characterized in that it is larger than the width of a portion not located above.
The invention according to claim 8 is the thin film transistor according to claim 6, wherein the width of a portion of the first semiconductor layer or the second semiconductor layer located above the light-opaque structure is set along the periphery of the light-opaque structure. The thin film transistor is characterized by having a width larger than a width of a portion not located above the light-impermeable structure.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Embodiments of the present invention provide a method of manufacturing a thin film transistor, which includes at least the following basic steps.
[0012]
As shown in FIG. 2, a substrate 20 is provided, and a gate 21 is formed on the substrate.
[0013]
As shown in FIG. 3, first, a dielectric layer 22 is formed on a substrate and covers the gate 21, and a first semiconductor layer 23 and a second semiconductor layer 24 are sequentially formed on the dielectric layer 22. .
[0014]
As shown in FIG. 4, a photoresist layer 25 is formed on the second semiconductor layer 24, and a mask 251 is placed above the photoresist layer 25. The mask 251 has a dual slit pattern 252, and the dual slit pattern 252 of the mask 251 is positioned above the gate 21. The middle of the dual slit pattern 252 is located above the middle of the gate 21.
[0015]
As shown in FIG. 5, the photoresist layer 25 is patterned to form a photoresist pattern 253. The photoresist pattern 253 is located slightly above the gate 21 (which may include the substrate 20 around the gate 21). Due to the dual slit diffraction induced by the dual slit pattern 252, the photoresist pattern 253 is divided into a thinner photoresist pattern and a thicker photoresist pattern. The thin portion of the photoresist pattern is located below the dual slit pattern. Of course, the actual photoresist pattern 253 often changes in an arc shape without such apparent thickness change, but FIG. 5 is drawn to show the features of the present invention. Such a photoresist pattern 253 is not always formed.
[0016]
As shown in FIG. 6, a part of the second semiconductor layer 24 and a part of the first semiconductor layer 23 which are not covered with the photoresist pattern 253 are removed. Naturally, the part of the dielectric layer 22 not covered with the photoresist pattern 253 can be removed together, and the present embodiment does not limit such details.
[0017]
As shown in FIG. 7, the thin portion of the photoresist pattern 253 is removed. Naturally, the thickness of the photoresist pattern 253 may be reduced entirely until the second semiconductor layer 24 to be removed from the remaining photoresist pattern 253 is exposed (the entire surface is etched). Alternatively, only the thin photoresist pattern 253 may be removed. The present embodiment does not limit such details.
[0018]
As shown in FIG. 8, the portion of the second semiconductor layer 24 not covered with the remaining photoresist pattern 253 is removed, and the remaining photoresist pattern 253 is further removed. Of course, depending on the standard of the thin film transistor to be formed, after removing a part of the second semiconductor layer 24, the part of the first semiconductor layer 23 not covered with the photoresist pattern 253 is removed (or part of the remaining part). It is also possible to reduce the thickness of a part of the first semiconductor layer 23 that is not covered with the photoresist pattern 253).
[0019]
Obviously, the feature of this embodiment is that the pattern of the first semiconductor layer 23 and the pattern of the second semiconductor layer 24 are simultaneously defined by the mask 251 having the dual slit pattern 252, thereby reducing the number of masks required when forming the thin film transistor. It is in. The diffraction pattern generated by the dual slit pattern has a characteristic that the middle is relatively strong and gradually weakens toward both sides. In this embodiment, the photoresist layer 25 is formed by using a single mask 251 to form a photoresist having an uneven thickness. Pattern 253 is formed. Thus, the first semiconductor layer 23 and the second semiconductor layer 24 are patterned using the two-step type photoresist pattern 253 having a non-uniform thickness (the first step is a photoresist pattern 253 having a non-uniform overall thickness, The other stage is a photoresist pattern 253 in which a thin portion is removed first, and the photoresist pattern 253 in an unremoved portion is used. In this embodiment, the second semiconductor layer 24 and the first semiconductor layer 24 are formed using only one mask. The semiconductor layers 23 are provided with different patterns.
[0020]
Naturally, the present embodiment can further execute the following steps as shown in FIG. 9 in order to form a conductor for signal exchange with the outside world (these steps are not features of the present embodiment. , Detailed steps are not shown one by one in the figure).
(1) After removing a part of the second semiconductor layer 24, the photoresist pattern 253 is removed, an additional dielectric layer 26 is formed on the substrate, and the first semiconductor layer 23 and the second semiconductor layer 24 are covered. Let it.
(2) The additional dielectric layer 26 is patterned to form an opening to partially expose the second semiconductor layer 24. In order not to affect the presence or absence of the dielectric layer 22 that is not covered with the photoresist pattern 253, it can be covered again with the additional dielectric layer 26.
(3) A patterned conductor layer 27 is formed above the additional dielectric layer 26 and is also located in the opening.
[0021]
Another embodiment of the present invention provides a thin film transistor, which comprises at least the following basic units, as shown in FIGS. That is, the conductor structure 31, the opaque structure 32, the first dielectric layer 33, the first semiconductor layer 34, the second semiconductor layer 35, the second dielectric layer 36, and the patterned conductor layer 37.
[0022]
In the embodiment shown in FIGS. 10 and 11, the point that the structure and the progress of the process are different from the previous embodiment is the opaque structure 32. When forming the thin film transistor of this embodiment, there is a step of forming an opaque structure 32 on the substrate 30 using a mask pattern used for forming the first semiconductor layer 34 and the second semiconductor layer 35. That is. The order of the steps of the opaque structure 32 is not limited before or after the step of forming the conductor structure 31 on the substrate 30. Other steps of the basic unit are the same as those of the previous embodiment.
[0023]
In this embodiment, the conductor structure 31 is located on the substrate 30, the opaque structure 32 is located on the substrate 30 and is electrically isolated from the conductor structure 31, and is nonconductive between each other. (Ie, when the opaque structure is a conductor, the opaque structure 32 and the conductor structure 31 must be separated from each other, and if the opaque structure is not a conductor, the opaque structure 32 and the conductor Structure 31 is directly contactable). The first dielectric layer 33 covers the substrate 30, the conductor structure 31 and the opaque structure 32, and the first semiconductor layer 34 is on the first dielectric layer 33, especially above the conductor structure 31 and the opaque structure 32. Located in. The second semiconductor layer 35 is located on the first semiconductor layer 34, in particular, above the conductor structure 31 and the opaque structure 32. The second dielectric layer 36 covers the substrate 30, the first semiconductor layer 34 and the second semiconductor layer 35 and is located in the second dielectric layer 36 and at least one of which exposes a part of the second semiconductor layer 35. It has an opening. A patterned conductor layer 37 is located above the second dielectric layer 36 and in the opening, and is located above at least some of the opaque structures 32.
[0024]
Obviously, comparing FIGS. 10 and 11 with FIG. 1, the present embodiment has the feature of the presence of the opaque structure 32 in addition to the above-described mask saving feature. As compared with the known technique, there is a problem that a part of the first semiconductor layer 13 and a part of the conductor layer 14 located above the conductor structure 11 in the known technique generate a photocurrent by light irradiation from the substrate 10. Absent. In this embodiment, the use of the opaque structure 32 effectively blocks the light beam from the substrate 30, and the first semiconductor layer 34, the second semiconductor layer 35, and the patterned conductor layer 37 reduce the irradiation of the light beam from the substrate 30. Probability of receiving is reduced. Thus, in the present embodiment, the defect of the photocurrent is prevented by using the light-impermeable structure 32, and the first dielectric layer 33, the first semiconductor layer 34, the second semiconductor layer 35, and the second It is not necessary to modify the material and layout of the dielectric layer 36 and the patterned conductor layer 37 and the like.
[0025]
Here are the highlights: The present embodiment is not intended to limit the material of the opaque structure 32, and the opaque structure 32 may be a conductor or a dielectric. However, in order to simplify the structure of the present embodiment, particularly to simplify the manufacturing method of the present embodiment, the opaque structure 32 and the conductive structure 31 (gate) in the present embodiment are formed of the same conductive material. sell. The opaque structure 32 and the conductor structure 31 are simultaneously formed when the pattern transfer step is performed on the conductive material covering the substrate 30 (that is, the opaque structure 32 and the conductor structure 31 are formed by modifying the mask pattern used for forming the gate). The conductor structure 31 is formed at the same time.) In addition, when the opaque structure 32 and the conductor structure 31 are both made of a conductor material, the smaller the distance between them is, the more the light can be blocked under the premise that the electrical isolation can be achieved. For example, when the thin film transistor of this embodiment is formed by the method of manufacturing a thin film transistor of the previous embodiment, when forming the gate, it is possible to form an opaque structure that is electrically isolated from the gate. is necessary. Naturally, the opaque structure is located at least below the unremoved first semiconductor layer 34.
[0026]
Further, the ratio of the light-impermeable structure 32, such as the first semiconductor layer 34, the second semiconductor layer 35, and the patterned conductor layer 37, which is not located above the conductor structure 31 is reduced to a minimum so that the photocurrent can be sufficiently generated. In this embodiment, as shown in FIG. 12, in order to reduce the probability that the first semiconductor layer 34 or the second semiconductor layer 35 is located above the conductor structure 31, as shown in FIG. Is larger than the width of a portion that is not located above the conductor structure 31. In this embodiment, as shown in FIG. 13, the portion of the first semiconductor layer 34 or the second semiconductor layer 35 located above the light opaque structure 32 along the edge of the light opaque structure 32 is not. It is provided wider than a portion that is not located above the light transmitting structure 32.
[0027]
Yet another embodiment of the present invention provides a method for manufacturing a thin film transistor, which comprises the following basic steps.
[0028]
As shown in FIG. 14, a substrate 40 is provided, and a conductor structure 41 and an opaque structure 42 are formed on the substrate 40. The only limitation here is that the conductor structure 41 and the opaque structure 42 are electrically isolated from each other, and there is no limitation on the relative distance and relative position between the conductor structure 41 and the opaque structure 42. . FIG. 14 shows a state where both the conductor structure 41 and the light-impermeable structure 42 are formed of a conductive material. The conductor structure 41 and the opaque structure are not in contact with each other. Naturally, when the opaque structure 42 is formed of a non-conductive material, as shown in FIG. 15, in this embodiment, the conductor structure 41 and the opaque structure 42 can be directly contacted.
[0029]
As shown in FIG. 16, first, a first dielectric layer 43 is formed on a substrate 40, and covers a conductor structure 41 and an opaque structure 42. Then, a first semiconductor layer 44 and a second semiconductor layer 44 are sequentially formed. A layer 45 is formed on the first dielectric layer 43.
[0030]
As shown in FIG. 17, a patterning step is performed to remove a part of the second semiconductor layer 45 and a part of the first semiconductor layer 44. Both the unremoved portion of the second semiconductor layer 45 and the unremoved portion of the first semiconductor layer 44 are located at least above the conductor structure 41. Of course, the present embodiment does not limit the details of the patterning process, but only needs to be able to convert the structure shown in FIG. 16 to the structure shown in FIG.
[0031]
Here, the first semiconductor layer 44 is used to provide a channel required by the thin film transistor, and is usually made of a semiconductor layer, so that a photocurrent is particularly easily generated. In this embodiment, the unremoved portion of the first semiconductor layer 44 covers at least a part of the opaque structure 42. In addition, in order to reduce the probability that the first semiconductor layer 44, the second semiconductor layer 45, and the patterned conductor layer 47 are irradiated with light from the substrate, in the present embodiment, the first semiconductor layer 44, the second semiconductor layer 45, The width of a portion of the semiconductor layer 44 or the second semiconductor layer 45 located above the conductor structure 41 is provided to be wider than the width of a portion not located above the conductor structure 41. Alternatively, in the present embodiment, the width of the portion of the first semiconductor layer 44 or the second semiconductor layer 45 located above the light-opaque structure 42 along the periphery of the light-opaque structure 42 is above the light-opaque structure 42. Is provided wider than the width of the portion not located at the position.
[0032]
As shown in FIG. 18, first, a second dielectric layer 46 is formed on the substrate 40, and the second semiconductor layer 45 in the unremoved portion and the first semiconductor layer 44 in the unremoved portion are covered. Is formed in the second dielectric layer 46 to expose a part of the second semiconductor layer 45, and a patterned conductor layer 47 is formed on the second dielectric layer 46 and in the opening.
[0033]
A major feature of this embodiment is that the conductor structure 41 and the light-impermeable structure 42 are formed on the substrate in the step shown in FIG. Thereby, the distribution of the conductor structure 41 and the light-opaque structure 42 is controlled, and the first semiconductor layer 44 and the second semiconductor layer 45 (and the patterned conductor layer 47) formed in the subsequent process are positioned above the substrate 40. In addition, it is positioned above the opaque structure 42, which greatly reduces the likelihood of photocurrent generation defects due to irradiation of light from the substrate 40.
[0034]
The above is a description of preferred embodiments of the present invention, and does not limit the scope of the present invention, and any modification or alteration of details that can be made based on the present invention shall fall within the scope of the claims of the present invention. I do.
[0035]
【The invention's effect】
One of the major features of the present invention is that the source, drain and channel are defined by defining a source, a drain and a channel by the same photomask, and in particular, by using a mask having a slit pattern for forming a photoresist pattern having an uneven thickness. To complete the pattern transition of each conductor layer.
[0036]
Another feature of the present invention is that an opaque structure which is electrically isolated from a gate is provided on a substrate beside a gate of the thin film transistor, and the opaque structure has at least a source, a drain, and a channel of the thin film transistor. It is located below the conductor. Accordingly, the source, the drain, the channel, and the conductive line of the thin film transistor are not irradiated with the light beam from the substrate, and the probability of generating a photocurrent is effectively reduced.
[0037]
Compared with the known halftone mask technology, the basic flow of the present invention is the same as that of the known technology, and the lithography process of the two conductor layers is combined to use only one mask. The above pattern is modified to define a different pattern using the characteristic that the middle of the diffraction pattern generated by dual slit diffraction is relatively strong and gradually weakens on both sides, and a special exposure process (halftone mask is Required), is relatively convenient to use, and has relatively low manufacturing costs.
[0038]
Compared with the structure of the known thin film transistor, the present invention uses the light opaque structure to effectively block the light from the substrate, reduce the channel region, the source and the drain of the thin film transistor, and reduce the irradiation of the light from the substrate. Has reduced the probability of receiving. Thus, the present invention prevents the disadvantage of photocurrent by using an opaque structure on the assumption that the basic structure of a known thin film transistor is not changed.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a structure of a known thin film transistor.
FIG. 2 is a diagram showing basic steps of a method for manufacturing a thin film transistor according to the present invention.
FIG. 3 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 4 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 5 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 6 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 7 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 8 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 9 is a view showing a basic process of a method for manufacturing a thin film transistor according to the present invention.
FIG. 10 is a representation of a possible structure of a thin film transistor according to the invention.
FIG. 11 is a representation of a possible structure of a thin film transistor according to the invention.
FIG. 12 is a representation of a possible structure of a thin film transistor according to the invention.
FIG. 13 is a representation of a possible structure of a thin film transistor according to the invention.
FIG. 14 is a schematic view showing a basic process of another method for manufacturing a thin film transistor according to the present invention.
FIG. 15 is a schematic view showing a basic process of another method for manufacturing a thin film transistor according to the present invention.
FIG. 16 is a schematic view showing a basic process of another method for manufacturing a thin film transistor according to the present invention.
FIG. 17 is a schematic view showing a basic process of another method for manufacturing a thin film transistor according to the present invention.
FIG. 18 is a schematic view showing a basic process of another method of manufacturing a thin film transistor according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Substrate 11 Conductor structure 12 First dielectric layer 13 First semiconductor layer 14 Second semiconductor layer 15 Second dielectric layer 16 Conductor 20 Substrate 21 Gate 22 Dielectric layer 23 First semiconductor layer 24 Second semiconductor layer 25 Photoresist layer 251 Mask 252 Dual slit pattern 253 Photoresist pattern 26 Additional dielectric layer 27 Patterned conductor layer 30 Substrate 31 Conductor structure 32 Opaque structure 33 First dielectric layer 34 First semiconductor layer 35 Second semiconductor layer 36 Second dielectric Layer 37 Patterned conductor layer 40 Substrate 41 Conductor structure 42 Opaque structure 43 First dielectric layer 44 First semiconductor layer 45 Second semiconductor layer 46 Second dielectric layer 47 Patterned conductor layer

Claims (8)

In a method for manufacturing a thin film transistor,
Providing a substrate;
Forming a gate on the substrate;
Forming a dielectric layer on the substrate and covering the gate;
Forming a first semiconductor layer on the dielectric layer;
Forming a second semiconductor layer on the first semiconductor layer;
Forming a photoresist layer on the second semiconductor layer;
Placing a mask over the photoresist layer, positioning the dual slit pattern provided on the mask above the gate, and positioning the middle of the dual slit pattern above the middle of the gate;
Patterning the photoresist layer to form a photoresist pattern comprising a thin portion and a thick portion and a thick portion located below the dual slit pattern at a position above the gate and the surrounding portion of the substrate;
Removing a portion of the second semiconductor layer and the first semiconductor layer that are not covered by the photoresist pattern;
A step of removing a thin portion of the photoresist pattern,
Removing a portion of the second semiconductor layer that is not covered by the remaining photoresist pattern;
A method for manufacturing a thin film transistor, comprising: 2. The method for manufacturing a thin film transistor according to claim 1, wherein the opaque structure electrically isolated from the gate is formed at least below a part of the unremoved second semiconductor layer when the gate is formed. Forming a thin film transistor. In a method for manufacturing a thin film transistor,
Providing a substrate;
Forming a gate on the substrate;
Forming a conductor structure and an opaque structure such that the conductor structure and the opaque structure are electrically isolated from each other;
Forming a first dielectric layer on the substrate and covering the first dielectric layer with the conductor structure and the opaque structure;
Forming a first semiconductor layer on the first dielectric layer;
Forming a second semiconductor layer on the first semiconductor layer;
Performing patterning to remove a portion of the second semiconductor layer and a portion of the first semiconductor layer, wherein the unremoved portion of the second semiconductor layer and the unremoved portion of the first semiconductor layer are at least positioned above the conductor structure; So that the unremoved portion of the first semiconductor layer covers at least a part of the opaque structure;
Forming a second dielectric layer on the substrate, and covering the second dielectric layer with an unremoved portion of the second semiconductor layer and an unremoved portion of the first semiconductor layer;
Forming an opening in the second dielectric layer and exposing a portion of the second semiconductor layer from the opening;
Forming a patterned conductor layer on the second dielectric layer, and positioning the patterned conductor layer also in the opening;
A method for manufacturing a thin film transistor, comprising: 4. The method of manufacturing a thin film transistor according to claim 3, wherein the unremoved portion of the first semiconductor layer or the second semiconductor layer is formed along the periphery of the conductor structure, and the width of the unremoved portion above the conductor structure is reduced. A method for manufacturing a thin film transistor, characterized in that the width is adjusted to be larger than a width of a portion not located above. 4. The method of manufacturing a thin film transistor according to claim 3, wherein the unremoved portion of the first semiconductor layer or the second semiconductor layer is formed along the periphery of the opaque structure so that the width of the unremoved portion above the opaque structure is reduced. A method for manufacturing a thin film transistor, wherein the width is adjusted to be larger than a width of a portion that is not located above the light-impermeable structure. In thin film transistors,
A conductor structure located on the substrate,
An opaque structure located on the substrate and separated from the conductor structure;
A first dielectric layer covering the substrate, the conductor structure, and the opaque structure;
A first semiconductor layer located on the first dielectric layer and located above the conductor structure and at least a part of the opaque structure;
A second semiconductor layer located on a part of the first semiconductor layer and located above the conductor structure and at least a part of the light-opaque structure;
A second dielectric layer that covers the substrate, the first semiconductor layer and the second semiconductor layer, and includes at least one opening to partially expose the second semiconductor layer;
A patterned conductive layer positioned over the second dielectric layer and positioned in the opening, wherein the opaque structure is positioned below at least a portion of the patterned conductive layer. A conductor layer,
A thin film transistor comprising: 7. The thin film transistor according to claim 6, wherein the width of a portion of the first semiconductor layer or the second semiconductor layer located above the conductor structure is not located above the conductor structure along the periphery of the conductor structure. A thin film transistor characterized by being larger. 7. The thin film transistor according to claim 6, wherein a width of a portion of the first semiconductor layer or the second semiconductor layer located above the light opaque structure along the periphery of the light opaque structure is above the light opaque structure. A thin film transistor, wherein the width of the thin film transistor is larger than a width of a portion not located in the thin film transistor.

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