TWI440965B - Photomask, manufacturing method of conducting wiring of flat display panel and wiring structure of flat display panel - Google Patents

Description

Photomask, manufacturing method of flat display panel, and wire structure of flat display panel

The invention relates to a reticle, a method for manufacturing a wire and a wire structure, in particular to a reticle which can be applied to a wire for manufacturing a flat display panel, a method for manufacturing a wire of a flat display panel, and a wire structure of a flat display panel.

In the related art of the flat display panel, a plurality of wires are disposed in a peripheral area other than the display area of the flat display panel. The signal can be transmitted from an external component such as a driver IC to each display unit in the display area by the above-mentioned wires to present various display screens.

At present, the method for forming a wire in the industry generally applies a photoresist layer on a conductive material, and a photoresist pattern is formed by a mask with a pattern and an exposure and development process, and the conductive material not covered by the photoresist pattern is followed. The etching process is removed, and the area covered by the photoresist pattern is etched to form a wire. As the resolution requirements of flat panel displays are getting higher and higher, the number of opposing wires required is also increasing. Under the limited peripheral area or even the design of the narrow bezel design, effectively reducing the area occupied by the wire is one of the current efforts of the industry. The area occupied by the wires is mainly composed of the line width and spacing of the wires. The wire itself is limited by the material impedance and the overall electrical requirements and must have a certain line width. The spacing between the wires is limited by the resolution limit of the general reticle and the exposure machine and cannot be reduced as much as possible. For example, when the resolution of the general exposure machine is about 3.5 to 4.0 micrometers, if the spacing of the light-shielding patterns on the reticle used is less than 3.5 micrometers, it may happen that the photoresist is not completely exposed and remains. Therefore, in the case of the conventional photomask and the exposure machine, the spacing between the wires cannot be further reduced.

One of the main purposes of the present invention is to provide a reticle, a method for fabricating a wire for a flat display panel, and a wire structure for a flat display panel, wherein a light-transmissive slit is provided in the light-shielding pattern of the reticle to reduce the number of wires that can be fabricated. The spacing, which in turn reduces the peripheral area of the flat display panel, enables a flat display panel having a narrow bezel design.

To achieve the above objective, a preferred embodiment of the present invention provides a photomask including a light transmissive substrate, a plurality of light shielding patterns, and at least one light transmissive region. The light shielding pattern is disposed on the light transmissive substrate. Each of the light shielding patterns has at least one light transmissive slit substantially disposed in parallel with an edge of each of the light shielding patterns. The light transmission zone is located between two adjacent light shielding patterns. The two adjacent shading patterns have a pitch, each shading pattern has a first width, and the sum of the distance between the first width and the adjacent shading patterns is substantially less than or equal to 12 microns.

In order to achieve the above object, a preferred embodiment of the present invention provides a method for fabricating a wire of a flat display panel, comprising the following steps. First, a substrate is provided. Next, a conductive layer is formed on the substrate. Then, a photoresist material is formed to cover the conductive layer. Thereafter, an exposure and development process is performed on the photoresist material by using a photomask to form a photoresist pattern. Then, the conductive layer is subjected to a first etching process using a photoresist pattern to form a plurality of wires. The photomask includes a light transmissive substrate, a plurality of light shielding patterns, and at least one light transmissive region. The light shielding pattern is disposed on the light transmissive substrate. Each of the light shielding patterns has at least one light transmissive slit substantially disposed in parallel with an edge of each of the light shielding patterns. The light transmission zone is located between two adjacent light shielding patterns. The two adjacent shading patterns have a pitch, each shading pattern has a first width, and the sum of the distance between the first width and the adjacent shading patterns is substantially less than or equal to 12 microns.

In order to achieve the above object, a preferred embodiment of the present invention provides a wire structure of a flat display panel, which includes a substrate and a plurality of wires. The wire is disposed on the substrate, and a width of one of the wires and a pitch between the wires is substantially less than or equal to 12 micrometers.

The invention utilizes a light-transmissive slit at the edge of the light-shielding pattern of the reticle to increase the transmittance of the exposed exposed area, thereby reducing the spacing of the wires made by the reticle, and the flat display panel having the wire arrangement The perimeter area has been reduced, making the flat display panel suitable for narrow bezel designs.

The present invention will be further understood by those of ordinary skill in the art to which the present invention pertains. .

Please refer to Figure 1. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a partial top plan view of a reticle in accordance with a preferred embodiment of the present invention. For the convenience of description, the drawings of the present invention are only for the purpose of understanding the present invention, and the detailed proportions thereof can be adjusted according to the design requirements. As shown in FIG. 1, the embodiment provides a reticle 101 for fabricating a wire of a flat display panel. The reticle 101 includes a transparent substrate 110, a plurality of opaque patterns 120, and at least one light transmissive region 130. The light shielding patterns 120 are disposed on the light transmissive substrate 110 , and each of the light shielding patterns 120 has at least one light transmissive slit 125 . The light transmissive slit 125 is substantially disposed in parallel with one of the edges 120S of each of the light shielding patterns 120. The light transmitting region 130 is located between two adjacent light shielding patterns 120. In this embodiment, the material used to form the light shielding pattern 120 may include a light absorbing material such as metal nitride, metal telluride, tantalum nitride (TaN), chromium (chromium, Cr), molybdenum silicide (molybdenum silicide). , at least one of MoSi _x ) consisting of or consisting of a composite layer of the above materials, but is not limited thereto. The two adjacent light-shielding patterns 120 have a pitch 120P, each light-shielding pattern 120 has a first width 120W, and the sum of the first width 120W and the distance between the adjacent light-shielding patterns 120 is substantially less than or equal to 12 micrometers. In addition, the light-transmissive slit 125 has a second width 125W, and the light-transmitting slit 125 has a distance 125D between the edge 120S of the light-shielding pattern 120. In this embodiment, the second width 125W is preferably less than or equal to 1.2 micrometers, and the distance 125D is preferably less than or equal to 1.0 micrometer, but is not limited thereto. In addition, the light transmissive region 130 has a third width 130W, the third width 130W is substantially equal to the distance 120P between the respective light shielding patterns 120, and the third width 130W is substantially less than or equal to 2.5 microns. Through the setting of the transparent slit 125 of the embodiment and the control and matching of the second width 125W and the distance 125D, the distance between the third width 130W of the transparent region 130 and the light shielding pattern 120 is less than or equal to 2.5 micrometers. Under the condition, the exposure effect of narrow pitch is achieved. Furthermore, the light-transmissive slits 125 of the light-shielding patterns 120 can contribute to the exposure effect of the light-transmitting region 130 during the exposure process, so that the required narrow-pitch can be obtained without increasing the overall exposure energy. Resistive pattern (not shown). In addition, the light shielding pattern 120 of the embodiment is a long straight strip pattern, but the invention is not limited thereto and may have different shapes of light shielding patterns.

Please refer to Figure 2. 2 is a partial top plan view of a reticle of another preferred embodiment of the present invention. As shown in FIG. 2, the photomask 102 of the present embodiment is different from the photomask 101 described above in that the photomask 102 includes a light shielding pattern 140, a light shielding pattern 150, and a light transmitting region 160. It should be noted that the light shielding pattern 140 and the light shielding pattern 150 are connected to each other to form a pattern similar to the S type. That is to say, the reticle 102 of the present embodiment can be utilized to form a wire similar to an S-shaped ridge, and such a wire can be used to adjust the equal resistance between the wires, but is not limited thereto. In addition, the light shielding pattern 140 and the light shielding pattern 150 of the embodiment may have a light transmissive slit 145 and a light transmissive slit 155, respectively. The light-transmitting slit 145 is substantially disposed in parallel with one of the edges 140S of the light-shielding pattern 140, and the light-transmitting slit 155 is substantially disposed in parallel with one of the edges 150S of the light-shielding pattern 150. The light transmitting region 160 is located between the two adjacent light shielding patterns 140 and the light shielding pattern 150. The two adjacent light shielding patterns 140 and the light shielding pattern 150 have a spacing 140P, the light shielding pattern 140 has a first width 140W, and the light shielding pattern 150 has a first width 150W. The sum of the first width 140W and the pitch 140P is substantially less than or equal to 12 microns, and the sum of the first width 150W and the pitch 140P is also substantially less than or equal to 12 microns. Further, the light transmissive slit 145 has a second width 145W, and the light transmissive slit 155 has a second width 155W. The light-transmissive slit 145 has a distance 145D between the edge 140S of the light-shielding pattern 140, and the light-transmitting slit 155 has a distance 155D between the edge 150S of the light-shielding pattern 150. The second width 145W and the second width 155W are preferably less than or equal to 1.2 micrometers, respectively, and the distances 145D and 155D are preferably less than or equal to 1.0 micrometers, respectively, but not limited thereto. In addition, the light transmissive region 160 has a third width 160W, which is substantially equal to the pitch 140P between the light shielding pattern 140 and the light shielding pattern 150, and the third width 160W is substantially less than or equal to 2.5 micrometers. The features and material properties of the reticle 102 of the present embodiment are similar to those of the reticle 101 of the preferred embodiment except for the shape of the light-shielding patterns, and thus will not be described herein.

Please refer to Figure 3 to Figure 5, and please refer to Figure 1 together. 3 to 5 are schematic views showing a method of fabricating a wire of a flat display panel according to a preferred embodiment of the present invention. First, as shown in FIG. 3, a substrate 210 is provided, and a conductive layer 220 is formed on the substrate 210. Next, a photoresist material 290 is formed to cover the conductive layer 220. Then, as shown in FIG. 4, an exposure and development process is performed on the photoresist 290 by using a mask 101 to form a photoresist pattern 290P. Thereafter, the conductive layer 220 is subjected to a first etching process using the photoresist pattern 290P to form a plurality of wires 221 as shown in FIG. The conductive layer 220 of the present embodiment may preferably include a metal material such as at least one of aluminum, copper, silver, chromium, titanium, molybdenum, a composite layer of the above materials, or an alloy of the above materials, but is not limited thereto. Other materials having conductive properties can be used. In addition, the photoresist material 290 of the embodiment may preferably include a positive photoresist material, but the invention is not limited thereto. Related features of the reticle 101 used in this embodiment have been described in the above embodiments, and are not described herein again. It should be noted that the manufacturing method of the wire of the flat display panel of the embodiment may also be performed by using the photomask 102 as described above to obtain a desired wire pattern. The wire structure 200 as shown in Fig. 5 can be obtained by the method of manufacturing the wire of the above flat display panel. In other words, the wire structure 200 includes a substrate 210 and a plurality of wires 221 . The wire 221 is disposed on the substrate 210. The width 221W of each wire 221 and the distance 221P between the wires 221 are substantially less than or equal to 12 micrometers, and the distance 221P between the wires 221 is substantially less than or equal to 5 micrometers. , but not limited to this. Please note that the conductive layer 220 of the present embodiment is directly formed on the substrate 210. Therefore, the conductive layer 220 of the embodiment can be combined with a first metal layer of a bottom gate thin film transistor. The process of metal 1) is integrated, that is, the wires 221 of the present embodiment can be formed by the same conductive layer and the same yellow etching process as the gate electrode and the gate line of a bottom gate film transistor, but not This is limited to this. It should be noted that, as shown in FIG. 4 and FIG. 1 , by the arrangement of the light-transmissive slits 125 of the photomask 101, the gap between the photoresist patterns 290P can be prevented from being caused by insufficient exposure energy. The phenomenon of blocking residual occurs, so that the photoresist pattern 290P having a small pitch can be obtained, and thus the small-diameter wire 221 can be fabricated.

Please refer to Figure 6 and Figure 7. 6 and 7 are schematic views showing a method of fabricating a wire of a flat display panel according to another preferred embodiment of the present invention. First, as shown in FIG. 6, a substrate 210 is provided, and a dielectric layer 330 is formed on the substrate 210. Then, a conductive layer 350 is formed on the dielectric layer 330. Next, a photoresist material 290 is formed to cover the conductive layer 350. Then, an exposure and development process is performed on the photoresist 290 by using a mask 101 to form a photoresist pattern 290P. Thereafter, the conductive layer 350 is subjected to an etching process using the photoresist pattern 290P to form a plurality of wires 351 as shown in FIG. The conductive layer 350 of the present embodiment may preferably include a metal material such as at least one of aluminum, copper, silver, chromium, titanium, molybdenum, a composite layer of the above materials, or an alloy of the above materials, but not limited thereto. Other materials having conductive properties can be used. The method for fabricating the wires of the flat display panel of the present embodiment is similar to the method for fabricating the wires of the flat display panel of the preferred embodiment except that the dielectric layer 330 is formed between the substrate 210 and the conductive layer 350. I will not repeat them here. It should be noted that the wire structure 301 as shown in FIG. 7 can be obtained by the method for manufacturing the wire of the flat display panel described above. In other words, the wire structure 301 includes a substrate 210 and a plurality of wires 351. The wire 351 is disposed on the dielectric layer 330. The width 351W of each wire 351 and the distance 351P between the wires 351 are substantially less than or equal to 12 micrometers, and the distance 351P between the wires 351 is substantially less than or Equal to 5 microns, but not limited to this. Please note that the conductive layer 350 of the present embodiment is formed on the dielectric layer 330. Therefore, the conductive layer 350 of the embodiment can be processed with the second metal layer of the bottom gate thin film transistor. Integration, that is, the wires 351 of the present embodiment can be formed by the same conductive layer and the same yellow etching process as the source/drain electrodes and the data lines of a bottom gate thin film transistor, but not limit.

Please refer to Figure 8 and Figure 9. 8 to 9 are schematic views showing a method of fabricating a wire of a flat display panel according to still another preferred embodiment of the present invention. As shown in FIG. 8, the difference from the above embodiment is that the method for fabricating the wires of the flat display panel of the present embodiment further includes forming a semiconductor on the substrate 210 and the dielectric layer 330 before the step of forming the conductive layer 350. Layer 340. Next, a conductive layer 350 and a photoresist 290 are sequentially formed on the semiconductor layer. Then, an exposure and development process is performed on the photoresist 290 by using the photomask 101 to form a photoresist pattern 290P. Thereafter, a first etching process is performed on the conductive layer 350 by the photoresist pattern 290P and a second etching process is performed on the semiconductor layer 340 to form a plurality of wires 351 and a plurality of semiconductor patterns 341 as shown in FIG. 9, respectively. The semiconductor layer 340 of this embodiment may include an amorphous germanium semiconductor material, a polycrystalline germanium semiconductor material, an organic semiconductor material or an oxide semiconductor material, but is not limited thereto. The method for fabricating the wires of the flat display panel of the present embodiment is similar to the method for fabricating the wires of the flat display panel of the above preferred embodiment except for the formation of the semiconductor layer 340, and details are not described herein again. It should be noted that the wire structure 302 as shown in FIG. 9 can be obtained by the method for manufacturing the wire of the flat display panel described above. In other words, the wire structure 302 includes a substrate 210, a plurality of wires 351, and a plurality of semiconductor patterns 341. Each of the semiconductor patterns 341 is located between the substrate 210 and the wires 351 and is provided corresponding to each of the wires 351. In addition, in this embodiment, a pitch 341P between the semiconductor patterns 341 is preferably substantially less than or equal to 3 micrometers, and a distance 351P between the wires 351 is preferably substantially less than or equal to 7 micrometers, and each of the wires 351 The sum of the width 351W and the distance 351P between the wires 351 is preferably substantially less than or equal to 12 microns, but is not limited thereto. In addition, since the same photoresist pattern 290P is used to form the wires 351 and the semiconductor pattern 341, and the second etching process for forming the semiconductor pattern 341 is generally a dry etching process, the width 341W of the semiconductor pattern 341 is substantially It is greater than the width 351W of the wire 351, but is not limited thereto. Please note that since the wire 351 and the semiconductor pattern 341 of the embodiment are formed by using the same photoresist pattern 290P, the manufacturing method of the embodiment can be performed with a process of a thin film transistor of a general four mask process. Integration, but not limited to this.

Please refer to Figure 10 and refer to Figure 5, Figure 7, and Figure 9. FIG. 10 is a top plan view of a flat display panel according to a preferred embodiment of the present invention. As shown in FIG. 10, the flat display panel 900 of the present embodiment includes a display area 901 and a peripheral area 902, and the peripheral area 902 is located at the periphery of the display area 901, and the peripheral area 902 is exemplified by the surrounding display area 901. In addition, the flat display panel 900 further includes a plurality of wire structures 200, a plurality of wire structures 301, or a plurality of wire structures 302 disposed in the peripheral region 902. The features of the wire structure 200, the wire structure 301, and the wire structure 302 have been described above, and are not described herein again. It should be noted that since the wire spacing of the wire structure 200, the wire structure 301, and the wire structure 302 can be reduced by the reticle 101 or the reticle 102, the wire structure 200, the wire structure 301, and the wire structure can be made. The space required for 302 is also reduced, so that the peripheral area 902 of the flat display panel 900 can be made smaller to achieve the effect of a narrow bezel design.

In summary, the present invention utilizes a light-transmitting slit for the edge of the light-shielding pattern of the reticle, and can be shielded by adjusting and controlling the width of the light-transmitting slit and the distance between the light-transmitting slit and the edge of the light-shielding pattern. In the case where the distance between the patterns is reduced, the exposure effect of the narrow pitch is improved, and the pitch of the wires made by the mask is reduced, so that the peripheral area of the flat display panel having the wire can be reduced to be suitable for the design of the narrow frame.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

101. . . Mask

102. . . Mask

110. . . Light transmissive substrate

120. . . Shading pattern

120P. . . spacing

120S. . . edge

120W. . . First width

125. . . Light transmission slit

125D. . . distance

125W. . . Second width

130. . . Light transmission area

130W. . . Third width

140. . . Shading pattern

140P. . . spacing

140S. . . edge

140W. . . First width

145. . . Light transmission slit

145D. . . distance

145W‧‧‧second width

150‧‧‧ shading pattern

150S‧‧‧ edge

150W‧‧‧first width

155‧‧‧Lighting slit

155D‧‧‧Distance

155W‧‧‧second width

160‧‧‧Transparent area

160W‧‧‧ third width

200‧‧‧Wire structure

210‧‧‧Substrate

220‧‧‧ Conductive layer

221‧‧‧ wire

221P‧‧‧ spacing

221W‧‧‧Width

290‧‧‧Photoresist material

290P‧‧‧resist pattern

301‧‧‧Wire structure

302‧‧‧Wire structure

330‧‧‧ dielectric layer

340‧‧‧Semiconductor layer

341‧‧‧ semiconductor pattern

341P‧‧‧ spacing

341W‧‧‧Width

350‧‧‧ Conductive layer

351‧‧‧ wire

351P‧‧‧ spacing

351W‧‧‧Width

900‧‧‧Flat display panel

901‧‧‧ display area

902‧‧‧ surrounding area

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a partial top plan view of a reticle in accordance with a preferred embodiment of the present invention.

2 is a partial top plan view of a reticle of another preferred embodiment of the present invention.

3 to 5 are schematic views showing a method of fabricating a wire of a flat display panel according to a preferred embodiment of the present invention.

6 and 7 are schematic views showing a method of fabricating a wire of a flat display panel according to another preferred embodiment of the present invention.

8 to 9 are schematic views showing a method of fabricating a wire of a flat display panel according to still another preferred embodiment of the present invention.

FIG. 10 is a top plan view of a flat display panel according to a preferred embodiment of the present invention.

101. . . Mask

110. . . Light transmissive substrate

120. . . Shading pattern

120P. . . spacing

120S. . . edge

120W. . . First width

125. . . Light transmission slit

125D. . . distance

125W. . . Second width

130. . . Light transmission area

130W. . . Third width

Claims (17)

A reticle comprising: a light-transmitting substrate; a plurality of light-shielding patterns disposed on the light-transmitting substrate, each of the light-shielding patterns having at least one light-transmissive slit substantially disposed in parallel with an edge of each of the light-shielding patterns; The at least one light-transmitting region is located between the two adjacent light-shielding patterns; wherein the two adjacent light-shielding patterns have a pitch, each of the light-shielding patterns has a first width, and the first width and the adjacent ones The sum of the spacings between the shading patterns is substantially less than or equal to 12 microns. The reticle of claim 1, wherein the light transmissive slit has a second width, and the second width is substantially less than or equal to 1.2 microns. The reticle of claim 1, wherein the light-transmissive slit has a distance from the edge of the light-shielding pattern, and the distance is substantially less than or equal to 1.0 micrometer. The photomask of claim 1, wherein the light transmissive region has a third width, the third width being substantially equal to the spacing between the respective shading patterns, and the third width is substantially Less than or equal to 2.5 microns. The reticle of claim 1, wherein at least a portion of the opaque patterns are connected to each other to form an S-shaped pattern. The reticle of claim 1, wherein each of the light shielding patterns has: a central light shielding region; two edge light shielding regions; and two of the light transmission slits, wherein the two light shielding slits are substantially One edge of each of the light shielding patterns is disposed in parallel, and the two light shielding slits are respectively located between the central light shielding area and the two edge light shielding areas such that the two light transmission slits are located on both sides of the central light shielding area. Each of the edge shading regions has a width of less than or equal to 1.0 micron. A method for manufacturing a wire of a flat display panel, comprising: providing a substrate; forming a conductive layer on the substrate; forming a photoresist material to cover the conductive layer; and using the photomask according to claim 1 of the patent application, Performing an exposure and development process on the photoresist material to form a photoresist pattern; and performing a first etching process on the conductive layer by using the photoresist pattern to form a plurality of wires. The method of manufacturing a wire for a flat display panel according to claim 7, wherein a sum of a width of each of the wires and a pitch between the wires is substantially less than or equal to 12 micrometers. The method of fabricating a wire for a flat display panel according to claim 7, wherein a pitch of each of the wires is substantially less than or equal to 5 micrometers. The method for fabricating a wire of a flat display panel according to claim 7, further comprising: forming a semiconductor layer on the substrate before the forming step of the conductive layer; and performing the semiconductor layer on the semiconductor layer by using the photoresist pattern A second etching process is performed to form a plurality of semiconductor patterns. The method of fabricating a wire of a flat display panel according to claim 10, wherein a pitch between each of the semiconductor patterns is substantially less than or equal to 3 micrometers. The method of fabricating a wire for a flat display panel according to claim 10, wherein a spacing between each of the wires is substantially less than or equal to 7 micrometers. A wire structure of a flat display panel, comprising: a substrate; and a plurality of wires disposed on the substrate, wherein a width of one of the wires and a distance between each of the wires is substantially less than or equal to 12 micrometers. The wire structure of the flat display panel of claim 13, wherein the spacing between the wires is substantially less than or equal to 5 micrometers. The wire structure of the flat display panel according to claim 13 further includes a plurality of semiconductor patterns located between the substrate and the wires and respectively disposed corresponding to the wires. The wire structure of the flat display panel of claim 15, wherein a spacing between each of the semiconductor patterns is substantially less than or equal to 3 micrometers. The wire structure of the flat display panel of claim 15, wherein a distance between each of the wires is substantially less than or equal to 7 micrometers.