JP2004347779A - Substrate for electrooptical device, its manufacturing method, and electrooptical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce tensile stress between a light shielding film and an interlayer insulating film or a semiconductor layer caused when heat treatment is performed without reducing light shielding properties of the light shielding film to prevent occurrence of cracks. <P>SOLUTION: The light shielding film 120 formed on a TFT substrate 10 is constituted of a three layered structure wherein an interlayer thin film 122a is held between light shielding thin films 121a and 121a of upper and lower layers. Since internal stress caused when heat treatment is performed can be reduced by forming the light shielding layer 120 using the three layered structure and tensile stress between the light shielding film 120 and the interlayer insulating film or the semiconductor layer is reduced, the occurrence of the cracks can be prevented. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electro-optical device substrate having a light-shielding film having a multilayer structure, a method for manufacturing the same, and an electro-optical device.
[0002]
[Prior art]
In general, an electro-optical device, for example, a liquid crystal device that performs a predetermined display using liquid crystal as an electro-optical material has a configuration in which liquid crystal is sandwiched between a pair of substrates. Among them, in an electro-optical device such as a liquid crystal device of an active matrix drive system using a TFT drive, a TFD drive or the like, each intersection of a number of scanning lines (gate lines) and data lines (source lines) arranged vertically and horizontally is provided. Correspondingly, a pixel electrode and a switching element are provided on a substrate (active matrix substrate).
[0003]
A switching element such as a TFT element is turned on by an ON signal supplied to a gate line, and writes an image signal supplied via a source line to a pixel electrode (transparent electrode (ITO)). Thus, a voltage based on the image signal is applied to the liquid crystal layer between the pixel electrode and the counter electrode, thereby changing the arrangement of the liquid crystal molecules. Thus, the image display is performed by changing the transmittance of the pixel and changing the light passing through the pixel electrode and the liquid crystal layer according to the image signal.
[0004]
An element substrate constituting such a switching element is formed by stacking a semiconductor film, an insulating film (interlayer insulating film), or a conductive film having a predetermined pattern on a glass or quartz substrate. That is, a TFT substrate or the like is formed by repeating a film formation process of various films and a photolithography process.
[0005]
By the way, since the characteristics of the TFT element change due to the influence of light, a light-shielding film is formed at a position facing the channel region or the channel adjacent region of the TFT element portion, and the channel region or the channel adjacent region of the TFT element portion is formed. Light is not irradiated to the area.
[0006]
As a material of the light-shielding film, for example, a metal containing at least one of Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), and Pb (lead), which are opaque refractory metals A simple substance, an alloy, a metal silicide, or the like is employed.
[0007]
In the manufacturing process, after forming a light shielding film on the TFT substrate, NSG (non-silicate glass), PSG (phosphorous silicate glass), BSG (boron silicate glass), BPSG (boron silicate glass), etc. are formed so as to cover the light shielding film. Then, an interlayer insulating film made of a silicate glass film, a silicon nitride film, a silicon oxide film, or the like is formed, and then heat treatment is performed. Next, a semiconductor layer is formed on the interlayer insulating film using a polysilicon film or the like. The heat treatment step is performed under a temperature condition of about 1000 ° C. in order to planarize the interlayer insulating film and prevent contamination of the semiconductor layer.
[0008]
[Patent Document 1]
JP-A-9-33950 (Patent No. 3307174)
[0009]
[Problems to be solved by the invention]
FIG. 13A shows, for example, a change in stress caused by heat treatment of NSG which is a material of an interlayer insulating film, polysilicon which is a material of a semiconductor layer, and tungsten silicide (WSi) which is often used as a material of a light shielding film. .
[0010]
As shown in the figure, the internal stress of NSG and polysilicon increases as the temperature rises during the heat treatment, and the internal stress gradually decreases as the temperature returns to room temperature after the heat treatment.
[0011]
On the other hand, since the internal stress of WSi gradually increases from the point A due to the temperature rise during the heat treatment and is crystallized in a certain temperature region T1, the internal stress rapidly increases there, and further, the temperature rises thereafter. The internal stress gradually increases again up to the point C. Then, in the process of returning WSi to normal temperature after the heat treatment, the internal stress gradually decreases with the temperature decrease in the initial stage. However, since the WSi is crystallized, it does not return to the point A side, and the broken line in FIG. , Ie, the direction in which the internal stress increases conversely as the temperature decreases.
[0012]
As a result, when a light-shielding film (WSi) and an interlayer insulating film (NSG) are deposited on a TFT substrate, or a heat treatment is performed in a state where a semiconductor layer (polysilicon) is additionally deposited, a process of returning to a normal temperature after the heat treatment is performed. In this case, a tensile stress is generated between WSi, which is a material of the light-shielding film, and NSG, which is a material of the interlayer insulating film, or polysilicon, which is a material of the semiconductor layer, so that cracks are easily generated in the interlayer insulating film (NSG). Become.
[0013]
When a crack occurs in the interlayer insulating film (NSG), the crack originates from the crack, and particularly, the crack spreads around the semiconductor layer, and there is a problem that an element failure such as a short circuit or an open circuit occurs.
[0014]
As a countermeasure against this, it is only necessary to reduce the thickness of the light-shielding film so as to reduce the internal stress, but it is not feasible because sufficient light-shielding properties cannot be obtained.
[0015]
On the other hand, Patent Literature 1 discloses a technique in which a light-shielding film has a two-layer structure and one light-shielding film is thinned to suppress the occurrence of internal stress in each light-shielding film.
[0016]
However, since the light-shielding film is merely a two-layer structure, it is difficult to reduce the tensile stress between NSG, which is the material of the interlayer insulating film, and polysilicon, which is the material of the semiconductor layer. is not.
[0017]
It is also conceivable to convert WSi used as a light-shielding film into polycide, but there is a problem that light-shielding properties are reduced.
[0018]
The present invention has been made in view of such a problem, and without reducing the light-shielding properties of a light-shielding film, reduces the tensile stress between a light-shielding film and an insulating film or a semiconductor layer generated during heat treatment. It is another object of the present invention to provide a substrate, a method of manufacturing the same, and an electro-optical device capable of reducing the product defect rate and improving the reliability of the product.
[0019]
[Means for Solving the Problems]
The substrate for an electro-optical device according to the present invention includes a light-shielding film formed on the substrate by sandwiching an insulating film between a lower light-shielding thin film and an upper light-shielding thin film.
[0020]
In such a configuration, the light-shielding film is formed by sandwiching the insulating film between the upper-layer light-shielding film and the lower-layer light-shielding film. Therefore, the occurrence of internal stress during high-temperature heat treatment is suppressed, and the occurrence of cracks in the insulating film is prevented. be able to.
[0021]
Further, a semiconductor layer is laminated on the light-shielding film via an insulating film.
[0022]
In such a configuration, since the occurrence of internal stress in the light-shielding film at the time of the high-temperature heat treatment is suppressed, the tensile force between the light-shielding film and the semiconductor layer stacked on the light-shielding film via the insulating film is reduced. be able to.
[0023]
Further, the semiconductor layer constitutes a sampling switch for supplying an image signal to a data line.
[0024]
In such a configuration, since the occurrence of internal stress in the light-shielding film at the time of high-temperature heat treatment is suppressed, the tensile force between the light-shielding film and the sampling switch stacked on the light-shielding film via the insulating film is reduced. be able to.
[0025]
Further, a plurality of the sampling switches are provided, and the light shielding film is formed in an island shape below a semiconductor layer of at least one of the sampling switches.
[0026]
In such a configuration, by forming the light-shielding film in an island shape below the semiconductor layer of at least one sampling switch, the occurrence of cracks due to internal stress of the light-shielding film can be further restricted.
[0027]
Further, the lower light-shielding thin film and the upper light-shielding thin film are made of a high melting point metal.
[0028]
In such a configuration, the light-shielding film is formed by sandwiching the insulating film between the upper-layer light-shielding film and the lower-layer light-shielding film. Therefore, even if each light-shielding thin film is made of a high-melting-point metal, internal stress during high-temperature heat treatment is reduced. Can be reduced.
[0029]
The method for manufacturing a substrate for an electro-optical device according to the present invention includes a step of forming a lower light-shielding thin film on the substrate, a step of forming an intermediate interlayer thin film on the light-shielding thin film, and an upper light-shielding layer on the interlayer thin film. Forming a thin film, forming a light shielding film by patterning the lower light shielding thin film, the interlayer thin film of the intermediate layer, and the upper light shielding thin film, and forming an insulating film on the light shielding film. Performing a high-temperature heat treatment on the substrate on which the insulating film is formed.
[0030]
In such a configuration, first, a lower light-shielding thin film is formed on a substrate, then an intermediate interlayer thin film is formed on the lower light-shielding thin film, and then an upper light-shielding thin film is formed on the interlayer thin film. Then, the lower light-shielding thin film, the intermediate interlayer thin film, and the upper light-shielding thin film are patterned to form a three-layer light-shielding film. Next, an insulating film is formed on the light-shielding film, and high-temperature heat treatment is performed in this state. Since the light-shielding film has a three-layer structure sandwiching the interlayer thin film, internal stress generated at the time of heat treatment can be reduced.
[0031]
The method for manufacturing an electro-optical device substrate according to the present invention includes a step of forming a lower light-shielding thin film on the substrate, a step of forming an intermediate interlayer thin film on the lower light-shielding thin film, and an upper layer on the interlayer thin film. Forming a light-shielding thin film, forming a light-shielding film by patterning the lower light-shielding thin film, the intermediate interlayer thin-film, and the upper light-shielding thin film, and forming an insulating film on the light-shielding film. A step of performing a high-temperature heat treatment on the substrate on which the insulating film is formed, and a step of forming a semiconductor layer on the insulating film.
[0032]
In such a configuration, first, a lower light-shielding thin film is formed on a substrate, then an intermediate interlayer thin film is formed on the lower light-shielding thin film, and then an upper light-shielding thin film is formed on the interlayer thin film. Then, the lower light-shielding thin film, the intermediate interlayer thin film, and the upper light-shielding thin film are patterned to form a three-layer light-shielding film. Next, an insulating film is formed on the light-shielding film, and high-temperature heat treatment is performed in this state. After a predetermined heat treatment, a semiconductor layer is formed on the insulating film. Since the light-shielding film has a three-layer structure sandwiching the interlayer thin film, internal stress generated at the time of heat treatment can be reduced.
[0033]
An electro-optical device according to the present invention is characterized in that the electro-optical device is configured using the electro-optical device substrate.
[0034]
In such a configuration, since the light-shielding film has a three-layer structure with the insulating film interposed therebetween to reduce internal stress generated during heat treatment, it is possible to obtain a device in which cracks are prevented from occurring.
[0035]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1 to 10 show a first embodiment of the present invention. FIG. 1 shows a liquid crystal device which is an electro-optical device formed using a substrate for a liquid crystal device which is a substrate for an electro-optical device. FIG. 2 is a plan view of the liquid crystal device after the assembly step of bonding the element substrate and the counter substrate together and enclosing the liquid crystal along the line HH ′ in FIG. FIG. 3 is a block diagram showing an electrical configuration of the electro-optical device, and FIG. 4 is a sectional view showing various elements and wirings of a plurality of pixels constituting a pixel region of the liquid crystal device of FIGS. 5 is an equivalent circuit diagram, FIG. 5 is a cross-sectional view of a main part of the liquid crystal device substrate of FIGS. 1 and 2, FIG. 6 is a cross-sectional view of another main part of the liquid crystal device substrate, FIG. FIG. 9 is an enlarged view of a main part showing the configuration of the switch circuit unit, FIG. It is a flowchart showing the manufacturing method of the mounting substrate in order of a process by a sectional view.
[0036]
The overall configuration of the liquid crystal device will be described with reference to FIGS. A liquid crystal device, which is an example of an electro-optical device, includes, for example, a TFT substrate 10 made of a quartz substrate, a glass substrate, or a silicon substrate, and an opposing substrate 20 made of, for example, a glass substrate or a quartz substrate disposed opposite thereto. The liquid crystal 50 is sealed therein. The TFT substrate 10 and the opposite substrate 20 that are arranged to be opposed to each other are bonded together with a sealant 52.
[0037]
On the TFT substrate 10, pixel electrodes (ITO) 9a and the like constituting pixels are arranged in a matrix. A counter electrode (ITO) 21 is provided on the entire surface of the counter substrate 20. On the pixel electrode 9a of the TFT substrate 10, an alignment film 16 subjected to a rubbing process is provided. On the other hand, an alignment film 22 that has been subjected to a rubbing process is also provided on the counter electrode 21 formed over the entire surface of the counter substrate 20. Each alignment film 16.22 is made of, for example, a transparent organic film such as a polyimide film.
[0038]
FIG. 3 shows an electrical configuration of the liquid crystal device. The liquid crystal device includes a scanning line driving circuit 401 and a data line driving circuit 500. The scanning line driving circuit 401 is a so-called Y shift register, transfers a start pulse DY supplied at the beginning of a subfield according to a clock signal CLY, and sends the scanning signals G1, G2, G3 to each of the scanning lines 11a. ,..., Gm.
[0039]
In addition, the data line drive circuit 500 sequentially latches the drive data signals Ds in a certain horizontal scanning period by a number corresponding to the number of the data lines 6a, and then sets the voltage determined from the relationship between the latched data and the AC signal FR. The levels are simultaneously supplied to the corresponding data lines 6a as data signals S1, S2, S3,..., Sn in the next horizontal scanning period.
[0040]
FIG. 4 shows an equivalent circuit of an element on the TFT substrate 10 constituting a pixel. In the pixel region, a plurality of scanning lines 11a and a plurality of data lines 6a are wired so as to intersect, and pixel electrodes 9a are arranged in a matrix in a region defined by the scanning lines 11a and the data lines 6a. You. A pixel switching TFT 30 is provided corresponding to each intersection of the scanning line 11a and the data line 6a, and the pixel electrode 9a is connected to the TFT 30.
[0041]
The TFT 30 is turned on by the ON signal of the scanning line 11a, whereby the image signal supplied to the data line 6a is supplied to the pixel electrode 9a. A voltage between the pixel electrode 9 a and the counter electrode 21 provided on the counter substrate 20 is applied to the liquid crystal 50.
[0042]
Further, a storage capacitor 70 is provided in parallel with the pixel electrode 9a, and the storage capacitor 70 enables the voltage of the pixel electrode 9a to be held for a time longer than the time when the source voltage is applied, for example, by three digits. The storage capacitor 70 improves voltage holding characteristics and enables image display with a high contrast ratio.
[0043]
FIG. 5 is a schematic sectional view of a liquid crystal device focusing on one pixel, and FIG. 6 is a schematic sectional view of another position. On the TFT substrate 10, in addition to the TFT 30 and the pixel electrode 9a, various configurations including these are provided in a laminated structure, and the first layer including the scanning line 11a, the first layer including the TFT 30, and the like are arranged in order from the bottom. Two layers are provided. Further, although not shown, a third layer including the storage capacitor 70, a fourth layer including the data line 6a and the like, a fifth layer including the shield layer and the like, and a sixth layer including the pixel electrode 9a and the alignment film 16 are provided. ing.
[0044]
A base insulating film 12, which is an insulating film, is provided between the first and second layers, and an interlayer insulating film 41 is provided between the second and third layers. Although not shown, an interlayer insulating film is also provided between each of the third to sixth layers. Each of the insulating films 12, 41,... Is formed of an NSG film, and the insulating films 12, 41,. Are provided with, for example, contact holes for electrically connecting the high-concentration source region 1d in the semiconductor layer 1a of the TFT 30 to the data line 6a.
A light-shielding film 120 is provided at a position corresponding to each TFT 30 on the first layer. The light-shielding film 120 prevents return light and the like from the TFT substrate 10 from entering the channel region or the adjacent region of the TFT 30.
[0045]
Further, the TFT 30 including the gate electrode 3a is provided in the second layer. As shown in FIG. 5, the TFT 30 has an LDD (Lightly Doped Drain) structure. The TFT 30 includes the above-described gate electrode 3a, for example, a polysilicon film, and a channel formed by an electric field from the gate electrode 3a. A channel region 1a ′ of the semiconductor layer 1a to be formed, an insulating film 2 including a gate insulating film for insulating the gate electrode 3a from the semiconductor layer 1a, a low-concentration source region 1b and a low-concentration drain region 1c in the semiconductor layer 1a, and a high-concentration region A source region 1d and a high-concentration drain region 1e are provided. Reference numeral 1f is a storage capacitor electrode.
[0046]
When the light-shielding films 120 are provided corresponding to the TFTs 30, the light-shielding films 120 may be provided close to each other as shown in FIG.
[0047]
As shown in FIG. 7, each light-shielding film 120 has a three-layer structure including a lower and upper light-shielding thin film 121a made of WSi (tungsten silicide) and an interlayer thin film 122a as an intermediate insulating film. The interlayer thin film 122a is formed of an insulating material such as a silicate glass thin film such as NSG, PSG, BSG, and BPSG, a silicon nitride thin film, and a silicon oxide thin film. Other materials may be used. Further, the total thickness of the lower and upper light-shielding thin films 121a is set to be the same thickness (for example, 100 nm) as the conventional light-shielding film. Therefore, the thickness of one light shielding thin film 121a may be の of the total film thickness, or each light shielding thin film 121a may have a different thickness.
[0048]
In the present embodiment, in addition to the light-shielding film 120 provided at a position corresponding to the TFT 30, the light-shielding film 120 provided at another portion has a three-layer structure. For example, FIGS. 8 and 9 show a sampling switch 151 provided for each data line 6a. The sampling switch 151 is a transistor switch that samples an image signal supplied to the wiring 391 via the image signal line according to the sampling signal supplied from the data line driving circuit 140 and supplies the sampled signal to the corresponding data line 6a. It is provided on the insulating film 12.
[0049]
Further, the sampling switch 151 is provided with a plurality of sampling switches from the data line driving circuit 140 so that the image signals supplied from the plurality of image signal lines are simultaneously supplied to the plurality of data lines 6a. 151 is connected to the gate electrode.
[0050]
The wiring 391 to which the image signal is supplied is connected to the source region of the semiconductor layer of the sampling switch 151, and the data line 6a is connected to the drain region of the semiconductor layer of the sampling switch 151. A light-shielding film 120 is provided on a first layer on the TFT substrate 10 corresponding to the sampling switch 151. 8 and 9 show a state in which the edge of the light-shielding film 120 corresponds to the edge of the sampling switch 151. Since the light-shielding film 120 is formed in an island shape for each sampling switch 151, the occurrence of cracks due to the internal stress of the light-shielding film can be further reduced. The light-shielding film 120 is not limited to one sampling switch 151, and may be an island-shaped light-shielding film that overlaps the region of the plurality of sampling switches 151.
[0051]
(Manufacturing process)
Next, a method for manufacturing a liquid crystal device using the TFT substrate 10 according to the present embodiment will be described with reference to FIG. FIG. 10 shows a manufacturing process in the pixel region.
[0052]
Step (1): A TFT substrate 10 such as a quartz substrate, glass, or silicon substrate is prepared. Here, annealing is preferably performed at a high temperature of about 900 to 1300 ° C. in an inert gas atmosphere such as N (nitrogen), and pre-processing is performed so that distortion generated in the TFT substrate 10 in a high-temperature process performed later is reduced. Keep it.
[0053]
A light-shielding thin film layer 121 having a thickness of about 50 to 200 nm is formed on the entire surface of the TFT substrate 10 thus processed by sputtering using WSi.
[0054]
Step (2): An interlayer thin film layer 122 having a predetermined thickness is formed on the entire upper surface of the light shielding thin film layer 121.
[0055]
Step (3): A light-shielding thin film layer 121 having a thickness of about 50 to 200 nm is formed on the entire upper surface of the interlayer thin film layer 122 by sputtering using WSi.
[0056]
Step (4): A resist mask corresponding to the pattern of the light-shielding film 120 is formed by photolithography on the light-shielding thin-film layer 121 formed in step (3), and the respective thin-film layers 121, 122, 121 are formed via the resist mask. By etching the three-layered thin film layer, a light-shielding film 120 having a three-layer structure in which the lower and upper layers are light-shielding thin films 121a and the intermediate layer is an interlayer thin film 122a.
[0057]
Step (5): A base insulating film 12 made of SiO 2 as NSG is formed on the light-shielding film 120 by, for example, normal pressure or reduced pressure CVD using a TEOS (tetraethylorthosilicate) gas. The layer thickness of the base insulating film 12 is preferably, for example, about 500 to 800 nm.
[0058]
After the formation of the NSG, the TFT substrate 10 is put into a furnace already heated to 600 to 900 ° C., and heat treatment is performed. At that time, the temperature in the furnace was raised at a rate of 5 ° C./min to 1150 ° C., which is a processing temperature at a high temperature, and the temperature in the furnace was maintained at a temperature of 1150 ° C. for 60 minutes. Then, the temperature in the furnace is lowered to 600 to 900 ° C. at a rate of and the TFT substrate 10 is carried out of the furnace. The processing temperature at a high temperature may be higher than 1000 ° C. and 1200 ° C. or lower, preferably higher than 1100 ° C. and 1150 ° C. or lower. Further, the processing time at a high temperature may be 30 minutes to 120 minutes, more preferably 50 minutes to 80 minutes. In the present embodiment, the temperature rise rate and the temperature decrease rate in the furnace are set at 5 ° C./min, but may be set at, for example, 2 to 30 ° C./min.
[0059]
In this embodiment, the light-shielding film 120 has a three-layer structure in which an intermediate interlayer thin film 122a is sandwiched between a lower light-shielding thin film 121a and an upper light-shielding thin film 121a, and the light-shielding thin films 121a and 121a crystallize due to a rise in temperature during heat treatment (FIG. 13 (b) T1), even if the internal stress increases in the process of returning to room temperature after the heat treatment, the internal stress generated in the conventional light-shielding film (WSi) consisting of a single layer indicated by the dashed line in FIG. 13 (b) As shown by a solid line (partially a broken line) in the figure, the internal stress generated in the light-shielding film 120 can be reduced as a whole, so that the tensile stress generated between the light-shielding film 120 and the underlying insulating film 12 can be reduced. Can be done. In this case, since the total thickness of the light-shielding thin films 121a is set to be the same as the conventional one, sufficient light-shielding properties can be obtained.
[0060]
Further, by selecting the thickness and material of the interlayer thin film 122a interposed between the light-shielding thin films 121a, the tensile stress generated between the light-shielding thin films 121a and 121a can be further reduced. The stress changes during the heat treatment at points A to D shown in FIG. 13B show almost the same characteristics as those shown in FIG.
[0061]
Step (6): Decompression CVD using a monosilane gas, a disilane gas, or the like at a flow rate of about 400 to 600 cc / min in a relatively low temperature environment of about 450 to 550 ° C., preferably about 500 ° C. on the base insulating film 12 ( For example, an amorphous silicon film is formed by CVD at a pressure of about 20 to 40 Pa). Thereafter, the polysilicon film 1 is subjected to an annealing treatment in a nitrogen atmosphere at about 600 to 700 ° C. for about 1 to 10 hours, preferably for 4 to 6 hours, so that the polysilicon film 1 has a thickness of about 50 to 200 nm, preferably Is solid-phase grown to a thickness of about 100 nm.
[0062]
Step (7): A semiconductor layer 1a having a predetermined pattern is formed on the polysilicon film 1 by a photolithography step, an etching step, or the like.
[0063]
After that, the storage capacitor electrode 1f together with the semiconductor layer 1a constituting the TFT 30 is thermally oxidized at a temperature of about 900 to 1200 ° C., preferably at a temperature of about 1000 to 1150 ° C., so that a relatively thin thickness of about 30 nm is obtained. A thermal silicon oxide film is formed, and a high-temperature silicon oxide film (HTO film) or a silicon nitride film is deposited to a relatively small thickness of about 50 nm by a low-pressure CVD method or the like, and an insulating film 2 including a gate insulating film of the TFT 30 is formed. (See FIG. 5).
[0064]
Also at this time, since the light-shielding film 120 has a three-layer structure to reduce internal stress, it is necessary to reduce the tensile stress between the light-shielding film 120 and the semiconductor layer 1a generated in the process of returning to normal temperature after heat treatment. Can be.
[0065]
As a result, no crack occurs in the base insulating film 12 even after the heat treatment. Therefore, as shown in FIGS. 5 and 6, the edge of the light-shielding film 120 is disposed at a position substantially corresponding to the edge of the semiconductor layer 1a. Alternatively, as shown in FIGS. 8 and 9, even if the edge of the light-shielding film 120 is disposed at a position corresponding to the edge of the sampling switch 151, the tensile stress between the two is reduced. Cracks do not occur in the film 12, and the product defect rate can be significantly reduced.
[0066]
Note that the subsequent manufacturing steps of the liquid crystal device are the same as those in the related art, and thus description thereof will be omitted.
[0067]
As described above, in the present embodiment, the light-shielding film 120 has a three-layer structure in which the interlayer thin film 122a is interposed between the lower and upper light-shielding thin films 121a, so that internal stress generated during heat treatment can be reduced. Moreover, by selecting the thickness or material of the interlayer thin film 122a as the intermediate layer, the internal stress can be further reduced.
[0068]
As a result, the tensile stress between the light-shielding film 120 and the underlying insulating film 12 or the semiconductor layer 1a is greatly reduced, so that cracks do not occur in the underlying insulating film 12 and the product defect rate can be significantly reduced. And increase the reliability of the product.
[0069]
FIG. 11 is a process chart showing a method for manufacturing a liquid crystal device substrate according to a second embodiment of the present invention in a sectional view in the order of steps. In this embodiment, the thin films 121a and 122a constituting the light shielding film 120 are formed in each process.
[0070]
Step (1): As in the first embodiment, a light-shielding thin film layer 121 having a thickness of about 50 to 200 nm is formed on the entire surface of the TFT substrate 10 which has been subjected to predetermined pretreatment by sputtering using WSi.
[0071]
Step (2): A resist mask corresponding to the pattern of the light-shielding thin-film layer 121 is formed on the light-shielding thin-film layer 121 by photolithography, and the lower layer is etched by etching the light-shielding thin-film layer 121 through the resist mask. Is formed.
[0072]
Step (3): An interlayer thin film layer 122 is formed so as to cover the light shielding thin film 121a.
[0073]
Step (4): forming a resist mask corresponding to the pattern of the interlayer thin film layer 122 on the interlayer thin film layer 122 by photolithography, and performing etching on the interlayer thin film layer 122 through the resist mask, thereby shielding light. The thin film 121a is formed.
[0074]
Step (5): forming a light shielding thin film layer 121 so as to cover the interlayer thin film 122a.
[0075]
Step (6): A resist mask corresponding to the pattern of the light-shielding thin-film layer 121 is formed on the light-shielding thin-film layer 121 by photolithography, and the upper layer is etched by etching the light-shielding thin-film layer 121 through the resist mask. Is formed. As a result, a light-shielding film 120 having a three-layer structure in which the lower and upper layers are the light-shielding thin films 121a and the intermediate layer is the interlayer thin film 122a is formed.
[0076]
Step (7): Similar to step (5) of the first embodiment, the base insulating film 12 is formed on the light shielding film 120 in a predetermined manner. Thereafter, heat treatment is performed at a high temperature.
[0077]
Step (8): As in step (6) of the first embodiment, an amorphous silicon film is formed on the underlying insulating film 12, and the polysilicon film 1 is grown by solid phase.
[0078]
Step (9): As in step (7) of the first embodiment, a semiconductor layer 1a having a predetermined pattern is formed on the polysilicon film 1 by a photolithography step, an etching step, or the like.
[0079]
As described above, in the present embodiment, in addition to the effects described in the first embodiment, each of the thin films 121a, 122a, and 121a constituting the light shielding film 120 is formed by individually patterning. , 122a, 121a can be formed in different shapes.
[0080]
FIG. 12 is an enlarged cross section corresponding to FIG. 7 according to the third embodiment of the present invention. In the present embodiment, the interlayer thin film 122a of the light shielding film 120 is used as an insulating film, a contact hole 123 is formed in the interlayer thin film 122a, and the contact 124 formed in the upper light shielding thin film 121a through the contact hole 123 provides The two light-shielding thin films 121a, 121a are electrically connected. The operation and effect are the same as those of the first embodiment.
[0081]
The electro-optical device according to the present invention is not limited to a liquid crystal device, but may be an EL (Electronic Luminescent) device, an electrophoresis device, or the like.
[0082]
In addition, a projection display device, a liquid crystal television, a mobile phone, an electronic organizer, a word processor, a viewfinder type or a monitor direct-view type video tape recorder, and a workstation, which includes the above-described electro-optical device and can display high-quality images. It is preferable to use various electronic devices such as a video phone, a POS terminal, and a touch panel.
[0083]
The light-shielding film 120 is not limited to the three-layer structure, and may have a multilayer structure of five or more layers in which the number of the light-shielding thin films 121a is three or more, and the interlayer thin films 122a are provided between the light-shielding thin films 121a. In this case, the total thickness of each light shielding thin film 121a is set to be the same as the thickness of the conventional light shielding film.
[Brief description of the drawings]
FIG. 1 shows a liquid crystal device, which is an electro-optical device configured using a liquid crystal device substrate, which is an electro-optical device substrate according to a first embodiment, as well as components formed thereon viewed from a counter substrate side. It is a top view.
FIG. 2 is a cross-sectional view of the liquid crystal device after completion of an assembling step of bonding an element substrate and a counter substrate and enclosing a liquid crystal at the line HH ′ in FIG. 1;
FIG. 3 is a block diagram showing an electrical configuration of the electro-optical device.
FIG. 4 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels constituting a pixel region of the liquid crystal device of FIGS. 1 and 2;
FIG. 5 is a sectional view of a main part of the liquid crystal device substrate of FIGS. 1 and 2;
FIG. 6 is a sectional view of another essential part of the liquid crystal device substrate.
FIG. 7 is an enlarged sectional view of the light shielding film.
FIG. 8 is an enlarged view of a main part showing a configuration of the switch circuit unit.
FIG. 9 is a sectional view of a main part of the switch circuit unit.
FIG. 10 is a process drawing showing a manufacturing method of the liquid crystal device substrate in a sectional view in the order of steps.
FIG. 11 is a process chart showing a method for manufacturing a liquid crystal device substrate according to the second embodiment in the order of steps by sectional views.
FIG. 12 is an enlarged sectional view corresponding to FIG. 7 according to a third embodiment.
13 (a) is a graph showing a stress change with respect to a heat treatment of conventional non-silicate glass (NSG), polysilicon and tungsten silicide (WSi), and FIG. 13 (b) is a graph with respect to a heat treatment of tungsten silicide (WSi) according to the present invention. It is a graph which shows a stress change.
[Explanation of symbols]
1a semiconductor layer, 10 TFT substrate, 12 base insulating film (insulating film), 120 light shielding film, 121a light shielding thin film, 122a interlayer thin film (insulating film), 151 sampling switch

Claims (8)

A substrate for an electro-optical device, comprising a light-shielding film formed on a substrate by sandwiching an insulating film between a lower light-shielding thin film and an upper light-shielding thin film. 2. The substrate for an electro-optical device according to claim 1, wherein a semiconductor layer is laminated on the light shielding film via an insulating film. 3. The electro-optical device substrate according to claim 2, wherein the semiconductor layer forms a sampling switch that supplies an image signal to a data line. 4. The electro-optical device substrate according to claim 3, wherein a plurality of the sampling switches are provided, and the light shielding film is formed in an island shape below a semiconductor layer of at least one of the sampling switches. 5. The electro-optical device substrate according to claim 1, wherein the lower light-shielding thin film and the upper light-shielding thin film are made of a high melting point metal. Forming a lower light-shielding thin film on the substrate,
Forming an interlayer thin film of an intermediate layer on the light shielding film;
Forming an upper light-shielding thin film on the interlayer thin film,
Forming a light shielding film by patterning the lower light shielding thin film, the interlayer thin film of the intermediate layer, and the upper light shielding thin film,
Forming an insulating film on the light-shielding film;
Performing a high-temperature heat treatment on the substrate on which the insulating film is formed. Forming a lower light-shielding thin film on the substrate,
Forming an intermediate interlayer thin film on the lower light-shielding thin film,
Forming an upper light-shielding thin film on the interlayer thin film,
Forming a light shielding film by patterning the lower light shielding thin film, the interlayer thin film of the intermediate layer, and the upper light shielding thin film,
Forming an insulating film on the light-shielding film;
Performing a high-temperature heat treatment on the substrate on which the insulating film is formed,
Forming a semiconductor layer on the insulating film. An electro-optical device comprising the electro-optical device substrate according to claim 1.

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