JP2004343508A - Frequency converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a frequency converter having a mixer circuit and a filter circuit, capable of stable down-conversion in the mixer circuit. <P>SOLUTION: The frequency converter includes a first adjustment means for adjusting an oscillation frequency in an oscillation circuit connected to the mixer circuit, a second adjustment means for adjusting a cutoff frequency in the filter circuit, and an adjustment circuit for controlling the first adjustment means and the second adjustment means. Further, the first adjustment means is configured of the same structure as the second adjustment means. Or, the first adjustment means and the second adjustment means are variable resistance circuits having a plurality of switches for switching resistance values, and the first adjustment means has the same number of switches as the second adjustment means, in which an on/off state of the switch in the first adjustment means is set to the same as an on/off state of the switch in the second adjustment means. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a frequency conversion device having a mixer circuit and a filter circuit.
[0002]
[Prior art]
Conventionally, in a GPS (Global Positioning System) receiver, as shown in FIG. 5, a spread spectrum RF signal from an artificial satellite is received by an antenna 100, and the RF signal is transmitted to a required IF signal 200 s by a frequency converter 200. Then, the IF signal 200s is input to a DSP (Digital Signal Processor) 300 and subjected to spectrum despreading to obtain required information (for example, see Patent Document 1).
[0003]
Here, the frequency conversion device 200 is configured by connecting a first filter circuit 210, an amplification circuit 220, a down-conversion circuit 230, a second filter circuit 240, and a comparator circuit 250 in series. The configuration is such that the final IF signal 200 s generated by the circuit 250 is input to the DSP 300.
[0004]
In particular, the down-conversion circuit 230 is of a double-conversion type including a first down-conversion circuit 230a and a second down-conversion circuit 230b connected in parallel, and the first down-conversion circuit 230a includes a first mixer circuit 231a, The third filter circuit 232a and the second mixer circuit 233a are connected in series, and the second down conversion circuit 230b includes a third mixer circuit 231b, a fourth filter circuit 232b, and a fourth mixer circuit. 233b are connected in series. Reference numeral 230c denotes an addition circuit that performs addition processing of the signals down-converted by the first down-conversion circuit 230a and the second down-conversion circuit 230b.
[0005]
The first mixer circuit 231a and the third mixer circuit 231b receive the signal 230ds of a required oscillation frequency generated by the first oscillator circuit 230d, and the second oscillator circuit 233a and the fourth mixer circuit 233b input the second oscillator circuit 233a and the fourth mixer circuit 233b. The signal 230es having the required oscillation frequency generated by the circuit 230e is input, and the signal is down-converted. Note that the signal 230es input to the second mixer circuit 233a and the fourth mixer circuit 233b is shifted by 90 degrees in phase from the signal 230ds input to the first mixer circuit 231a and the third mixer circuit 231b. In FIG. 5, 270s is a control voltage signal input to the first oscillation circuit 230d, and 280s is a control voltage signal input to the second oscillation circuit 230e.
[0006]
As shown in FIG. 6, a control voltage type ring oscillator configured by connecting an odd number of inverter circuits 310 in series is used for the first oscillation circuit 230d and the second oscillation circuit 230e. Such a ring oscillator is provided with a buffer 320 for inputting a control voltage signal from a PLL (Phase Locked Loop) circuit (not shown), and a current changing resistor for converting a voltage output from the buffer 320 into a current. 330 are provided. The current changing resistor 330 is formed of a resistor having a predetermined resistance value. Such a ring oscillator has an advantage of low power consumption, and is often used when generating a signal of a relatively low frequency of 1 to several tens of MHz. The device 200 can be reduced in size. For this reason, in recent years, it has come to be used even at a frequency of GHz.
[0007]
[Patent Document 1]
JP 08-262122 A
[Problems to be solved by the invention]
However, in the first oscillation circuit and the second oscillation circuit including the above-described ring oscillator, the first oscillation circuit and the second oscillation circuit do not have the same resistance due to the manufacturing variation of the resistors and the capacitors included in the first oscillation circuit and the second oscillation circuit. The oscillation frequency of the output signal that is output in response to the control voltage signal input to the second oscillation circuit varies greatly. As shown in the control voltage-oscillation frequency characteristic diagram of the oscillation circuit including the control voltage ring oscillator in FIG. In addition, there is a problem that the slope KVCO [Hz / V] of the control voltage-oscillation frequency characteristic line changes greatly, and the control voltage range for a predetermined oscillation frequency f1 'is widened.
[0009]
[Means for Solving the Problems]
Therefore, in the frequency conversion device of the present invention, in the frequency conversion device having the mixer circuit and the filter circuit, the oscillation circuit connected to the mixer circuit is provided with the first adjustment means for adjusting the oscillation frequency, and the filter circuit is provided in the filter circuit. Second adjusting means for adjusting the cutoff frequency is provided, and an adjusting circuit for controlling the first adjusting means and the second adjusting means is provided.
[0010]
Further, the present invention is characterized in that the first adjusting means and the second adjusting means have the same configuration.
[0011]
The first adjusting means and the second adjusting means are variable resistance circuits having a plurality of switches for switching the resistance value, and the first adjusting means and the second adjusting means have the same number of switches. Further, the present invention is also characterized in that the on / off state of the switch in the first adjusting means is the same as the on / off state of the switch in the second adjusting means.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
The frequency conversion device of the present invention is a frequency conversion device having a mixer circuit and a filter circuit, wherein the mixer circuit is connected to an oscillation circuit provided with first adjusting means for adjusting the oscillation frequency, The filter circuit is provided with second adjusting means for adjusting the cutoff frequency, and an adjusting circuit for controlling the first adjusting means and the second adjusting means is provided.
[0013]
That is, by providing the first adjusting means in an oscillation circuit that outputs a signal having a required oscillation frequency and enabling the oscillation frequency to be adjusted, it is possible to suppress manufacturing variations of the oscillation circuit and input the oscillation circuit. A signal having a required oscillation frequency can be output without increasing the control voltage.
[0014]
In addition, by controlling the first adjusting means by an adjusting circuit for controlling the second adjusting means provided in the filter circuit, the control mechanism can be simply configured, and an increase in manufacturing cost can be suppressed. .
[0015]
Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings. FIG. 1 is a block diagram of a GPS receiver having a frequency conversion device 2 according to the present invention. The GPS receiver receives a spread spectrum RF signal from an artificial satellite and outputs it as a received RF signal 1s. An antenna 1, a frequency conversion device 2 that converts a received RF signal 1s output from the antenna 1 into an IF signal 2s and outputs the same, and a DSP 3 that analyzes the IF signal 2s output from the frequency conversion device 2 Make up.
[0016]
In the present embodiment, the frequency conversion device 2 is a semiconductor device including a circuit element such as a transistor formed on a semiconductor substrate, and includes a first filter circuit 21, an amplification circuit 22, a down-conversion circuit 23 on the semiconductor substrate. , The second filter circuit 24 and the comparator circuit 25 are connected in series from the upstream side.
[0017]
In particular, in the present embodiment, the down conversion circuit 23 is a first down conversion circuit including a first mixer circuit 23a-1, a third filter circuit 23a-2, and a second mixer circuit 23a-3 connected in series. 23a, a second down-conversion circuit 23b composed of a third mixer circuit 23b-1, a fourth filter circuit 23b-2, and a fourth mixer circuit 23b-3 connected in series. Conversion type. The first down-converting circuit 23a and the second down-converting circuit 23b are connected via an adding circuit 23c.
[0018]
Then, the received RF signal 1s output from the antenna 1 is input to the first filter circuit 21 and filtered to generate a first filtered signal 21s from which a signal of a required frequency is extracted. The amplified signal 22s is generated by inputting the amplified signal 21s to the amplifier circuit 22 and amplifying the signal. The amplified signal 22s is divided into two, and the first down-convert circuit 23a and the second down-convert circuit 23 of the down-convert circuit 23 are respectively divided. 23b.
[0019]
In the down-converting circuit 23, a signal obtained by down-converting the amplified signal 22s in the first down-converting circuit 23a and a signal obtained by down-converting the amplified signal 22s in the second down-converting circuit 23 are input to an adding circuit 23c. As a result, a down-converted signal 23 s is generated and input to the second filter circuit 24.
[0020]
The second filter circuit 24 generates a second filtered signal 24 s by extracting a signal of a required frequency by filtering the input down-converted signal 23 s, and inputs the second filtered signal 24 s to the comparator circuit 25. By performing amplification, a final IF signal 2s is generated and output.
[0021]
A first oscillation circuit 23d is connected to the first mixer circuit 23a-1 and the third mixer circuit 23b-1 of the first down-conversion circuit 23a and the second down-conversion circuit 23b for down-converting the amplified signal 22s, The first down-conversion signal 23ds of a required oscillation frequency generated by the first oscillation circuit 23d is input to the first mixer circuit 23a-1 and the third mixer circuit 23b-1.
[0022]
The signal subjected to the first stage down-conversion by the first mixer circuit 23a-1 and the third mixer circuit 23b-1 is filtered by the third filter circuit 23a-2 and the fourth filter circuit 23b-2 to obtain a required signal. The frequency signal is extracted.
[0023]
Then, the second mixer circuit 23a-3 and the fourth mixer circuit 23b-3 of the first down conversion circuit 23a and the second down conversion circuit 23b that perform the second stage down conversion on the filtered signal are provided with the second An oscillator circuit 23e is connected, and a second down-conversion signal 23es of a required oscillation frequency generated by the second oscillator circuit 23e is inputted to the second mixer circuit 23a-3 and the fourth mixer circuit 23b-3. ing.
[0024]
The first oscillation circuit 23d and the second oscillation circuit 23e are supplied with required control voltage signals 27s and 28s from a PLL circuit (not shown), so that the first down-conversion signal 23ds of the required oscillation frequency and the second It is configured to output a 2down-conversion signal 23es.
[0025]
In the present embodiment, the first oscillation circuit 23d and the second oscillation circuit 23e use the voltage-controlled ring oscillator shown in FIG. 2, and are configured by connecting an odd number of inverter circuits 31 in series. FIG. 2 shows the second oscillation circuit 23e.
[0026]
In particular, in the first oscillation circuit 23d and the second oscillation circuit 23e, the current adjusting resistor 33 that converts the input control voltage signals 27s and 28s into an electric current by amplifying the amplified signal by the amplifying element 32 is provided by the first adjusting unit. It is composed of a certain variable resistor.
[0027]
Further, as shown in FIG. 3, the current changing resistor 33 includes a first parallel wiring part La in which the first wiring L1, the second wiring L2, the third wiring L3, and the fourth wiring L4 are connected in parallel. And a second parallel wiring portion Lb, in which the fifth wiring L5, the sixth wiring L6, the seventh wiring L7, and the eighth wiring L8 are connected in parallel, are connected in series via a first resistor R1. The first wiring L1 is provided with a first switch S1, the second wiring L2 is provided with a second switch S2 and a second resistor R2 connected in series, and the third wiring L3 is provided with a first switch S1. A third switch S3, a third resistor R3, and a fourth resistor R4 are provided in series, and a fourth switch S4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor are provided on a fourth line L4. The fifth line L5 is provided with a fifth switch S5, and the sixth line L6 is provided with a sixth switch L5. The switch S6 and the eighth resistor R8 are connected in series, the seventh switch S7, the ninth resistor R9, and the tenth resistor R10 are connected and provided in the seventh line L7. The eighth wiring L8 is provided with an eighth switch S8, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13 connected in series, and is provided with at least one of the first to fourth switches S1 to S4. By controlling at least one of the fifth to eighth switches S5 to S8 to be in a connected state, a variable resistance circuit in which the resistance value of the current changing resistor 33 is variable is provided.
[0028]
As described above, the current changing resistances 33 of the first oscillation circuit 23d and the second oscillation circuit 23e are configured by variable resistance circuits and can be adjusted. As a result, as shown in FIG. By adjusting the value, it is possible to suppress the variation in the oscillation frequency of the first down-conversion signal 23ds and the second down-conversion signal 23es output from the first oscillation circuit 23d and the second oscillation circuit 23e.
[0029]
That is, as shown in FIG. 4, when a control voltage signal of a predetermined control voltage V1 is input to the first oscillation circuit 23d and the second oscillation circuit 23e, the output from the first oscillation circuit 23d and the second oscillation circuit 23e is output. The difference between the minimum frequency f1 and the maximum frequency f2 of the oscillation frequency of the signal to be performed can be reduced.
[0030]
Therefore, the control voltage range of the control voltage signals 27s and 28s input to the first oscillation circuit 23d and the second oscillation circuit 23e in order to output a signal having a required oscillation frequency can be reduced, and the operating power supply voltage is increased. There is no need to improve the stability of an operation power supply voltage output device such as a PLL circuit that outputs an operation power supply voltage, and a stable operation power supply voltage can be obtained.
[0031]
Further, the circuit configuration of the current changing resistor 33 shown in FIG. 3 is provided for adjusting the cutoff frequency of the third filter circuit 23a-2, the fourth filter circuit 23b-2, and the second filter circuit 24, respectively. It has the same configuration as the variable resistance circuit (not shown) as the second adjusting means, and requires the variable resistance circuits of the third filter circuit 23a-2, the fourth filter circuit 23b-2, and the second filter circuit 24. The adjustment circuit 26 connected to each of the variable resistance circuits for controlling the resistance value is also connected to the current change resistance 33 of the first oscillation circuit 23d and the current change resistance 33 of the second oscillation circuit 23e.
[0032]
That is, the variable resistor circuit for adjusting the cutoff frequency of the third filter circuit 23a-2, the fourth filter circuit 23b-2, and the second filter circuit 24 also has the same configuration as the first parallel wiring section in which the first to fourth wirings are connected in parallel. , A second parallel wiring section in which the fifth to eighth wirings are connected in parallel, and a series connection via a resistor. The first to eighth wirings are each provided with a switch, and the adjustment circuit 26 The on / off state of each switch is the same as the on / off state of the first to eighth switches S1 to S8 in the current changing resistor 33.
[0033]
Therefore, since the resistance values of all the variable resistance circuits can be adjusted by one adjustment circuit 26, the adjustment mechanism can be simply configured.
[0034]
The resistors provided on the first to eighth wirings of the variable resistor circuit for adjusting the cut-off frequency of the third filter circuit 23a-2, the fourth filter circuit 23b-2, and the second filter circuit 24 are the current changing resistors 33. Or a resistor provided so as to have an appropriate resistance value adapted to the adjustment of the cut-off frequency.
[0035]
In particular, since each variable resistance circuit is formed on a semiconductor substrate and manufactured in the same manufacturing process, the characteristics of each variable resistance circuit can be made similar. When the variable resistance circuit is adjusted, the adjustment accuracy can be improved.
[0036]
In the present embodiment, the adjustment circuit 26 is connected to both the current change resistor 33 of the first oscillation circuit 23d and the current change resistor 33 of the second oscillation circuit 23e, and adjusts the first oscillation circuit 23d and the second oscillation circuit 23e. Although both are configured to be controlled simultaneously, they may be connected to at least one of them.
[0037]
Although the adjustment circuit 26 is provided separately from the frequency conversion device 2, the adjustment circuit 26 may be provided in the frequency conversion device 2.
[0038]
【The invention's effect】
According to the first aspect of the present invention, in the frequency conversion device having the mixer circuit and the filter circuit, the oscillation circuit connected to the mixer circuit is provided with the first adjusting means for adjusting the oscillation frequency. Since the variation in the oscillation frequency of the signal output from the control circuit can be suppressed, the control voltage range of the control voltage signal input to the oscillation circuit to output the signal having the required transmission frequency can be reduced. Therefore, it is not necessary to increase the operation power supply voltage, and it is possible to prevent the noise characteristic of the PLL circuit that outputs the operation power supply voltage from changing.
[0039]
Moreover, the filter circuit is provided with the second adjusting means for adjusting the cutoff frequency, and the adjusting circuit for controlling the first adjusting means and the second adjusting means is provided. There is no need to provide such an arrangement, and the adjustment processing by the adjustment circuit can be completed in a short time, and an increase in manufacturing cost can be suppressed.
[0040]
According to the second aspect of the present invention, since the first adjusting means and the second adjusting means have the same configuration, control of the first adjusting means and the second adjusting means by the same adjusting circuit. Can be performed, and the adjustment mechanism can be simply configured.
[0041]
According to the third aspect of the present invention, the first adjusting means and the second adjusting means are variable resistance circuits each having a plurality of switches for switching the resistance value, and the first adjusting means and the second adjusting means. The means has the same number of switches, and the on / off state of the switch in the first adjusting means and the on / off state of the switch in the second adjusting means are the same. The control of the adjusting means and the second adjusting means can be performed, and the adjusting mechanism can be simply configured.
[Brief description of the drawings]
FIG. 1 is a block diagram of a GPS receiver including a frequency conversion device according to the present invention.
FIG. 2 is a circuit diagram of an oscillation circuit provided in the frequency conversion device according to the present invention.
FIG. 3 is a circuit diagram of a current changing resistor in the oscillation circuit of FIG. 2;
FIG. 4 is a control voltage-oscillation frequency characteristic diagram in the oscillation circuit of FIG. 2;
FIG. 5 is a block diagram of a GPS receiver including a conventional frequency converter.
FIG. 6 is a circuit diagram of an oscillation circuit provided in a conventional frequency conversion device.
FIG. 7 is a control voltage-oscillation frequency characteristic diagram in a conventional oscillation circuit.
[Explanation of symbols]
Reference Signs List 1 antenna 1s received RF signal 2 frequency converter 2s IF signal 3 DSP (Digital Signal Processor)
21 first filter circuit 21s first filtering signal 22 amplifying circuit 22s amplified signal 23 down-converting circuit 23s down-converting signal 23a first down-converting circuit 23a-1 first mixer circuit 23a-2 third filter circuit 23a-3 second mixer Circuit 23b Second down-convert circuit 23b-1 Third mixer circuit 23b-2 Fourth filter circuit 23b-3 Fourth mixer circuit 23c Addition circuit 23d First oscillation circuit 23e Second oscillation circuit 24 Second filter circuit 24s Second filtering Signal 25 Comparator circuit 26 Adjustment circuit 27 s Control voltage signal 28 s Control voltage signal 31 Inverter circuit 32 Amplifying element 33 Current changing resistor

Claims (3)

In a frequency conversion device having a mixer circuit and a filter circuit,
An oscillation circuit connected to the mixer circuit is provided with first adjusting means for adjusting an oscillation frequency,
The filter circuit is provided with second adjusting means for adjusting a cutoff frequency,
A frequency conversion device comprising an adjustment circuit for controlling the first adjustment means and the second adjustment means. 2. The frequency conversion device according to claim 1, wherein the first adjustment unit and the second adjustment unit have the same configuration. The first adjustment unit and the second adjustment unit are variable resistance circuits each having a plurality of switches for switching a resistance value, and the first adjustment unit and the second adjustment unit have the same number of the plurality of switches. 2. The frequency converter according to claim 1, further comprising a switch, wherein an on / off state of said switch in said first adjusting means is the same as an on / off state of said switch in said second adjusting means. apparatus.

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