JP2004335726A - Method of manufacturing multilayer printed wiring board with cavity - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer printed wiring board with cavities by which the bad influence by variations in thickness between layers or in thickness of a conductor can be prevented. <P>SOLUTION: The method of manufacturing the multilayer printed wiring board with cavities comprises processes of forming a cavity 2 by spot facing in a copper clad laminate 1 which constitutes a base layer in such a manner that it is extended through a resin layer 1-1 to expose a copper layer 1-2 before making the copper clad laminate into a multilayer structure, filling the cavity with a metal 3 different from copper, forming copper plating layers 4-1 and 4-2 on both faces of the copper clad laminate, forming circuit patterns 5-1 and 5-2 from the copper plating layers including the copper layer on both faces of the copper clad laminate, forming insulation layers 6-1 and 6-2 and circuit patterns 8-1 and 8-2 each forming at least a single layer on both faces of the copper clad laminate to laminate into a multilayer structure, forming a cavity 9 by spot facing from one face side of the copper clad laminate to the metal 3, and removing the metal by etching. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer printed wiring board with a cavity having a cavity for mounting a chip component such as a semiconductor element, a resistor, and a capacitor.
[0002]
[Prior art]
The following manufacturing method has been proposed as a method for manufacturing this type of printed wiring board. This manufacturing method is a method in which a cavity portion is counterbored from one surface side of a multilayer printed wiring board with a drill using an NC processing machine, and is implemented through the following steps. The coordinates of the inner layer circuit pattern and the coordinates of the through hole electrically connected to each other are previously stored in the memory, and the memory is first monitored while monitoring the presence or absence of the electrical connection between the through hole and the counterboring tool. The counterbore processing is performed at the coordinates of the inner layer circuit pattern, and the depth of the counterbore processing is determined and stored when the through hole and the counterbore processing tool are electrically connected, and the other parts of the cavity are made identical. Counterbore processing to a depth (see Patent Document 1).
[0003]
[Patent Document 1]
JP-A-10-22643
[Problems to be solved by the invention]
In the above manufacturing method, strict Z-axis (depth) accuracy in the NC processing machine is required. In other words, in counterbore processing on a high-precision circuit pattern that will be required in the future, the thickness of the conductor forming the circuit pattern will become increasingly thinner, and control in the Z-axis direction will become increasingly strict.
[0005]
However, in the above manufacturing method, at the time when one pattern of electrical connection is detected, the counterbore processing is performed with the depth at that time being constant, so that the lower layer than the layer to be counterbored in the multilayer printed wiring board is used. If the interlayer thickness or the conductor thickness fluctuates, the pads or lands for making an electrical connection with the circuit pattern or the component to be mounted may not be exposed, or the circuit patterns, pads and lands may be excessively shaved. As a result, rework is required or the circuit is damaged.
[0006]
Therefore, an object of the present invention is to provide a method for manufacturing a multilayer printed wiring board with a cavity which is not adversely affected by variations in interlayer thickness or conductor thickness regardless of the counterbore processing performed on the multilayer printed wiring board. Is to do.
[0007]
[Means for Solving the Problems]
The method for manufacturing a multilayer printed wiring board with cavities according to the present invention is directed to a first counterbore in which a conductor is exposed through a resin layer in a conductor-clad laminate constituting a layer to be an inner layer in the multilayer printed wiring board. A step of performing processing, a step of filling the countersunk portion with a metal different from the conductor, a step of performing conductor plating on both surfaces of the conductor-clad laminate, and a conductor layer on both surfaces of the conductor-clad laminate A step of forming a circuit pattern; a step of forming a laminate including at least one insulating layer on both sides of the conductor-clad laminate; and a step of performing the first spot facing process on the laminate. Performing a second counterbore process to the filled metal to expose one surface of the filled metal.
[0008]
In the present manufacturing method, the conductor is copper, and the metal is tin, solder, or nickel.
[0009]
The method also includes the step of exposing one side of the metal and subsequently removing the filled metal by etching.
[0010]
The shape of the spot facing portion formed by the first spot facing may be annular or rectangular.
[0011]
In the present manufacturing method, it is preferable that the first and second counterboring processes are performed by drilling or laser processing.
[0012]
According to the present invention, there is also provided a method of manufacturing a multilayer printed wiring board having a cavity having a cavity for mounting a chip component, wherein a resin is added to a copper-clad laminate constituting a base layer before forming a multilayer structure. Performing a first counterbore process through which the copper layer is exposed, filling the counterbored portion with a metal different from copper, and performing copper plating on both surfaces of the copper-clad laminate And forming a circuit pattern with a copper plating layer including the copper layer on both surfaces of the copper-clad laminate, and forming at least one insulating layer and a circuit pattern on both surfaces of the copper-clad laminate, respectively. Forming a multilayer structure, and performing a second counterboring process from the upper surface side or the lower surface side of the copper-clad laminate to the filled metal to expose the upper surface or the lower surface of the filled metal. And Etchin Method for producing cavity-multilayer printed circuit board which comprises a step of removing the filler metal is provided by.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
The method for manufacturing a multilayer printed wiring board with a cavity according to the present invention includes a semiconductor element, a resistor, and a main part of a cavity for mounting chip parts such as a capacitor, that is, a part that is easily affected by a change in interlayer thickness or conductor thickness. It is characterized in that it is formed by spot facing before forming a multilayer printed wiring board.
[0014]
A first embodiment of a method for manufacturing a multilayer printed wiring board with cavities according to the present invention will be described with reference to FIGS.
[0015]
Hereinafter, the manufacturing method according to the first embodiment will be described step by step.
[0016]
First, as shown in FIG. 1 (a), a copper layer 1-3 and a resin layer 1-1 on the upper surface side are formed on a copper-clad laminate 1 having an arbitrary thickness by drilling, laser processing, or the like using an NC processing machine. A first counterbore process is performed to penetrate and expose the copper layer 1-2 on the lower surface side, thereby forming a cavity 2 having a predetermined size. Note that the copper-clad laminate 1 is a layer serving as a base when forming a multilayer printed wiring board. Here, the copper-clad laminate 1 having copper layers 1-3 and 1-2 on both upper and lower surfaces is used. However, if counterboring is performed from the upper surface side, a single-sided copper-clad laminate having a copper layer only on the lower surface side may be used. Further, the shape of the cavity 2 may be any shape such as a circle or a square.
[0017]
In any case, in the spot facing in this step, even if the thickness of the copper layer 1-2 varies, there is no adverse effect. This is because the copper plating is applied on the copper layer 1-2 in a process to be described later, so that the circuit pattern or the component by the copper plating layer is fixed and the component and This is because there is no problem in the formation of the pads and lands for making the electrical connection. This means that spot facing in this step does not require strict accuracy in the Z-axis (depth) direction.
[0018]
Next, as shown in FIG. 1B, the counterbore portion is filled with a metal 3 different from copper by plating, paste, or the like, and after filling, a copper plating layer 4-1 such as IVH is formed on both sides as usual. 4-2 is performed. As the material of the metal 3, tin, solder, nickel or the like is used.
[0019]
Next, as shown in FIG. 1C, a desired circuit pattern is formed by the copper plating layers 4-1 and 4-2 (including the copper layers 1-2 and 1-3) on both sides by a technique such as photoetching. 5-1 and 5-2 are formed. Note that no circuit pattern is formed in a region corresponding to a region above the metal 3.
[0020]
Next, as shown in FIG. 1D, after laminating the insulating layers 6-2 and 6-1 on the upper and lower surfaces of the copper clad laminate 1, one or more predetermined positions on both surfaces are formed by laser processing or the like. A via hole 7 is formed at the position.
[0021]
Subsequently, as shown in FIG. 1E, after performing copper plating on the insulating layers 6-1 and 6-2, desired circuit patterns 8-1 and 8-2 are formed by a technique such as photoetching. I do. In addition, here, for convenience, the insulating layer and the circuit pattern are formed one by one on the upper and lower sides of the copper clad laminate 1, however, two or more layers may be formed. Of course, no circuit pattern is formed in the region corresponding to the upper part of the metal 3 in either case of one layer or two or more layers. Further, when spot facing is performed from the upper surface side, only the insulating layer 6-1 may be formed on the lower surface side.
[0022]
Thereafter, referring to FIG. 2F, a second counterboring process is performed by drilling, laser processing, or the like so that the upper surface of metal 3 is exposed through insulating layer 6-2 to form cavity 9. I do. Here, the diameter (or width) of the cavity 9 is larger than the diameter (or width) of the cavity 2, but may be the same or smaller. Of course, it is not necessary that the cavities 2 and 9 have the same planar shape. The spot facing in this step also does not require strict accuracy in the Z-axis (depth) direction.
[0023]
Subsequently, referring to FIG. 2G, the metal 3 is removed by etching with an etching agent having a small etching amount with respect to copper. As a result, a cavity 10 in which the cavity 9 and the cavity 2 are combined is formed. When the material of the metal 3 to be filled is tin, solder, or the like, a nitric acid-based etchant can be used as an etchant.
[0024]
As described above, a desired mounting pad 11 for mounting chip components can be realized without performing high-precision control in the Z-axis direction (depth direction) in an NC processing machine or a laser processing machine. I can do it. As a result, a failure in electrical connection with the component does not occur.
[0025]
FIG. 3 shows a second embodiment of a method for manufacturing a multilayer printed wiring board with cavities according to the present invention in the order of steps. The second embodiment is different from the first embodiment in that the cavity formed by the first counterbore processing is formed in an annular or rectangular tube shape, and the metal filled therein is not removed. different. Therefore, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.
[0026]
As shown in FIG. 3A, a copper-clad laminate 1 having an arbitrary thickness is penetrated through a copper layer 1-3 and a resin layer 1-1 on the upper surface side by drilling, laser processing, or the like using an NC processing machine. First, counterbore processing is performed so that the copper layer 1-2 on the lower surface side is exposed to form an annular or rectangular cylindrical cavity 2 '. Of course, also in this embodiment, a single-sided copper-clad laminate having a copper layer only on the lower surface side may be used if counterboring is performed from the upper surface side.
[0027]
Also in the spot facing in this step, even if the thickness of the copper layer 1-2 varies due to the same reason as described above, there is no adverse effect, and high-precision control in the Z-axis direction (depth direction). Is not required.
[0028]
Next, as shown in FIG. 3B, the spot facing portion is filled with a metal 3 different from copper by plating, paste, or the like. After the filling, the copper plating layers 4-1 such as IVH are formed on both sides as usual. 4-2 is performed.
[0029]
Next, as shown in FIG. 3C, a desired circuit pattern 5 is formed by copper plating layers 4-1 and 4-2 (including copper layers 1-2 and 1-3) on both sides by a technique such as etching. -1, 5-2 are formed. Note that no circuit pattern is formed in the annular or rectangular metal 3 and in the region corresponding to the upper portion inside the metal 3.
[0030]
Next, as shown in FIG. 3D, after the insulating layers 6-2 and 6-1 are laminated on the upper and lower surfaces of the copper-clad laminate 1, via holes are formed at predetermined positions on both surfaces by laser processing or the like. 7 is formed.
[0031]
Subsequently, as shown in FIG. 3E, after performing copper plating on the insulating layers 6-1 and 6-2, desired circuit patterns 8-1 and 8-2 are formed by a technique such as etching. . Here, for convenience, the insulating layer and the circuit pattern are formed one by one on the upper and lower sides of the copper clad laminate 1, respectively, but two or more layers may be formed. Needless to say, no circuit pattern is formed in the metal 3 and the region corresponding to the upper portion inside the metal 3 in any case of one layer or two or more layers. In addition, when the spot facing is performed from the upper side as described above, only the insulating layer 6-1 may be formed on the lower surface side.
[0032]
Thereafter, referring to FIG. 3 (f), a second counterboring process is performed by drilling, laser processing, or the like so that the metal 3 and the upper surface inside the metal 3 are exposed through the insulating layer 6-1. 9 is formed. Here, the diameter of the cavity 9 is larger than the diameter of the cavity 2, but may be the same. Also, the second spot facing does not require high-precision control in the Z-axis direction (depth direction).
[0033]
As described above, it is possible to realize a desired mounting pad 11 ′ for mounting chip components without performing high-precision control in the Z-axis direction (depth direction) in the NC processing machine or the laser processing machine. Can be done.
[0034]
As described above, the present invention has been described with respect to the two embodiments, but the present invention is not limited to these two embodiments, and various modifications can be made. For example, a photosensitive resin may be filled in place of the metal 3 filled in the spot facing portion by the first spot facing process.
[0035]
【The invention's effect】
As described above, according to the manufacturing method of the present invention, a main portion of the cavity is formed by spot facing before forming a multilayer structure, and a metal different from copper for forming a circuit pattern is formed. By filling, a desired circuit pattern for mounting pad formation can be exposed even in a spot facing machine without special Z-axis control. In other words, the manufacturing method according to the present invention does not suffer from the adverse effects of variations in the interlayer thickness and conductor thickness in the multilayer printed wiring board. As a result, it is possible to prevent the occurrence of a failure in the electrical connection with the component.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a flow of a method of manufacturing a multilayer printed wiring board with a cavity according to a first embodiment of the present invention.
FIG. 2 is a sectional view sequentially showing the flow of the manufacturing method following FIG. 1;
FIG. 3 is a sectional view sequentially showing a flow of a method of manufacturing a multilayer printed wiring board with cavities according to a second embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Copper-clad laminated board 1-1 Resin layer 1-2, 1-3 Copper layer 2, 2 ', 9, 10 Cavity 3 Metal 4-1 and 4-2 Copper plating layers 5-1 and 5-2 and 8- 1, 8-2 circuit pattern 11, 11 'mounting pad

Claims (6)

A step of subjecting a conductor-clad laminate constituting a layer to be an inner layer in the multilayer printed wiring board to a first counterboring process such that the conductor is exposed through the resin layer;
Filling the spotted portion with a metal different from the conductor;
Applying a conductor plating on both sides of the conductor-clad laminate,
A step of forming a circuit pattern with conductor layers on both surfaces of the conductor-clad laminate,
Forming a laminate including at least one insulating layer on both sides of the conductor-clad laminate,
Performing a second counterboring process from the side of the laminated body on which the first counterboring process is performed to the filled metal to expose one surface of the filled metal. A method for manufacturing a multilayer printed wiring board with a cavity, which is characterized by the following. 2. The method according to claim 1, wherein the conductor is copper, and the metal is one of tin, solder, and nickel. 3. The method according to claim 1, further comprising, after exposing one surface of the metal, removing the filled metal by etching. . 3. The method according to claim 1, wherein a shape of the counterbore portion formed by the first counterbore processing is an annular shape or a rectangular tube shape. 4. The method according to any one of claims 1 to 4, wherein the first and second counterboring processes are performed by drilling or laser processing. In a method for manufacturing a multilayer printed wiring board with a cavity having a cavity for mounting a chip component,
A step of subjecting a copper-clad laminate constituting a base layer to a first counterbore process such that the copper layer is exposed through the resin layer before the multilayer structure is formed;
A step of filling the spotted portion with a metal different from copper,
A step of performing copper plating on both surfaces of the copper-clad laminate,
A step of forming a circuit pattern by a copper plating layer including the copper layer on both surfaces of the copper-clad laminate,
Forming a multilayer structure by forming at least one insulating layer and a circuit pattern on both sides of the copper-clad laminate,
A step of subjecting the filled metal to a second counterbore process from the upper surface side or the lower surface side of the copper-clad laminate to the filled metal to expose the upper surface or the lower surface of the filled metal,
Removing the filled metal by etching. A method of manufacturing a multilayer printed wiring board with cavities, the method comprising:

Images