JP2004297914A - Drive circuit of power-switching element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress surge voltage applied to a semiconductor switching element, using a simple circuit. <P>SOLUTION: The gate of the power switching element 11 of a voltage driven type is connected to a junction point between sources of a n-channel FET13 and a p-channel FET14. To the drain of the voltage driving type power switching element 11, one end of a Zener diode 19 for surge voltage absorption is connected, and the other end of the Zener diode 19 is connected to the gate of the p-channel FET14. If surge voltage exceeds a fixed value, the p-channel FET14 is turned off, and the charges of the gate of the voltage driven type power switching element 11 are discharged via a resistor 17. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power switching element drive circuit.
[0002]
[Prior art]
In a circuit that performs on / off control of a relatively large current, a surge voltage proportional to di / dt of the current flowing at that time is generated when the switching element is turned off. A circuit as shown in FIG. 2 is known as a drive circuit using a Zener diode for protecting a semiconductor switching element from such a surge voltage.
[0003]
In the circuit of FIG. 2, the drain D of the p-channel FET 22 and the drain D of the n-channel FET 23 are connected to the gate G of the voltage-driven switching element 21 constituting an inverter circuit and the like. A zener diode 24 is connected between the drain D and the gate G of the voltage-driven switching element 21 to absorb a surge voltage generated by an inductance component of the circuit.
[0004]
A resistor 25 is connected to the source of the p-channel FET 22, and a resistor 26 is connected to the source of the n-channel FET 23. The gate of the p-channel FET 22 and the gate of the n-channel FET 23 are connected to the output of the drive signal generation circuit 27.
[0005]
In the above-mentioned circuit, it is necessary to absorb all the surge voltage generated when the voltage-driven switching element 21 is turned off by the Zener diode 24, so that it is necessary to use the Zener diode 24 having a large allowable loss. For this reason, there is a problem that the external dimensions of the Zener diode 24 are increased and the cost of parts is also increased.
[0006]
Japanese Patent Application Laid-Open No. 6-291631 (Patent Document 1) discloses a circuit as shown in FIG. 3 as a drive circuit for suppressing a surge voltage.
In FIG. 3, the gate of a voltage-driven switching element (for example, IGBT) Q1 for current control is connected to a power supply Vcc via a first resistance means 31 and a switch 32, and is connected to a second resistance means 33. The switch 34 is connected to the ground side.
[0007]
The switches 32 and 34 are controlled by an output signal S output from the control circuit 35. When the output signal S is at a high level, the switch 32 is turned on, the switch 34 is turned off, and when the output signal S is at a low level, the switch 32 is turned off. Is turned off, and the switch 34 is turned on.
[0008]
The first resistance means 31 and the second resistance means 33 are circuits whose resistance values change according to the output of the voltage detection means 36 for detecting the collector voltage of the voltage-driven switching element Q1.
The drive circuit changes the values of the first resistance means 31 and the second resistance means 33 according to the collector voltage, and controls the charge and discharge speed of the gate of the voltage-driven switching element Q1. Di / dt at turn-on and at turn-off can be reduced.
[0009]
Japanese Patent Application Laid-Open No. 2001-45740 (Patent Document 2) discloses a driving circuit as shown in FIG.
In FIG. 4, a gate of a power semiconductor element (voltage-driven switching element) 41 is connected to a connection point between the resistances 43 and 44 of a MOSFET 42, a resistance 43, a resistance 44 and a MOSFET 45 connected in series. The positive power supply voltage VB is supplied to the drain of the MOSFET 42, the negative power supply voltage VSS is supplied to the source of the MOS 45, and the output signal of the level shift circuit 53 is supplied to the gates of the MOSFETs 42 and 45.
[0010]
The gate of the power semiconductor element 41 is connected to the drain of a MOSFET 47 via a resistor 46, and a pulse signal of a predetermined width is supplied to the gate of the MOSFET 47 from a monomultivibrator circuit (hereinafter, MMV circuit) 49 via a resistor 48. Is done. The gate of the MOSFET 47 is connected to the drain of the MOSFET 50.
[0011]
A voltage obtained by dividing the drain voltage of the power semiconductor element 41 by the resistors 51 and 52 is applied to the gate of the MOSFET 50.
In the above circuit, the circuit including the resistors 51, 52, and the MOSFET 50 is a circuit for detecting the drain voltage of the power semiconductor element 41, and the circuit including the resistor 46 and the MOSFET 47 transfers the gate charge of the power semiconductor element 41. This is a circuit for discharging.
[0012]
At the first time when the power semiconductor element 41 is turned off, the gate charge is discharged through a path passing through the resistor 44 and the MOSFET 45 and a path passing through the resistor 46 and the MOSFET 47. When the voltage between the drain and the source of the power semiconductor element 41 becomes equal to or higher than a predetermined value and the MOSFET 50 is turned on, the MOSFET 47 is turned off, and the gate charge of the power semiconductor element 41 is discharged via the resistor 44. As a result, the discharge current decreases and the turn-off time increases, so that di / dt of the current flowing through the power semiconductor element 41 can be reduced.
[0013]
[Patent Document 1]
JP-A-6-291631 (FIG. 1, paragraphs 0013 and 0014)
[0014]
[Patent Document 2]
JP-A-2001-45740 (FIG. 1, paragraphs 0021 to 0025)
[0015]
[Problems to be solved by the invention]
The surge voltage suppressing circuits described in Patent Documents 1 and 2 include a circuit for detecting a collector voltage or a drain voltage of a power semiconductor element of a main circuit, and a resistor for changing a discharge time constant when discharging a gate charge. Are required, and the configuration of the drive circuit becomes complicated, and the parts cost increases.
[0016]
An object of the present invention is to suppress a surge voltage applied to a semiconductor switching element with a simple circuit.
[0017]
[Means for Solving the Problems]
A drive circuit for a power switching element according to the present invention includes a first semiconductor element having first and second main current electrodes, and a second main current electrode and a third main electrode of the first semiconductor element. A second semiconductor element to which a current electrode is connected and a first resistor connected to a fourth main current electrode, wherein an input signal is input to control terminals of the first and second semiconductor elements; Power switching for supplying a drive signal to a control terminal of a power switching element from a connection point between the second main current electrode of the first semiconductor element and the third main current electrode of the second semiconductor element. A drive circuit for driving the element, wherein the input signal is supplied to a connection point between the first semiconductor element and the second semiconductor element via a second resistor, and a main current of the power switching element flows. A circuit with one end connected to the current electrode The other end of the voltage absorbing element, connected to the control terminal of the second semiconductor element.
[0018]
According to the present invention, at the start of the turn-off operation, the resistance value connected to the control terminal of the power switching element is reduced, and when a surge voltage exceeding a certain level occurs, for example, the second semiconductor element is turned off. Thus, the resistance value connected to the control terminal can be increased. Thus, the peak current of the surge voltage can be suppressed by reducing the current drawn from the control terminal of the power switching element at the time of turn-off and reducing the di / dt of the main current of the power switching element.
[0019]
In another drive circuit for a power switching element according to the present invention, a first voltage-driven semiconductor element is connected to a source of the first voltage-driven semiconductor element, and a first resistor is connected to a drain. A second voltage-driven semiconductor device, wherein an input signal is input to the gates of the first and second voltage-driven semiconductor devices, and a voltage is applied from the sources of the first and second voltage-driven semiconductor devices. A drive circuit for a power switching element for supplying a drive signal to a gate of the drive type power switching element, wherein the input signal is supplied to sources of the first and second voltage driven semiconductor elements via a second resistor. The other end of the surge voltage absorbing element, one end of which is connected to the drain of the voltage-driven power switching element, is connected to the gate of the second voltage-driven semiconductor element.
[0020]
According to the present invention, when a large surge voltage is generated, for example, the second voltage-driven semiconductor element is turned off by the surge voltage absorbing element, and the resistance value connected to the gate of the power switching element is changed. it can. That is, at the start of the turn-off operation, the resistance value connected to the gate of the power switching element is reduced, and when a surge voltage exceeding a certain level occurs, the resistance value connected to the gate is increased, so that the main resistance at the time of turn-off is reduced. The di / dt of the current can be reduced, and the peak value of the surge voltage can be suppressed.
[0021]
Further, an input signal may be directly input to the gate of the first voltage-driven semiconductor element, and an input signal may be input to the gate of the second voltage-driven semiconductor element via a resistor.
The first and second main current electrodes of the first semiconductor device according to the first aspect of the present invention correspond to, for example, the drain and source of the FET 13 in FIG. 1, and the third main electrode of the second semiconductor device. The current electrode corresponds to the source of the FET 14, and the fourth main current electrode corresponds to the drain of the FET 14. The connection point where the second main current electrode of the first semiconductor element is connected to the third main current electrode of the second semiconductor element corresponds to the connection point where the source of the FET 13 and the source of the FET 14 are connected. I do. Further, a resistor for supplying an input signal to a connection point between the first and second semiconductor elements corresponds to the resistor 17 in FIG.
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a drive circuit according to an embodiment of the present invention.
The drive circuit of the present embodiment is, for example, a drive circuit of a voltage-driven power switching element (IGBT, FET, etc.) 11 that constitutes an inverter circuit that converts a battery voltage of a battery forklift into an AC voltage.
[0023]
The resistor 12 is connected to the drain D of an n-channel voltage-driven semiconductor device (hereinafter, referred to as an n-channel FET) 13, and the source S of the n-channel FET 13 is a p-channel voltage-driven semiconductor device (hereinafter, referred to as a p-channel FET) 14 , And the drain D of the p-channel FET 1 is connected to the resistor 15. The other end of the resistor 12 is connected to the positive side of the drive power supply 16, and the other end of the resistor 15 is connected to the ground side.
[0024]
The gate G of the n-channel FET 13 is connected to the source S via the resistor 17, and the gate G of the p-channel FET 14 is connected to the source S via the resistors 18 and 17.
An input signal is input to the connection point between the gate of the n-channel FET 13 and the resistors 17 and 18, supplied to the gate of the p-channel FET 14 via the resistor 18, and connected to the n-channel FET 13 and the p-channel It is supplied to the connection point of the source of the FET 14.
[0025]
The gate of the voltage-driven power switching element 11 is connected to a connection point between the sources of the n-channel FET 13 and the p-channel FET 14. One end (cathode) of a zener diode (surge voltage absorbing element) 19 for absorbing surge voltage is connected to the drain of the voltage-driven power switching element 11, and the other end (anode) of the zener diode 19 is connected to the p-channel FET 14. Connected to the gate.
[0026]
Next, the operation of the driving circuit having the above configuration will be described. First, an operation when the voltage-driven power switching element 11 is turned on will be described.
When the rectangular wave input signal shown in FIG. 1 becomes a high level, the voltage VGS between the gate and the source of the n-channel FET 13 becomes forward-biased, so that the n-channel FET 13 is turned on. At this time, since a reverse bias is applied between the gate and the source of the p-channel FET 14, the FET 14 is turned off.
[0027]
Therefore, the drive voltage is supplied to the gate of the voltage-driven power switching element 11 from the drive power supply 16 via the FET 13 and the drive voltage via the resistor 17.
Next, an operation when the voltage-driven power switching element 11 is turned off will be described. When the rectangular wave input signal goes low, the gate and source of the n-channel FET 13 become reverse biased, and the n-channel FET 13 turns off. At this time, a forward bias is applied between the gate and the source of the p-channel FET 14, and the p-channel FET 14 is turned on.
[0028]
At the start of the turn-off operation of the voltage-driven power switching element 11, the charge on the gate is discharged via the resistor 17 and the resistor 15 connected to the drain of the p-channel FET.
When the voltage-driven power switching element 11 is turned off, a surge voltage proportional to the value of di / dt of the drain current at that time is generated. When the peak value of the surge voltage exceeds the Zener voltage of the Zener diode 19, a current flows through the Zener diode 19, a positive voltage is applied to the gate of the p-channel FET 14, and the p-channel FET 14 is turned off.
[0029]
When the p-channel FET 14 is turned off, the gate charge of the voltage-driven power switching element 11 is discharged only through the resistor 17, so that the discharge time, that is, the turn-off time becomes longer, and the di / dt of the drain current can be reduced. Thereby, the peak value of the surge voltage applied to the drain of the voltage-driven power switching element 11 is suppressed. As a result, the energy of the surge voltage that needs to be absorbed by the Zener diode 19 also decreases.
[0030]
Accordingly, the allowable power capacity of the Zener diode 19 that protects the voltage-driven power switching element 11 from surge voltage can be reduced, so that a small chip component that can be surface-mounted on a substrate can be used as the Zener diode 19.
[0031]
Further, a drive circuit for driving the voltage-driven power switching element 11 also includes two FETs 13 and 14, resistors 12, 15, 17, and 18, and a Zener diode 19 for protecting the power switching element from surge voltage. Therefore, a complicated voltage detection circuit and a resistor switching circuit are not required.
[0032]
The drive circuit of the power switching element of the present invention is not limited to the voltage-driven switching element described in the embodiment, but can be applied to a current-driven element such as a bipolar transistor, a GTO, and the like.
The surge voltage absorbing element is not limited to a Zener diode, and may be any element having a characteristic such that a current value changes when a certain voltage is exceeded.
[0033]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the drive circuit which can suppress the peak value of the surge voltage which generate | occur | produces when interrupting | blocking an electric current can be implement | achieved with the circuit of a simple structure. Further, by suppressing the peak value of the surge voltage, a surge voltage absorbing element having a small allowable power loss can be used, so that the surge voltage absorbing element can be downsized and the cost of parts can be reduced. Further, by reducing the power loss of the surge voltage absorbing element, a surface mount type surge voltage absorbing element can be used, so that the mounting space can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a drive circuit according to an embodiment.
FIG. 2 is a circuit diagram of a conventional driving circuit.
FIG. 3 is a circuit diagram of a conventional driving circuit.
FIG. 4 is a circuit diagram of a conventional driving circuit.
[Explanation of symbols]
11 Voltage-driven power switching element 13 n-channel FET
14 p-channel FET
12, 15, 17, 18 resistor 19 Zener diode

Claims (2)

A first semiconductor element having first and second main current electrodes through which a main current flows, and a second main current electrode and a third main current electrode of the first semiconductor element connected to each other; A second semiconductor element in which a first resistor is connected to a fourth main current electrode;
An input signal is input to the control terminals of the first and second semiconductor elements, and the second main current electrode of the first semiconductor element and the third main current electrode of the second semiconductor element are connected. A drive circuit of a power switching element that supplies a drive signal from a connection point to a control terminal of the power switching element,
Supplying the input signal to the connection point between the first semiconductor element and the second semiconductor element via a second resistor;
A drive circuit for a power switching element, wherein the other end of the surge voltage absorbing element having one end connected to an electrode of the power switching element through which a main current flows is connected to a control terminal of the second semiconductor element. A first voltage-driven semiconductor element, a second voltage-driven semiconductor element having a source connected to the source of the first voltage-driven semiconductor element and a drain connected to a first resistor,
An input signal is input to the gates of the first and second voltage-driven semiconductor devices, and a drive signal is supplied from the sources of the first and second voltage-driven semiconductor devices to the gate of the voltage-driven power switching device. A drive circuit for a power switching element,
Supplying the input signal to sources of the first and second voltage-driven semiconductor elements via a second resistor;
A drive circuit for a power switching element, wherein the other end of the surge voltage absorbing element having one end connected to the drain of the voltage-driven power switching element is connected to the gate of the second voltage-driven semiconductor element.

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