JP2004289174A - Semiconductor device and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a barrier metal having low resistance and high barrier characteristics. <P>SOLUTION: The barrier metal 20<SB>1</SB>is composed of a TaN<SB>0.87</SB>film 31, having a film thickness of 16nm, that is formed along the bottom surface of a wiring groove 16 and the top surface of a side wall, and a TaN<SB>1.19</SB>film 32, having a film thickness of 4nm that is adjacent to a Cu damascene wiring 17, formed by embedding it into the wiring groove 16. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device having a barrier metal that suppresses diffusion of elements constituting a metal wiring, and a method for manufacturing the same.

  Interdiffusion and reaction between the wiring layer metal and the diffusion layer Si at the contact, diffusion of the wiring layer metal into the interlayer insulating layer around the wiring, or interdiffusion when a metal different from the wiring layer is used for the via plug. In order to prevent a reaction, a barrier metal is formed on the bottom surface or the side upper surface of the wiring layer.

  The barrier metal must have a sufficient barrier property to suppress the diffusion and reaction of the wiring layer metal due to the heat history in the semiconductor device manufacturing process and the electric field and temperature during device operation. At the same time, the wiring must be formed thin so as not to increase the effective electric resistance of the wiring. In order not to increase the electrical resistance at the contact or via plug, it is necessary to use a barrier metal having low specific resistance and low electrical contact resistance. Further, it is necessary to have good adhesion to the interlayer insulating layer and the wiring layer.

  Conventionally, a barrier metal made of a single-layer metal nitride such as TiN or TaN has a good barrier property with respect to a conventional semiconductor device and sufficiently satisfies various required characteristics.

  However, as the thickness of the barrier metal used becomes thinner due to the improvement in the degree of integration of semiconductor devices and the miniaturization of elements, it has become increasingly difficult to obtain sufficient barrier properties. Further, since Cu has been used in the wiring layer for high-speed operation of the semiconductor device and high reliability of the wiring layer, sufficient Cu is required to prevent the diffusion of Cu that diffuses at high speed in the Si substrate and in the insulating layer. Barrier properties can no longer be obtained. Also, due to the high-speed operation of the device, the specific resistance and the electrical contact resistance allowed for the barrier metal have been reduced.

  However, the conventional barrier metal has a problem that sufficient barrier properties and electrical characteristics cannot be satisfied.

  Such imperfectness of the barrier property is particularly remarkable in non-aluminum-based metal wiring. This is because in an aluminum-based metal wiring, a thin oxide layer of aluminum functions as a very good and dense barrier film. This aluminum oxide layer is formed by spontaneous oxidation or the like, especially at the interface between the dissimilar metal and the aluminum alloy. Due to its small thickness, electric conduction can occur in the form of a tunnel current. On the other hand, copper, silver, gold and alloys thereof are low-resistance metal wiring materials exceeding aluminum, but the formation of the above-mentioned high-quality oxide layer cannot be expected. Therefore, it is necessary to actively form a high-performance barrier metal film.

  As described above, with the increase in the degree of integration of the semiconductor device, there is a problem that there is no barrier metal having a barrier property and an electrical property for the wiring layer metal.

  An object of the present invention is to provide a semiconductor device having a barrier metal having a high barrier property against a wiring layer metal and good electrical characteristics, and a method for manufacturing the same.

  The present invention is configured as described below to achieve the above object. The metal wiring in the following description includes a metal electrode such as a plug electrode.

(1) A semiconductor device according to the present invention is a semiconductor device including a barrier metal that suppresses diffusion of an element constituting a metal wiring, wherein the barrier metal includes α having at least one element selected from metal elements. , boron, carbon, and at least one element compound consisted it is a gamma were chosen film Arufaganma _x from nitrogen, the α and, with the additional element gamma, oxygen (O) with a compound composed from film Arufaganma _y O _z is laminated.

  Preferred embodiments of the semiconductor device described in (1) are described below.

  X is 0.2 or more.

The thickness of the compound film αβ _y O _z is 3 nm or less.

  Preferably, the metal element belongs to any one of the group IVB, VB or VIB.

(2) A method of manufacturing a semiconductor device of the present invention, on a substrate, a manufacturing method of a semiconductor device metal wiring is formed through a barrier metal, forming a compound film Arufaganma _x on said substrate Forming a compound film αγ _y O _z by oxidizing the surface of the compound film αγ _x , and forming the metal wiring on the compound film αγ _y O _z .

(3) A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device in which a metal wiring is formed on a base containing oxygen (O) via a barrier metal, wherein a metal element is formed on the base. Forming a compound film αγ _x composed of α at least one element selected from the group consisting of α and γ containing at least one of boron, carbon and nitrogen; and reducing the substrate by the compound film αγ _x Oxidizing the compound film αγ _x to form a compound film αγ _y O _z at the interface between the compound film αγ _x and the substrate, thereby forming the compound film αγ _x and the compound film It is characterized in that a barrier metal including a configuration in which αγ _y O _z is sequentially laminated is formed.

(4) In the method of manufacturing a semiconductor device according to the present invention, there is provided a step of forming a metal wiring containing oxygen (O), and forming, on the metal wiring, at least one element selected from metal elements, α, boron, carbon, forming a compound film Arufaganma _x, which is composed of a γ containing at least one of nitrogen, by performing reduction of the metal wiring by the compound film Arufaganma _x, by oxidizing the compound film Arufaganma _x, Forming a compound film αγ _y O _z at the interface between the compound film αγ _x and the metal wiring, wherein the barrier includes a structure in which the compound film αγ _x and the compound film αγ _y O _z are sequentially laminated. It is characterized by forming a metal.

And α at least one element selected from metal elements, boron, carbon, and at least one compound element is composed of a gamma chosen film Arufaganma _x from nitrogen, said α and gamma, oxygen (O) By laminating the compound film αγ _y O _z composed of the above, a barrier metal having low resistance and high barrier properties can be obtained.

  First, the background of the present invention will be described.

Conventionally, as a method of forming a metal compound film as a barrier metal for a wiring layer metal, generally, a sputtering method and a CVD method have been used. The most widely used is a reactive sputtering method in which a metal target is used and a film is formed while simultaneously flowing an Ar gas and a gas containing an additive element. According to the reactive sputtering method, for example, when forming a metal nitride film, a metal nitride film having various compositions can be formed by changing the flow rates of the Ar gas and the N ₂ gas. However, when the atomic ratio of nitrogen to the metal element approaches 1, simply increasing the flow rate of the N ₂ gas does not easily increase the nitrogen content in the film, and the atomic ratio of nitrogen to the metal element is small. However, it was difficult to form a metal nitride film exceeding 1.

Then, the present inventors, when using a Ta target, simultaneously supply the Ar gas and the N ₂ gas into the chamber and heat the substrate temperature to about 300 ° C. under the condition of forming a TaN _x film, It has been found that a TaN film having an atomic ratio of nitrogen to Ta exceeding 1 can be formed at a flow rate of a certain N ₂ gas or more.

When the barrier property against Cu of the TaN _x film was examined, as shown in FIG. 26, the barrier property was remarkably improved when the atomic ratio of nitrogen to Ta exceeded 1, and further improved when it exceeded 1.2. Was confirmed.

  It is presumed that the barrier property is improved because excess nitrogen contained in the TaN film promotes amorphization of the film and reduces high-speed diffusion paths such as crystal grain boundaries. According to the result of the X-ray diffraction measurement, in the case of a TaN film having an N / Ta ratio exceeding 1.2, no clear diffraction line of TaN was observed, and it is considered that the film was substantially amorphous.

However, the TaN _x (x> 1) film has a problem that the specific resistance is extremely high, and thus cannot be used as a barrier metal for Cu wiring.

Therefore, after further intensive studies, the present inventors have found that α comprises at least one element selected from metal elements and β comprises at least one element selected from boron, oxygen, carbon, and nitrogen. by multiple layers laminated was a compound film .alpha..beta _n which is found that the barrier metal having a low resistance and high barrier properties can be obtained.

In particular, a compound film αβ _x (x> 1) comprising α in which at least one element is selected from metal elements and β in which at least one element is selected from boron, oxygen, carbon, and nitrogen; And a compound film αβ _y (y ≦ 1) composed of β and β can reduce the via resistance and the wiring resistance while having high barrier properties. In addition, when the barrier metal is formed, the laminated film is formed by changing the mixing ratio of β, so that it can be formed in a short time, and the process becomes easy.

Further, when a compound film αβ _y (y ≦ 1) composed of α and β, the compound film αβ _x (x> 1), and the compound film αβ _y (y ≦ 1) are laminated. It is possible to provide a barrier metal having low via resistance, low wiring resistance, and high barrier properties.

Further, by a study different from the above-mentioned study by the present inventors, a compound composed of α in which at least one element is selected from metal elements and γ in which at least one element is selected from boron, carbon and nitrogen. a film Arufaganma _x, wherein the α and gamma, by laminating the oxygen (O) compounds is configured from a film αγ _y O _z, while maintaining a low resistance, the barrier metal having a high barrier property.

The compound film αγ _y O _z can be formed by oxidizing the exposed surface of the compound film αγ _x .

Further, after forming a compound film Arufaganma _x on a substrate or a metal wiring containing oxygen such as SiO _2, compound film by reducing the substrate or metal wiring by Arufaganma _x, compound film compound by oxidizing the Arufaganma _x film Arufaganma _y O _z can be formed.

  Embodiments of the present invention will be described below with reference to the drawings.

[First Embodiment]
FIG. 1 is a sectional view showing the configuration of the semiconductor device according to the first embodiment of the present invention.

A lower wiring 12 is formed in a first interlayer insulating film 11 made of SiO ₂ . A via hole 13 connected to the lower wiring 12 is formed in the first interlayer insulating film 11, and a W via plug 14 is buried in the via hole 13. On the first interlayer insulating film 11 and the W via plug 14, a second interlayer insulating film 15 made of SiO ₂ and having a thickness of 400 nm is formed. A wiring groove 16 connected to the W via plug 14 is formed in the second interlayer insulating film 15. Along the bottom and side walls of the wiring groove 16, a barrier metal 20 made of tantalum nitride and having a bottom film thickness of 20 nm and a side wall film thickness of about 1/4 of that is formed. The detailed configuration of the barrier metal 20 will be described later. Then, a Cu damascene wiring 17 is buried in the wiring groove 16.

The detailed configuration of the barrier metal 20 will be described. As shown in FIG. 2 (a) ~ (e) , a device having a barrier metal 20 ₁ to 20 ₅ which structure each consisting of different tantalum nitride to form respectively, a comparison of the characteristics was carried out later. The composition ratio of tantalum nitride was determined by performing RBS measurement after film formation. In FIG. 2, the main configuration of the barrier metal 20 centering on the bottom of the wiring groove 16 is shown, and illustration of the entire structure is omitted.

The barrier metal 20 ₁ of sample A shown in FIG. 2 (a), a TaN _0.87 film 31 on the bottom and 16nm thickness which is formed along the surface of the side wall of the wiring groove 16, is formed on the TaN _0.87 film on the Cu wiring And a TaN _1.19 film 32 having a thickness of 4 nm in contact with the film 17.

Moreover, the barrier metal 20 _second sample B shown in FIG. 2 (b), a TaN _1.19 film 33 formed along the surface of the bottom and side walls of the wiring trench 16 is formed on the TaN _1.19 film 33 Cu wiring 17 And a TaN _0.87 film 34 in contact with.

Figure 2 barrier metal 20 ₃ Sample C shown in (c), the TaN _0.87 film 35 formed along the surface of the bottom and side walls of the wiring trench 16, TaN _0.87 film 35 TaN _1.19 formed on film 36 And a TaN _0.87 film 37 formed on the TaN _1.19 film 36 and in contact with the Cu wiring 17.

The barrier metal 20 ₄ sample D shown in FIG. 2 (d), the wiring is formed along the bottom surface and sidewall surface of the groove 16, has been and is composed of TaN _0.87 film 38 of a single layer in contact with the Cu wiring 17.

The barrier metal 20 ₅ of the sample E shown in FIG. 2 (e), the wiring is formed along the bottom surface and sidewall surface of the groove 16, it has been and is composed of TaN _1.19 film 39 of a single layer in contact with the Cu wiring 17.

  Next, a method for manufacturing the device shown in FIG. 1 will be described. First, as shown in FIG. 3A, a via hole 13 having a lower wiring 12 therein and connected to the lower wiring 12 is formed in a first interlayer insulating film 11 formed by a plasma CVD method. Then, a W via plug 14 is buried in the via hole 13. The W via plug 14 is formed by depositing a W film on the entire surface so as to fill the via hole 13 and then removing the W film on the first interlayer insulating film 11 by using a CMP method or an etch back method. can do.

Next, as shown in FIG. 3B, a second interlayer insulating film 15 made of SiO ₂ and having a thickness of 400 nm is formed on the entire surface by a plasma CVD method. Then, after forming a resist pattern on the second interlayer insulating film 15 by using the photolithography technique, the wiring groove 16 is formed by etching the second interlayer insulating film 15 by the RIE method. It is removed by ashing.

Next, as shown in FIG. 3C, after the exposed W oxide on the surface of the W via plug 14 is removed by using an organic alkali solution, a long throw sputtering method is used.
A barrier metal 20 made of a Ta nitride film is formed along the bottom and side walls of the wiring groove 16 and the surface of the second interlayer insulating film 15. Note that an Ar gas and a N ₂ gas were simultaneously supplied into the reaction vessel, and a Ta target was sputtered at a substrate temperature of about 300 ° C., thereby forming a tantalum nitride film on the entire surface. The method of manufacturing the barrier metal 20 for each sample will be described later.

Then, as shown in FIG. 3 (d), using a long-throw sputtering method, after the film thickness on the barrier metal 20 on the second interlayer insulating film 15 was formed a Cu film 17 ₁ is 800nm , by reflowing the Cu and annealed at 450 ° C., embedding the Cu film 17 ₁ in the wiring groove 16. Next, a device having the Cu damascene wiring 17 whose bottom and side walls are surrounded by the barrier metal 20 shown in FIG. 1 is formed by removing excess Cu and the barrier metal by the CMP method.

Next, it describes the formation of 20 ₁ to 20 ₅ barrier metal TaN _0.87 film 31,34,35,37,38 and TaN _1.19 film 32,33,36,39. The TaN _0.87 films 31, 34, 35, 37, and 38 are formed by a long slow sputtering method using a Ta target at an Ar gas flow rate of 10 sccm, an N ₂ gas flow rate of 15 sccm, and a substrate temperature of about 300 ° C. Deposited by The TaN _1.19 films 32, 33, 36, and 39 are formed by a long-throw sputtering method using a Ta target, an Ar gas flow rate of 10 sccm, a N ₂ gas flow rate of 20 sccm, and a substrate temperature of about 300 ° C. Formed.

Note that, regarding the laminated structure of the samples A to C, the TaN _0.87 films 31, 34, 35, and 37 and the TaN _1.19 films 32, 33, and 33 were changed by changing the flow rate of the N ₂ gas without changing the flow rate of the Ar gas. 36 was continuously formed.

  Next, the results of evaluating the characteristics of the prepared samples A to E will be described. The wiring resistance of the Cu wiring 17 was measured by the four-terminal method, and the electric resistance of the via was measured by the Kelvin method. A sample having a structure in which the amorphous silicon 46, the barrier metal 20 and the Cu 47 are sequentially laminated as shown in FIG. 4 was annealed at 450 ° C. for 1 hour, and Cu diffused from the Cu 47 into the amorphous silicon film 46 through the barrier metal 20. The barrier property of the barrier metal 20 was evaluated based on the amount of Cu silicide (silicidation rate) generated by the above method.

The structure of FIG. 4 will be described in more detail. On a 100-nm-thick thermal oxide film 42 formed on a Si substrate 41, a 200-nm-thick silicon nitride film 43 deposited by a plasma CVD method is formed. A 400 nm-thick SiO ₂ film 44 is formed on the silicon nitride film 43 by a plasma CVD method. A groove 45 is formed in the SiO ₂ film 44 by using photolithography and RIE. Then, a 75 nm-thick amorphous silicon 46 deposited by a thermal CVD method is formed along the surface of the groove 45. On the amorphous silicon 46, the barrier metal 20 having the same configuration as the samples A to E described above is formed. Then, on the barrier metal 20, a Cu film 47 deposited by a long throw sputtering method is formed.

Table 1 shows the measurement results of the wiring resistance, the via resistance, and the silicidation ratio.

As can be seen from Table 1, the barrier metal 20 ₄ (sample D) composed of the TaN _0.87 single-layer film 38 having a small atomic ratio of N to Ta has a poor barrier property. On the other hand, the barrier metal 20 ₅ (sample E) composed of the TaN _1.19 single layer film 39 having a large atomic ratio of N to Ta has excellent barrier properties, but has high via resistance and high wiring resistance.

However, Sample A having a TaN _0.87 film 31 and the TaN _1.19 film 32 and the barrier metal 20 ₁ which are laminated in contact with the Cu wiring 17 in contact with the bottom surface and formed along the side wall W via plug 14 of the wiring trench 16, the barrier The via resistance can be kept low while maintaining the performance. This is presumably because a phenomenon in which the surface of the W via plug 14 was nitrided during the deposition of the TaN _1.19 film 32 and the electrical contact resistance increased was prevented.

Further, TaN _1.19 film 33 and the TaN _1.19 film 33 is formed on contact with the Cu wiring 17 TaN _0.87 film 34 and the barrier metal 20 which are stacked in contact with the bottom and W via plug 14 is formed along the side wall of the wiring trench 16 _In Sample B having ₂ , the wiring resistance can be suppressed to be low while maintaining the barrier property. This is presumably because the phenomenon that voids remain in the Cu wiring due to insufficient reflow properties of Cu on the TaN _0.87 film was improved.

Further, the TaN _0.87 film 35 formed along the bottom and side walls of the wiring groove 16 and in contact with the W via plug 14, the TaN _1.19 film 36 formed on the TaN _0.87 film 35, and the TaN _1.19 film 36 are formed. sample C has a barrier metal 20 ₃ composed of a TaN _0.87 film in contact with the Cu wiring, while maintaining the barrier properties, and can be kept low both via resistance and the wiring resistance.

As described above, by laminating the TaN _0.87 film and the TaN _1.19 film, a barrier metal having low resistance and high barrier properties can be obtained. Further, when a three-layer structure of the TaN _0.87 film, the TaN _1.19 film, and the TaN _0.87 film is used, low via resistance, low wiring resistance, and high barrier properties can be obtained.

Note that the barrier metal is not limited to the above-described composition, and the above-described effect can be obtained if a barrier metal is formed by stacking a plurality of TaN _x (x> 1) films and TaN _y (y ≦ 1). In the case of a three-layer structure, the upper layer and the lower layer do not have to have the same composition.

In the present embodiment, the method of forming the stacked barrier metal by continuously changing the flow rate of the N ₂ gas by the long throw sputtering method has been described. However, when the film is formed by a normal long-throw sputtering method, as shown in FIG. 5, the barrier metal 20 has a thinner bottom portion at the side surface of the wiring groove 16 and a thicker film at the center portion of the bottom surface. May occur. If the film thickness of the barrier metal 20 is not optimized, there arises a problem that the wiring resistance increases.

Furthermore, when the barrier metal is deposited in the wiring groove by the normal long-throw sputtering method, the growth direction of the barrier metal 20 from the side surface and the upper surface of the wiring groove 16 is different as shown in FIG. In addition, an acute step occurs in the barrier metal 20 at the opening of the wiring groove 16. When deposited by long-throw sputtering method with Cu such deposited shape was a barrier on the metal, as shown in FIG. 6 (b), areas where the Cu film 17 ₁ is not formed is generated. Doing reflow of the Cu film 17 ₁ in this state, the diffusion path of the Cu film 17 ₁ is disrupted. Therefore, not be Cu film 17 ₁ is flowing into the wiring groove 16, as shown in FIG. 6 (c), a void 25 is generated in the wiring trench 16.

  Therefore, a substrate bias was applied in order to suppress voids in the subsequent Cu reflow process, optimize the thickness of the barrier metal on the side and bottom surfaces of the wiring groove to lower the resistance of the wiring, and effectively improve the barrier property. A long throw sputtering method may be used.

In the long slow sputtering method in which a substrate bias is applied, Ar ⁺ ions collide with the substrate, and the barrier metal is physically etched simultaneously with the formation of the barrier metal.

  If the etching is performed simultaneously with the film formation, as shown in FIG. 7, the overhang portion of the barrier metal 20 generated in the opening of the wiring groove 16 is etched, and the opening of the wiring groove 16 is not narrowed. As a result, the probability of incidence of sputtered particles into the wiring groove 16 increases, and the barrier metal 20 in the etched overhang portion re-adheres to the side surface of the wiring groove 16 and is formed especially by the long throw sputtering method. It is possible to increase the thickness of the barrier metal 20 on the side surface of the wiring groove 16 which is difficult.

On the other hand, the barrier metal on the bottom surface of the wiring groove 16 is also etched by Ar ⁺ ions, and the film thickness at the bottom center of the wiring groove 16 is not increased more than necessary, so that the wiring resistance is not increased. Further, the barrier metal 20 etched from the bottom surface of the wiring groove 16 is re-attached to the bottom of the side surface of the wiring groove 16 and effectively increases the thickness of the barrier metal 20 at the bottom of the side surface of the wiring groove 16 which is easily thinned. be able to.

As described above, when the barrier metal is formed by using the long-throw sputtering method with the substrate bias applied, as shown in FIG. Since the barrier metal 20 is etched, there is no sharp step. Accordingly, as shown in FIG. 8 (b), even by forming a Cu film 17 ₁ by long-throw sputtering method, it does not occur disconnection in the Cu film 17 _1. Therefore, even if the reflow process after this, the Cu film 17 ₁ may be flowing in the wiring groove 16, as shown in FIG. 8 (c), to completely fill the Cu film 17 ₁ in the wiring groove 16 be able to.

However, in the long slow sputtering method in which a substrate bias is applied, Ar ⁺ ions may be taken into the barrier metal film, and the quality of the film may be deteriorated. Therefore, in order to eliminate an acute step in the opening of the wiring groove, the following method can be used. In the following, a description will be given using a configuration in which a TaN _y1 (y1 ≦ 1) film, a TaN _x (x> 1) film, and a TaN _y2 (y2 ≦ 1) film are stacked as barrier metals.

First, a TaN _y1 (y1 ≦ 1) film is formed by a long throw sputtering method to which a substrate bias is applied, and then TaN _x (x> 1) having a high barrier property is formed by a long throw sputtering method to which a substrate bias is not applied. A) A film is formed, and a TaN _y2 (y2 ≦ 1) film is formed by a long throw sputtering method to which a substrate bias is applied.

Incidentally, when forming the _{TaN x (x> 1) TaN} y2 (y2 ≦ 1) on the membrane layer, by the substrate bias is applied, in the initial stage of the film formation, TaN _{x (x>} 1) film Is likely to be re-sputtered, and Ar ⁺ ions may be mixed into the TaN _x (x> 1) film. Therefore, in the film formation initial stage of TaN _{y2 (y2} ≦ 1) layer, deposited without applying a substrate bias, TaN _{x (x>} 1) to some extent on the membrane TaN _{y2 (y2} ≦ 1) layer is formed by forming a film by applying a substrate bias from being, TaN _x (x> 1) re-sputtering of the film, and TaN _x (x> 1) to suppress the contamination of the Ar ⁺ ions into the film it can.

Further, when forming the TaN _y1 (y1 ≦ 1) film under the TaN _x (x> 1) film, when the thickness of the TaN _y1 (y1 ≦ 1) film becomes close to a predetermined film thickness, the substrate bias is applied. stopped to improve the quality of TaN _{y1 (y1} ≦ 1) layer, film quality good _{TaN y1 (y1 ≦ 1) TaN} x (x> 1) on the film may be film is formed.

By performing such continuous film formation, a barrier metal film formation shape that does not generate voids during Cu reflow can be obtained, and its barrier property can be formed by a long slow sputtering method without applying a substrate bias. TaN _x (x> 1) film. Further, the thickness of the side surface of the wiring groove can be increased without increasing the thickness of the barrier film on the bottom surface of the wiring groove, and the wiring resistance can be reduced.

Further, TaN _{y (y} ≦ 1) layer and the TaN _{x (x>} 1) when the barrier metal having a two-layer structure and is laminated films, barrier property not want to degrade the high quality TaN _{x (x>} 1) When forming a film, the film is formed by a long throw sputtering method without applying a substrate bias, and when forming a TaN _y (y ≦ 1) film, a long slow sputtering method applying a substrate bias is performed. The film is formed by the method.

[Second embodiment]
In the present embodiment, a sample having a barrier metal other than the tantalum nitride film was prepared and evaluated. In the present embodiment, since the configuration is the same as that of the semiconductor device shown in FIG. 1, only the structure of the barrier metal centering on the wiring groove is shown, and illustration of the entire structure is omitted. However, in this embodiment, an Al via plug is used instead of the W via plug, and the aluminum oxide on the surface of the Al via plug is removed by sputtering etching.

The configuration of each barrier metal will be described with reference to the cross-sectional view of FIG. The first sample, as shown in FIG. 9 (a), the thickness 16nm of the barrier metal 20 ₆ consisting of two layers laminated film of different compositions niobium nitride is formed. Niobium nitride was deposited by long-throw sputter, using an Nb target, simultaneously flowing Ar gas and N ₂ gas, and forming a film at a substrate temperature of about 300 ° C. The NbN _0.44 film 51 is deposited as a first niobium nitride film having a thickness of 16 nm with an Ar gas flow rate of 10 sccm and an N ₂ gas flow rate of 8 sccm. increase the flow rate of N ₂ gas without changing a thickness second layer niobium nitride is 4nm performing deposition of (NbN _x) film 52 was formed a barrier metal 20 _6. The NbN _x film 52 having various compositions was formed by changing the flow rate of the N ₂ gas during the deposition of the NbN _x film 52. The composition ratio of the niobium nitride film was identified by RBS measurement.

The next sample, as shown in FIG. 9 (b), the barrier metal 20 ₇ composition comprising two layers laminated films of different tantalum oxynitride is formed. The tantalum oxynitride film was deposited by using a long-throw sputtering method, using a TaN target, simultaneously flowing Ar gas and N ₂ gas and flowing a small amount of O ₂ gas, and setting the substrate temperature to about 300 ° C. C. to form a film. Then, after flowing Ar gas and N ₂ gas to deposit a first tantalum oxynitride (Ta (O, N) _x ) film 53 having a thickness of 2 nm, the flow rate of Ar gas is changed. reduce the flow rate of N ₂ gas without thickness is deposited TaO _0.1 N _0.65 film 54 as a second layer of tantalum nitride film is 18 nm, and the barrier metal 20 ₇ formed. Incidentally, Ta (O, N) at the time of deposition of _x film 53 by varying the flow rate of N ₂ gas, to form a Ta (O, N) _x film 53 having the various compositions. The composition ratio of the tantalum oxynitride film was identified by RBS measurement.

At the end of the sample, as shown in FIG. 9 (c), the barrier metal 20 ₈ composition comprising three-layer laminated films of different titanium carbide film is formed. The titanium carbide (TiC _x ) film was deposited by plasma CVD using a TiCl ₄ gas, a CH ₄ gas, and an H ₂ gas, and heating the substrate to 450 ° C. to form the film. An 8 nm-thick TiC _0.83 film 55 is formed as a first-layer titanium carbide film, and then only the flow rate of CH ₄ gas is increased to form a 4 nm-thick second-layer titanium carbide (TiC _x ) film 56. After the formation, the flow rate of the CH ₄ gas is returned to the value at the time of the formation of the first titanium carbide film, and the 8 nm-thick TiC _0.83 film 57 is formed as the third titanium carbide film. the barrier metal 20 ₈ of a three-layer structure was formed manner. During the deposition of the TiC _x film 56, the flow rate of the CH ₄ gas was changed to form the TiC _x films 56 having various compositions. The composition ratio of the titanium carbide film was identified by RBS measurement.

  Then, the same structure as in FIG. 4 was formed on the barrier metal of each sample, and the barrier property was evaluated by measuring the silicidation rate. The above-mentioned sample is formed by changing the composition ratio of nitrogen, nitrogen and oxygen, or carbon (light element) to niobium, tantalum, or titanium (metal element). The silicidation ratio was measured by changing the composition ratio of the light element. FIG. 10 shows the measurement results of the silicidation ratio. FIG. 10 is a characteristic diagram showing the dependency of the silicidation ratio on the composition ratio of the light element to the metal element.

Barrier of the barrier metal 20 ₆ consisting of two layers laminated film of niobium nitride film shown in FIG. 9 (a), the atomic ratio of nitrogen to niobium second layer NbN _x film 52 is 1.0 Beyond that, it improved significantly. Further, it has been found that when the atomic ratio exceeds 1.2, the barrier properties are dramatically improved. This improvement in barrier properties is presumed to be due to the fact that excess nitrogen contained in the second layer of the NbN _x film 52 promotes amorphization of the film and reduces high-speed diffusion paths such as crystal grain boundaries. Is done. According to the result of the X-ray diffraction measurement, in the case of the NbN _x film 52 in which the atomic ratio of nitrogen to niobium exceeds 1.2, no clear diffraction line of NbN was observed, and the film was amorphous. it is conceivable that.

Similarly, the barrier of the barrier metal 20 ₇ consisting of two-layered film of tantalum nitride oxide film shown in FIG. 9 (b), the first layer of Ta (O, N) of oxygen and nitrogen to tantalum _x When the total number of atoms exceeds 1.0, the value is remarkably improved, and when the total number exceeds 1.2, the value is further drastically improved.

Further, barrier properties of the barrier metal 20 ₈ consisting of three-layer film of a titanium carbide film shown in FIG. 9 (c) also, the atomic ratio of carbon to titanium of the second layer of TiC _x film 56 is 1.0 When the ratio exceeded 1.2, the tendency was remarkably improved.

As described above, a film in which x is greater than 1 as NbN _x , Ta (O, N) _x and TiC _x and a film in which y is 1 or less as NbN _y , Ta (O, N) _y and TiC _y are laminated. By doing so, an insulating film with high barrier properties can be provided.

  In addition, it was confirmed that the use of a film having x of 1.2 or more had higher barrier properties. Further, it was confirmed that when a film in which x was 1.2 or more and a film in which y was 0.9 or less were laminated, a barrier metal having high barrier properties and low resistance was obtained.

[Third embodiment]
FIG. 11 is a cross-sectional view illustrating a configuration of a semiconductor device according to the third embodiment of the present invention. A lower Cu damascene wiring 62 is formed in an interlayer insulating film 61 made of SiO ₂ . A via hole 63 connected to the Cu damascene wiring 62 is formed in the interlayer insulating film 61, and a wiring groove 64 connected to the via hole 63 is formed in the interlayer insulating film 61. A barrier metal 65 is formed along the bottom surface and the side wall of the via hole 63 and the side wall and the bottom surface of the wiring groove 64 (not shown in FIG. 11). The detailed structure of the barrier metal will be described later. Then, a Cu dual damascene wiring 66 is buried in the via hole 63 and the wiring groove 64.

  The detailed structure of the barrier metal will be described. As shown in FIGS. 12A to 12C, semiconductor devices each having three different types of barrier metals were formed, and characteristics were compared later.

The first sample, as shown in FIG. 12 (a), the composition is a two-layer laminated films of different tungsten nitride film, a barrier metal 65 ₁ film thickness of 10nm is formed. The tungsten nitride film was formed by MOCVD using a source gas and an N ₂ gas at the same time as an Ar gas as a carrier gas, and heating the substrate to about 450 ° C.

More specifically, after depositing the first-layer tungsten nitride (WN _x ) film 71, the flow rate of the N ₂ gas was reduced, and the second-layer tungsten nitride film WN _0.91 film 72 was deposited. . When depositing the first tungsten nitride film, the flow rate of the N ₂ gas was changed to form a WN _1.08 film or a WN _1.23 film as the first tungsten nitride film. Then, the total thickness of the WN _x film 71 and the WN _0.91 film 72 was set to 10 nm to form stacked films having various thickness ratios. The composition of the tungsten nitride film was identified by RBS measurement.

The next sample, as shown in FIG. 12 (b), the composition is a two-layer laminated films of different tantalum carbonitride film, the barrier metal 65 ₂ having a thickness of 10nm is formed. The tantalum carbonitride film is formed by MOCVD using a source gas of the tantalum carbonitride film and an Ar gas which is a carrier gas, and simultaneously flowing NH ₃ gas and heating the substrate to about 450 ° C. A film was formed.

More specifically, after a TaC _0.45 N _0.42 film 73 is deposited as a first layer of a tantalum carbonitride film, the flow rate of NH ₃ gas is increased, and a second layer of tungsten carbonitride (TaC _x N _y ) is formed. Film 74 was deposited. Incidentally, during the deposition of the second layer of tantalum carbonitride film 74, by changing the flow rate of the NH ₃ gas, a TaC _0.44 N _0.63 film or TaC _0.43 N _0.81 layer as the second layer of tantalum carbonitride film did. Then, the total thickness of the first and second layers of the tantalum carbonitride film was set to 10 nm to form laminated films having various thickness ratios. The composition of the tungsten carbonitride film was identified by RBS measurement.

At the end of the sample, as shown in FIG. 12 (c), the composition is a three-layer laminated film of different titanium boride nitride film, a film thickness of the barrier metal 65 ₃ are formed is 10 nm. Using a MOCVD method to form the titanium-boron nitride film, a B ₂ H ₆ gas is simultaneously flowed in addition to the source gas of the titanium-boron nitride film and the Ar gas as its carrier gas, and the substrate is heated to about 450 ° C. The film was formed by heating.

More specifically, after a TiB _0.05 N _0.81 film 75 is deposited as a first titanium _boronitride film, the flow rate of B ₂ H ₆ gas is increased to increase the second titanium boronitride film 76. Is deposited, the flow rate of the B ₂ H ₆ gas is returned to the value at the time of the deposition of the first layer of titanium boronitride film, and TiB _0.05 N _0.81 77 is used as the third layer of titanium boronitride film. The three-layer structure was continuously formed by deposition.

During the deposition of the second layer of titanium / boron nitride film, a TiB _0.32 N _0.78 film or a TaC _0.53 N _0.76 film was formed by changing the flow rate of the B ₂ H ₆ gas. Then, while matching the thickness of the barrier metal 66 _3, and by changing the film thickness to form a laminated film of various thickness ratios. The composition of the titanium-boron nitride film was identified by RBS measurement.

A method for manufacturing the present apparatus will be briefly described. First, as shown in FIG. 13A, a Cu damascene wiring 62 having a lower Cu damascene wiring 62 is formed on the interlayer insulating film 61 formed by the plasma CVD method by combining photolithography and RIE. A connecting via hole 63 is formed. Next, as shown in FIG. 13B, a wiring groove 64 connected to the via hole is formed in the interlayer insulating film 61 by combining photolithography and RIE. Next, as shown in FIG. 13C, the above-described method is performed along the bottom surface and the side wall of the via hole 63, the side wall and the bottom surface of the wiring groove 64 (not visible in FIG. 13), and the surface of the interlayer insulating film 61. Is used to form each barrier metal 65. Then, as shown in FIG. 13 (d), by depositing a Cu film 66 ₁ by MOCVD over the entire surface to fill the Cu film 66 ₁ at the same time via hole 63 and the wiring trench 64. Then, by removing the unnecessary Cu film 66 ₁ and the barrier metal 65 and a CMP method to form a Cu dual damascene wiring 66 surrounded a bottom surface and side walls with a barrier metal 65 shown in FIG. 11.

Next, FIG. 14 shows the result of measuring the open yield of the Cu dual damascene wiring 66 of the present apparatus. In FIG. 14, the vertical axis represents the open yield, and the horizontal axis represents the ratio of the film thickness t of the compound layer having the largest atomic ratio of the sum of the added elements to the metal elements of the laminated film to the total film thickness T. The compound layer having the largest atomic ratio of the sum total of the added elements to the metal elements in the laminated film is defined as the first-layer tungsten nitride film (WN _1.08 , WN _1.23 ) 71 and the second-layer tantalum carbonitride. The material film (TaC _0.44 N _0.63 , TaC _0.43 N _0.81 ) 74 or the second-layer titanium boronitride film (TiB _0.32 N _0.78 , TaC _0.53 N _0.76 ) 76. The main cause of the open failure was peeling of the barrier metal film in the CMP process.

WN _1.23 / WN _0.91 , TaC _0.45 N _0.42 / TaC _0.43 N _0.81 , TiB _0.05 N _0.81 / TiB _0.53 N _0.76 where x of the compound layer in which the total atomic number ratio x of the additive element to the metal element is the largest is 1.2 or more. In the case of / TiB _0.05 N _0.81 , when t / T becomes 0.1 or less, the open yield is remarkably improved.

WN _1.08 / WN _0.91 , TaC _0.45 N _0.42 / TaC _0.44 N _{0.63 wherein} x of the compound layer in which the atomic ratio x of the total of the added elements to the metal elements is the largest is larger than 1.0 and smaller than 1.2. , TiB _0.05 N _0.81 / TiB _0.32 N _0.78 / TiB _0.05 N _0.81 , the open yield is significantly improved when t / T is 0.3 or less.

  The improvement in open yield was caused by the dependence of open yield on film thickness ratio due to the existence of a critical film thickness ratio at which a metal compound film having a small x can support a metal compound film which is mechanically fragile and has a large x. It is supposed to be.

  As described above, the thickness t of the compound layer in which the atomic ratio of the total sum of the added elements to the metal elements in the laminated film of the barrier metal in contact with the via plug is the largest is defined as the total thickness T of the other barrier metal layers. On the other hand, by setting t / T ≦ 0.3, the mechanical strength of the barrier metal is improved, and the open yield can be improved.

[Fourth embodiment]
In the present embodiment, a sample having a barrier metal other than the tantalum nitride film was prepared and evaluated. In the present embodiment, since the configuration is the same as that of the semiconductor device shown in FIG. 11, only the main structure of the barrier metal centering on the via hole is shown in FIG. 15, and the entire structure is not shown. I do. In FIG. 15, the same portions as those in FIG. 12 are denoted by the same reference numerals, and description thereof will be omitted.

The configuration of each barrier metal will be described with reference to the cross-sectional view of FIG. The first sample, as shown in FIG. 15 (a), a barrier metal 65 ₄ composition comprising two layers laminated films of different hafnium nitride film is formed. The hafnium nitride film was deposited by a long-throw sputtering method, using an Hf target, simultaneously flowing Ar gas and N ₂ gas as a sputtering gas, and forming the film at a substrate temperature of about 300 ° C.

After the HfN _0.75 film was deposited, N ₂ gas and H ₂ gas were simultaneously flowed to perform plasma nitriding of the HfN _0.75 film, thereby forming an HfN _x film 81 as a first hafnium nitride film. . Thereafter, a second layer of hafnium nitride film was deposited under the same conditions as described above, and an HfN _0.75 film 82 having a thickness of 10 nm at the bottom of the wiring groove was formed. That is, by changing the plasma nitriding process for the first layer of hafnium nitride film were formed two barrier metal 65 ₄ having a HfN _1.15 or HfN _1.26 as the first layer of HfN _x film 81. The composition was identified by XPS. Then, a first layer having a different thickness of the hafnium nitride film was formed.

The next sample, as shown in FIG. 15 (b), the barrier metal 65 ₅ composition consists of two layers laminated films of different tantalum carbide film is formed. The tantalum carbide film was deposited by using a long-throw sputtering method, using a TaC target, simultaneously flowing Ar gas and CH ₄ gas as a sputtering gas, and forming the film at a substrate temperature of about 300 ° C. .

After deposition of TaC _0.82 film 83 as a first layer of tantalum carbide film, by performing the deposition of the second layer of tantalum carbide film 84 by increasing the flow rate of CH ₄ gas, a barrier metal 65 ₅ did. Incidentally, in forming the second layer of tantalum carbide film 84, CH ₄ by varying the flow rate of the gas, and two types of barrier metal 65 ₅ formed with a TaC _1.13 or TaC _1.21 film. The composition was identified by XPS measurement. Then, various barrier metals in which the thickness of the second layer tantalum carbide film 84 was changed were formed.

At the end of the sample, as shown in FIG. 15 (c), a barrier metal 65 ₆ consisting of three-layer film of zirconium nitride film and zirconia oxycarbonitride film is formed. The zirconia nitride film was deposited by using a long-throw sputtering method, using a Zr target, simultaneously flowing Ar gas and N ₂ gas as sputtering gases, and setting the substrate temperature to about 300 ° C.

After depositing a ZrN _0.93 film 85 as a first zirconia nitride film with a thickness of more than 5 nm as a first layer, O ₂ is deposited so that the remaining film of the first ZrN _0.93 film 85 is 5 nm at the bottom of the wiring groove 64. By performing a plasma treatment, a second-layer zirconia oxynitride film 86 is formed on the surface of the first-layer ZrN _0.93 film 85. Then, a ZrN _0.93 film 87 having a thickness of 5 nm was deposited as a third zirconia nitride film under the same conditions as those of the first layer. Incidentally, in forming the second layer of zirconia oxynitride film 86, by changing the condition of the O ₂ plasma treatment to form two types of barrier metal 65 ₆ having a ZrO _0.23 N _0.93 or ZrO _0.35 N _0.91 . The composition was identified by XPS measurement. Then, to form a variety of barrier metal 65 ₆ for changing the thickness of the second layer of zirconia nitroxide film 86.

Next, the result of measuring the via resistance of the Cu damascene wiring of the present apparatus is shown in FIG. In FIG. 16, the vertical axis represents the via resistance, and the horizontal axis represents the thickness t of the compound layer having the largest total atomic number ratio x of the additive element to the metal element. Note that the compound layer having the largest atomic ratio x of the total sum of the added elements to the metal elements is defined as the first layer of the hafnium nitride film (HfN _1.15 , HfN _1.26 ) 81 and the second layer of the tantalum carbide film. (TaC _1.13 , TaC _1.21 ) 84 or the second layer zirconia oxynitride film (ZrO _0.23 N _0.93 , ZrO _0.35 N _0.91 ) 86.

In the compound layer where the atomic ratio x of the total sum of the added elements to the metal elements is the largest, x is 1.2 or more, HfN _1.26 / HfN _0.75 , TaC _0.82 / TaC _1.21 , ZrN _0.93 / ZrO _0.35 N _0.91 / ZrN _0.93 When the film thickness t becomes 5 nm or less, the via resistance is significantly reduced.

Further, x of the compound layer having the largest atomic ratio x of the total of the additional elements to the metal elements is larger than 1.0 and smaller than 1.2, and HfN _1.15 / HfN _0.75 , TaC _0.82 / TaC _1.13 , ZrN _0.93 / In ZrO _0.23 N _0.91 / ZrN _0.93 , when the film thickness t becomes 10 nm or less, the via resistance is significantly reduced.

  The cause of the decrease in via resistance is not clear, but by analogy with the fact that current flows due to the tunnel effect when the thickness of the insulator becomes several nm or less, some conduction mechanism peculiar to the thin film functions below a certain thickness. It is presumed that the current easily flows.

  As described above, when the thickness of the compound layer having the largest total atomic number ratio x of the additive element to the metal element in the compound layer film constituting the barrier metal is set to 10 nm or less, the via resistance may be reduced. it can.

[Fifth Embodiment]
FIG. 17 is a sectional view illustrating a configuration of a semiconductor device according to a fifth embodiment of the present invention. In FIG. 17, the same portions as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

The feature of this embodiment is that a TaN _x (x> 0.2) film 131 formed along the side wall and bottom surface of the wiring groove 16 as a barrier metal, and a TaN _y O _z film 132 in contact with the Cu damascene wiring. That is, a laminated film is formed.

  The manufacturing process of the present device will be described with reference to the process sectional view of FIG. Except for the manufacturing process of the barrier metal of the present device, the process is the same as the manufacturing process of the device shown in FIG. 1 (FIG. 3), so only the processes related to the manufacturing process of the barrier metal are shown. In the region including the bottom of the wiring groove.

First, as shown in FIG. 18A, a wiring groove 16 connected to the W via plug 14 is formed in the second interlayer insulating film 15. Next, as shown in FIG. 18B, a TaN _x film 131 is formed on the entire surface by using a long throw sputtering method. Next, by exposing to the atmosphere for 5 minutes, a TaN _y O _z film 132 is formed on the surface of the TaN _x film 131. Then, after Cu is formed on the entire surface, the Cu film, the TaN _x film 131 and the TaN _y O _z film 132 on the second interlayer insulating film are removed by a CMP method or the like, and the Cu damascene wiring 17 is formed.

Further, a sample having an amorphous silicon 154, TaN _x film 155, TaN _y O _z layer 156 and the Cu film 157 are sequentially stacked as shown in FIG. 19 for 4 hours annealing at 450 ° C., amorphous through the barrier metal The barrier property of the barrier metal of this device was evaluated based on the amount of generated Cu ₃ Si (Cu silicide) (silicidation ratio) generated by Cu diffused in the silicon film 154. The adhesion of the Cu film to the base was evaluated by a tape test after the Cu film formation.

The structure of the sample shown in FIG. 19 will be described. A 100-nm-thick silicon nitride film 153 deposited by a low-pressure CVD method is formed on a 100-nm-thick thermal oxide film 152 formed on a Si substrate 151. An amorphous silicon film 154 is formed on the silicon nitride film 153. Then, a TaN _x film 155 is formed on the amorphous silicon 154, and a TaN _y O _z film 156 is formed on the surface of the TaN _x film 155. In addition, a Cu film 157 is formed on the TaN _y O _z film 156.

The TaN _y O _z film 156 is formed by sputtering a Ta target in a N ₂ gas and an Ar gas at a substrate temperature of about 300 ° C. to form a TaN _x film 155 and then exposing the film to the atmosphere for 5 minutes. Formed. Also, after changing the flow rates of the Ar gas and the N ₂ gas, TaN _x films 155 having various compositions were formed, and then oxidation treatment was performed to form various TaN _y O _z films 156.

Table 2 shows the results of evaluating the silicidation ratio and the adhesion. The composition of the TaN _x film was identified by RBS measurement, and the composition of the oxide layer formed on the TaN _x surface was identified by XPS measurement.

As can be seen from the results, the oxide layer formed on the surface having a composition of TaN _0.2 or more can improve the barrier property against Cu diffusion of the TaN _x film, and also has improved adhesion. Further, the surface oxide layer becomes hard to be formed with increasing nitrogen concentration in the TaN _x film. It can be seen that the TaN _1.4 film achieves good barrier properties and adhesion even when the surface oxide layer is hardly formed.

Using a TaN _0.3 film, the time of exposure to the air was changed to 0, 5, 10, and 20 minutes, and the thickness of the formed TaN _0.3 O _1.0 was changed to form a Cu / TaN _0.3 O _1.0 film. Table 3 shows the results of measuring the via resistance of the sample. The via resistance was measured using a Kelvin pattern.

As can be seen from Table 3, it was found that when the thickness of the TaN _y O _z film exceeded 3 nm, the via resistance was significantly increased.

  In this embodiment, exposure to the atmosphere is used as a method for oxidizing the surface, but the same effect can be obtained even in an oxidizing atmosphere such as oxygen or water vapor.

As described above, by using a stacked structure of the TaN _x film and the TaN _y O _z film, a barrier metal having low resistance and high barrier properties can be provided. It is preferable that the thickness of the TaN _y O _z film be 3 nm or less in order to reduce the via resistance.

[Sixth embodiment]
FIG. 20 is a sectional view showing a configuration of a semiconductor device according to the sixth embodiment of the present invention. A wiring groove 162 is formed in an interlayer insulating film 161 made of silicon oxide, and a TaN _{y Oz} film 163 is formed along a side wall and a bottom surface of the wiring groove 162. A TaN _x film 164 is formed along the surface of the TaN _y O _z film 163. Then, a Cu wiring 165 is buried in the wiring groove 162. Then, a silicon nitride film 166 for preventing diffusion from the surface of the Cu wiring 165 to the upper layer is formed on the entire surface. The barrier metal of the present embodiment is a laminated film in which a TaN _y O _z film 163 and a TaN _x film 164 are laminated.

Next, a manufacturing process of the present apparatus will be described with reference to a process sectional view of FIG. First, as shown in FIG. 21A, after a wiring groove 162 is formed in an interlayer insulating film 161, a TaN _x film 164 is formed on the entire surface by using a sputtering method. Next, as shown in FIG. 21B, by annealing, the interlayer insulating film 161 in contact with the interface between the interlayer insulating film 161 and the TaN _x film 164 is reduced, and the TaN _x film 164 on the outer surface is oxidized. , A TaN _y O _z film 163 is formed. Next, as shown in FIG. 21C, a Cu film 165 ₁ is deposited on the entire surface, and the wiring groove 162 is filled with the Cu film 165 ₁ . Next, as shown in FIG. 21D, the excess Cu film 165 ₁ , TaN _x film 164 and TaN _y O _z film 163 are removed by using the CMP method, and a Cu wiring 165 is formed. Then, a structure shown in FIG. 20 is formed by depositing a silicon nitride film on the entire surface.

Next, the barrier properties of the barrier metal of the present embodiment were evaluated. For the evaluation of the barrier property, a sample having a structure in which an amorphous silicon film 182, an SiO ₂ film 183, a TaN _x film 184, and a Cu film 185 were sequentially laminated as shown in FIG. Annealing was performed for a time, and the annealing was performed based on the amount of generated Cu ₃ Si (Cu silicide) (silicidation ratio) generated by Cu diffused into the amorphous silicon film through the barrier metal.

The structure of the sample illustrated in FIG. 22 will be described. Grooves having a depth of 0.4 μm and L / S = 0.2 / 0.2 μm are formed in a 700 nm thick SiO ₂ film 181 deposited by a plasma CVD method using an ordinary photolithography technique or RIE method. . Then, an amorphous silicon film 182 deposited by the CVD method is formed on the entire surface. Then, an SiO ₂ film 183 formed by exposing the amorphous silicon film 182 to an oxidizing atmosphere is formed on the amorphous silicon film 182. On the SiO ₂ film 183, a TaN _x film 184 having a thickness of 5 nm at the thinnest portion in the groove is formed. Then, a Cu film 185 deposited without breaking the vacuum from the generation of the TaNx film 184 is formed.

Note that the thickness of the amorphous silicon film 182 before exposure to an oxidizing atmosphere is 30 nm, and a sample in which a ₂ , 4, or ₆ nm SiO ₂ film 183 is formed on the surface by changing the oxidation time, or an oxidation process is not performed. A sample was formed. In addition, samples were prepared in which a TaN _x film 184 having a composition of TaN _0.1 , TaN _0.2 , TaN _0.5 or TaN _1.4 was formed on the SiO ₂ film 183 having each thickness.

Table 4 shows the measurement results of the silicidation ratio.

As described above, by providing the layer containing oxygen (SiO ₂ film 183) on the surface of the base on which the TaN _x film 184 is formed, the TaN _x film 184 reacts with the oxygen contained in the base. It can be seen that a TaN _y O _z film is formed, and the barrier characteristics for the Cu film 185 are significantly improved. Incidentally, when the thickness of the TaN _y O _z films produced is 4.5nm, during the heat treatment for TaN _y O _z film formation, peeling between the TaN _y O _z layer and the SiO ₂ film It did not lead to the evaluation of the barrier properties.

As described above, after forming the TaN _x film on the interlayer insulating film containing oxygen, reducing the interlayer insulating film by TaN _x film, by oxidizing the TaN _x film, TaN _x film and TaN _y O _z It is possible to form a barrier metal in which a film is laminated.

In the present invention, is used an oxide layer formed on the amorphous silicon surface underlying layer having an oxygen, if TaN _x film is an oxide layer capable of reducing, substantially the same effect can get.

[Seventh embodiment]
FIG. 23 is a cross-sectional view illustrating a configuration of a semiconductor device according to a seventh embodiment of the present invention. In FIG. 23, the same portions as those in FIG. 21 are denoted by the same reference numerals, and description thereof will be omitted.

The feature of this embodiment is that the surface of the Cu film 165 is formed lower than the surface of the interlayer insulating film 161, and the TaN _y O _z film 191 and the TaN _x film 192 are sequentially laminated on the Cu film 165. The surface of the TaN _x film 192 is the same as the surface of the interlayer insulating film 161, and the laminated film composed of the TaN _y O _z film 191 and the TaN _x film 192 is a barrier metal that suppresses diffusion of Cu from the surface of the Cu film 165. It is.

  Next, a manufacturing process of the present apparatus will be described with reference to a process sectional view of FIG. The manufacturing process of this apparatus is the same as the manufacturing process shown in FIGS.

Then, after the step shown in FIG. 21D, as shown in FIG. 24A, the Cu film 165 is selectively etched to make the surface of the Cu film 165 lower than the surface of the interlayer insulating film 161. Next, as shown in FIG. 24B, the exposed surface of the Cu film 165 is oxidized to form a copper oxide film 200. Next, as shown in FIG. 24C, a TaN _x film 192 is formed. Then, as shown in FIG. 24 (d), as well as reducing the copper oxide film 200 by annealing, by oxidizing the TaN _x film 192 in contact with the copper oxide film 200, to form a TaN _y O _z layer 191 . Then, by removing the TaN _y O _z film 191 and the TaN _x film 192 on the interlayer insulating film 161 by using the CMP method, the surfaces of the interlayer insulating film 161 and the TaN _x film 192 are flattened, and as shown in FIG. Form the structure.

Next, the barrier properties of the barrier metal of the present embodiment were evaluated. The barrier property was evaluated by separately preparing a sample having a structure in which a Cu 214, a copper oxide film 215, a TaN _x film 216, and an amorphous silicon film 217 were sequentially stacked as shown in FIG. 25, and annealing the sample at 450 ° C. for 4 hours. It was carried out, reducing the copper oxide film 215 using the TaN _x film 216, to form a TaN _y O _z layer by oxidizing the TaN _x film 216, produced by Cu diffused into the amorphous silicon film through a barrier metal The determination was performed based on the amount of generated Cu ₃ Si (Cu silicide) (silicidation ratio).

The structure of the sample illustrated in FIG. 25 will be described. A 700 nm thick SiO ₂ film 211 is formed by plasma CVD. A groove 212 having a depth of 0.4 μm and L / S = 0.2 / 0.2 μm is formed in the SiO ₂ film 211 by a usual photolithography technique or RIE method. The entire surface, TaN _1.4 film 213 is formed by sputtering the thinnest at the thickness of the grooves is 5 nm. The Cu damascene wiring 214 is buried in the groove by polishing the 400 nm-thick Cu film deposited on the TaN _1.4 film 213 by the CVD method by the CMP method. Then, a copper oxide film 215 generated by heat treatment in an oxidizing atmosphere is formed on the surface of the embedded Cu damascene wiring 214. Then, a TaN _x film 216 having a thickness of 10 nm is formed on the entire surface, and an amorphous silicon film 217 deposited by a sputtering method without breaking vacuum from the deposition of the TaN _x film 216 is formed.

By changing the oxidation time of the Cu damascene wiring 214, a sample in which a copper oxide film 215 of 1, 3, 5, and 10 nm was formed on the surface, or a sample not subjected to oxidation treatment was formed. Further, a sample was formed in which a film 216 having a composition of TaN _0.1 , TaN _0.2 , TaN _0.5 or TaN _1.4 was formed on the copper oxide film 215 having each thickness.

Table 5 shows the measurement results of the silicidation ratio.

  As a result, the same barrier property of the TaNx film as in the fifth embodiment was confirmed. However, when the thickness of the copper oxide film 215 on the surface of the Cu damascene wiring 214 was 10 nm, the barrier metal was separated from the surface of the Cu oxide film, and the barrier property was not evaluated.

In the present embodiment, the copper oxide film 215 is formed on the surface of the Cu wiring 214 by heat treatment in an oxygen atmosphere to serve as a supply source of oxygen for forming the TaN _y O _z film. By depositing a TaN _x film on the Cu wiring and then performing a heat treatment in a vacuum, oxygen in the Cu wiring diffuses to the interface between Cu and the TaN _x film, and a TaN _y O _z film is similarly formed. Confirmed that you can. In this case, it is confirmed that the oxygen in the Cu wiring is consumed for forming the TaN _y O _z film at the interface, thereby lowering the specific resistance of the Cu wiring. , it has also been found that it is possible to control the thickness of the TaN _y O _z layer.

As described above, after the TaN _x film is formed on the copper oxide film formed on the surface of the Cu wiring or the Cu wiring mixed with oxygen, the TaN _x film reduces the copper oxide film or the Cu wiring containing oxygen. and, by oxidizing the TaN _x film, it is possible to form the barrier metal and the TaN _x film and TaN _y O _z layer are laminated.

  Note that the present invention is not limited to the above embodiment. For example, in the above embodiments, the barrier metal is formed by laminating compound films made of the same metal element and the additional element, but the metal elements contained in each layer may be different. However, by selecting the same metal element contained in each layer, a laminated film can be formed only by changing the introduction amount of light elements (boron, oxygen, carbon, nitrogen), so that the process is easy. is there. In addition, by selecting the same metal element to form a barrier metal, a reaction between layers can be suppressed.

Further, in the above embodiment, the films having different n values of the compound films αβ _n are laminated by increasing and decreasing the gas flow rate in a stepwise manner, but for example, a film having a continuous composition change by gradually changing the gas flow rate May be formed.

  In addition, as a metal element constituting the barrier metal, an element belonging to the IVB group, the VB group, or the VIB group can be used.

  Note that the barrier metal of the present invention can be applied to metal electrodes other than metal wiring and plug electrodes.

Further, in the 5-6 embodiment, has been described by way of TaN _y O _z layer and examples are TaN _x film and its oxide film as a compound film constituting the barrier metal is not limited thereto, instead of the tantalum used αγ _y O _z is at least one element selected α and boron, the oxide film carbon, compounds of at least one element is composed of a γ selected from nitrogen film Arufaganma _n from metal elements be able to.

  In addition, the present invention can be variously modified and implemented without departing from the gist thereof.

FIG. 2 is a cross-sectional view illustrating a configuration of the semiconductor device according to the first embodiment. FIG. 2 is a cross-sectional view illustrating a configuration of a barrier metal of the semiconductor device in FIG. 1. FIG. 2 is a process cross-sectional view illustrating a manufacturing process of the semiconductor device in FIG. 1. FIG. 4 is a cross-sectional view illustrating a configuration of a sample used for verifying barrier properties according to the first embodiment. Sectional drawing which shows the film-forming shape of the barrier metal formed by the normal long throw sputtering method. FIG. 9 is a cross-sectional view showing a case where a Cu film is reflowed on a barrier metal formed by a normal long-throw sputtering method. Sectional drawing which shows the film-forming shape of the barrier metal formed by the long throw sputtering method to which the substrate bias was applied. FIG. 4 is a cross-sectional view showing a case where a Cu film is reflowed on a barrier metal formed by a long throw sputtering method with a substrate bias applied. FIG. 9 is a cross-sectional view illustrating a configuration of a barrier metal of the semiconductor device according to the second embodiment. FIG. 10 is a characteristic diagram showing the light element concentration dependency of the silicidation rate (barrier property) of the barrier metal shown in FIG. 9. FIG. 13 is a cross-sectional view illustrating a configuration of a semiconductor device according to a third embodiment. FIG. 12 is a cross-sectional view illustrating a configuration of a barrier metal of the semiconductor device in FIG. 11. FIG. 12 is a process cross-sectional view illustrating a manufacturing process of the semiconductor device in FIG. 11. FIG. 13 is a characteristic diagram showing an open yield of the Cu dual damascene wiring formed on the barrier metal shown in FIG. 12. FIG. 11 is a sectional view showing a configuration of a main part of a semiconductor device according to a fourth embodiment. FIG. 16 is a characteristic diagram showing via resistance of Cu damascene wiring of the semiconductor device of FIG. 15. FIG. 14 is a sectional view showing the configuration of a semiconductor device according to a fifth embodiment. FIG. 18 is a process cross-sectional view illustrating a manufacturing process of the semiconductor device in FIG. 17. FIG. 13 is a cross-sectional view showing a configuration of a sample used for verifying barrier properties according to a fifth embodiment. FIG. 14 is a sectional view showing the configuration of a semiconductor device according to a sixth embodiment. FIG. 21 is a process sectional view illustrating the manufacturing process of the semiconductor device in FIG. 20; FIG. 14 is a cross-sectional view illustrating a configuration of a sample used for verifying barrier properties according to a sixth embodiment. FIG. 13 is a sectional view showing a configuration of a semiconductor device according to a seventh embodiment. FIG. 24 is a process sectional view illustrating the manufacturing process of the semiconductor device in FIG. 23; FIG. 17 is a cross-sectional view illustrating a configuration of a sample used for verifying barrier properties according to a seventh embodiment. FIG. 4 is a characteristic diagram showing x dependence of the barrier property of the TaN _x film.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 11 ... 1st interlayer insulation film, 12 ... lower wiring, 14 ... W via plug, 15 ... 2nd interlayer insulation film, 16 ... wiring groove, 17 ... damascene wiring, 20 ... barrier metal, 31, 34, 35, 37, 38 ... TaN _0.87 film, 32,33,36,39 ... TaN _1.19 film, 51, 52 ... niobium nitride (NbN _x) film, 53, 54 ... tantalum oxynitride (TaO _y N _z) layer, 55 , 56, 57: titanium carbide (TiC _x ) film, 61: interlayer insulating film, 62: damascene wiring, 63: via hole, 64: wiring groove, 65: barrier metal, 65: wiring groove, 66: dual damascene wiring, 71, 72 ... tungsten nitride (WN _x) layer, 73, 74 ... tantalum carbonitride (TaC _y N _z) layer, 75, 76, 77 ... titanium boride nitride film (TiB _x N _y) film, 81 , 82 ... hafnium nitride (HfN _x ) film, 83, 84: tantalum carbide (TaC _x ) film, 85, 86, 87: zirconia nitride (ZrN _x ) film, 131: TaN _x (x> 0.2) film, 132: TaN _y O _z layer, 161 ... interlayer insulating film, 162 ... wiring groove, 163 ... TaN _y O _z layer, 164 ... TaN _x film, 165 ... Cu wiring, 166 ... silicon nitride film, 191 ... TaN _y O _z layer, 192 ... TaN _x film, 200: copper oxide film

Claims (7)

A semiconductor device comprising a barrier metal that suppresses diffusion of an element constituting a metal wiring,
The barrier metal, and α at least one element selected from metal elements, boron, carbon, and compound film Arufaganma _x in which at least one element is composed of a γ selected from nitrogen,
A semiconductor device having a configuration in which a compound film αγ _y O _z composed of α and γ and oxygen (O) is stacked.   2. The semiconductor device according to claim 1, wherein x is 0.2 or more. 2. The semiconductor device according to claim 1, wherein the thickness of the compound film αγ _y O _z is 3 nm or less.   2. The semiconductor device according to claim 1, wherein the metal element belongs to any one of a group IVB, a group VB, and a group VIB. A method for manufacturing a semiconductor device in which metal wiring is formed on a base via a barrier metal,
Forming a compound film αγ _x on the substrate,
Oxidizing the surface of the compound film αγ _x to form a compound film αγ _y O _z ;
Forming the metal wiring on the compound film αγ _y O _z . A method for manufacturing a semiconductor device, wherein a barrier metal is formed on a substrate containing oxygen (O),
Forming a compound film αγ _x composed of α on which at least one element is selected from metal elements and γ containing at least one of boron, carbon, and nitrogen on the base;
By performing the reduction of the substrate by the compound film αγ _x, and a step of oxidizing the said compound film αγ _x, to form a compound film αγ _y O _z at the interface between the compound layer Arufaganma _x and said substrate ,
The method of manufacturing a semiconductor device, which comprises forming a barrier metal including a configuration wherein the compound film Arufaganma _x and the compound film αγ _y O _z are sequentially laminated. Forming a metal wiring containing oxygen (O);
Forming a compound film αγ _x composed of α on which at least one element is selected from metal elements and γ containing at least one of boron, carbon, and nitrogen on the metal wiring;
By performing the reduction of the metal wiring by the compound film αγ _x, a step of oxidizing the compound film αγ _x, to form a compound film αγ _y O _z at the interface between the compound layer Arufaganma _x and the metal wire Including
The method of manufacturing a semiconductor device, which comprises forming a barrier metal including a configuration wherein the compound film Arufaganma _x and the compound film αγ _y O _z are sequentially laminated.

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