JP2004282063A5 - - Google Patents
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- JP2004282063A5 JP2004282063A5 JP2004056931A JP2004056931A JP2004282063A5 JP 2004282063 A5 JP2004282063 A5 JP 2004282063A5 JP 2004056931 A JP2004056931 A JP 2004056931A JP 2004056931 A JP2004056931 A JP 2004056931A JP 2004282063 A5 JP2004282063 A5 JP 2004282063A5
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- adhesive
- layer
- substrate
- forming
- insulating film
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Claims (19)
前記金属層上の一部に、前記金属層に含まれる金属と反応する材料を用いて接着体を形成し、
前記金属層および前記接着体を覆って酸化物層を形成し、
前記酸化物層上に薄膜トランジスタを含む素子形成層を形成し、
前記素子形成層の一部をエッチングすることにより前記接着体を除去することを特徴とする半導体装置の作製方法。 Forming a metal layer on the first substrate;
Forming an adhesive on a part of the metal layer using a material that reacts with the metal contained in the metal layer ,
Forming an oxide layer covering the metal layer and the adhesive;
Forming an element formation layer including a thin film transistor on the oxide layer;
A method for manufacturing a semiconductor device, wherein the adhesive is removed by etching a part of the element formation layer.
前記金属層上の一部に、前記金属層に含まれる金属と反応する材料を用いて接着体を形成し、
前記金属層および前記接着体を覆って酸化物層を形成し、
前記酸化物層上に薄膜トランジスタを含む素子形成層を形成し、
前記素子形成層の一部をエッチングすることにより前記接着体を除去し、
前記素子形成層上に第1の接着剤を介して第2の基板を貼付し、
前記第2の基板および前記素子形成層を前記第1の基板から物理的手段により剥離することを特徴とする半導体装置の作製方法。 Forming a metal layer on the first substrate;
Forming an adhesive on a part of the metal layer using a material that reacts with the metal contained in the metal layer ,
Forming an oxide layer covering the metal layer and the adhesive;
Forming an element formation layer including a thin film transistor on the oxide layer;
The adhesive is removed by etching a part of the element formation layer,
A second substrate is pasted on the element formation layer via a first adhesive,
A method for manufacturing a semiconductor device, wherein the second substrate and the element formation layer are separated from the first substrate by physical means.
前記金属層上の一部に、前記金属層に含まれる金属と反応する材料を用いて接着体を形成し、
前記金属層および前記接着体を覆って酸化物層を形成し、
前記酸化物層上に薄膜トランジスタを含む素子形成層を形成し、
前記素子形成層の一部をエッチングすることにより前記接着体を除去し、
前記素子形成層上に第1の接着剤を介して第2の基板を貼付し、
前記第2の基板および前記素子形成層を前記第1の基板から物理的手段により剥離し、
前記第2の基板および前記素子形成層を第2の接着剤を介して第3の基板上に貼付し、
前記第2の基板を前記素子形成層から除去することを特徴とする半導体装置の作製方法。 Forming a metal layer on the first substrate;
Forming an adhesive on a part of the metal layer using a material that reacts with the metal contained in the metal layer ,
Forming an oxide layer covering the metal layer and the adhesive;
Forming an element formation layer including a thin film transistor on the oxide layer;
The adhesive is removed by etching a part of the element formation layer,
A second substrate is pasted on the element formation layer via a first adhesive,
Peeling off the second substrate and the element formation layer from the first substrate by physical means;
Affixing the second substrate and the element forming layer on a third substrate via a second adhesive;
A method for manufacturing a semiconductor device, wherein the second substrate is removed from the element formation layer.
前記金属層上の一部に、前記金属層に含まれる金属と反応する材料を用いて接着体を形成し、Forming an adhesive on a part of the metal layer using a material that reacts with the metal contained in the metal layer,
前記金属層および前記接着体を覆って酸化物層を形成し、Forming an oxide layer covering the metal layer and the adhesive;
前記酸化物層上に薄膜トランジスタを含む素子形成層を形成し、Forming an element formation layer including a thin film transistor on the oxide layer;
前記素子形成層の一部をエッチングすることにより前記接着体を除去し、The adhesive is removed by etching a part of the element formation layer,
前記素子形成層上に第1の接着剤を介して第2の基板を貼付し、A second substrate is pasted on the element formation layer via a first adhesive,
前記第2の基板および前記素子形成層を前記第1の基板から物理的手段により剥離し、Peeling off the second substrate and the element formation layer from the first substrate by physical means;
前記第2の基板および前記素子形成層を第2の接着剤を介して第3の基板上に貼付し、Affixing the second substrate and the element forming layer on a third substrate via a second adhesive;
前記第2の基板を前記素子形成層から除去し、Removing the second substrate from the element formation layer;
前記素子形成層上に絶縁膜を形成することを特徴とする半導体装置の作製方法。A method for manufacturing a semiconductor device, comprising forming an insulating film over the element formation layer.
前記金属層として、タングステン、モリブデン、テクネチウム、レニウム、ルテニウム、オスミウム、ロジウム、イリジウム、パラジウム、白金、銀、または金のいずれか一を用いることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 5 ,
A method for manufacturing a semiconductor device, wherein tungsten, molybdenum, technetium, rhenium, ruthenium, osmium, rhodium, iridium, palladium, platinum, silver, or gold is used as the metal layer.
前記素子形成層は、その作製工程の一部に400℃以上、好ましくは600℃以上の熱処理工程を含むことを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 6 ,
The element formation layer includes a heat treatment step of 400 ° C. or higher, preferably 600 ° C. or higher as part of its manufacturing step.
前記薄膜トランジスタは、前記接着体と重ならない位置に形成されることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 7 ,
The method for manufacturing a semiconductor device, wherein the thin film transistor is formed at a position not overlapping with the adhesive body.
前記接着体は、複数の薄膜トランジスタが整列している間に、長辺が剥離方向と平行となる長方形に配置されることを特徴とする半導体装置の作製方法。 The method for manufacturing a semiconductor device is characterized in that the adhesive body is arranged in a rectangle whose long side is parallel to the peeling direction while a plurality of thin film transistors are aligned.
前記接着体は、複数の薄膜トランジスタが整列している間に、底辺が剥離方向と垂直となる三角形状に配置されることを特徴とする半導体装置の作製方法。 The method of manufacturing a semiconductor device, wherein the adhesive body is arranged in a triangular shape whose bottom is perpendicular to the peeling direction while a plurality of thin film transistors are aligned.
前記接着体は、複数の薄膜トランジスタが整列している間に、ライン状に配置されることを特徴とする半導体装置の作製方法。 The method for manufacturing a semiconductor device, wherein the adhesive body is arranged in a line while a plurality of thin film transistors are aligned.
前記接着体として珪素、ゲルマニウム、炭素、硼素、マグネシウム、アルミニウム、チタン、タンタル、鉄、コバルト、ニッケル、またはマンガンのいずれか一を用いることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 11 ,
A method for manufacturing a semiconductor device, wherein any one of silicon, germanium, carbon, boron, magnesium, aluminum, titanium, tantalum, iron, cobalt, nickel, and manganese is used as the adhesive.
前記素子形成層と前記第1の接着剤との間に、水溶性の有機樹脂からなる膜を形成し、Forming a film made of a water-soluble organic resin between the element forming layer and the first adhesive;
前記第2の基板および前記素子形成層を前記第1の基板から物理的手段により剥離した後、前記水溶性の有機樹脂を水洗することを特徴とする半導体装置の作製方法。A method for manufacturing a semiconductor device, wherein the water-soluble organic resin is washed with water after the second substrate and the element formation layer are separated from the first substrate by physical means.
接着層上に第1の絶縁膜を有し、
前記第1の絶縁膜は少なくとも前記接着層を介して前記基板と接着しており、
少なくとも1つの薄膜トランジスタが前記第1の絶縁膜上にあり、
第2の絶縁膜が前記薄膜トランジスタ上にあり、
前記第1の絶縁膜および前記第2の絶縁膜が除去され、かつ前記接着層を曝す開口部を有し、
第2の絶縁膜を覆い、かつ前記開口部を埋める第3の絶縁膜を有することを特徴とする半導体装置。 Has an adhesive on a substrate,
A first insulating film on the adhesive layer;
The first insulating film is bonded to the substrate through at least the adhesive layer;
At least one thin film transistor is on the first insulating film;
A second insulating film is on the thin film transistor;
The first insulating film and the second insulating film are removed, and an opening is provided to expose the adhesive layer;
A semiconductor device comprising a third insulating film that covers the second insulating film and fills the opening.
接着層上に第1の絶縁膜を有し、
前記第1の絶縁膜は少なくとも接着層を介して前記基板と接着しており、
少なくとも複数の薄膜トランジスタからなる集積回路が第1の絶縁膜上にあり、
第2の絶縁膜が前記集積回路上にあり、
前記第1の絶縁膜および前記第2の絶縁膜が除去され、かつ前記接着層を曝す開口部を有し、
第2の絶縁膜を覆い、かつ前記開口部を埋める第3の絶縁膜を有することを特徴とする半導体装置。 Has an adhesive on a substrate,
A first insulating film on the adhesive layer;
The first insulating film is bonded to the substrate through at least an adhesive layer;
An integrated circuit comprising at least a plurality of thin film transistors is on the first insulating film;
A second insulating film is on the integrated circuit;
The first insulating film and the second insulating film are removed, and an opening is provided to expose the adhesive layer;
A semiconductor device comprising a third insulating film that covers the second insulating film and fills the opening.
Any one to Oite of claims 15 to 18, wherein the third insulating film, silicon oxide, nitric oxide, a semiconductor device which is characterized by using acrylic, polyimide, any one of polyamide.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004056931A JP4748943B2 (en) | 2003-02-28 | 2004-03-01 | Method for manufacturing semiconductor device |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003053193 | 2003-02-28 | ||
JP2003053243 | 2003-02-28 | ||
JP2003053193 | 2003-02-28 | ||
JP2003053243 | 2003-02-28 | ||
JP2004056931A JP4748943B2 (en) | 2003-02-28 | 2004-03-01 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2004282063A JP2004282063A (en) | 2004-10-07 |
JP2004282063A5 true JP2004282063A5 (en) | 2007-04-12 |
JP4748943B2 JP4748943B2 (en) | 2011-08-17 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2004056931A Expired - Fee Related JP4748943B2 (en) | 2003-02-28 | 2004-03-01 | Method for manufacturing semiconductor device |
Country Status (1)
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JP (1) | JP4748943B2 (en) |
Families Citing this family (20)
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JP2005116824A (en) * | 2003-10-08 | 2005-04-28 | Ricoh Co Ltd | Method for manufacturing thin-film device, active matrix substrate, method for manufacturing, electrooptical device, and method for manufacturing the same |
JP2005183615A (en) * | 2003-12-18 | 2005-07-07 | Ricoh Co Ltd | Thin film device apparatus and method of manufacturing the same |
JP5089037B2 (en) * | 2004-12-03 | 2012-12-05 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US7566633B2 (en) * | 2005-02-25 | 2009-07-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
JP5025141B2 (en) * | 2005-02-28 | 2012-09-12 | 株式会社半導体エネルギー研究所 | Manufacturing method of semiconductor device |
JP5025145B2 (en) * | 2005-03-01 | 2012-09-12 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
US9040420B2 (en) | 2005-03-01 | 2015-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device including peeling layers from substrates by etching |
JP5052033B2 (en) * | 2005-04-28 | 2012-10-17 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP5057703B2 (en) * | 2005-05-31 | 2012-10-24 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
EP1760776B1 (en) * | 2005-08-31 | 2019-12-25 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method for semiconductor device with flexible substrate |
CN101916763B (en) | 2005-09-30 | 2012-11-14 | 株式会社半导体能源研究所 | Manufacturing method of semiconductor device |
JP5063066B2 (en) * | 2005-09-30 | 2012-10-31 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
WO2007105405A1 (en) | 2006-03-10 | 2007-09-20 | Matsushita Electric Industrial Co., Ltd. | Method and device for mounting anisotropically-shaped member, method of manufacturing electronic device, electronic device, and display |
JP2007251080A (en) * | 2006-03-20 | 2007-09-27 | Fujifilm Corp | Fixing method for plastic substrate, circuit substrate, and manufacturing method therefor |
JP5496445B2 (en) * | 2007-06-08 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
JP2009032912A (en) * | 2007-07-27 | 2009-02-12 | Sony Corp | Method of manufacturing semiconductor device, and method of manufacturing organic light-emitting device |
KR101617280B1 (en) * | 2009-10-21 | 2016-05-03 | 엘지디스플레이 주식회사 | Methode of fabricating display device using flexible plastic substrate |
KR101779586B1 (en) * | 2010-09-27 | 2017-10-10 | 엘지디스플레이 주식회사 | Method of fabricating display device using flexible plastic substrate |
JP5898949B2 (en) * | 2011-12-27 | 2016-04-06 | パナソニック株式会社 | Method for manufacturing flexible device |
US10354910B2 (en) | 2016-05-27 | 2019-07-16 | Raytheon Company | Foundry-agnostic post-processing method for a wafer |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH10150176A (en) * | 1996-11-15 | 1998-06-02 | Tadahiro Omi | Semiconductor substrate and its manufacture |
JP5121103B2 (en) * | 2000-09-14 | 2013-01-16 | 株式会社半導体エネルギー研究所 | Semiconductor device, method for manufacturing semiconductor device, and electric appliance |
JP2002353235A (en) * | 2001-05-23 | 2002-12-06 | Matsushita Electric Ind Co Ltd | Active matrix substrate, display using the same, and its manufacturing method |
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- 2004-03-01 JP JP2004056931A patent/JP4748943B2/en not_active Expired - Fee Related
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