JP2004260958A - Power supply for driving gate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply for driving a gate which is small and low-cost and suppresses a peak current just after starting a gate power supply. <P>SOLUTION: In a gate driving power supply 100, a DC output voltage Vdc to a 3-terminal regulator 5 is set to be high in advance, so that an auxiliary power supply voltage Vs is activated quicker at a start-up signal generating part 104. An f0/f1 oscillation circuit 30 generates the gate signals of two different frequencies. Just after a single-phase inverter 102 is started, on/off control is performed with the gate signal of high frequency, while, after a specified time has passed after the start-up, a timer circuit 7 and a switch circuit 8 are used to switch to the gate signal of low frequency. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a gate drive power supply device that constitutes a power supply of a gate drive circuit that drives a power device on and off, and more particularly to a gate drive power supply device that reduces the output current peak value of the gate drive circuit immediately after startup. .
[0002]
[Prior art]
2. Description of the Related Art Conventionally, when a power insulated semiconductor element (power device) such as an insulated gate bipolar transistor (IGBT) is turned on or off or a switching operation is performed, a transient overvoltage or overcurrent is prevented from being generated. The power supply device is described in, for example, Patent Document 1 below.
[0003]
FIG. 7 is a circuit configuration diagram showing an example of a conventional gate drive power supply device. The gate drive power supply device 700 controls the input DC voltage E from the DC power supply 1 to a constant DC voltage (DC intermediate voltage Vif) by the DC / DC converter 101, and outputs the AC output by the single-phase inverter 102 connected to the subsequent stage. The voltage is converted into a voltage Vac. The DC / DC converter 101 includes a capacitor C1 connected in parallel to the DC power supply 1, a primary winding N1 and a secondary winding N2 of a transformer T1, a switching transistor Q1, a capacitor C2, and a flyback diode D1. ing.
[0004]
The single-phase inverter 102 includes a series circuit of capacitors C3 and C4, and switching transistors Q2 and Q3. The output from the DC / DC converter 101 to the single-phase inverter 102 is a DC intermediate voltage Vif. In the DC / DC converter 101, the pulse width of the switching transistor Q1 is controlled by feeding back the DC intermediate voltage Vif to the PWM control circuit 2 on the primary winding N1 side of the transformer T1 via the photocoupler PC. , A DC intermediate voltage Vif controlled to a constant voltage is output to single-phase inverter 102.
[0005]
The control unit 103 includes an oscillation circuit 3 and a pulse distribution circuit 4, and uses a control signal having a predetermined frequency f 1 determined by the oscillation circuit 3 to control the switching transistors Q 2 and Q 3 constituting the single-phase inverter 102. On-off control. The pulse distribution circuit 4 includes two AND gates G1 and G2 and a NOT gate G3, from which a control pulse is supplied to each gate of the switching transistors Q2 and Q3. These switching transistors Q2 and Q3 have parasitic diode components D2 and D3 between the source and the drain, respectively.
[0006]
The start signal generation unit 104 includes a diode D4, a capacitor C5, a three-terminal regulator 5, and a start signal generation circuit 6, and is connected to the tertiary winding N3 of the transformer T1. In the start signal generation unit 104, the DC output voltage Vdc converted from the power supply supplied from the tertiary winding N3 of the transformer T1 via the diode D2 and the capacitor C5 is input to the three-terminal regulator 5, and the control unit An auxiliary power supply voltage Vs for starting up the oscillation circuit 3 and the pulse distribution circuit 103 is output, and a start signal S0 generated by the start signal generation circuit 6 is output to the pulse distribution circuit 4.
[0007]
Here, a system for simultaneously supplying power from a single gate drive power supply device 700 to a plurality of gate drive circuits 11, 12, 13 is shown. That is, the gate drive power supply device 700 includes a plurality of gate drive circuits 11, 12, and 13 and power devices 21, 22, and 23 driven by the gate drive circuits 11, 12, and 13 as load circuits. Is provided.
[0008]
FIG. 8 is a diagram illustrating an example of the configuration of the gate drive circuit 11.
The gate drive circuit 11 (12, 13 has the same configuration) of the power device 21 includes a transformer T2, diodes D5 to D8, capacitors C6, C7, and a gate control circuit 9. The transformer T2 is supplied with the AC output voltage Vac of the gate drive power supply 700 from its primary winding N4, and is provided with a rectifying bridge by diodes D5 to D8 on the secondary winding N5 side, thereby providing a power device. It constitutes a driving DC power supply. This DC power supply is further connected to the gate control circuit 9 via the capacitors C6 and C7.
[0009]
The gate drive circuit 11 converts the AC output voltage Vac input thereto into DC and supplies it to the gate control circuit 9 to control the power device 21 by the gate on / off signal of the gate control circuit 9 and to control the gate drive circuit. Even when the power supply device 700 loses power, a gate-off signal can be stably given to the power devices 21 to 23 by the capacitors C6 and C7. In such a gate drive circuit 11, usually, a transformer T2 is provided in each of the gate drive circuits 11 to 13 of the power devices 21 to 23 for the purpose of insulating between the power circuit and the control circuit. Therefore, such a gate drive circuit 11 uses the AC output voltage Vac of the gate drive power supply 700 as a power supply.
[0010]
[Patent Document 1]
JP-A-9-74345
[Problems to be solved by the invention]
However, since the gate drive circuit 11 includes the capacitors C6 and C7 as described above, it is necessary to charge the capacitors C6 and C7 in the gate drive circuit 11 when the gate drive power supply 700 is started. In addition, at the time of startup, a charging current that is considerably larger than a load current flowing during normal operation flows.
[0012]
9 and 10 are timing diagrams for explaining the operation of the power supply device 700 for driving a gate. FIG. 9 shows an AC output voltage Vac and an AC output current Iac of the gate drive power supply 700 immediately after the DC intermediate voltage Vif has risen to the target voltage. FIG. 10 is an enlarged view showing the time (20 ms) when the DC intermediate voltage Vif rises to the target voltage. FIG. 10A shows the envelope of the AC output voltage Vac of the gate drive power supply 700. FIG. 3B shows the envelope of the AC output current Iac, and FIG. 3C shows the change of the DC intermediate voltage Vif.
[0013]
For this reason, the following problems have been left in the conventional gate drive power supply device described above.
First, when the gate drive power supply 700 is started, the voltage of the capacitors C6 and C7 of the gate drive circuit 11 is 0V, and the voltage on the secondary winding N5 side of the transformer T2 becomes 0V. N5 is in the same state as the short circuit state. For this reason, the output current from the gate drive power supply device 700 becomes excessive as shown in FIGS. 9 and 10B due to the impedance due to the leakage inductance and the wiring inductance on the primary winding N4 side of the transformer T2. There is a problem that a large peak current (capacitor charging current) flows.
[0014]
Secondly, in the case of a load having a delayed power factor, the current that rises in synchronization with the first pulse immediately after the start of the inverter starts from 0 A, so that the current peak value immediately after the start becomes large. Was.
[0015]
Therefore, as a switching device used in the gate drive power supply 700, it is necessary to provide a performance capable of reliably interrupting such a peak current immediately after startup, and to use an element corresponding to the peripheral circuit in the gate drive power supply. There is a problem that the device becomes large and expensive.
[0016]
An object of the present invention is to provide a small and inexpensive gate driving power supply device that suppresses a peak current immediately after the gate power supply is started.
[0017]
[Means for Solving the Problems]
In order to achieve the above object, there is provided a gate drive power supply device that constitutes a power supply of a gate drive circuit that drives a power device on and off. The power supply device for driving a gate includes a DC / DC converter for boosting a DC power supply voltage to a predetermined DC intermediate voltage, an inverter circuit connected to a subsequent stage of the DC / DC converter and receiving the DC intermediate voltage, A control circuit for controlling on / off of a switching element constituting a circuit by a control signal having a predetermined frequency, and a start for generating a start signal for starting the control circuit by an auxiliary power supply voltage supplied from the DC / DC converter And a signal generation circuit.
[0018]
When activating the inverter circuit, the activation signal generation circuit generates the activation signal by raising the auxiliary power supply voltage earlier than the timing of raising the DC intermediate voltage, and the DC intermediate voltage is low. From the state, the switching operation is performed by the inverter circuit.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit configuration diagram showing a gate drive power supply device according to an embodiment of the present invention.
[0020]
In the gate driving power supply device 100, the f0 / f1 oscillation circuit 30 is used instead of the oscillation circuit 3 of the control unit 103 in the conventional gate driving power supply device 700. The f0 / f1 oscillating circuit 30 generates gate signals of two different frequencies. Immediately after the single-phase inverter 102 is started, it is turned on / off by a high-frequency gate signal. When the time has elapsed, the timer circuit 7 and the switching circuit 8 are used to switch to a low frequency gate signal.
[0021]
Further, in the power supply device 100 for gate drive, the DC output voltage Vdc to the three-terminal regulator 5 is set high in advance, so that the auxiliary power supply voltage Vs in the start-up signal generation unit 104 rises more quickly. I have. In this case, the circuit configuration for setting the DC output voltage Vdc high in the gate drive power supply device 100 includes the number of turns of the tertiary winding N3 of the transformer T1 of the conventional gate drive power supply device 700 shown in FIG. Need only be different as described below.
[0022]
Note that the configuration of the gate drive power supply device 100 except for the control unit 103 and the activation signal generation unit 104 shown in FIG. 1 is the same as that of the conventional gate drive power supply device 700 of FIG. 7 and will be described in detail. Is omitted.
[0023]
FIG. 2 is a diagram showing operation signal waveforms of the gate drive power supply device of the present invention. 5A shows a DC intermediate voltage Vif output to the single-phase inverter 102, and FIG. 6B shows a DC output voltage Vdc input to the three-terminal regulator 5 of the start-up signal generator 104. (C) shows an auxiliary power supply voltage Vs for starting the f0 / f1 oscillation circuit 30 and the pulse distribution circuit 4 of the control unit 103, and (d) shows an output to the pulse distribution circuit 4 of the control unit 103. FIG. 3E shows the start-up signal S0 and the AC output voltage Vac input from the gate drive power supply device 100 to the gate drive circuits 11, 12, and 13.
[0024]
Next, the operation of the gate drive power supply device 100 will be described with reference to FIGS.
In FIG. 1, a transformer T1, a switching transistor Q1, capacitors C1 and C2, and a flyback diode D1 constitute a quasi-resonant DC / DC converter 101. The voltage E of the DC power supply 1 is supplied to the DC / DC converter 101. Voltage E of DC power supply 1 is boosted by DC / DC converter 101 to a predetermined DC intermediate voltage Vif. The DC intermediate voltage Vif of the DC / DC converter 101 is fed back to the PWM control circuit 2 provided on the primary winding N1 side of the transformer T1 via the photocoupler PC, and is controlled to a constant voltage by pulse width control.
[0025]
In the single-phase inverter 102, a series circuit of switching transistors Q2 and Q3 is connected to the DC intermediate voltage Vif generated by the DC / DC converter 101, and the DC intermediate voltage Vif is divided by capacitors C3 and C4. The AC output voltage Vac of the single-phase inverter 102 is extracted from an intermediate connection point between the capacitors C3 and C4 and an intermediate connection point between the switching transistors Q2 and Q3, and is supplied to the plurality of gate drive circuits 11, 12, and 13. Is done.
[0026]
As shown in FIG. 2A, when starting the single-phase inverter 102, the DC / DC converter 101 raises the DC intermediate voltage Vif from 0 volts to the target voltage value Vp50 by a soft start pattern. Similarly, in the start-up signal generation unit 104, the DC output voltage Vdc is raised by a circuit including the tertiary winding N3 of the transformer T1 and the flyback diode D4 (FIG. 2B). The power supply voltage Vs is generated (FIG. 2C). The reason why the DC intermediate voltage Vif is raised in the soft start pattern is to prevent an overcurrent from flowing through the flyback diode D1.
[0027]
The activation signal generation unit 104 includes a flyback diode D4, a capacitor C5, and a three-terminal regulator 5 connected to the tertiary winding N3 of the transformer T1, and supplies a gate signal of the switching transistors Q2 and Q3 to the pulse distribution circuit 4. Is supplied to generate an auxiliary power supply voltage Vs. Therefore, the DC output voltage Vdc in the start signal generation unit 104 is also converted from the tertiary winding N3 of the same transformer T1, and the generated voltage value itself is the difference between the primary winding N1 and the tertiary winding N3. Although it depends on the turns ratio, the timing at which the DC output voltage Vdc reaches the final target voltage value is the same timing t1 as the DC intermediate voltage Vif. In FIG. 2B, the DC output voltage Vdc in the present invention is indicated by a thick line, and the thin line indicates a change in the DC output voltage Vdc in the conventional device.
[0028]
That is, the turns ratio of the windings N1, N2, N3 of the transformer T1 is set to N1: N2: N3 = n1: n2: n3.
Then, when the turn ratio for generating the minimum voltage controllable by the three-terminal regulator 5 is n3 (M1N), the start signal generating unit 104 sets the turn ratio n3 to n3> n3 (M1N).
Set to. Thereby, the DC output voltage Vdc to the three-terminal regulator 5 can be increased from Vpa to Vpb. Then, the auxiliary power supply voltage Vs can be raised to the predetermined target potential Vp by the early stage (timing t0) of the rising process of the DC intermediate voltage Vif which is the input of the single-phase inverter 102. In FIG. 2C, a change in the auxiliary power supply voltage Vs in the conventional device is shown by a thin line.
[0029]
The control unit 103 that controls the single-phase inverter 102 supplies the auxiliary power supply voltage Vs from the start signal generation unit 104 to the pulse distribution circuit 4 and the like, and generates a gate signal having a predetermined frequency therefrom. The switching transistor Q2, Q3 of the single-phase inverter 102 is turned on / off by the generated gate signal to start the operation of the inverter, so that the AC output current Iac is reduced to a low voltage value according to the rise of the DC intermediate voltage Vif. , And gradually rise to the rated voltage (FIG. 2 (e)). At this time, since the AC output current Iac itself output from the single-phase inverter 102 to the gate drive circuits 11, 12, 13 becomes small, there is an impedance L due to a leakage inductance and a wiring inductance on the primary side of the transformer T2. Also, an excessive peak current can be suppressed.
[0030]
Here, as shown in FIG. 2D, the activation signal S0 rises when the DC intermediate voltage Vif is lower than the activation signal in the conventional device 700. Therefore, the AC output voltage Vac applied to the gate drive circuits 11, 12, 13 and the like is applied on the primary winding side of the transformer T2 as a voltage smaller by dV (= Va−Vb) than in the related art. Also, the magnitude of the peak value of the AC output current Iac is suppressed.
[0031]
The control unit 103 in the gate drive power supply device 100 of FIG. 1 generates gate signals of the switching transistors Q2 and Q3 by the f0 / f1 oscillation circuit 30. The f0 / f1 oscillation circuit 30 outputs a gate signal at two oscillation frequencies f0 and f1 by using a frequency divider or the like. The switching circuit 8 selects one of the two input gate signals, switches to the oscillation frequency f0 or f1, and outputs the selected signal. When a start signal delayed by the timer circuit 7 is input to the switching circuit 8, the switching circuit 8 is switched from a gate signal having a high oscillation frequency f0 to a signal having a low oscillation frequency f1. Of the two gate signals, the one with the low oscillation frequency f1 finally becomes the frequency of the AC output voltage Vac from the gate drive power supply device 100.
[0032]
Now, assuming that the primary inductance of the transformer T2 of the gate drive circuits 11, 12, and 13 is L1, the AC output current Iac flowing through the gate drive circuits 11, 12, and 13 immediately after starting is represented by the following equation (1). Become.
[0033]
(Equation 1)
Iac = Vac / L1 × ΔT (1)
ΔT is the period of the gate signal. If the oscillation frequency f1 is １ ／ of the oscillation frequency f0, the AC output current Iac of the gate driving power supply device 100 finally becomes as shown in the equation (2). .
[0034]
(Equation 2)
Iac = Vac / L1 × ΔT / 2 (2)
That is, if the oscillation frequency immediately after the start is doubled, the magnitude itself of the AC output current Iac is halved, so that the peak current immediately after the start can be suppressed.
[0035]
FIGS. 3 and 4 are timing charts showing current and voltage waveforms before and after starting the inverter in the embodiment shown in FIG. In each of the figures, the horizontal axis is a time axis, and FIG. 3 is an enlarged view of before and after starting to output the AC output voltage Vac after a lapse of time t0 (for example, 10.00 ms) from the power-on time. . FIG. 4 shows the change of the DC intermediate voltage Vif together with the envelope of the current-voltage waveform shown in FIG. All of these timing diagrams correspond to the operation waveforms in the conventional device 700 described with reference to FIGS.
[0036]
The frequency of the AC output voltage Vac and the AC output current Iac shown in FIG. 3 is almost twice that of the conventional one shown in FIG. 9, and the absolute values of the voltage value and the current value are almost halved. In addition, the peak value of the AC output current immediately after the start can be reduced.
[0037]
FIGS. 5 and 6 show operation waveforms in the case where the oscillation frequency is not switched by the f0 / f1 oscillation circuit 30 and the operation is started at the same low frequency as in the related art. In this case, only the DC output voltage Vdc to the three-terminal regulator 5 is set high, but the peak value of the AC output current Iac can be reduced as compared with the conventional case (FIG. 9).
[0038]
Note that the circuit configuration of the control unit 103 can be configured in any of an analog system and a digital system. However, in order to reliably drive the f0 / f1 oscillation circuit 30, the timer circuit 7, and the switching circuit 8, It is necessary to supply a stable DC power supply. Therefore, the start signal generating unit 104 uses the three-terminal regulator 5 to generate a stable auxiliary power supply voltage Vs. However, a zener diode may be used instead of the three-terminal regulator 5.
[0039]
Further, in the above description, the auxiliary power supply voltage Vs supplied to the control unit 103 is taken out from the tertiary winding N3 of the DC / DC converter 101. However, the DC intermediate voltage Vif of the single-phase inverter 102 is supplied to a regulator or the like. It is also possible to generate by controlling with.
[0040]
【The invention's effect】
As described above, according to the power supply device for driving a gate of the present invention, it is possible to suppress the current peak value immediately after the gate power supply is started, and a small and inexpensive power supply device can be realized.
[Brief description of the drawings]
FIG. 1 is a circuit configuration diagram showing a gate drive power supply device according to an embodiment of the present invention.
FIG. 2 is a diagram showing operation signal waveforms of the gate drive power supply device of the present invention.
FIG. 3 is a current-voltage waveform diagram for explaining the operation of the gate drive power supply device shown in FIG.
FIG. 4 is a diagram showing a change of a DC intermediate voltage together with an envelope of a current-voltage waveform shown in FIG. 3;
FIG. 5 is a current-voltage waveform diagram when the gate drive power supply device is operated without switching the oscillation frequency.
FIG. 6 is a diagram showing a change of a DC intermediate voltage together with an envelope of a current-voltage waveform shown in FIG. 5;
FIG. 7 is a circuit configuration diagram illustrating an example of a conventional gate drive power supply device.
FIG. 8 is a diagram illustrating an example of a configuration of a gate drive circuit.
FIG. 9 is a voltage-current waveform diagram showing the operation of the conventional gate drive power supply device.
FIG. 10 is a voltage-current waveform diagram showing an operation of a conventional gate drive power supply device.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 DC power supply 2 PWM control circuit 4 Pulse distribution circuit 5 Three-terminal regulator 6 Start signal generation circuit 7 Timer circuit 8 Switching circuit 9 Gate control units 11, 12, 13 Gate drive circuits 21, 22, 23 Power device 30 f0 / f1 oscillation Circuit 100 Gate drive power supply 101 DC / DC converter 102 Single-phase inverter 103 Control unit 104 Start signal generation unit

Claims (3)

In a gate drive power supply device constituting a power supply of a gate drive circuit for driving a power device on and off,
A DC / DC converter for boosting a DC power supply voltage to a predetermined DC intermediate voltage;
An inverter circuit connected to the subsequent stage of the DC / DC converter and receiving the DC intermediate voltage;
A control circuit that performs on / off control with a control signal having a predetermined frequency for a switching element included in the inverter circuit,
A start signal generating circuit for generating a start signal for starting the control circuit by an auxiliary power supply voltage supplied from the DC / DC converter;
When activating the inverter circuit, the activation signal generation circuit generates the activation signal by raising the auxiliary power supply voltage earlier than the timing of raising the DC intermediate voltage, the DC intermediate voltage is A gate drive power supply device wherein a switching operation is performed by the inverter circuit from a low state. In a gate drive power supply device constituting a power supply of a gate drive circuit for driving a power device on and off,
A DC / DC converter for boosting a DC power supply voltage to a predetermined DC intermediate voltage;
An inverter circuit connected to the subsequent stage of the DC / DC converter and receiving the DC intermediate voltage;
A control circuit for switching on and off by switching control signals of a plurality of frequencies to a switching element constituting the inverter circuit;
A start signal generating circuit for generating a start signal for starting the control circuit by supplying an auxiliary power from the DC / DC converter;
In the control circuit, when the inverter circuit is activated, the switching element is turned on and off by a high-frequency control signal, and when a certain time has elapsed after the activation, the control signal is changed to a low-frequency one. A gate drive power supply device characterized by switching. When activating the inverter circuit, the activation signal generation circuit generates the activation signal by raising the auxiliary power supply voltage earlier than the timing at which the DC intermediate voltage rises, and changes the DC intermediate voltage from a low state. 3. The gate drive power supply device according to claim 2, wherein the inverter circuit performs a switching operation.

Images