JP2004240717A - Software updating device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a software updating device capable of instantaneously updating software for controlling the operation of electronic equipment without stopping the original function of the electronic equipment. <P>SOLUTION: This semiconductor memory is provided with at least one first memory block in which software to be executed is stored and at least one second memory block in which software for update is stored. A comparator compares the address signal of a CPU with the contents of a conversion table to detect a timing when the software to be executed is not used according to instruction information stored in a register. A rewriting circuit changes the contents of the conversion table in order to exchange at least one first memory block with at least one second memory block according to the instruction information stored in the register. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a software update device that can instantly update the contents of software.
[0002]
[Prior art]
The software for controlling the operation of the electronic device is written in a nonvolatile memory such as a flash memory as firmware, for example, and is sometimes used by being arranged in a part of a memory space of a CPU (Central Processing Unit).
[0003]
In this case, when updating the content of the software written in the nonvolatile memory, the original operation of the electronic device, that is, the execution of the software written in the nonvolatile memory is temporarily stopped and then the content is rewritten. Thereafter, it was necessary to take a procedure of restoring the original functions of the electronic device through a reset and a restart. This is to prevent the program code being rewritten from being erroneously executed by the CPU.
[0004]
However, there is a problem that the above procedure cannot be applied to an electronic device that requires real-time properties or that cannot be temporarily stopped, and it is difficult to update software.
[0005]
[Problems to be solved by the invention]
SUMMARY OF THE INVENTION An object of the present invention is to provide a software updating apparatus which solves the problems based on the conventional technology and can instantaneously update software for controlling the operation of an electronic device without stopping the original functions of the electronic device. It is in.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a conversion table in which information of correspondence between a memory space of a CPU and a memory space of a semiconductor memory is stored; An address conversion circuit for performing address conversion between the memory space of the semiconductor memory and a register holding instruction information for rewriting the contents of the conversion table; and an address signal of the CPU according to the instruction information held in the register. And a comparator that compares the content of the conversion table with the content of the conversion table to detect timing when the software to be executed is not used, and issues an instruction to rewrite the content of the conversion table, and the content of the conversion table according to the instruction of the comparator. And a rewriting circuit for changing
The semiconductor memory includes at least one first memory block storing the execution target software and at least one second memory block storing update software,
The rewriting circuit changes contents of the conversion table so as to replace at least one first memory block and at least one second memory block of the semiconductor memory according to the instruction information held in the register. And a software updating apparatus characterized by the following.
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a software update device of the present invention will be described in detail based on a preferred embodiment shown in the accompanying drawings.
[0008]
FIG. 1 is a schematic configuration diagram of an embodiment of an electronic device to which a software update device of the present invention is applied. The electronic device 10 shown in FIG. 1 includes a CPU (Central Processing Unit) 12, an address decoder 14, a flash memory 16, and an SRAM (Static RAM) 18. The CPU 12 and the address decoder 14 are connected via a CPU bus 20, and the address decoder 14 and the flash memory 16 and the SRAM 18 are connected via a memory bus 22.
[0009]
Here, the flash memory 16 is firmware, and stores a basic program for controlling a fixed operation of the electronic device 10. The SRAM 18 stores an application program for controlling the operation of the CPU 12 and is used as a work area when the CPU 12 operates. The memory space of the flash memory 16 and the SRAM 18 is arranged at a predetermined position in the memory space of the CPU 12, and the CPU 12 reads a program stored in the flash memory 16 and the SRAM 18, and operates according to the read program.
[0010]
The address decoder 14 is an example of the software update device of the present invention, and has a function of performing address conversion between a logical memory space of the CPU 12 and a physical memory space of the flash memory 16 and the SRAM 18. The illustrated address decoder 14 includes bus drivers 24 and 26 for driving the CPU bus 20 and the memory bus 22, an address conversion circuit 28, a conversion table 30, a rewrite circuit 32, a comparator 34, and a register 36, respectively. Have.
[0011]
The bus driver 24 is mutually connected to the CPU bus 20, the address conversion circuit 28, and the comparator 34, and the bus driver 26 is mutually connected to the memory bus 22 and the address conversion circuit 28, respectively. Further, the address conversion circuit 28 is mutually connected to the conversion table 30, and the conversion table 30 is mutually connected to the comparator 34, and the comparator 34 is mutually connected to the register 36. The output of the comparator 34 is input to the rewriting circuit 32, and the output of the rewriting circuit 32 is input to the conversion table 30, although not shown.
[0012]
Here, the conversion table 30 is a table in which information for associating the logical memory space of the CPU 12 with the physical memory spaces of the flash memory 16 and the SRAM 18 is stored.
[0013]
The address conversion circuit 28 performs address conversion between the logical memory space of the CPU 12 and the physical memory spaces of the flash memory 16 and the SRAM 18 according to the contents of the conversion table 30. The address signal output from the CPU 12 is input to an address conversion circuit 28 via a CPU bus 20 and a bus driver 24, is converted by the address conversion circuit 28, and then is transferred to the flash memory 16 via a bus driver 26 and a memory bus 22. And input to the SRAM 18.
[0014]
The register 36 holds instruction information for rewriting the contents of the conversion table 30. This instruction information is information as to which memory block to be executed is to be replaced with which memory block for updating, as described later. Although not shown, instruction information is written in the register 36 from, for example, the CPU 12.
[0015]
When the instruction information is written into the register 36, the comparator 34 compares the address signal of the CPU 12 input via the bus driver 24 with the contents of the table stored in the conversion table 30 according to the instruction information, and executes The timing at which the target software is not used is detected, and the rewriting circuit 32 is instructed to rewrite the contents of the conversion table 30 in accordance with the instruction information of the register 36.
[0016]
The rewriting circuit 32 rewrites the contents of the conversion table 30 according to the instruction information of the register 36 according to the instruction from the comparator 34.
[0017]
Next, the operation of the electronic device 10 when updating the software stored in the flash memory 16 will be described with reference to an example shown in FIG.
[0018]
FIG. 2 is a conceptual diagram of an embodiment showing a correspondence relationship between a memory space of a CPU and a memory space of a flash memory. The left side of the figure represents the correspondence of the memory space before the update, and the right side represents the correspondence of the memory space after the update. Here, in the memory space of the CPU 12, memory blocks i to i + 3 are memory blocks in which a program to be executed is stored, and memory blocks j to j + 3 are spare memory blocks in which a program for updating is stored.
[0019]
The memory block in which the program to be executed is stored is a memory block in which the currently used program is stored, which is accessed by the CPU 12 and the stored program is read and executed. On the other hand, the spare memory block in which the update program is stored is a memory block in which the update program is stored, which is replaced with the program stored in the execution target memory block.
[0020]
First, as shown on the left side of FIG. 2, in the memory space of the CPU 12 before the update, the codes A, B, C, and D are stored in the memory blocks i to i + 3, respectively, and the new codes A are stored in the memory blocks j and j + 1. , New code C is stored. In this case, in the conversion table 30, the memory blocks i to i + 3 of the CPU 12 correspond to the memory blocks i to i + 3 of the flash memory 16, respectively, and the memory blocks j to j + 3 of the CPU 12 correspond to the memory blocks j to j + 3 of the flash memory 16, respectively. Information that corresponds is stored.
[0021]
On the other hand, as shown on the right side of FIG. 2, in the updated memory space of the CPU 12, the new codes A, B, C, and D are stored in the memory blocks i to i + 3, respectively. A code A and a code C are stored in j + 1, respectively. In this case, in the conversion table 30, the memory blocks i to i + 3 of the CPU 12 respectively correspond to the memory blocks j, i + 1, j + 1, i + 3 of the flash memory 16, and the memory blocks j to j + 3 of the CPU 12 correspond to the memory blocks of the flash memory 16, respectively. Information that corresponds to i, i + 2, j + 2, j + 3 is stored.
[0022]
That is, when the CPU 12 accesses a memory address in the memory block i, i + 2, the CPU 12 actually accesses a corresponding memory address in the memory block j, j + 1 of the flash memory 16. Conversely, when the CPU 12 accesses a memory address in the memory block j, j + 1, the CPU 12 actually accesses a corresponding memory address in the memory block i, i + 2 of the flash memory 16.
[0023]
The codes A, B, C, and D are codes to be executed, and the new codes A and C are new codes for updating that are replaced with the codes A and C, respectively. The codes A, B, C, and D and the new codes A and C are programs that operate independently of each other. For example, while the CPU 12 is executing the program of the codes B, C, and D, It is possible to update (replace) the program of code A with the program of new code A.
[0024]
When updating the software, the CPU 12 writes the update program into the spare memory block of the flash memory 16 according to the software update program. In the present embodiment, as shown on the left side of FIG. 2, the new code A is written in the memory block j of the flash memory 16, and the new code C is written in the memory block j + 1 of the flash memory 16.
[0025]
The writing of the new code for updating does not change the contents of the memory blocks i to i + 3 in which the program to be executed is stored, and therefore can be executed without stopping the original functions of the electronic device 10. It is. As the software update program, for example, a program stored in the flash memory 16 may be used, or a program read into the SRAM 18 from an external storage device or the like may be used.
[0026]
When the writing of the new code is completed, the CPU 12 tells the register 36 which of the memory blocks i to i + 3 of the flash memory 16 is to be replaced with which of the spare memory blocks j to j + 3. Is written. In the present embodiment, information for instructing to exchange the memory block i with the memory block j and to exchange the memory block i + 2 with the memory block j + 1 is written.
[0027]
When the instruction information is written into the register 36, the comparator 34 starts operating according to the instruction information. The comparator 34 refers to the contents of the conversion table 30 and recognizes that the memory blocks i and i + 2 of the CPU 12 correspond to the memory blocks i and i + 2 of the flash memory 16 and monitors the address signal of the CPU 12. , CPU 12 accesses memory addresses in memory blocks i and i + 2.
[0028]
When the comparator 34 detects that the CPU 12 has not accessed the memory address in the memory block i, i + 2, the comparator 34 instructs the rewriting circuit 32 to rewrite the contents of the conversion table 30 in accordance with the instruction information of the register 36. Is given.
[0029]
Upon receiving the instruction from the comparator 34, the rewriting circuit 32 rewrites the contents of the conversion table 30 according to the instruction information held in the register 36. In the present embodiment, as shown on the right side of FIG. 2, the memory blocks i and i + 2 of the CPU 12 are associated with the memory blocks j and j + 1 of the flash memory 16, and the memory blocks j and j + 1 of the CPU 12 and the memory The contents of the conversion table 30 are rewritten so that the blocks i and i + 2 are associated with each other.
[0030]
The address conversion circuit 28 converts the memory space of the CPU 12 according to the contents of the changed conversion table 30. In the case of the present embodiment, when the CPU 12 accesses a memory address in the memory block i, the CPU 12 converts the memory address into a corresponding memory address in the memory block j of the flash memory 16, and the CPU 12 accesses a memory address in the memory block i + 2. , To a corresponding memory address in the memory block j + 1 of the flash memory 16.
[0031]
Accordingly, from the viewpoint of the CPU 12, it appears that the contents of the memory blocks i and i + 2 of the flash memory 16 are instantaneously changed to the contents of the memory blocks j and j + 1. Therefore, the software stored in the flash memory 16 can be updated instantaneously without stopping the original operation of the electronic device 10.
[0032]
Note that the present invention is not limited to the flash memory 16 and the SRAM 18, and any conventionally known semiconductor memory may be used. Further, the semiconductor memory only needs to include at least one memory block in which software to be executed is stored and at least one memory block in which software for updating is stored. Further, the software update device of the present invention is not limited to firmware, but can be applied to any software update.
[0033]
The present invention is basically as described above.
As described above, the software updating device of the present invention has been described in detail. However, the present invention is not limited to the above embodiment, and various improvements and changes may be made without departing from the gist of the present invention. is there.
[0034]
【The invention's effect】
As described above in detail, in the software updating apparatus of the present invention, the execution target software is used by comparing the address signal of the CPU with the contents of the conversion table by the comparator according to the instruction information held in the register. The non-existent timing is detected, and the contents of the conversion table are changed by the rewriting circuit so that at least one first memory block and at least one second memory block of the semiconductor memory are replaced according to the instruction information held in the register. Is what you do.
Thus, according to the software updating device of the present invention, the software for controlling the operation of the electronic device can be instantaneously updated without stopping the original function of the electronic device.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of an embodiment of an electronic device to which a software update device of the present invention is applied.
FIG. 2 is a conceptual diagram illustrating an embodiment of a memory space of a CPU.
[Explanation of symbols]
10 Electronic equipment 12 CPU
14 address decoder 16 flash memory 18 SRAM
Reference Signs List 20 CPU bus 22 Memory bus 24, 26 Bus driver 28 Address conversion circuit 30 Conversion table 32 Rewriting circuit 34 Comparator 36 Register

Claims (1)

A conversion table storing information on the correspondence between the memory space of the CPU and the memory space of the semiconductor memory; and an address between the memory space of the CPU and the memory space of the semiconductor memory according to the contents of the conversion table. An address conversion circuit for performing conversion, a register for storing instruction information for rewriting the contents of the conversion table, and comparing the address signal of the CPU with the contents of the conversion table in accordance with the instruction information stored in the register; A comparator that detects timing when the target software is not used, and issues a command to rewrite the content of the conversion table, and a rewriting circuit that changes the content of the conversion table according to the instruction of the comparator,
The semiconductor memory includes at least one first memory block storing the execution target software and at least one second memory block storing update software,
The rewriting circuit changes contents of the conversion table so as to replace at least one first memory block and at least one second memory block of the semiconductor memory according to the instruction information held in the register. A software update device characterized by the above-mentioned.

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